arch_checks.c 3.0 KB

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  1. /*
  2. * File: arch/blackfin/mach-common/arch_checks.c
  3. * Based on:
  4. * Author: Robin Getz <rgetz@blackfin.uclinux.org>
  5. *
  6. * Created: 25Jul07
  7. * Description: Do some checking to make sure things are OK
  8. *
  9. * Modified:
  10. * Copyright 2004-2007 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #include <asm/fixed_code.h>
  30. #include <mach/anomaly.h>
  31. #include <asm/clocks.h>
  32. #ifdef CONFIG_BFIN_KERNEL_CLOCK
  33. # if (CONFIG_VCO_HZ > CONFIG_MAX_VCO_HZ)
  34. # error "VCO selected is more than maximum value. Please change the VCO multipler"
  35. # endif
  36. # if (CONFIG_SCLK_HZ > CONFIG_MAX_SCLK_HZ)
  37. # error "Sclk value selected is more than maximum. Please select a proper value for SCLK multiplier"
  38. # endif
  39. # if (CONFIG_SCLK_HZ < CONFIG_MIN_SCLK_HZ)
  40. # error "Sclk value selected is less than minimum. Please select a proper value for SCLK multiplier"
  41. # endif
  42. # if (ANOMALY_05000273) && (CONFIG_SCLK_HZ * 2 > CONFIG_CCLK_HZ)
  43. # error "ANOMALY 05000273, please make sure CCLK is at least 2x SCLK"
  44. # endif
  45. # if (CONFIG_SCLK_HZ > CONFIG_CCLK_HZ) && (CONFIG_SCLK_HZ != CONFIG_CLKIN_HZ) && (CONFIG_CCLK_HZ != CONFIG_CLKIN_HZ)
  46. # error "Please select sclk less than cclk"
  47. # endif
  48. #endif /* CONFIG_BFIN_KERNEL_CLOCK */
  49. #if CONFIG_BOOT_LOAD < FIXED_CODE_END
  50. # error "The kernel load address must be after the fixed code section"
  51. #endif
  52. #if (CONFIG_BOOT_LOAD & 0x3)
  53. # error "The kernel load address must be 4 byte aligned"
  54. #endif
  55. /* The entire kernel must be able to make a 24bit pcrel call to start of L1 */
  56. #if ((0xffffffff - L1_CODE_START + 1) + CONFIG_BOOT_LOAD) > 0x1000000
  57. # error "The kernel load address is too high; keep it below 10meg for safety"
  58. #endif
  59. #if ANOMALY_05000448
  60. # error You are using a part with anomaly 05000448, this issue causes random memory read/write failures - that means random crashes.
  61. #endif
  62. /* if 220 exists, can not set External Memory WB and L2 not_cached, either External Memory not_cached and L2 WB */
  63. #if ANOMALY_05000220 && \
  64. ((defined(CONFIG_BFIN_EXTMEM_WRITEBACK) && !defined(CONFIG_BFIN_L2_DCACHEABLE)) || \
  65. (!defined(CONFIG_BFIN_EXTMEM_DCACHEABLE) && defined(CONFIG_BFIN_L2_WRITEBACK)))
  66. # error You are exposing Anomaly 220 in this config, either config L2 as Write Through, or make External Memory WB.
  67. #endif