blackfin.h 2.7 KB

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  1. /*
  2. * File: include/asm-blackfin/mach-bf548/blackfin.h
  3. * Based on:
  4. * Author:
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Rev:
  10. *
  11. * Modified:
  12. *
  13. *
  14. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2, or (at your option)
  19. * any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; see the file COPYING.
  28. * If not, write to the Free Software Foundation,
  29. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  30. */
  31. #ifndef _MACH_BLACKFIN_H_
  32. #define _MACH_BLACKFIN_H_
  33. #include "bf548.h"
  34. #include "anomaly.h"
  35. #ifdef CONFIG_BF542
  36. #include "defBF542.h"
  37. #endif
  38. #ifdef CONFIG_BF544
  39. #include "defBF544.h"
  40. #endif
  41. #ifdef CONFIG_BF547
  42. #include "defBF547.h"
  43. #endif
  44. #ifdef CONFIG_BF548
  45. #include "defBF548.h"
  46. #endif
  47. #ifdef CONFIG_BF549
  48. #include "defBF549.h"
  49. #endif
  50. #if !defined(__ASSEMBLY__)
  51. #ifdef CONFIG_BF542
  52. #include "cdefBF542.h"
  53. #endif
  54. #ifdef CONFIG_BF544
  55. #include "cdefBF544.h"
  56. #endif
  57. #ifdef CONFIG_BF547
  58. #include "cdefBF547.h"
  59. #endif
  60. #ifdef CONFIG_BF548
  61. #include "cdefBF548.h"
  62. #endif
  63. #ifdef CONFIG_BF549
  64. #include "cdefBF549.h"
  65. #endif
  66. #endif
  67. #define BFIN_UART_NR_PORTS 4
  68. #define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
  69. #define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
  70. #define OFFSET_GCTL 0x08 /* Global Control Register */
  71. #define OFFSET_LCR 0x0C /* Line Control Register */
  72. #define OFFSET_MCR 0x10 /* Modem Control Register */
  73. #define OFFSET_LSR 0x14 /* Line Status Register */
  74. #define OFFSET_MSR 0x18 /* Modem Status Register */
  75. #define OFFSET_SCR 0x1C /* SCR Scratch Register */
  76. #define OFFSET_IER_SET 0x20 /* Set Interrupt Enable Register */
  77. #define OFFSET_IER_CLEAR 0x24 /* Clear Interrupt Enable Register */
  78. #define OFFSET_THR 0x28 /* Transmit Holding register */
  79. #define OFFSET_RBR 0x2C /* Receive Buffer register */
  80. /* PLL_DIV Masks */
  81. #define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */
  82. #define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */
  83. #define CCLK_DIV4 CSEL_DIV4 /* CCLK = VCO / 4 */
  84. #define CCLK_DIV8 CSEL_DIV8 /* CCLK = VCO / 8 */
  85. #endif