cm_bf548.c 20 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf548/boards/cm_bf548.c
  3. * Based on: arch/blackfin/mach-bf537/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2008 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/mtd/physmap.h>
  35. #include <linux/spi/spi.h>
  36. #include <linux/spi/flash.h>
  37. #include <linux/irq.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/usb/musb.h>
  40. #include <asm/bfin5xx_spi.h>
  41. #include <asm/dma.h>
  42. #include <asm/gpio.h>
  43. #include <asm/nand.h>
  44. #include <asm/portmux.h>
  45. #include <asm/bfin_sdh.h>
  46. #include <mach/bf54x_keys.h>
  47. #include <asm/dpmc.h>
  48. #include <linux/input.h>
  49. #include <linux/spi/ad7877.h>
  50. /*
  51. * Name the Board for the /proc/cpuinfo
  52. */
  53. const char bfin_board_name[] = "Bluetechnix CM-BF548";
  54. /*
  55. * Driver needs to know address, irq and flag pin.
  56. */
  57. #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
  58. #include <mach/bf54x-lq043.h>
  59. static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
  60. .width = 480,
  61. .height = 272,
  62. .xres = {480, 480, 480},
  63. .yres = {272, 272, 272},
  64. .bpp = {24, 24, 24},
  65. .disp = GPIO_PE3,
  66. };
  67. static struct resource bf54x_lq043_resources[] = {
  68. {
  69. .start = IRQ_EPPI0_ERR,
  70. .end = IRQ_EPPI0_ERR,
  71. .flags = IORESOURCE_IRQ,
  72. },
  73. };
  74. static struct platform_device bf54x_lq043_device = {
  75. .name = "bf54x-lq043",
  76. .id = -1,
  77. .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
  78. .resource = bf54x_lq043_resources,
  79. .dev = {
  80. .platform_data = &bf54x_lq043_data,
  81. },
  82. };
  83. #endif
  84. #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
  85. static unsigned int bf548_keymap[] = {
  86. KEYVAL(0, 0, KEY_ENTER),
  87. KEYVAL(0, 1, KEY_HELP),
  88. KEYVAL(0, 2, KEY_0),
  89. KEYVAL(0, 3, KEY_BACKSPACE),
  90. KEYVAL(1, 0, KEY_TAB),
  91. KEYVAL(1, 1, KEY_9),
  92. KEYVAL(1, 2, KEY_8),
  93. KEYVAL(1, 3, KEY_7),
  94. KEYVAL(2, 0, KEY_DOWN),
  95. KEYVAL(2, 1, KEY_6),
  96. KEYVAL(2, 2, KEY_5),
  97. KEYVAL(2, 3, KEY_4),
  98. KEYVAL(3, 0, KEY_UP),
  99. KEYVAL(3, 1, KEY_3),
  100. KEYVAL(3, 2, KEY_2),
  101. KEYVAL(3, 3, KEY_1),
  102. };
  103. static struct bfin_kpad_platform_data bf54x_kpad_data = {
  104. .rows = 4,
  105. .cols = 4,
  106. .keymap = bf548_keymap,
  107. .keymapsize = ARRAY_SIZE(bf548_keymap),
  108. .repeat = 0,
  109. .debounce_time = 5000, /* ns (5ms) */
  110. .coldrive_time = 1000, /* ns (1ms) */
  111. .keyup_test_interval = 50, /* ms (50ms) */
  112. };
  113. static struct resource bf54x_kpad_resources[] = {
  114. {
  115. .start = IRQ_KEY,
  116. .end = IRQ_KEY,
  117. .flags = IORESOURCE_IRQ,
  118. },
  119. };
  120. static struct platform_device bf54x_kpad_device = {
  121. .name = "bf54x-keys",
  122. .id = -1,
  123. .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
  124. .resource = bf54x_kpad_resources,
  125. .dev = {
  126. .platform_data = &bf54x_kpad_data,
  127. },
  128. };
  129. #endif
  130. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  131. static struct platform_device rtc_device = {
  132. .name = "rtc-bfin",
  133. .id = -1,
  134. };
  135. #endif
  136. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  137. static struct resource bfin_uart_resources[] = {
  138. #ifdef CONFIG_SERIAL_BFIN_UART0
  139. {
  140. .start = 0xFFC00400,
  141. .end = 0xFFC004FF,
  142. .flags = IORESOURCE_MEM,
  143. },
  144. #endif
  145. #ifdef CONFIG_SERIAL_BFIN_UART1
  146. {
  147. .start = 0xFFC02000,
  148. .end = 0xFFC020FF,
  149. .flags = IORESOURCE_MEM,
  150. },
  151. #endif
  152. #ifdef CONFIG_SERIAL_BFIN_UART2
  153. {
  154. .start = 0xFFC02100,
  155. .end = 0xFFC021FF,
  156. .flags = IORESOURCE_MEM,
  157. },
  158. #endif
  159. #ifdef CONFIG_SERIAL_BFIN_UART3
  160. {
  161. .start = 0xFFC03100,
  162. .end = 0xFFC031FF,
  163. .flags = IORESOURCE_MEM,
  164. },
  165. #endif
  166. };
  167. static struct platform_device bfin_uart_device = {
  168. .name = "bfin-uart",
  169. .id = 1,
  170. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  171. .resource = bfin_uart_resources,
  172. };
  173. #endif
  174. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  175. #ifdef CONFIG_BFIN_SIR0
  176. static struct resource bfin_sir0_resources[] = {
  177. {
  178. .start = 0xFFC00400,
  179. .end = 0xFFC004FF,
  180. .flags = IORESOURCE_MEM,
  181. },
  182. {
  183. .start = IRQ_UART0_RX,
  184. .end = IRQ_UART0_RX+1,
  185. .flags = IORESOURCE_IRQ,
  186. },
  187. {
  188. .start = CH_UART0_RX,
  189. .end = CH_UART0_RX+1,
  190. .flags = IORESOURCE_DMA,
  191. },
  192. };
  193. static struct platform_device bfin_sir0_device = {
  194. .name = "bfin_sir",
  195. .id = 0,
  196. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  197. .resource = bfin_sir0_resources,
  198. };
  199. #endif
  200. #ifdef CONFIG_BFIN_SIR1
  201. static struct resource bfin_sir1_resources[] = {
  202. {
  203. .start = 0xFFC02000,
  204. .end = 0xFFC020FF,
  205. .flags = IORESOURCE_MEM,
  206. },
  207. {
  208. .start = IRQ_UART1_RX,
  209. .end = IRQ_UART1_RX+1,
  210. .flags = IORESOURCE_IRQ,
  211. },
  212. {
  213. .start = CH_UART1_RX,
  214. .end = CH_UART1_RX+1,
  215. .flags = IORESOURCE_DMA,
  216. },
  217. };
  218. static struct platform_device bfin_sir1_device = {
  219. .name = "bfin_sir",
  220. .id = 1,
  221. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  222. .resource = bfin_sir1_resources,
  223. };
  224. #endif
  225. #ifdef CONFIG_BFIN_SIR2
  226. static struct resource bfin_sir2_resources[] = {
  227. {
  228. .start = 0xFFC02100,
  229. .end = 0xFFC021FF,
  230. .flags = IORESOURCE_MEM,
  231. },
  232. {
  233. .start = IRQ_UART2_RX,
  234. .end = IRQ_UART2_RX+1,
  235. .flags = IORESOURCE_IRQ,
  236. },
  237. {
  238. .start = CH_UART2_RX,
  239. .end = CH_UART2_RX+1,
  240. .flags = IORESOURCE_DMA,
  241. },
  242. };
  243. static struct platform_device bfin_sir2_device = {
  244. .name = "bfin_sir",
  245. .id = 2,
  246. .num_resources = ARRAY_SIZE(bfin_sir2_resources),
  247. .resource = bfin_sir2_resources,
  248. };
  249. #endif
  250. #ifdef CONFIG_BFIN_SIR3
  251. static struct resource bfin_sir3_resources[] = {
  252. {
  253. .start = 0xFFC03100,
  254. .end = 0xFFC031FF,
  255. .flags = IORESOURCE_MEM,
  256. },
  257. {
  258. .start = IRQ_UART3_RX,
  259. .end = IRQ_UART3_RX+1,
  260. .flags = IORESOURCE_IRQ,
  261. },
  262. {
  263. .start = CH_UART3_RX,
  264. .end = CH_UART3_RX+1,
  265. .flags = IORESOURCE_DMA,
  266. },
  267. };
  268. static struct platform_device bfin_sir3_device = {
  269. .name = "bfin_sir",
  270. .id = 3,
  271. .num_resources = ARRAY_SIZE(bfin_sir3_resources),
  272. .resource = bfin_sir3_resources,
  273. };
  274. #endif
  275. #endif
  276. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  277. #include <linux/smsc911x.h>
  278. static struct resource smsc911x_resources[] = {
  279. {
  280. .name = "smsc911x-memory",
  281. .start = 0x24000000,
  282. .end = 0x24000000 + 0xFF,
  283. .flags = IORESOURCE_MEM,
  284. },
  285. {
  286. .start = IRQ_PE6,
  287. .end = IRQ_PE6,
  288. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  289. },
  290. };
  291. static struct smsc911x_platform_config smsc911x_config = {
  292. .flags = SMSC911X_USE_16BIT,
  293. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  294. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  295. .phy_interface = PHY_INTERFACE_MODE_MII,
  296. };
  297. static struct platform_device smsc911x_device = {
  298. .name = "smsc911x",
  299. .id = 0,
  300. .num_resources = ARRAY_SIZE(smsc911x_resources),
  301. .resource = smsc911x_resources,
  302. .dev = {
  303. .platform_data = &smsc911x_config,
  304. },
  305. };
  306. #endif
  307. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  308. static struct resource musb_resources[] = {
  309. [0] = {
  310. .start = 0xFFC03C00,
  311. .end = 0xFFC040FF,
  312. .flags = IORESOURCE_MEM,
  313. },
  314. [1] = { /* general IRQ */
  315. .start = IRQ_USB_INT0,
  316. .end = IRQ_USB_INT0,
  317. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  318. },
  319. [2] = { /* DMA IRQ */
  320. .start = IRQ_USB_DMA,
  321. .end = IRQ_USB_DMA,
  322. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  323. },
  324. };
  325. static struct musb_hdrc_config musb_config = {
  326. .multipoint = 0,
  327. .dyn_fifo = 0,
  328. .soft_con = 1,
  329. .dma = 1,
  330. .num_eps = 8,
  331. .dma_channels = 8,
  332. .gpio_vrsel = GPIO_PH6,
  333. };
  334. static struct musb_hdrc_platform_data musb_plat = {
  335. #if defined(CONFIG_USB_MUSB_OTG)
  336. .mode = MUSB_OTG,
  337. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  338. .mode = MUSB_HOST,
  339. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  340. .mode = MUSB_PERIPHERAL,
  341. #endif
  342. .config = &musb_config,
  343. };
  344. static u64 musb_dmamask = ~(u32)0;
  345. static struct platform_device musb_device = {
  346. .name = "musb_hdrc",
  347. .id = 0,
  348. .dev = {
  349. .dma_mask = &musb_dmamask,
  350. .coherent_dma_mask = 0xffffffff,
  351. .platform_data = &musb_plat,
  352. },
  353. .num_resources = ARRAY_SIZE(musb_resources),
  354. .resource = musb_resources,
  355. };
  356. #endif
  357. static struct resource bfin_gpios_resources = {
  358. .start = 0,
  359. .end = MAX_BLACKFIN_GPIOS - 1,
  360. .flags = IORESOURCE_IRQ,
  361. };
  362. static struct platform_device bfin_gpios_device = {
  363. .name = "simple-gpio",
  364. .id = -1,
  365. .num_resources = 1,
  366. .resource = &bfin_gpios_resources,
  367. };
  368. #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
  369. static struct resource bfin_atapi_resources[] = {
  370. {
  371. .start = 0xFFC03800,
  372. .end = 0xFFC0386F,
  373. .flags = IORESOURCE_MEM,
  374. },
  375. {
  376. .start = IRQ_ATAPI_ERR,
  377. .end = IRQ_ATAPI_ERR,
  378. .flags = IORESOURCE_IRQ,
  379. },
  380. };
  381. static struct platform_device bfin_atapi_device = {
  382. .name = "pata-bf54x",
  383. .id = -1,
  384. .num_resources = ARRAY_SIZE(bfin_atapi_resources),
  385. .resource = bfin_atapi_resources,
  386. };
  387. #endif
  388. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  389. static struct mtd_partition partition_info[] = {
  390. {
  391. .name = "linux kernel(nand)",
  392. .offset = 0,
  393. .size = 4 * 1024 * 1024,
  394. },
  395. {
  396. .name = "file system(nand)",
  397. .offset = 4 * 1024 * 1024,
  398. .size = (256 - 4) * 1024 * 1024,
  399. },
  400. };
  401. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  402. .page_size = NFC_PG_SIZE_256,
  403. .data_width = NFC_NWIDTH_8,
  404. .partitions = partition_info,
  405. .nr_partitions = ARRAY_SIZE(partition_info),
  406. .rd_dly = 3,
  407. .wr_dly = 3,
  408. };
  409. static struct resource bf5xx_nand_resources[] = {
  410. {
  411. .start = 0xFFC03B00,
  412. .end = 0xFFC03B4F,
  413. .flags = IORESOURCE_MEM,
  414. },
  415. {
  416. .start = CH_NFC,
  417. .end = CH_NFC,
  418. .flags = IORESOURCE_IRQ,
  419. },
  420. };
  421. static struct platform_device bf5xx_nand_device = {
  422. .name = "bf5xx-nand",
  423. .id = 0,
  424. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  425. .resource = bf5xx_nand_resources,
  426. .dev = {
  427. .platform_data = &bf5xx_nand_platform,
  428. },
  429. };
  430. #endif
  431. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  432. static struct bfin_sd_host bfin_sdh_data = {
  433. .dma_chan = CH_SDH,
  434. .irq_int0 = IRQ_SDH_MASK0,
  435. .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
  436. };
  437. static struct platform_device bf54x_sdh_device = {
  438. .name = "bfin-sdh",
  439. .id = 0,
  440. .dev = {
  441. .platform_data = &bfin_sdh_data,
  442. },
  443. };
  444. #endif
  445. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  446. static struct mtd_partition para_partitions[] = {
  447. {
  448. .name = "bootloader(nor)",
  449. .size = 0x40000,
  450. .offset = 0,
  451. }, {
  452. .name = "linux kernel(nor)",
  453. .size = 0x100000,
  454. .offset = MTDPART_OFS_APPEND,
  455. }, {
  456. .name = "file system(nor)",
  457. .size = MTDPART_SIZ_FULL,
  458. .offset = MTDPART_OFS_APPEND,
  459. }
  460. };
  461. static struct physmap_flash_data para_flash_data = {
  462. .width = 2,
  463. .parts = para_partitions,
  464. .nr_parts = ARRAY_SIZE(para_partitions),
  465. };
  466. static struct resource para_flash_resource = {
  467. .start = 0x20000000,
  468. .end = 0x207fffff,
  469. .flags = IORESOURCE_MEM,
  470. };
  471. static struct platform_device para_flash_device = {
  472. .name = "physmap-flash",
  473. .id = 0,
  474. .dev = {
  475. .platform_data = &para_flash_data,
  476. },
  477. .num_resources = 1,
  478. .resource = &para_flash_resource,
  479. };
  480. #endif
  481. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  482. /* all SPI peripherals info goes here */
  483. #if defined(CONFIG_MTD_M25P80) \
  484. || defined(CONFIG_MTD_M25P80_MODULE)
  485. /* SPI flash chip (m25p16) */
  486. static struct mtd_partition bfin_spi_flash_partitions[] = {
  487. {
  488. .name = "bootloader(spi)",
  489. .size = 0x00040000,
  490. .offset = 0,
  491. .mask_flags = MTD_CAP_ROM
  492. }, {
  493. .name = "linux kernel(spi)",
  494. .size = 0x1c0000,
  495. .offset = 0x40000
  496. }
  497. };
  498. static struct flash_platform_data bfin_spi_flash_data = {
  499. .name = "m25p80",
  500. .parts = bfin_spi_flash_partitions,
  501. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  502. .type = "m25p16",
  503. };
  504. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  505. .enable_dma = 0, /* use dma transfer with this chip*/
  506. .bits_per_word = 8,
  507. .cs_change_per_word = 0,
  508. };
  509. #endif
  510. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  511. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  512. .cs_change_per_word = 0,
  513. .enable_dma = 0,
  514. .bits_per_word = 16,
  515. };
  516. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  517. .model = 7877,
  518. .vref_delay_usecs = 50, /* internal, no capacitor */
  519. .x_plate_ohms = 419,
  520. .y_plate_ohms = 486,
  521. .pressure_max = 1000,
  522. .pressure_min = 0,
  523. .stopacq_polarity = 1,
  524. .first_conversion_delay = 3,
  525. .acquisition_time = 1,
  526. .averaging = 1,
  527. .pen_down_acc_interval = 1,
  528. };
  529. #endif
  530. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  531. static struct bfin5xx_spi_chip spidev_chip_info = {
  532. .enable_dma = 0,
  533. .bits_per_word = 8,
  534. };
  535. #endif
  536. static struct spi_board_info bf54x_spi_board_info[] __initdata = {
  537. #if defined(CONFIG_MTD_M25P80) \
  538. || defined(CONFIG_MTD_M25P80_MODULE)
  539. {
  540. /* the modalias must be the same as spi device driver name */
  541. .modalias = "m25p80", /* Name of spi_driver for this device */
  542. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  543. .bus_num = 0, /* Framework bus number */
  544. .chip_select = 1, /* SPI_SSEL1*/
  545. .platform_data = &bfin_spi_flash_data,
  546. .controller_data = &spi_flash_chip_info,
  547. .mode = SPI_MODE_3,
  548. },
  549. #endif
  550. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  551. {
  552. .modalias = "ad7877",
  553. .platform_data = &bfin_ad7877_ts_info,
  554. .irq = IRQ_PJ11,
  555. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  556. .bus_num = 0,
  557. .chip_select = 2,
  558. .controller_data = &spi_ad7877_chip_info,
  559. },
  560. #endif
  561. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  562. {
  563. .modalias = "spidev",
  564. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  565. .bus_num = 0,
  566. .chip_select = 1,
  567. .controller_data = &spidev_chip_info,
  568. },
  569. #endif
  570. };
  571. /* SPI (0) */
  572. static struct resource bfin_spi0_resource[] = {
  573. [0] = {
  574. .start = SPI0_REGBASE,
  575. .end = SPI0_REGBASE + 0xFF,
  576. .flags = IORESOURCE_MEM,
  577. },
  578. [1] = {
  579. .start = CH_SPI0,
  580. .end = CH_SPI0,
  581. .flags = IORESOURCE_DMA,
  582. },
  583. [2] = {
  584. .start = IRQ_SPI0,
  585. .end = IRQ_SPI0,
  586. .flags = IORESOURCE_IRQ,
  587. }
  588. };
  589. /* SPI (1) */
  590. static struct resource bfin_spi1_resource[] = {
  591. [0] = {
  592. .start = SPI1_REGBASE,
  593. .end = SPI1_REGBASE + 0xFF,
  594. .flags = IORESOURCE_MEM,
  595. },
  596. [1] = {
  597. .start = CH_SPI1,
  598. .end = CH_SPI1,
  599. .flags = IORESOURCE_DMA,
  600. },
  601. [2] = {
  602. .start = IRQ_SPI1,
  603. .end = IRQ_SPI1,
  604. .flags = IORESOURCE_IRQ,
  605. }
  606. };
  607. /* SPI controller data */
  608. static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
  609. .num_chipselect = 3,
  610. .enable_dma = 1, /* master has the ability to do dma transfer */
  611. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  612. };
  613. static struct platform_device bf54x_spi_master0 = {
  614. .name = "bfin-spi",
  615. .id = 0, /* Bus number */
  616. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  617. .resource = bfin_spi0_resource,
  618. .dev = {
  619. .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
  620. },
  621. };
  622. static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
  623. .num_chipselect = 3,
  624. .enable_dma = 1, /* master has the ability to do dma transfer */
  625. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  626. };
  627. static struct platform_device bf54x_spi_master1 = {
  628. .name = "bfin-spi",
  629. .id = 1, /* Bus number */
  630. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  631. .resource = bfin_spi1_resource,
  632. .dev = {
  633. .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
  634. },
  635. };
  636. #endif /* spi master and devices */
  637. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  638. static struct resource bfin_twi0_resource[] = {
  639. [0] = {
  640. .start = TWI0_REGBASE,
  641. .end = TWI0_REGBASE + 0xFF,
  642. .flags = IORESOURCE_MEM,
  643. },
  644. [1] = {
  645. .start = IRQ_TWI0,
  646. .end = IRQ_TWI0,
  647. .flags = IORESOURCE_IRQ,
  648. },
  649. };
  650. static struct platform_device i2c_bfin_twi0_device = {
  651. .name = "i2c-bfin-twi",
  652. .id = 0,
  653. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  654. .resource = bfin_twi0_resource,
  655. };
  656. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  657. static struct resource bfin_twi1_resource[] = {
  658. [0] = {
  659. .start = TWI1_REGBASE,
  660. .end = TWI1_REGBASE + 0xFF,
  661. .flags = IORESOURCE_MEM,
  662. },
  663. [1] = {
  664. .start = IRQ_TWI1,
  665. .end = IRQ_TWI1,
  666. .flags = IORESOURCE_IRQ,
  667. },
  668. };
  669. static struct platform_device i2c_bfin_twi1_device = {
  670. .name = "i2c-bfin-twi",
  671. .id = 1,
  672. .num_resources = ARRAY_SIZE(bfin_twi1_resource),
  673. .resource = bfin_twi1_resource,
  674. };
  675. #endif
  676. #endif
  677. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  678. #include <linux/gpio_keys.h>
  679. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  680. {BTN_0, GPIO_PH7, 1, "gpio-keys: BTN0"},
  681. };
  682. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  683. .buttons = bfin_gpio_keys_table,
  684. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  685. };
  686. static struct platform_device bfin_device_gpiokeys = {
  687. .name = "gpio-keys",
  688. .dev = {
  689. .platform_data = &bfin_gpio_keys_data,
  690. },
  691. };
  692. #endif
  693. static const unsigned int cclk_vlev_datasheet[] =
  694. {
  695. /*
  696. * Internal VLEV BF54XSBBC1533
  697. ****temporarily using these values until data sheet is updated
  698. */
  699. VRPAIR(VLEV_085, 150000000),
  700. VRPAIR(VLEV_090, 250000000),
  701. VRPAIR(VLEV_110, 276000000),
  702. VRPAIR(VLEV_115, 301000000),
  703. VRPAIR(VLEV_120, 525000000),
  704. VRPAIR(VLEV_125, 550000000),
  705. VRPAIR(VLEV_130, 600000000),
  706. };
  707. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  708. .tuple_tab = cclk_vlev_datasheet,
  709. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  710. .vr_settling_time = 25 /* us */,
  711. };
  712. static struct platform_device bfin_dpmc = {
  713. .name = "bfin dpmc",
  714. .dev = {
  715. .platform_data = &bfin_dmpc_vreg_data,
  716. },
  717. };
  718. static struct platform_device *cm_bf548_devices[] __initdata = {
  719. &bfin_dpmc,
  720. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  721. &rtc_device,
  722. #endif
  723. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  724. &bfin_uart_device,
  725. #endif
  726. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  727. #ifdef CONFIG_BFIN_SIR0
  728. &bfin_sir0_device,
  729. #endif
  730. #ifdef CONFIG_BFIN_SIR1
  731. &bfin_sir1_device,
  732. #endif
  733. #ifdef CONFIG_BFIN_SIR2
  734. &bfin_sir2_device,
  735. #endif
  736. #ifdef CONFIG_BFIN_SIR3
  737. &bfin_sir3_device,
  738. #endif
  739. #endif
  740. #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
  741. &bf54x_lq043_device,
  742. #endif
  743. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  744. &smsc911x_device,
  745. #endif
  746. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  747. &musb_device,
  748. #endif
  749. #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
  750. &bfin_atapi_device,
  751. #endif
  752. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  753. &bf5xx_nand_device,
  754. #endif
  755. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  756. &bf54x_sdh_device,
  757. #endif
  758. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  759. &bf54x_spi_master0,
  760. &bf54x_spi_master1,
  761. #endif
  762. #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
  763. &bf54x_kpad_device,
  764. #endif
  765. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  766. &i2c_bfin_twi0_device,
  767. #if !defined(CONFIG_BF542)
  768. &i2c_bfin_twi1_device,
  769. #endif
  770. #endif
  771. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  772. &bfin_device_gpiokeys,
  773. #endif
  774. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  775. &para_flash_device,
  776. #endif
  777. &bfin_gpios_device,
  778. };
  779. static int __init cm_bf548_init(void)
  780. {
  781. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  782. platform_add_devices(cm_bf548_devices, ARRAY_SIZE(cm_bf548_devices));
  783. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  784. spi_register_board_info(bf54x_spi_board_info,
  785. ARRAY_SIZE(bf54x_spi_board_info));
  786. #endif
  787. return 0;
  788. }
  789. arch_initcall(cm_bf548_init);