pnav10.c 14 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf537/boards/stamp.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2008 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/etherdevice.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/mtd/mtd.h>
  34. #include <linux/mtd/partitions.h>
  35. #include <linux/spi/spi.h>
  36. #include <linux/spi/flash.h>
  37. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  38. #include <linux/usb/isp1362.h>
  39. #endif
  40. #include <linux/irq.h>
  41. #include <asm/dma.h>
  42. #include <asm/bfin5xx_spi.h>
  43. #include <asm/portmux.h>
  44. #include <linux/usb/sl811.h>
  45. #include <linux/spi/ad7877.h>
  46. /*
  47. * Name the Board for the /proc/cpuinfo
  48. */
  49. const char bfin_board_name[] = "ADI PNAV-1.0";
  50. /*
  51. * Driver needs to know address, irq and flag pin.
  52. */
  53. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  54. static struct resource bfin_pcmcia_cf_resources[] = {
  55. {
  56. .start = 0x20310000, /* IO PORT */
  57. .end = 0x20312000,
  58. .flags = IORESOURCE_MEM,
  59. }, {
  60. .start = 0x20311000, /* Attribute Memory */
  61. .end = 0x20311FFF,
  62. .flags = IORESOURCE_MEM,
  63. }, {
  64. .start = IRQ_PF4,
  65. .end = IRQ_PF4,
  66. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  67. }, {
  68. .start = 6, /* Card Detect PF6 */
  69. .end = 6,
  70. .flags = IORESOURCE_IRQ,
  71. },
  72. };
  73. static struct platform_device bfin_pcmcia_cf_device = {
  74. .name = "bfin_cf_pcmcia",
  75. .id = -1,
  76. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  77. .resource = bfin_pcmcia_cf_resources,
  78. };
  79. #endif
  80. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  81. static struct platform_device rtc_device = {
  82. .name = "rtc-bfin",
  83. .id = -1,
  84. };
  85. #endif
  86. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  87. #include <linux/smc91x.h>
  88. static struct smc91x_platdata smc91x_info = {
  89. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  90. .leda = RPC_LED_100_10,
  91. .ledb = RPC_LED_TX_RX,
  92. };
  93. static struct resource smc91x_resources[] = {
  94. {
  95. .name = "smc91x-regs",
  96. .start = 0x20300300,
  97. .end = 0x20300300 + 16,
  98. .flags = IORESOURCE_MEM,
  99. }, {
  100. .start = IRQ_PF7,
  101. .end = IRQ_PF7,
  102. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  103. },
  104. };
  105. static struct platform_device smc91x_device = {
  106. .name = "smc91x",
  107. .id = 0,
  108. .num_resources = ARRAY_SIZE(smc91x_resources),
  109. .resource = smc91x_resources,
  110. .dev = {
  111. .platform_data = &smc91x_info,
  112. },
  113. };
  114. #endif
  115. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  116. static struct resource sl811_hcd_resources[] = {
  117. {
  118. .start = 0x20340000,
  119. .end = 0x20340000,
  120. .flags = IORESOURCE_MEM,
  121. }, {
  122. .start = 0x20340004,
  123. .end = 0x20340004,
  124. .flags = IORESOURCE_MEM,
  125. }, {
  126. .start = CONFIG_USB_SL811_BFIN_IRQ,
  127. .end = CONFIG_USB_SL811_BFIN_IRQ,
  128. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  129. },
  130. };
  131. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  132. void sl811_port_power(struct device *dev, int is_on)
  133. {
  134. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  135. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  136. }
  137. #endif
  138. static struct sl811_platform_data sl811_priv = {
  139. .potpg = 10,
  140. .power = 250, /* == 500mA */
  141. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  142. .port_power = &sl811_port_power,
  143. #endif
  144. };
  145. static struct platform_device sl811_hcd_device = {
  146. .name = "sl811-hcd",
  147. .id = 0,
  148. .dev = {
  149. .platform_data = &sl811_priv,
  150. },
  151. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  152. .resource = sl811_hcd_resources,
  153. };
  154. #endif
  155. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  156. static struct resource isp1362_hcd_resources[] = {
  157. {
  158. .start = 0x20360000,
  159. .end = 0x20360000,
  160. .flags = IORESOURCE_MEM,
  161. }, {
  162. .start = 0x20360004,
  163. .end = 0x20360004,
  164. .flags = IORESOURCE_MEM,
  165. }, {
  166. .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  167. .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  168. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  169. },
  170. };
  171. static struct isp1362_platform_data isp1362_priv = {
  172. .sel15Kres = 1,
  173. .clknotstop = 0,
  174. .oc_enable = 0,
  175. .int_act_high = 0,
  176. .int_edge_triggered = 0,
  177. .remote_wakeup_connected = 0,
  178. .no_power_switching = 1,
  179. .power_switching_mode = 0,
  180. };
  181. static struct platform_device isp1362_hcd_device = {
  182. .name = "isp1362-hcd",
  183. .id = 0,
  184. .dev = {
  185. .platform_data = &isp1362_priv,
  186. },
  187. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  188. .resource = isp1362_hcd_resources,
  189. };
  190. #endif
  191. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  192. static struct platform_device bfin_mii_bus = {
  193. .name = "bfin_mii_bus",
  194. };
  195. static struct platform_device bfin_mac_device = {
  196. .name = "bfin_mac",
  197. .dev.platform_data = &bfin_mii_bus,
  198. };
  199. #endif
  200. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  201. static struct resource net2272_bfin_resources[] = {
  202. {
  203. .start = 0x20300000,
  204. .end = 0x20300000 + 0x100,
  205. .flags = IORESOURCE_MEM,
  206. }, {
  207. .start = IRQ_PF7,
  208. .end = IRQ_PF7,
  209. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  210. },
  211. };
  212. static struct platform_device net2272_bfin_device = {
  213. .name = "net2272",
  214. .id = -1,
  215. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  216. .resource = net2272_bfin_resources,
  217. };
  218. #endif
  219. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  220. /* all SPI peripherals info goes here */
  221. #if defined(CONFIG_MTD_M25P80) \
  222. || defined(CONFIG_MTD_M25P80_MODULE)
  223. static struct mtd_partition bfin_spi_flash_partitions[] = {
  224. {
  225. .name = "bootloader(spi)",
  226. .size = 0x00020000,
  227. .offset = 0,
  228. .mask_flags = MTD_CAP_ROM
  229. }, {
  230. .name = "linux kernel(spi)",
  231. .size = 0xe0000,
  232. .offset = 0x20000
  233. }, {
  234. .name = "file system(spi)",
  235. .size = 0x700000,
  236. .offset = 0x00100000,
  237. }
  238. };
  239. static struct flash_platform_data bfin_spi_flash_data = {
  240. .name = "m25p80",
  241. .parts = bfin_spi_flash_partitions,
  242. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  243. .type = "m25p64",
  244. };
  245. /* SPI flash chip (m25p64) */
  246. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  247. .enable_dma = 0, /* use dma transfer with this chip*/
  248. .bits_per_word = 8,
  249. };
  250. #endif
  251. #if defined(CONFIG_BFIN_SPI_ADC) \
  252. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  253. /* SPI ADC chip */
  254. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  255. .enable_dma = 1, /* use dma transfer with this chip*/
  256. .bits_per_word = 16,
  257. };
  258. #endif
  259. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  260. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  261. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  262. .enable_dma = 0,
  263. .bits_per_word = 16,
  264. };
  265. #endif
  266. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  267. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  268. .enable_dma = 0,
  269. .bits_per_word = 8,
  270. };
  271. #endif
  272. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  273. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  274. .cs_change_per_word = 0,
  275. .enable_dma = 0,
  276. .bits_per_word = 16,
  277. };
  278. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  279. .model = 7877,
  280. .vref_delay_usecs = 50, /* internal, no capacitor */
  281. .x_plate_ohms = 419,
  282. .y_plate_ohms = 486,
  283. .pressure_max = 1000,
  284. .pressure_min = 0,
  285. .stopacq_polarity = 1,
  286. .first_conversion_delay = 3,
  287. .acquisition_time = 1,
  288. .averaging = 1,
  289. .pen_down_acc_interval = 1,
  290. };
  291. #endif
  292. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  293. #if defined(CONFIG_MTD_M25P80) \
  294. || defined(CONFIG_MTD_M25P80_MODULE)
  295. {
  296. /* the modalias must be the same as spi device driver name */
  297. .modalias = "m25p80", /* Name of spi_driver for this device */
  298. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  299. .bus_num = 0, /* Framework bus number */
  300. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  301. .platform_data = &bfin_spi_flash_data,
  302. .controller_data = &spi_flash_chip_info,
  303. .mode = SPI_MODE_3,
  304. },
  305. #endif
  306. #if defined(CONFIG_BFIN_SPI_ADC) \
  307. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  308. {
  309. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  310. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  311. .bus_num = 0, /* Framework bus number */
  312. .chip_select = 1, /* Framework chip select. */
  313. .platform_data = NULL, /* No spi_driver specific config */
  314. .controller_data = &spi_adc_chip_info,
  315. },
  316. #endif
  317. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  318. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  319. {
  320. .modalias = "ad1836",
  321. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  322. .bus_num = 0,
  323. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  324. .controller_data = &ad1836_spi_chip_info,
  325. },
  326. #endif
  327. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  328. {
  329. .modalias = "mmc_spi",
  330. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  331. .bus_num = 0,
  332. .chip_select = 5,
  333. .controller_data = &mmc_spi_chip_info,
  334. .mode = SPI_MODE_3,
  335. },
  336. #endif
  337. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  338. {
  339. .modalias = "ad7877",
  340. .platform_data = &bfin_ad7877_ts_info,
  341. .irq = IRQ_PF2,
  342. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  343. .bus_num = 0,
  344. .chip_select = 5,
  345. .controller_data = &spi_ad7877_chip_info,
  346. },
  347. #endif
  348. };
  349. /* SPI (0) */
  350. static struct resource bfin_spi0_resource[] = {
  351. [0] = {
  352. .start = SPI0_REGBASE,
  353. .end = SPI0_REGBASE + 0xFF,
  354. .flags = IORESOURCE_MEM,
  355. },
  356. [1] = {
  357. .start = CH_SPI,
  358. .end = CH_SPI,
  359. .flags = IORESOURCE_DMA,
  360. },
  361. [2] = {
  362. .start = IRQ_SPI,
  363. .end = IRQ_SPI,
  364. .flags = IORESOURCE_IRQ,
  365. },
  366. };
  367. /* SPI controller data */
  368. static struct bfin5xx_spi_master bfin_spi0_info = {
  369. .num_chipselect = 8,
  370. .enable_dma = 1, /* master has the ability to do dma transfer */
  371. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  372. };
  373. static struct platform_device bfin_spi0_device = {
  374. .name = "bfin-spi",
  375. .id = 0, /* Bus number */
  376. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  377. .resource = bfin_spi0_resource,
  378. .dev = {
  379. .platform_data = &bfin_spi0_info, /* Passed to driver */
  380. },
  381. };
  382. #endif /* spi master and devices */
  383. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  384. static struct platform_device bfin_fb_device = {
  385. .name = "bf537-lq035",
  386. };
  387. #endif
  388. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  389. static struct resource bfin_uart_resources[] = {
  390. {
  391. .start = 0xFFC00400,
  392. .end = 0xFFC004FF,
  393. .flags = IORESOURCE_MEM,
  394. }, {
  395. .start = 0xFFC02000,
  396. .end = 0xFFC020FF,
  397. .flags = IORESOURCE_MEM,
  398. },
  399. };
  400. static struct platform_device bfin_uart_device = {
  401. .name = "bfin-uart",
  402. .id = 1,
  403. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  404. .resource = bfin_uart_resources,
  405. };
  406. #endif
  407. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  408. #ifdef CONFIG_BFIN_SIR0
  409. static struct resource bfin_sir0_resources[] = {
  410. {
  411. .start = 0xFFC00400,
  412. .end = 0xFFC004FF,
  413. .flags = IORESOURCE_MEM,
  414. },
  415. {
  416. .start = IRQ_UART0_RX,
  417. .end = IRQ_UART0_RX+1,
  418. .flags = IORESOURCE_IRQ,
  419. },
  420. {
  421. .start = CH_UART0_RX,
  422. .end = CH_UART0_RX+1,
  423. .flags = IORESOURCE_DMA,
  424. },
  425. };
  426. static struct platform_device bfin_sir0_device = {
  427. .name = "bfin_sir",
  428. .id = 0,
  429. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  430. .resource = bfin_sir0_resources,
  431. };
  432. #endif
  433. #ifdef CONFIG_BFIN_SIR1
  434. static struct resource bfin_sir1_resources[] = {
  435. {
  436. .start = 0xFFC02000,
  437. .end = 0xFFC020FF,
  438. .flags = IORESOURCE_MEM,
  439. },
  440. {
  441. .start = IRQ_UART1_RX,
  442. .end = IRQ_UART1_RX+1,
  443. .flags = IORESOURCE_IRQ,
  444. },
  445. {
  446. .start = CH_UART1_RX,
  447. .end = CH_UART1_RX+1,
  448. .flags = IORESOURCE_DMA,
  449. },
  450. };
  451. static struct platform_device bfin_sir1_device = {
  452. .name = "bfin_sir",
  453. .id = 1,
  454. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  455. .resource = bfin_sir1_resources,
  456. };
  457. #endif
  458. #endif
  459. static struct platform_device *stamp_devices[] __initdata = {
  460. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  461. &bfin_pcmcia_cf_device,
  462. #endif
  463. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  464. &rtc_device,
  465. #endif
  466. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  467. &sl811_hcd_device,
  468. #endif
  469. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  470. &isp1362_hcd_device,
  471. #endif
  472. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  473. &smc91x_device,
  474. #endif
  475. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  476. &bfin_mii_bus,
  477. &bfin_mac_device,
  478. #endif
  479. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  480. &net2272_bfin_device,
  481. #endif
  482. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  483. &bfin_spi0_device,
  484. #endif
  485. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  486. &bfin_fb_device,
  487. #endif
  488. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  489. &bfin_uart_device,
  490. #endif
  491. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  492. #ifdef CONFIG_BFIN_SIR0
  493. &bfin_sir0_device,
  494. #endif
  495. #ifdef CONFIG_BFIN_SIR1
  496. &bfin_sir1_device,
  497. #endif
  498. #endif
  499. };
  500. static int __init pnav_init(void)
  501. {
  502. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  503. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  504. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  505. spi_register_board_info(bfin_spi_board_info,
  506. ARRAY_SIZE(bfin_spi_board_info));
  507. #endif
  508. return 0;
  509. }
  510. arch_initcall(pnav_init);
  511. void bfin_get_ether_addr(char *addr)
  512. {
  513. random_ether_addr(addr);
  514. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  515. }
  516. EXPORT_SYMBOL(bfin_get_ether_addr);