cm_bf537e.c 17 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf537/boards/cm_bf537.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created: 2005
  7. * Description: Board description file
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/etherdevice.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/mtd/mtd.h>
  34. #include <linux/mtd/partitions.h>
  35. #include <linux/mtd/physmap.h>
  36. #include <linux/spi/spi.h>
  37. #include <linux/spi/flash.h>
  38. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  39. #include <linux/usb/isp1362.h>
  40. #endif
  41. #include <linux/ata_platform.h>
  42. #include <linux/irq.h>
  43. #include <asm/dma.h>
  44. #include <asm/bfin5xx_spi.h>
  45. #include <asm/portmux.h>
  46. #include <asm/dpmc.h>
  47. /*
  48. * Name the Board for the /proc/cpuinfo
  49. */
  50. const char bfin_board_name[] = "Bluetechnix CM BF537E";
  51. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  52. /* all SPI peripherals info goes here */
  53. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  54. static struct mtd_partition bfin_spi_flash_partitions[] = {
  55. {
  56. .name = "bootloader(spi)",
  57. .size = 0x00020000,
  58. .offset = 0,
  59. .mask_flags = MTD_CAP_ROM
  60. }, {
  61. .name = "linux kernel(spi)",
  62. .size = 0xe0000,
  63. .offset = 0x20000
  64. }, {
  65. .name = "file system(spi)",
  66. .size = 0x700000,
  67. .offset = 0x00100000,
  68. }
  69. };
  70. static struct flash_platform_data bfin_spi_flash_data = {
  71. .name = "m25p80",
  72. .parts = bfin_spi_flash_partitions,
  73. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  74. .type = "m25p64",
  75. };
  76. /* SPI flash chip (m25p64) */
  77. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  78. .enable_dma = 0, /* use dma transfer with this chip*/
  79. .bits_per_word = 8,
  80. };
  81. #endif
  82. #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  83. /* SPI ADC chip */
  84. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  85. .enable_dma = 1, /* use dma transfer with this chip*/
  86. .bits_per_word = 16,
  87. };
  88. #endif
  89. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  90. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  91. .enable_dma = 0,
  92. .bits_per_word = 16,
  93. };
  94. #endif
  95. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  96. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  97. .enable_dma = 0,
  98. .bits_per_word = 8,
  99. };
  100. #endif
  101. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  102. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  103. {
  104. /* the modalias must be the same as spi device driver name */
  105. .modalias = "m25p80", /* Name of spi_driver for this device */
  106. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  107. .bus_num = 0, /* Framework bus number */
  108. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  109. .platform_data = &bfin_spi_flash_data,
  110. .controller_data = &spi_flash_chip_info,
  111. .mode = SPI_MODE_3,
  112. },
  113. #endif
  114. #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  115. {
  116. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  117. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  118. .bus_num = 0, /* Framework bus number */
  119. .chip_select = 1, /* Framework chip select. */
  120. .platform_data = NULL, /* No spi_driver specific config */
  121. .controller_data = &spi_adc_chip_info,
  122. },
  123. #endif
  124. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  125. {
  126. .modalias = "ad1836",
  127. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  128. .bus_num = 0,
  129. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  130. .controller_data = &ad1836_spi_chip_info,
  131. },
  132. #endif
  133. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  134. {
  135. .modalias = "mmc_spi",
  136. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  137. .bus_num = 0,
  138. .chip_select = 1,
  139. .controller_data = &mmc_spi_chip_info,
  140. .mode = SPI_MODE_3,
  141. },
  142. #endif
  143. };
  144. /* SPI (0) */
  145. static struct resource bfin_spi0_resource[] = {
  146. [0] = {
  147. .start = SPI0_REGBASE,
  148. .end = SPI0_REGBASE + 0xFF,
  149. .flags = IORESOURCE_MEM,
  150. },
  151. [1] = {
  152. .start = CH_SPI,
  153. .end = CH_SPI,
  154. .flags = IORESOURCE_DMA,
  155. },
  156. [2] = {
  157. .start = IRQ_SPI,
  158. .end = IRQ_SPI,
  159. .flags = IORESOURCE_IRQ,
  160. },
  161. };
  162. /* SPI controller data */
  163. static struct bfin5xx_spi_master bfin_spi0_info = {
  164. .num_chipselect = 8,
  165. .enable_dma = 1, /* master has the ability to do dma transfer */
  166. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  167. };
  168. static struct platform_device bfin_spi0_device = {
  169. .name = "bfin-spi",
  170. .id = 0, /* Bus number */
  171. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  172. .resource = bfin_spi0_resource,
  173. .dev = {
  174. .platform_data = &bfin_spi0_info, /* Passed to driver */
  175. },
  176. };
  177. #endif /* spi master and devices */
  178. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  179. static struct platform_device rtc_device = {
  180. .name = "rtc-bfin",
  181. .id = -1,
  182. };
  183. #endif
  184. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  185. static struct platform_device hitachi_fb_device = {
  186. .name = "hitachi-tx09",
  187. };
  188. #endif
  189. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  190. #include <linux/smc91x.h>
  191. static struct smc91x_platdata smc91x_info = {
  192. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  193. .leda = RPC_LED_100_10,
  194. .ledb = RPC_LED_TX_RX,
  195. };
  196. static struct resource smc91x_resources[] = {
  197. {
  198. .start = 0x20200300,
  199. .end = 0x20200300 + 16,
  200. .flags = IORESOURCE_MEM,
  201. }, {
  202. .start = IRQ_PF14,
  203. .end = IRQ_PF14,
  204. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  205. },
  206. };
  207. static struct platform_device smc91x_device = {
  208. .name = "smc91x",
  209. .id = 0,
  210. .num_resources = ARRAY_SIZE(smc91x_resources),
  211. .resource = smc91x_resources,
  212. .dev = {
  213. .platform_data = &smc91x_info,
  214. },
  215. };
  216. #endif
  217. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  218. static struct resource isp1362_hcd_resources[] = {
  219. {
  220. .start = 0x20308000,
  221. .end = 0x20308000,
  222. .flags = IORESOURCE_MEM,
  223. }, {
  224. .start = 0x20308004,
  225. .end = 0x20308004,
  226. .flags = IORESOURCE_MEM,
  227. }, {
  228. .start = IRQ_PG15,
  229. .end = IRQ_PG15,
  230. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  231. },
  232. };
  233. static struct isp1362_platform_data isp1362_priv = {
  234. .sel15Kres = 1,
  235. .clknotstop = 0,
  236. .oc_enable = 0,
  237. .int_act_high = 0,
  238. .int_edge_triggered = 0,
  239. .remote_wakeup_connected = 0,
  240. .no_power_switching = 1,
  241. .power_switching_mode = 0,
  242. };
  243. static struct platform_device isp1362_hcd_device = {
  244. .name = "isp1362-hcd",
  245. .id = 0,
  246. .dev = {
  247. .platform_data = &isp1362_priv,
  248. },
  249. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  250. .resource = isp1362_hcd_resources,
  251. };
  252. #endif
  253. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  254. static struct resource net2272_bfin_resources[] = {
  255. {
  256. .start = 0x20300000,
  257. .end = 0x20300000 + 0x100,
  258. .flags = IORESOURCE_MEM,
  259. }, {
  260. .start = IRQ_PG13,
  261. .end = IRQ_PG13,
  262. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  263. },
  264. };
  265. static struct platform_device net2272_bfin_device = {
  266. .name = "net2272",
  267. .id = -1,
  268. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  269. .resource = net2272_bfin_resources,
  270. };
  271. #endif
  272. static struct resource bfin_gpios_resources = {
  273. .start = 0,
  274. .end = MAX_BLACKFIN_GPIOS - 1,
  275. .flags = IORESOURCE_IRQ,
  276. };
  277. static struct platform_device bfin_gpios_device = {
  278. .name = "simple-gpio",
  279. .id = -1,
  280. .num_resources = 1,
  281. .resource = &bfin_gpios_resources,
  282. };
  283. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  284. static struct mtd_partition cm_partitions[] = {
  285. {
  286. .name = "bootloader(nor)",
  287. .size = 0x40000,
  288. .offset = 0,
  289. }, {
  290. .name = "linux kernel(nor)",
  291. .size = 0x100000,
  292. .offset = MTDPART_OFS_APPEND,
  293. }, {
  294. .name = "file system(nor)",
  295. .size = MTDPART_SIZ_FULL,
  296. .offset = MTDPART_OFS_APPEND,
  297. }
  298. };
  299. static struct physmap_flash_data cm_flash_data = {
  300. .width = 2,
  301. .parts = cm_partitions,
  302. .nr_parts = ARRAY_SIZE(cm_partitions),
  303. };
  304. static unsigned cm_flash_gpios[] = { GPIO_PF4 };
  305. static struct resource cm_flash_resource[] = {
  306. {
  307. .name = "cfi_probe",
  308. .start = 0x20000000,
  309. .end = 0x201fffff,
  310. .flags = IORESOURCE_MEM,
  311. }, {
  312. .start = (unsigned long)cm_flash_gpios,
  313. .end = ARRAY_SIZE(cm_flash_gpios),
  314. .flags = IORESOURCE_IRQ,
  315. }
  316. };
  317. static struct platform_device cm_flash_device = {
  318. .name = "gpio-addr-flash",
  319. .id = 0,
  320. .dev = {
  321. .platform_data = &cm_flash_data,
  322. },
  323. .num_resources = ARRAY_SIZE(cm_flash_resource),
  324. .resource = cm_flash_resource,
  325. };
  326. #endif
  327. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  328. #ifdef CONFIG_SERIAL_BFIN_UART0
  329. static struct resource bfin_uart0_resources[] = {
  330. {
  331. .start = 0xFFC00400,
  332. .end = 0xFFC004FF,
  333. .flags = IORESOURCE_MEM,
  334. },
  335. {
  336. .start = IRQ_UART0_RX,
  337. .end = IRQ_UART0_RX+1,
  338. .flags = IORESOURCE_IRQ,
  339. },
  340. {
  341. .start = IRQ_UART0_ERROR,
  342. .end = IRQ_UART0_ERROR,
  343. .flags = IORESOURCE_IRQ,
  344. },
  345. {
  346. .start = CH_UART0_TX,
  347. .end = CH_UART0_TX,
  348. .flags = IORESOURCE_DMA,
  349. },
  350. {
  351. .start = CH_UART0_RX,
  352. .end = CH_UART0_RX,
  353. .flags = IORESOURCE_DMA,
  354. },
  355. #ifdef CONFIG_BFIN_UART0_CTSRTS
  356. {
  357. /*
  358. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  359. */
  360. .start = -1,
  361. .end = -1,
  362. .flags = IORESOURCE_IO,
  363. },
  364. {
  365. /*
  366. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  367. */
  368. .start = -1,
  369. .end = -1,
  370. .flags = IORESOURCE_IO,
  371. },
  372. #endif
  373. };
  374. static struct platform_device bfin_uart0_device = {
  375. .name = "bfin-uart",
  376. .id = 0,
  377. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  378. .resource = bfin_uart0_resources,
  379. };
  380. #endif
  381. #ifdef CONFIG_SERIAL_BFIN_UART1
  382. static struct resource bfin_uart1_resources[] = {
  383. {
  384. .start = 0xFFC02000,
  385. .end = 0xFFC020FF,
  386. .flags = IORESOURCE_MEM,
  387. },
  388. {
  389. .start = IRQ_UART1_RX,
  390. .end = IRQ_UART1_RX+1,
  391. .flags = IORESOURCE_IRQ,
  392. },
  393. {
  394. .start = IRQ_UART1_ERROR,
  395. .end = IRQ_UART1_ERROR,
  396. .flags = IORESOURCE_IRQ,
  397. },
  398. {
  399. .start = CH_UART1_TX,
  400. .end = CH_UART1_TX,
  401. .flags = IORESOURCE_DMA,
  402. },
  403. {
  404. .start = CH_UART1_RX,
  405. .end = CH_UART1_RX,
  406. .flags = IORESOURCE_DMA,
  407. },
  408. #ifdef CONFIG_BFIN_UART1_CTSRTS
  409. {
  410. /*
  411. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  412. */
  413. .start = -1,
  414. .end = -1,
  415. .flags = IORESOURCE_IO,
  416. },
  417. {
  418. /*
  419. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  420. */
  421. .start = -1,
  422. .end = -1,
  423. .flags = IORESOURCE_IO,
  424. },
  425. #endif
  426. };
  427. static struct platform_device bfin_uart1_device = {
  428. .name = "bfin-uart",
  429. .id = 1,
  430. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  431. .resource = bfin_uart1_resources,
  432. };
  433. #endif
  434. #endif
  435. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  436. #ifdef CONFIG_BFIN_SIR0
  437. static struct resource bfin_sir0_resources[] = {
  438. {
  439. .start = 0xFFC00400,
  440. .end = 0xFFC004FF,
  441. .flags = IORESOURCE_MEM,
  442. },
  443. {
  444. .start = IRQ_UART0_RX,
  445. .end = IRQ_UART0_RX+1,
  446. .flags = IORESOURCE_IRQ,
  447. },
  448. {
  449. .start = CH_UART0_RX,
  450. .end = CH_UART0_RX+1,
  451. .flags = IORESOURCE_DMA,
  452. },
  453. };
  454. static struct platform_device bfin_sir0_device = {
  455. .name = "bfin_sir",
  456. .id = 0,
  457. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  458. .resource = bfin_sir0_resources,
  459. };
  460. #endif
  461. #ifdef CONFIG_BFIN_SIR1
  462. static struct resource bfin_sir1_resources[] = {
  463. {
  464. .start = 0xFFC02000,
  465. .end = 0xFFC020FF,
  466. .flags = IORESOURCE_MEM,
  467. },
  468. {
  469. .start = IRQ_UART1_RX,
  470. .end = IRQ_UART1_RX+1,
  471. .flags = IORESOURCE_IRQ,
  472. },
  473. {
  474. .start = CH_UART1_RX,
  475. .end = CH_UART1_RX+1,
  476. .flags = IORESOURCE_DMA,
  477. },
  478. };
  479. static struct platform_device bfin_sir1_device = {
  480. .name = "bfin_sir",
  481. .id = 1,
  482. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  483. .resource = bfin_sir1_resources,
  484. };
  485. #endif
  486. #endif
  487. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  488. static struct resource bfin_twi0_resource[] = {
  489. [0] = {
  490. .start = TWI0_REGBASE,
  491. .end = TWI0_REGBASE,
  492. .flags = IORESOURCE_MEM,
  493. },
  494. [1] = {
  495. .start = IRQ_TWI,
  496. .end = IRQ_TWI,
  497. .flags = IORESOURCE_IRQ,
  498. },
  499. };
  500. static struct platform_device i2c_bfin_twi_device = {
  501. .name = "i2c-bfin-twi",
  502. .id = 0,
  503. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  504. .resource = bfin_twi0_resource,
  505. };
  506. #endif
  507. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  508. static struct platform_device bfin_sport0_uart_device = {
  509. .name = "bfin-sport-uart",
  510. .id = 0,
  511. };
  512. static struct platform_device bfin_sport1_uart_device = {
  513. .name = "bfin-sport-uart",
  514. .id = 1,
  515. };
  516. #endif
  517. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  518. static struct platform_device bfin_mii_bus = {
  519. .name = "bfin_mii_bus",
  520. };
  521. static struct platform_device bfin_mac_device = {
  522. .name = "bfin_mac",
  523. .dev.platform_data = &bfin_mii_bus,
  524. };
  525. #endif
  526. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  527. #define PATA_INT IRQ_PF14
  528. static struct pata_platform_info bfin_pata_platform_data = {
  529. .ioport_shift = 2,
  530. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  531. };
  532. static struct resource bfin_pata_resources[] = {
  533. {
  534. .start = 0x2030C000,
  535. .end = 0x2030C01F,
  536. .flags = IORESOURCE_MEM,
  537. },
  538. {
  539. .start = 0x2030D018,
  540. .end = 0x2030D01B,
  541. .flags = IORESOURCE_MEM,
  542. },
  543. {
  544. .start = PATA_INT,
  545. .end = PATA_INT,
  546. .flags = IORESOURCE_IRQ,
  547. },
  548. };
  549. static struct platform_device bfin_pata_device = {
  550. .name = "pata_platform",
  551. .id = -1,
  552. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  553. .resource = bfin_pata_resources,
  554. .dev = {
  555. .platform_data = &bfin_pata_platform_data,
  556. }
  557. };
  558. #endif
  559. static const unsigned int cclk_vlev_datasheet[] =
  560. {
  561. VRPAIR(VLEV_085, 250000000),
  562. VRPAIR(VLEV_090, 376000000),
  563. VRPAIR(VLEV_095, 426000000),
  564. VRPAIR(VLEV_100, 426000000),
  565. VRPAIR(VLEV_105, 476000000),
  566. VRPAIR(VLEV_110, 476000000),
  567. VRPAIR(VLEV_115, 476000000),
  568. VRPAIR(VLEV_120, 500000000),
  569. VRPAIR(VLEV_125, 533000000),
  570. VRPAIR(VLEV_130, 600000000),
  571. };
  572. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  573. .tuple_tab = cclk_vlev_datasheet,
  574. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  575. .vr_settling_time = 25 /* us */,
  576. };
  577. static struct platform_device bfin_dpmc = {
  578. .name = "bfin dpmc",
  579. .dev = {
  580. .platform_data = &bfin_dmpc_vreg_data,
  581. },
  582. };
  583. static struct platform_device *cm_bf537e_devices[] __initdata = {
  584. &bfin_dpmc,
  585. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  586. &hitachi_fb_device,
  587. #endif
  588. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  589. &rtc_device,
  590. #endif
  591. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  592. #ifdef CONFIG_SERIAL_BFIN_UART0
  593. &bfin_uart0_device,
  594. #endif
  595. #ifdef CONFIG_SERIAL_BFIN_UART1
  596. &bfin_uart1_device,
  597. #endif
  598. #endif
  599. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  600. #ifdef CONFIG_BFIN_SIR0
  601. &bfin_sir0_device,
  602. #endif
  603. #ifdef CONFIG_BFIN_SIR1
  604. &bfin_sir1_device,
  605. #endif
  606. #endif
  607. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  608. &i2c_bfin_twi_device,
  609. #endif
  610. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  611. &bfin_sport0_uart_device,
  612. &bfin_sport1_uart_device,
  613. #endif
  614. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  615. &isp1362_hcd_device,
  616. #endif
  617. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  618. &smc91x_device,
  619. #endif
  620. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  621. &bfin_mii_bus,
  622. &bfin_mac_device,
  623. #endif
  624. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  625. &net2272_bfin_device,
  626. #endif
  627. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  628. &bfin_spi0_device,
  629. #endif
  630. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  631. &bfin_pata_device,
  632. #endif
  633. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  634. &cm_flash_device,
  635. #endif
  636. &bfin_gpios_device,
  637. };
  638. static int __init cm_bf537e_init(void)
  639. {
  640. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  641. platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices));
  642. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  643. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  644. #endif
  645. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  646. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  647. #endif
  648. return 0;
  649. }
  650. arch_initcall(cm_bf537e_init);
  651. void bfin_get_ether_addr(char *addr)
  652. {
  653. random_ether_addr(addr);
  654. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  655. }
  656. EXPORT_SYMBOL(bfin_get_ether_addr);