system.h 6.2 KB

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  1. /*
  2. * File: include/asm/system.h
  3. * Based on:
  4. * Author: Tony Kou (tonyko@lineo.ca)
  5. * Copyright (c) 2002 Arcturus Networks Inc.
  6. * (www.arcturusnetworks.com)
  7. * Copyright (c) 2003 Metrowerks (www.metrowerks.com)
  8. * Copyright (c) 2004 Analog Device Inc.
  9. * Created: 25Jan2001 - Tony Kou
  10. * Description: system.h include file
  11. *
  12. * Modified: 22Sep2006 - Robin Getz
  13. * - move include blackfin.h down, so I can get access to
  14. * irq functions in other include files.
  15. *
  16. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License as published by
  20. * the Free Software Foundation; either version 2, or (at your option)
  21. * any later version.
  22. *
  23. * This program is distributed in the hope that it will be useful,
  24. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26. * GNU General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program; see the file COPYING.
  30. * If not, write to the Free Software Foundation,
  31. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  32. */
  33. #ifndef _BLACKFIN_SYSTEM_H
  34. #define _BLACKFIN_SYSTEM_H
  35. #include <linux/linkage.h>
  36. #include <linux/irqflags.h>
  37. #include <mach/anomaly.h>
  38. #include <asm/cache.h>
  39. #include <asm/pda.h>
  40. #include <asm/irq.h>
  41. /*
  42. * Force strict CPU ordering.
  43. */
  44. #define nop() __asm__ __volatile__ ("nop;\n\t" : : )
  45. #define mb() __asm__ __volatile__ ("" : : : "memory")
  46. #define rmb() __asm__ __volatile__ ("" : : : "memory")
  47. #define wmb() __asm__ __volatile__ ("" : : : "memory")
  48. #define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
  49. #define read_barrier_depends() do { } while(0)
  50. #ifdef CONFIG_SMP
  51. asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value);
  52. asmlinkage unsigned long __raw_xchg_2_asm(volatile void *ptr, unsigned long value);
  53. asmlinkage unsigned long __raw_xchg_4_asm(volatile void *ptr, unsigned long value);
  54. asmlinkage unsigned long __raw_cmpxchg_1_asm(volatile void *ptr,
  55. unsigned long new, unsigned long old);
  56. asmlinkage unsigned long __raw_cmpxchg_2_asm(volatile void *ptr,
  57. unsigned long new, unsigned long old);
  58. asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr,
  59. unsigned long new, unsigned long old);
  60. #ifdef __ARCH_SYNC_CORE_DCACHE
  61. # define smp_mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
  62. # define smp_rmb() do { barrier(); smp_check_barrier(); } while (0)
  63. # define smp_wmb() do { barrier(); smp_mark_barrier(); } while (0)
  64. #define smp_read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
  65. #else
  66. # define smp_mb() barrier()
  67. # define smp_rmb() barrier()
  68. # define smp_wmb() barrier()
  69. #define smp_read_barrier_depends() barrier()
  70. #endif
  71. static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
  72. int size)
  73. {
  74. unsigned long tmp;
  75. switch (size) {
  76. case 1:
  77. tmp = __raw_xchg_1_asm(ptr, x);
  78. break;
  79. case 2:
  80. tmp = __raw_xchg_2_asm(ptr, x);
  81. break;
  82. case 4:
  83. tmp = __raw_xchg_4_asm(ptr, x);
  84. break;
  85. }
  86. return tmp;
  87. }
  88. /*
  89. * Atomic compare and exchange. Compare OLD with MEM, if identical,
  90. * store NEW in MEM. Return the initial value in MEM. Success is
  91. * indicated by comparing RETURN with OLD.
  92. */
  93. static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
  94. unsigned long new, int size)
  95. {
  96. unsigned long tmp;
  97. switch (size) {
  98. case 1:
  99. tmp = __raw_cmpxchg_1_asm(ptr, new, old);
  100. break;
  101. case 2:
  102. tmp = __raw_cmpxchg_2_asm(ptr, new, old);
  103. break;
  104. case 4:
  105. tmp = __raw_cmpxchg_4_asm(ptr, new, old);
  106. break;
  107. }
  108. return tmp;
  109. }
  110. #define cmpxchg(ptr, o, n) \
  111. ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
  112. (unsigned long)(n), sizeof(*(ptr))))
  113. #else /* !CONFIG_SMP */
  114. #define smp_mb() barrier()
  115. #define smp_rmb() barrier()
  116. #define smp_wmb() barrier()
  117. #define smp_read_barrier_depends() do { } while(0)
  118. struct __xchg_dummy {
  119. unsigned long a[100];
  120. };
  121. #define __xg(x) ((volatile struct __xchg_dummy *)(x))
  122. #include <mach/blackfin.h>
  123. static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
  124. int size)
  125. {
  126. unsigned long tmp = 0;
  127. unsigned long flags;
  128. local_irq_save_hw(flags);
  129. switch (size) {
  130. case 1:
  131. __asm__ __volatile__
  132. ("%0 = b%2 (z);\n\t"
  133. "b%2 = %1;\n\t"
  134. : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
  135. break;
  136. case 2:
  137. __asm__ __volatile__
  138. ("%0 = w%2 (z);\n\t"
  139. "w%2 = %1;\n\t"
  140. : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
  141. break;
  142. case 4:
  143. __asm__ __volatile__
  144. ("%0 = %2;\n\t"
  145. "%2 = %1;\n\t"
  146. : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
  147. break;
  148. }
  149. local_irq_restore_hw(flags);
  150. return tmp;
  151. }
  152. #include <asm-generic/cmpxchg-local.h>
  153. /*
  154. * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
  155. * them available.
  156. */
  157. #define cmpxchg_local(ptr, o, n) \
  158. ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
  159. (unsigned long)(n), sizeof(*(ptr))))
  160. #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
  161. #include <asm-generic/cmpxchg.h>
  162. #endif /* !CONFIG_SMP */
  163. #define xchg(ptr, x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
  164. #define tas(ptr) ((void)xchg((ptr), 1))
  165. #define prepare_to_switch() do { } while(0)
  166. /*
  167. * switch_to(n) should switch tasks to task ptr, first checking that
  168. * ptr isn't the current task, in which case it does nothing.
  169. */
  170. #include <asm/l1layout.h>
  171. #include <asm/mem_map.h>
  172. asmlinkage struct task_struct *resume(struct task_struct *prev, struct task_struct *next);
  173. #ifndef CONFIG_SMP
  174. #define switch_to(prev,next,last) \
  175. do { \
  176. memcpy (&task_thread_info(prev)->l1_task_info, L1_SCRATCH_TASK_INFO, \
  177. sizeof *L1_SCRATCH_TASK_INFO); \
  178. memcpy (L1_SCRATCH_TASK_INFO, &task_thread_info(next)->l1_task_info, \
  179. sizeof *L1_SCRATCH_TASK_INFO); \
  180. (last) = resume (prev, next); \
  181. } while (0)
  182. #else
  183. #define switch_to(prev, next, last) \
  184. do { \
  185. (last) = resume(prev, next); \
  186. } while (0)
  187. #endif
  188. #endif /* _BLACKFIN_SYSTEM_H */