core.c 14 KB

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  1. /*
  2. *
  3. * arch/arm/mach-u300/core.c
  4. *
  5. *
  6. * Copyright (C) 2007-2009 ST-Ericsson AB
  7. * License terms: GNU General Public License (GPL) version 2
  8. * Core platform support, IRQ handling and device definitions.
  9. * Author: Linus Walleij <linus.walleij@stericsson.com>
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/bitops.h>
  16. #include <linux/device.h>
  17. #include <linux/mm.h>
  18. #include <linux/termios.h>
  19. #include <linux/amba/bus.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/gpio.h>
  22. #include <asm/types.h>
  23. #include <asm/setup.h>
  24. #include <asm/memory.h>
  25. #include <asm/hardware/vic.h>
  26. #include <asm/mach/map.h>
  27. #include <asm/mach/irq.h>
  28. #include <mach/hardware.h>
  29. #include <mach/syscon.h>
  30. #include "clock.h"
  31. #include "mmc.h"
  32. /*
  33. * Static I/O mappings that are needed for booting the U300 platforms. The
  34. * only things we need are the areas where we find the timer, syscon and
  35. * intcon, since the remaining device drivers will map their own memory
  36. * physical to virtual as the need arise.
  37. */
  38. static struct map_desc u300_io_desc[] __initdata = {
  39. {
  40. .virtual = U300_SLOW_PER_VIRT_BASE,
  41. .pfn = __phys_to_pfn(U300_SLOW_PER_PHYS_BASE),
  42. .length = SZ_64K,
  43. .type = MT_DEVICE,
  44. },
  45. {
  46. .virtual = U300_AHB_PER_VIRT_BASE,
  47. .pfn = __phys_to_pfn(U300_AHB_PER_PHYS_BASE),
  48. .length = SZ_32K,
  49. .type = MT_DEVICE,
  50. },
  51. {
  52. .virtual = U300_FAST_PER_VIRT_BASE,
  53. .pfn = __phys_to_pfn(U300_FAST_PER_PHYS_BASE),
  54. .length = SZ_32K,
  55. .type = MT_DEVICE,
  56. },
  57. {
  58. .virtual = 0xffff2000, /* TCM memory */
  59. .pfn = __phys_to_pfn(0xffff2000),
  60. .length = SZ_16K,
  61. .type = MT_DEVICE,
  62. },
  63. /*
  64. * This overlaps with the IRQ vectors etc at 0xffff0000, so these
  65. * may have to be moved to 0x00000000 in order to use the ROM.
  66. */
  67. /*
  68. {
  69. .virtual = U300_BOOTROM_VIRT_BASE,
  70. .pfn = __phys_to_pfn(U300_BOOTROM_PHYS_BASE),
  71. .length = SZ_64K,
  72. .type = MT_ROM,
  73. },
  74. */
  75. };
  76. void __init u300_map_io(void)
  77. {
  78. iotable_init(u300_io_desc, ARRAY_SIZE(u300_io_desc));
  79. }
  80. /*
  81. * Declaration of devices found on the U300 board and
  82. * their respective memory locations.
  83. */
  84. static struct amba_device uart0_device = {
  85. .dev = {
  86. .init_name = "uart0", /* Slow device at 0x3000 offset */
  87. .platform_data = NULL,
  88. },
  89. .res = {
  90. .start = U300_UART0_BASE,
  91. .end = U300_UART0_BASE + SZ_4K - 1,
  92. .flags = IORESOURCE_MEM,
  93. },
  94. .irq = { IRQ_U300_UART0, NO_IRQ },
  95. };
  96. /* The U335 have an additional UART1 on the APP CPU */
  97. #ifdef CONFIG_MACH_U300_BS335
  98. static struct amba_device uart1_device = {
  99. .dev = {
  100. .init_name = "uart1", /* Fast device at 0x7000 offset */
  101. .platform_data = NULL,
  102. },
  103. .res = {
  104. .start = U300_UART1_BASE,
  105. .end = U300_UART1_BASE + SZ_4K - 1,
  106. .flags = IORESOURCE_MEM,
  107. },
  108. .irq = { IRQ_U300_UART1, NO_IRQ },
  109. };
  110. #endif
  111. static struct amba_device pl172_device = {
  112. .dev = {
  113. .init_name = "pl172", /* AHB device at 0x4000 offset */
  114. .platform_data = NULL,
  115. },
  116. .res = {
  117. .start = U300_EMIF_CFG_BASE,
  118. .end = U300_EMIF_CFG_BASE + SZ_4K - 1,
  119. .flags = IORESOURCE_MEM,
  120. },
  121. };
  122. /*
  123. * Everything within this next ifdef deals with external devices connected to
  124. * the APP SPI bus.
  125. */
  126. static struct amba_device pl022_device = {
  127. .dev = {
  128. .coherent_dma_mask = ~0,
  129. .init_name = "pl022", /* Fast device at 0x6000 offset */
  130. },
  131. .res = {
  132. .start = U300_SPI_BASE,
  133. .end = U300_SPI_BASE + SZ_4K - 1,
  134. .flags = IORESOURCE_MEM,
  135. },
  136. .irq = {IRQ_U300_SPI, NO_IRQ },
  137. /*
  138. * This device has a DMA channel but the Linux driver does not use
  139. * it currently.
  140. */
  141. };
  142. static struct amba_device mmcsd_device = {
  143. .dev = {
  144. .init_name = "mmci", /* Fast device at 0x1000 offset */
  145. .platform_data = NULL, /* Added later */
  146. },
  147. .res = {
  148. .start = U300_MMCSD_BASE,
  149. .end = U300_MMCSD_BASE + SZ_4K - 1,
  150. .flags = IORESOURCE_MEM,
  151. },
  152. .irq = {IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 },
  153. /*
  154. * This device has a DMA channel but the Linux driver does not use
  155. * it currently.
  156. */
  157. };
  158. /*
  159. * The order of device declaration may be important, since some devices
  160. * have dependencies on other devices being initialized first.
  161. */
  162. static struct amba_device *amba_devs[] __initdata = {
  163. &uart0_device,
  164. #ifdef CONFIG_MACH_U300_BS335
  165. &uart1_device,
  166. #endif
  167. &pl022_device,
  168. &pl172_device,
  169. &mmcsd_device,
  170. };
  171. /* Here follows a list of all hw resources that the platform devices
  172. * allocate. Note, clock dependencies are not included
  173. */
  174. static struct resource gpio_resources[] = {
  175. {
  176. .start = U300_GPIO_BASE,
  177. .end = (U300_GPIO_BASE + SZ_4K - 1),
  178. .flags = IORESOURCE_MEM,
  179. },
  180. {
  181. .name = "gpio0",
  182. .start = IRQ_U300_GPIO_PORT0,
  183. .end = IRQ_U300_GPIO_PORT0,
  184. .flags = IORESOURCE_IRQ,
  185. },
  186. {
  187. .name = "gpio1",
  188. .start = IRQ_U300_GPIO_PORT1,
  189. .end = IRQ_U300_GPIO_PORT1,
  190. .flags = IORESOURCE_IRQ,
  191. },
  192. {
  193. .name = "gpio2",
  194. .start = IRQ_U300_GPIO_PORT2,
  195. .end = IRQ_U300_GPIO_PORT2,
  196. .flags = IORESOURCE_IRQ,
  197. },
  198. #ifdef U300_COH901571_3
  199. {
  200. .name = "gpio3",
  201. .start = IRQ_U300_GPIO_PORT3,
  202. .end = IRQ_U300_GPIO_PORT3,
  203. .flags = IORESOURCE_IRQ,
  204. },
  205. {
  206. .name = "gpio4",
  207. .start = IRQ_U300_GPIO_PORT4,
  208. .end = IRQ_U300_GPIO_PORT4,
  209. .flags = IORESOURCE_IRQ,
  210. },
  211. #ifdef CONFIG_MACH_U300_BS335
  212. {
  213. .name = "gpio5",
  214. .start = IRQ_U300_GPIO_PORT5,
  215. .end = IRQ_U300_GPIO_PORT5,
  216. .flags = IORESOURCE_IRQ,
  217. },
  218. {
  219. .name = "gpio6",
  220. .start = IRQ_U300_GPIO_PORT6,
  221. .end = IRQ_U300_GPIO_PORT6,
  222. .flags = IORESOURCE_IRQ,
  223. },
  224. #endif /* CONFIG_MACH_U300_BS335 */
  225. #endif /* U300_COH901571_3 */
  226. };
  227. static struct resource keypad_resources[] = {
  228. {
  229. .start = U300_KEYPAD_BASE,
  230. .end = U300_KEYPAD_BASE + SZ_4K - 1,
  231. .flags = IORESOURCE_MEM,
  232. },
  233. {
  234. .name = "coh901461-press",
  235. .start = IRQ_U300_KEYPAD_KEYBF,
  236. .end = IRQ_U300_KEYPAD_KEYBF,
  237. .flags = IORESOURCE_IRQ,
  238. },
  239. {
  240. .name = "coh901461-release",
  241. .start = IRQ_U300_KEYPAD_KEYBR,
  242. .end = IRQ_U300_KEYPAD_KEYBR,
  243. .flags = IORESOURCE_IRQ,
  244. },
  245. };
  246. static struct resource rtc_resources[] = {
  247. {
  248. .start = U300_RTC_BASE,
  249. .end = U300_RTC_BASE + SZ_4K - 1,
  250. .flags = IORESOURCE_MEM,
  251. },
  252. {
  253. .start = IRQ_U300_RTC,
  254. .end = IRQ_U300_RTC,
  255. .flags = IORESOURCE_IRQ,
  256. },
  257. };
  258. /*
  259. * Fsmc does have IRQs: #43 and #44 (NFIF and NFIF2)
  260. * but these are not yet used by the driver.
  261. */
  262. static struct resource fsmc_resources[] = {
  263. {
  264. .start = U300_NAND_IF_PHYS_BASE,
  265. .end = U300_NAND_IF_PHYS_BASE + SZ_4K - 1,
  266. .flags = IORESOURCE_MEM,
  267. },
  268. };
  269. static struct resource i2c0_resources[] = {
  270. {
  271. .start = U300_I2C0_BASE,
  272. .end = U300_I2C0_BASE + SZ_4K - 1,
  273. .flags = IORESOURCE_MEM,
  274. },
  275. {
  276. .start = IRQ_U300_I2C0,
  277. .end = IRQ_U300_I2C0,
  278. .flags = IORESOURCE_IRQ,
  279. },
  280. };
  281. static struct resource i2c1_resources[] = {
  282. {
  283. .start = U300_I2C1_BASE,
  284. .end = U300_I2C1_BASE + SZ_4K - 1,
  285. .flags = IORESOURCE_MEM,
  286. },
  287. {
  288. .start = IRQ_U300_I2C1,
  289. .end = IRQ_U300_I2C1,
  290. .flags = IORESOURCE_IRQ,
  291. },
  292. };
  293. static struct resource wdog_resources[] = {
  294. {
  295. .start = U300_WDOG_BASE,
  296. .end = U300_WDOG_BASE + SZ_4K - 1,
  297. .flags = IORESOURCE_MEM,
  298. },
  299. {
  300. .start = IRQ_U300_WDOG,
  301. .end = IRQ_U300_WDOG,
  302. .flags = IORESOURCE_IRQ,
  303. }
  304. };
  305. /* TODO: These should be protected by suitable #ifdef's */
  306. static struct resource ave_resources[] = {
  307. {
  308. .name = "AVE3e I/O Area",
  309. .start = U300_VIDEOENC_BASE,
  310. .end = U300_VIDEOENC_BASE + SZ_512K - 1,
  311. .flags = IORESOURCE_MEM,
  312. },
  313. {
  314. .name = "AVE3e IRQ0",
  315. .start = IRQ_U300_VIDEO_ENC_0,
  316. .end = IRQ_U300_VIDEO_ENC_0,
  317. .flags = IORESOURCE_IRQ,
  318. },
  319. {
  320. .name = "AVE3e IRQ1",
  321. .start = IRQ_U300_VIDEO_ENC_1,
  322. .end = IRQ_U300_VIDEO_ENC_1,
  323. .flags = IORESOURCE_IRQ,
  324. },
  325. {
  326. .name = "AVE3e Physmem Area",
  327. .start = 0, /* 0 will be remapped to reserved memory */
  328. .end = SZ_1M - 1,
  329. .flags = IORESOURCE_MEM,
  330. },
  331. /*
  332. * The AVE3e requires two regions of 256MB that it considers
  333. * "invisible". The hardware will not be able to access these
  334. * adresses, so they should never point to system RAM.
  335. */
  336. {
  337. .name = "AVE3e Reserved 0",
  338. .start = 0xd0000000,
  339. .end = 0xd0000000 + SZ_256M - 1,
  340. .flags = IORESOURCE_MEM,
  341. },
  342. {
  343. .name = "AVE3e Reserved 1",
  344. .start = 0xe0000000,
  345. .end = 0xe0000000 + SZ_256M - 1,
  346. .flags = IORESOURCE_MEM,
  347. },
  348. };
  349. static struct platform_device wdog_device = {
  350. .name = "wdog",
  351. .id = -1,
  352. .num_resources = ARRAY_SIZE(wdog_resources),
  353. .resource = wdog_resources,
  354. };
  355. static struct platform_device i2c0_device = {
  356. .name = "stddci2c",
  357. .id = 0,
  358. .num_resources = ARRAY_SIZE(i2c0_resources),
  359. .resource = i2c0_resources,
  360. };
  361. static struct platform_device i2c1_device = {
  362. .name = "stddci2c",
  363. .id = 1,
  364. .num_resources = ARRAY_SIZE(i2c1_resources),
  365. .resource = i2c1_resources,
  366. };
  367. static struct platform_device gpio_device = {
  368. .name = "u300-gpio",
  369. .id = -1,
  370. .num_resources = ARRAY_SIZE(gpio_resources),
  371. .resource = gpio_resources,
  372. };
  373. static struct platform_device keypad_device = {
  374. .name = "keypad",
  375. .id = -1,
  376. .num_resources = ARRAY_SIZE(keypad_resources),
  377. .resource = keypad_resources,
  378. };
  379. static struct platform_device rtc_device = {
  380. .name = "rtc0",
  381. .id = -1,
  382. .num_resources = ARRAY_SIZE(rtc_resources),
  383. .resource = rtc_resources,
  384. };
  385. static struct platform_device fsmc_device = {
  386. .name = "nandif",
  387. .id = -1,
  388. .num_resources = ARRAY_SIZE(fsmc_resources),
  389. .resource = fsmc_resources,
  390. };
  391. static struct platform_device ave_device = {
  392. .name = "video_enc",
  393. .id = -1,
  394. .num_resources = ARRAY_SIZE(ave_resources),
  395. .resource = ave_resources,
  396. };
  397. /*
  398. * Notice that AMBA devices are initialized before platform devices.
  399. *
  400. */
  401. static struct platform_device *platform_devs[] __initdata = {
  402. &i2c0_device,
  403. &i2c1_device,
  404. &keypad_device,
  405. &rtc_device,
  406. &gpio_device,
  407. &fsmc_device,
  408. &wdog_device,
  409. &ave_device
  410. };
  411. /*
  412. * Interrupts: the U300 platforms have two pl190 ARM PrimeCells connected
  413. * together so some interrupts are connected to the first one and some
  414. * to the second one.
  415. */
  416. void __init u300_init_irq(void)
  417. {
  418. u32 mask[2] = {0, 0};
  419. int i;
  420. for (i = 0; i < NR_IRQS; i++)
  421. set_bit(i, (unsigned long *) &mask[0]);
  422. u300_enable_intcon_clock();
  423. vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], mask[0]);
  424. vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], mask[1]);
  425. }
  426. /*
  427. * U300 platforms peripheral handling
  428. */
  429. struct db_chip {
  430. u16 chipid;
  431. const char *name;
  432. };
  433. /*
  434. * This is a list of the Digital Baseband chips used in the U300 platform.
  435. */
  436. static struct db_chip db_chips[] __initdata = {
  437. {
  438. .chipid = 0xb800,
  439. .name = "DB3000",
  440. },
  441. {
  442. .chipid = 0xc000,
  443. .name = "DB3100",
  444. },
  445. {
  446. .chipid = 0xc800,
  447. .name = "DB3150",
  448. },
  449. {
  450. .chipid = 0xd800,
  451. .name = "DB3200",
  452. },
  453. {
  454. .chipid = 0xe000,
  455. .name = "DB3250",
  456. },
  457. {
  458. .chipid = 0xe800,
  459. .name = "DB3210",
  460. },
  461. {
  462. .chipid = 0xf000,
  463. .name = "DB3350 P1x",
  464. },
  465. {
  466. .chipid = 0xf100,
  467. .name = "DB3350 P2x",
  468. },
  469. {
  470. .chipid = 0x0000, /* List terminator */
  471. .name = NULL,
  472. }
  473. };
  474. static void __init u300_init_check_chip(void)
  475. {
  476. u16 val;
  477. struct db_chip *chip;
  478. const char *chipname;
  479. const char unknown[] = "UNKNOWN";
  480. /* Read out and print chip ID */
  481. val = readw(U300_SYSCON_VBASE + U300_SYSCON_CIDR);
  482. /* This is in funky bigendian order... */
  483. val = (val & 0xFFU) << 8 | (val >> 8);
  484. chip = db_chips;
  485. chipname = unknown;
  486. for ( ; chip->chipid; chip++) {
  487. if (chip->chipid == (val & 0xFF00U)) {
  488. chipname = chip->name;
  489. break;
  490. }
  491. }
  492. printk(KERN_INFO "Initializing U300 system on %s baseband chip " \
  493. "(chip ID 0x%04x)\n", chipname, val);
  494. #ifdef CONFIG_MACH_U300_BS26
  495. if ((val & 0xFF00U) != 0xc800) {
  496. printk(KERN_ERR "Platform configured for BS25/BS26 " \
  497. "with DB3150 but %s detected, expect problems!",
  498. chipname);
  499. }
  500. #endif
  501. #ifdef CONFIG_MACH_U300_BS330
  502. if ((val & 0xFF00U) != 0xd800) {
  503. printk(KERN_ERR "Platform configured for BS330 " \
  504. "with DB3200 but %s detected, expect problems!",
  505. chipname);
  506. }
  507. #endif
  508. #ifdef CONFIG_MACH_U300_BS335
  509. if ((val & 0xFF00U) != 0xf000 && (val & 0xFF00U) != 0xf100) {
  510. printk(KERN_ERR "Platform configured for BS365 " \
  511. " with DB3350 but %s detected, expect problems!",
  512. chipname);
  513. }
  514. #endif
  515. #ifdef CONFIG_MACH_U300_BS365
  516. if ((val & 0xFF00U) != 0xe800) {
  517. printk(KERN_ERR "Platform configured for BS365 " \
  518. "with DB3210 but %s detected, expect problems!",
  519. chipname);
  520. }
  521. #endif
  522. }
  523. /*
  524. * Some devices and their resources require reserved physical memory from
  525. * the end of the available RAM. This function traverses the list of devices
  526. * and assigns actual adresses to these.
  527. */
  528. static void __init u300_assign_physmem(void)
  529. {
  530. unsigned long curr_start = __pa(high_memory);
  531. int i, j;
  532. for (i = 0; i < ARRAY_SIZE(platform_devs); i++) {
  533. for (j = 0; j < platform_devs[i]->num_resources; j++) {
  534. struct resource *const res =
  535. &platform_devs[i]->resource[j];
  536. if (IORESOURCE_MEM == res->flags &&
  537. 0 == res->start) {
  538. res->start = curr_start;
  539. res->end += curr_start;
  540. curr_start += (res->end - res->start + 1);
  541. printk(KERN_INFO "core.c: Mapping RAM " \
  542. "%#x-%#x to device %s:%s\n",
  543. res->start, res->end,
  544. platform_devs[i]->name, res->name);
  545. }
  546. }
  547. }
  548. }
  549. void __init u300_init_devices(void)
  550. {
  551. int i;
  552. u16 val;
  553. /* Check what platform we run and print some status information */
  554. u300_init_check_chip();
  555. /* Set system to run at PLL208, max performance, a known state. */
  556. val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR);
  557. val &= ~U300_SYSCON_CCR_CLKING_PERFORMANCE_MASK;
  558. writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
  559. /* Wait for the PLL208 to lock if not locked in yet */
  560. while (!(readw(U300_SYSCON_VBASE + U300_SYSCON_CSR) &
  561. U300_SYSCON_CSR_PLL208_LOCK_IND));
  562. /* Register the AMBA devices in the AMBA bus abstraction layer */
  563. u300_clock_primecells();
  564. for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  565. struct amba_device *d = amba_devs[i];
  566. amba_device_register(d, &iomem_resource);
  567. }
  568. u300_unclock_primecells();
  569. u300_assign_physmem();
  570. /* Register the platform devices */
  571. platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
  572. #ifndef CONFIG_MACH_U300_SEMI_IS_SHARED
  573. /*
  574. * Enable SEMI self refresh. Self-refresh of the SDRAM is entered when
  575. * both subsystems are requesting this mode.
  576. * If we not share the Acc SDRAM, this is never the case. Therefore
  577. * enable it here from the App side.
  578. */
  579. val = readw(U300_SYSCON_VBASE + U300_SYSCON_SMCR) |
  580. U300_SYSCON_SMCR_SEMI_SREFREQ_ENABLE;
  581. writew(val, U300_SYSCON_VBASE + U300_SYSCON_SMCR);
  582. #endif /* CONFIG_MACH_U300_SEMI_IS_SHARED */
  583. }
  584. static int core_module_init(void)
  585. {
  586. /*
  587. * This needs to be initialized later: it needs the input framework
  588. * to be initialized first.
  589. */
  590. return mmc_init(&mmcsd_device);
  591. }
  592. module_init(core_module_init);