ov519.c 72 KB

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  1. /**
  2. * OV519 driver
  3. *
  4. * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
  5. *
  6. * This module is adapted from the ov51x-jpeg package, which itself
  7. * was adapted from the ov511 driver.
  8. *
  9. * Original copyright for the ov511 driver is:
  10. *
  11. * Copyright (c) 1999-2004 Mark W. McClelland
  12. * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
  13. *
  14. * ov51x-jpeg original copyright is:
  15. *
  16. * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
  17. * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
  18. *
  19. * This program is free software; you can redistribute it and/or modify
  20. * it under the terms of the GNU General Public License as published by
  21. * the Free Software Foundation; either version 2 of the License, or
  22. * any later version.
  23. *
  24. * This program is distributed in the hope that it will be useful,
  25. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  27. * GNU General Public License for more details.
  28. *
  29. * You should have received a copy of the GNU General Public License
  30. * along with this program; if not, write to the Free Software
  31. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  32. *
  33. */
  34. #define MODULE_NAME "ov519"
  35. #include "gspca.h"
  36. MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
  37. MODULE_DESCRIPTION("OV519 USB Camera Driver");
  38. MODULE_LICENSE("GPL");
  39. /* global parameters */
  40. static int frame_rate;
  41. /* Number of times to retry a failed I2C transaction. Increase this if you
  42. * are getting "Failed to read sensor ID..." */
  43. static int i2c_detect_tries = 10;
  44. /* ov519 device descriptor */
  45. struct sd {
  46. struct gspca_dev gspca_dev; /* !! must be the first item */
  47. char bridge;
  48. #define BRIDGE_OV511 0
  49. #define BRIDGE_OV511PLUS 1
  50. #define BRIDGE_OV518 2
  51. #define BRIDGE_OV518PLUS 3
  52. #define BRIDGE_OV519 4
  53. /* Determined by sensor type */
  54. __u8 sif;
  55. __u8 brightness;
  56. __u8 contrast;
  57. __u8 colors;
  58. __u8 hflip;
  59. __u8 vflip;
  60. __u8 autobrightness;
  61. __u8 freq;
  62. __u8 stopped; /* Streaming is temporarily paused */
  63. __u8 frame_rate; /* current Framerate (OV519 only) */
  64. __u8 clockdiv; /* clockdiv override for OV519 only */
  65. char sensor; /* Type of image sensor chip (SEN_*) */
  66. #define SEN_UNKNOWN 0
  67. #define SEN_OV6620 1
  68. #define SEN_OV6630 2
  69. #define SEN_OV7610 3
  70. #define SEN_OV7620 4
  71. #define SEN_OV7640 5
  72. #define SEN_OV7670 6
  73. #define SEN_OV76BE 7
  74. #define SEN_OV8610 8
  75. };
  76. /* V4L2 controls supported by the driver */
  77. static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
  78. static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
  79. static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
  80. static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
  81. static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
  82. static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
  83. static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
  84. static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
  85. static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
  86. static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
  87. static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val);
  88. static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val);
  89. static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
  90. static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
  91. static void setbrightness(struct gspca_dev *gspca_dev);
  92. static void setcontrast(struct gspca_dev *gspca_dev);
  93. static void setcolors(struct gspca_dev *gspca_dev);
  94. static void setautobrightness(struct sd *sd);
  95. static void setfreq(struct sd *sd);
  96. static const struct ctrl sd_ctrls[] = {
  97. {
  98. {
  99. .id = V4L2_CID_BRIGHTNESS,
  100. .type = V4L2_CTRL_TYPE_INTEGER,
  101. .name = "Brightness",
  102. .minimum = 0,
  103. .maximum = 255,
  104. .step = 1,
  105. #define BRIGHTNESS_DEF 127
  106. .default_value = BRIGHTNESS_DEF,
  107. },
  108. .set = sd_setbrightness,
  109. .get = sd_getbrightness,
  110. },
  111. {
  112. {
  113. .id = V4L2_CID_CONTRAST,
  114. .type = V4L2_CTRL_TYPE_INTEGER,
  115. .name = "Contrast",
  116. .minimum = 0,
  117. .maximum = 255,
  118. .step = 1,
  119. #define CONTRAST_DEF 127
  120. .default_value = CONTRAST_DEF,
  121. },
  122. .set = sd_setcontrast,
  123. .get = sd_getcontrast,
  124. },
  125. {
  126. {
  127. .id = V4L2_CID_SATURATION,
  128. .type = V4L2_CTRL_TYPE_INTEGER,
  129. .name = "Color",
  130. .minimum = 0,
  131. .maximum = 255,
  132. .step = 1,
  133. #define COLOR_DEF 127
  134. .default_value = COLOR_DEF,
  135. },
  136. .set = sd_setcolors,
  137. .get = sd_getcolors,
  138. },
  139. /* The flip controls work with ov7670 only */
  140. #define HFLIP_IDX 3
  141. {
  142. {
  143. .id = V4L2_CID_HFLIP,
  144. .type = V4L2_CTRL_TYPE_BOOLEAN,
  145. .name = "Mirror",
  146. .minimum = 0,
  147. .maximum = 1,
  148. .step = 1,
  149. #define HFLIP_DEF 0
  150. .default_value = HFLIP_DEF,
  151. },
  152. .set = sd_sethflip,
  153. .get = sd_gethflip,
  154. },
  155. #define VFLIP_IDX 4
  156. {
  157. {
  158. .id = V4L2_CID_VFLIP,
  159. .type = V4L2_CTRL_TYPE_BOOLEAN,
  160. .name = "Vflip",
  161. .minimum = 0,
  162. .maximum = 1,
  163. .step = 1,
  164. #define VFLIP_DEF 0
  165. .default_value = VFLIP_DEF,
  166. },
  167. .set = sd_setvflip,
  168. .get = sd_getvflip,
  169. },
  170. #define AUTOBRIGHT_IDX 5
  171. {
  172. {
  173. .id = V4L2_CID_AUTOBRIGHTNESS,
  174. .type = V4L2_CTRL_TYPE_BOOLEAN,
  175. .name = "Auto Brightness",
  176. .minimum = 0,
  177. .maximum = 1,
  178. .step = 1,
  179. #define AUTOBRIGHT_DEF 1
  180. .default_value = AUTOBRIGHT_DEF,
  181. },
  182. .set = sd_setautobrightness,
  183. .get = sd_getautobrightness,
  184. },
  185. #define FREQ_IDX 6
  186. {
  187. {
  188. .id = V4L2_CID_POWER_LINE_FREQUENCY,
  189. .type = V4L2_CTRL_TYPE_MENU,
  190. .name = "Light frequency filter",
  191. .minimum = 0,
  192. .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
  193. .step = 1,
  194. #define FREQ_DEF 0
  195. .default_value = FREQ_DEF,
  196. },
  197. .set = sd_setfreq,
  198. .get = sd_getfreq,
  199. },
  200. #define OV7670_FREQ_IDX 7
  201. {
  202. {
  203. .id = V4L2_CID_POWER_LINE_FREQUENCY,
  204. .type = V4L2_CTRL_TYPE_MENU,
  205. .name = "Light frequency filter",
  206. .minimum = 0,
  207. .maximum = 3, /* 0: 0, 1: 50Hz, 2:60Hz 3: Auto Hz */
  208. .step = 1,
  209. #define OV7670_FREQ_DEF 3
  210. .default_value = OV7670_FREQ_DEF,
  211. },
  212. .set = sd_setfreq,
  213. .get = sd_getfreq,
  214. },
  215. };
  216. static const struct v4l2_pix_format ov519_vga_mode[] = {
  217. {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  218. .bytesperline = 320,
  219. .sizeimage = 320 * 240 * 3 / 8 + 590,
  220. .colorspace = V4L2_COLORSPACE_JPEG,
  221. .priv = 1},
  222. {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  223. .bytesperline = 640,
  224. .sizeimage = 640 * 480 * 3 / 8 + 590,
  225. .colorspace = V4L2_COLORSPACE_JPEG,
  226. .priv = 0},
  227. };
  228. static const struct v4l2_pix_format ov519_sif_mode[] = {
  229. {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  230. .bytesperline = 176,
  231. .sizeimage = 176 * 144 * 3 / 8 + 590,
  232. .colorspace = V4L2_COLORSPACE_JPEG,
  233. .priv = 1},
  234. {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  235. .bytesperline = 352,
  236. .sizeimage = 352 * 288 * 3 / 8 + 590,
  237. .colorspace = V4L2_COLORSPACE_JPEG,
  238. .priv = 0},
  239. };
  240. static const struct v4l2_pix_format ov518_vga_mode[] = {
  241. {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  242. .bytesperline = 320,
  243. .sizeimage = 320 * 240 * 3 / 8 + 590,
  244. .colorspace = V4L2_COLORSPACE_JPEG,
  245. .priv = 1},
  246. {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  247. .bytesperline = 640,
  248. .sizeimage = 640 * 480 * 3 / 8 + 590,
  249. .colorspace = V4L2_COLORSPACE_JPEG,
  250. .priv = 0},
  251. };
  252. static const struct v4l2_pix_format ov518_sif_mode[] = {
  253. {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  254. .bytesperline = 176,
  255. .sizeimage = 40000,
  256. .colorspace = V4L2_COLORSPACE_JPEG,
  257. .priv = 1},
  258. {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  259. .bytesperline = 352,
  260. .sizeimage = 352 * 288 * 3 / 8 + 590,
  261. .colorspace = V4L2_COLORSPACE_JPEG,
  262. .priv = 0},
  263. };
  264. /* Registers common to OV511 / OV518 */
  265. #define R51x_SYS_RESET 0x50
  266. #define R51x_SYS_INIT 0x53
  267. #define R51x_SYS_SNAP 0x52
  268. #define R51x_SYS_CUST_ID 0x5F
  269. #define R51x_COMP_LUT_BEGIN 0x80
  270. /* OV511 Camera interface register numbers */
  271. #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
  272. #define OV511_RESET_NOREGS 0x3F /* All but OV511 & regs */
  273. /* OV518 Camera interface register numbers */
  274. #define R518_GPIO_OUT 0x56 /* OV518(+) only */
  275. #define R518_GPIO_CTL 0x57 /* OV518(+) only */
  276. /* OV519 Camera interface register numbers */
  277. #define OV519_R10_H_SIZE 0x10
  278. #define OV519_R11_V_SIZE 0x11
  279. #define OV519_R12_X_OFFSETL 0x12
  280. #define OV519_R13_X_OFFSETH 0x13
  281. #define OV519_R14_Y_OFFSETL 0x14
  282. #define OV519_R15_Y_OFFSETH 0x15
  283. #define OV519_R16_DIVIDER 0x16
  284. #define OV519_R20_DFR 0x20
  285. #define OV519_R25_FORMAT 0x25
  286. /* OV519 System Controller register numbers */
  287. #define OV519_SYS_RESET1 0x51
  288. #define OV519_SYS_EN_CLK1 0x54
  289. #define OV519_GPIO_DATA_OUT0 0x71
  290. #define OV519_GPIO_IO_CTRL0 0x72
  291. #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
  292. /* I2C registers */
  293. #define R51x_I2C_W_SID 0x41
  294. #define R51x_I2C_SADDR_3 0x42
  295. #define R51x_I2C_SADDR_2 0x43
  296. #define R51x_I2C_R_SID 0x44
  297. #define R51x_I2C_DATA 0x45
  298. #define R518_I2C_CTL 0x47 /* OV518(+) only */
  299. /* I2C ADDRESSES */
  300. #define OV7xx0_SID 0x42
  301. #define OV8xx0_SID 0xa0
  302. #define OV6xx0_SID 0xc0
  303. /* OV7610 registers */
  304. #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
  305. #define OV7610_REG_BLUE 0x01 /* blue channel balance */
  306. #define OV7610_REG_RED 0x02 /* red channel balance */
  307. #define OV7610_REG_SAT 0x03 /* saturation */
  308. #define OV8610_REG_HUE 0x04 /* 04 reserved */
  309. #define OV7610_REG_CNT 0x05 /* Y contrast */
  310. #define OV7610_REG_BRT 0x06 /* Y brightness */
  311. #define OV7610_REG_COM_C 0x14 /* misc common regs */
  312. #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
  313. #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
  314. #define OV7610_REG_COM_I 0x29 /* misc settings */
  315. /* OV7670 registers */
  316. #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
  317. #define OV7670_REG_BLUE 0x01 /* blue gain */
  318. #define OV7670_REG_RED 0x02 /* red gain */
  319. #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
  320. #define OV7670_REG_COM1 0x04 /* Control 1 */
  321. #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
  322. #define OV7670_REG_COM3 0x0c /* Control 3 */
  323. #define OV7670_REG_COM4 0x0d /* Control 4 */
  324. #define OV7670_REG_COM5 0x0e /* All "reserved" */
  325. #define OV7670_REG_COM6 0x0f /* Control 6 */
  326. #define OV7670_REG_AECH 0x10 /* More bits of AEC value */
  327. #define OV7670_REG_CLKRC 0x11 /* Clock control */
  328. #define OV7670_REG_COM7 0x12 /* Control 7 */
  329. #define OV7670_COM7_FMT_VGA 0x00
  330. #define OV7670_COM7_YUV 0x00 /* YUV */
  331. #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
  332. #define OV7670_COM7_FMT_MASK 0x38
  333. #define OV7670_COM7_RESET 0x80 /* Register reset */
  334. #define OV7670_REG_COM8 0x13 /* Control 8 */
  335. #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
  336. #define OV7670_COM8_AWB 0x02 /* White balance enable */
  337. #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
  338. #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
  339. #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
  340. #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
  341. #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
  342. #define OV7670_REG_COM10 0x15 /* Control 10 */
  343. #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
  344. #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
  345. #define OV7670_REG_VSTART 0x19 /* Vert start high bits */
  346. #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
  347. #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
  348. #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
  349. #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
  350. #define OV7670_REG_AEW 0x24 /* AGC upper limit */
  351. #define OV7670_REG_AEB 0x25 /* AGC lower limit */
  352. #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
  353. #define OV7670_REG_HREF 0x32 /* HREF pieces */
  354. #define OV7670_REG_TSLB 0x3a /* lots of stuff */
  355. #define OV7670_REG_COM11 0x3b /* Control 11 */
  356. #define OV7670_COM11_EXP 0x02
  357. #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
  358. #define OV7670_REG_COM12 0x3c /* Control 12 */
  359. #define OV7670_REG_COM13 0x3d /* Control 13 */
  360. #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
  361. #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
  362. #define OV7670_REG_COM14 0x3e /* Control 14 */
  363. #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
  364. #define OV7670_REG_COM15 0x40 /* Control 15 */
  365. #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
  366. #define OV7670_REG_COM16 0x41 /* Control 16 */
  367. #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
  368. #define OV7670_REG_BRIGHT 0x55 /* Brightness */
  369. #define OV7670_REG_CONTRAS 0x56 /* Contrast control */
  370. #define OV7670_REG_GFIX 0x69 /* Fix gain control */
  371. #define OV7670_REG_RGB444 0x8c /* RGB 444 control */
  372. #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
  373. #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
  374. #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
  375. #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
  376. #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
  377. #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
  378. #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
  379. #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
  380. #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
  381. struct ov_regvals {
  382. __u8 reg;
  383. __u8 val;
  384. };
  385. struct ov_i2c_regvals {
  386. __u8 reg;
  387. __u8 val;
  388. };
  389. static const struct ov_i2c_regvals norm_6x20[] = {
  390. { 0x12, 0x80 }, /* reset */
  391. { 0x11, 0x01 },
  392. { 0x03, 0x60 },
  393. { 0x05, 0x7f }, /* For when autoadjust is off */
  394. { 0x07, 0xa8 },
  395. /* The ratio of 0x0c and 0x0d controls the white point */
  396. { 0x0c, 0x24 },
  397. { 0x0d, 0x24 },
  398. { 0x0f, 0x15 }, /* COMS */
  399. { 0x10, 0x75 }, /* AEC Exposure time */
  400. { 0x12, 0x24 }, /* Enable AGC */
  401. { 0x14, 0x04 },
  402. /* 0x16: 0x06 helps frame stability with moving objects */
  403. { 0x16, 0x06 },
  404. /* { 0x20, 0x30 }, * Aperture correction enable */
  405. { 0x26, 0xb2 }, /* BLC enable */
  406. /* 0x28: 0x05 Selects RGB format if RGB on */
  407. { 0x28, 0x05 },
  408. { 0x2a, 0x04 }, /* Disable framerate adjust */
  409. /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
  410. { 0x2d, 0x99 },
  411. { 0x33, 0xa0 }, /* Color Processing Parameter */
  412. { 0x34, 0xd2 }, /* Max A/D range */
  413. { 0x38, 0x8b },
  414. { 0x39, 0x40 },
  415. { 0x3c, 0x39 }, /* Enable AEC mode changing */
  416. { 0x3c, 0x3c }, /* Change AEC mode */
  417. { 0x3c, 0x24 }, /* Disable AEC mode changing */
  418. { 0x3d, 0x80 },
  419. /* These next two registers (0x4a, 0x4b) are undocumented.
  420. * They control the color balance */
  421. { 0x4a, 0x80 },
  422. { 0x4b, 0x80 },
  423. { 0x4d, 0xd2 }, /* This reduces noise a bit */
  424. { 0x4e, 0xc1 },
  425. { 0x4f, 0x04 },
  426. /* Do 50-53 have any effect? */
  427. /* Toggle 0x12[2] off and on here? */
  428. };
  429. static const struct ov_i2c_regvals norm_6x30[] = {
  430. { 0x12, 0x80 }, /* Reset */
  431. { 0x00, 0x1f }, /* Gain */
  432. { 0x01, 0x99 }, /* Blue gain */
  433. { 0x02, 0x7c }, /* Red gain */
  434. { 0x03, 0xc0 }, /* Saturation */
  435. { 0x05, 0x0a }, /* Contrast */
  436. { 0x06, 0x95 }, /* Brightness */
  437. { 0x07, 0x2d }, /* Sharpness */
  438. { 0x0c, 0x20 },
  439. { 0x0d, 0x20 },
  440. { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
  441. { 0x0f, 0x05 },
  442. { 0x10, 0x9a },
  443. { 0x11, 0x00 }, /* Pixel clock = fastest */
  444. { 0x12, 0x24 }, /* Enable AGC and AWB */
  445. { 0x13, 0x21 },
  446. { 0x14, 0x80 },
  447. { 0x15, 0x01 },
  448. { 0x16, 0x03 },
  449. { 0x17, 0x38 },
  450. { 0x18, 0xea },
  451. { 0x19, 0x04 },
  452. { 0x1a, 0x93 },
  453. { 0x1b, 0x00 },
  454. { 0x1e, 0xc4 },
  455. { 0x1f, 0x04 },
  456. { 0x20, 0x20 },
  457. { 0x21, 0x10 },
  458. { 0x22, 0x88 },
  459. { 0x23, 0xc0 }, /* Crystal circuit power level */
  460. { 0x25, 0x9a }, /* Increase AEC black ratio */
  461. { 0x26, 0xb2 }, /* BLC enable */
  462. { 0x27, 0xa2 },
  463. { 0x28, 0x00 },
  464. { 0x29, 0x00 },
  465. { 0x2a, 0x84 }, /* 60 Hz power */
  466. { 0x2b, 0xa8 }, /* 60 Hz power */
  467. { 0x2c, 0xa0 },
  468. { 0x2d, 0x95 }, /* Enable auto-brightness */
  469. { 0x2e, 0x88 },
  470. { 0x33, 0x26 },
  471. { 0x34, 0x03 },
  472. { 0x36, 0x8f },
  473. { 0x37, 0x80 },
  474. { 0x38, 0x83 },
  475. { 0x39, 0x80 },
  476. { 0x3a, 0x0f },
  477. { 0x3b, 0x3c },
  478. { 0x3c, 0x1a },
  479. { 0x3d, 0x80 },
  480. { 0x3e, 0x80 },
  481. { 0x3f, 0x0e },
  482. { 0x40, 0x00 }, /* White bal */
  483. { 0x41, 0x00 }, /* White bal */
  484. { 0x42, 0x80 },
  485. { 0x43, 0x3f }, /* White bal */
  486. { 0x44, 0x80 },
  487. { 0x45, 0x20 },
  488. { 0x46, 0x20 },
  489. { 0x47, 0x80 },
  490. { 0x48, 0x7f },
  491. { 0x49, 0x00 },
  492. { 0x4a, 0x00 },
  493. { 0x4b, 0x80 },
  494. { 0x4c, 0xd0 },
  495. { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
  496. { 0x4e, 0x40 },
  497. { 0x4f, 0x07 }, /* UV avg., col. killer: max */
  498. { 0x50, 0xff },
  499. { 0x54, 0x23 }, /* Max AGC gain: 18dB */
  500. { 0x55, 0xff },
  501. { 0x56, 0x12 },
  502. { 0x57, 0x81 },
  503. { 0x58, 0x75 },
  504. { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
  505. { 0x5a, 0x2c },
  506. { 0x5b, 0x0f }, /* AWB chrominance levels */
  507. { 0x5c, 0x10 },
  508. { 0x3d, 0x80 },
  509. { 0x27, 0xa6 },
  510. { 0x12, 0x20 }, /* Toggle AWB */
  511. { 0x12, 0x24 },
  512. };
  513. /* Lawrence Glaister <lg@jfm.bc.ca> reports:
  514. *
  515. * Register 0x0f in the 7610 has the following effects:
  516. *
  517. * 0x85 (AEC method 1): Best overall, good contrast range
  518. * 0x45 (AEC method 2): Very overexposed
  519. * 0xa5 (spec sheet default): Ok, but the black level is
  520. * shifted resulting in loss of contrast
  521. * 0x05 (old driver setting): very overexposed, too much
  522. * contrast
  523. */
  524. static const struct ov_i2c_regvals norm_7610[] = {
  525. { 0x10, 0xff },
  526. { 0x16, 0x06 },
  527. { 0x28, 0x24 },
  528. { 0x2b, 0xac },
  529. { 0x12, 0x00 },
  530. { 0x38, 0x81 },
  531. { 0x28, 0x24 }, /* 0c */
  532. { 0x0f, 0x85 }, /* lg's setting */
  533. { 0x15, 0x01 },
  534. { 0x20, 0x1c },
  535. { 0x23, 0x2a },
  536. { 0x24, 0x10 },
  537. { 0x25, 0x8a },
  538. { 0x26, 0xa2 },
  539. { 0x27, 0xc2 },
  540. { 0x2a, 0x04 },
  541. { 0x2c, 0xfe },
  542. { 0x2d, 0x93 },
  543. { 0x30, 0x71 },
  544. { 0x31, 0x60 },
  545. { 0x32, 0x26 },
  546. { 0x33, 0x20 },
  547. { 0x34, 0x48 },
  548. { 0x12, 0x24 },
  549. { 0x11, 0x01 },
  550. { 0x0c, 0x24 },
  551. { 0x0d, 0x24 },
  552. };
  553. static const struct ov_i2c_regvals norm_7620[] = {
  554. { 0x00, 0x00 }, /* gain */
  555. { 0x01, 0x80 }, /* blue gain */
  556. { 0x02, 0x80 }, /* red gain */
  557. { 0x03, 0xc0 }, /* OV7670_REG_VREF */
  558. { 0x06, 0x60 },
  559. { 0x07, 0x00 },
  560. { 0x0c, 0x24 },
  561. { 0x0c, 0x24 },
  562. { 0x0d, 0x24 },
  563. { 0x11, 0x01 },
  564. { 0x12, 0x24 },
  565. { 0x13, 0x01 },
  566. { 0x14, 0x84 },
  567. { 0x15, 0x01 },
  568. { 0x16, 0x03 },
  569. { 0x17, 0x2f },
  570. { 0x18, 0xcf },
  571. { 0x19, 0x06 },
  572. { 0x1a, 0xf5 },
  573. { 0x1b, 0x00 },
  574. { 0x20, 0x18 },
  575. { 0x21, 0x80 },
  576. { 0x22, 0x80 },
  577. { 0x23, 0x00 },
  578. { 0x26, 0xa2 },
  579. { 0x27, 0xea },
  580. { 0x28, 0x20 },
  581. { 0x29, 0x00 },
  582. { 0x2a, 0x10 },
  583. { 0x2b, 0x00 },
  584. { 0x2c, 0x88 },
  585. { 0x2d, 0x91 },
  586. { 0x2e, 0x80 },
  587. { 0x2f, 0x44 },
  588. { 0x60, 0x27 },
  589. { 0x61, 0x02 },
  590. { 0x62, 0x5f },
  591. { 0x63, 0xd5 },
  592. { 0x64, 0x57 },
  593. { 0x65, 0x83 },
  594. { 0x66, 0x55 },
  595. { 0x67, 0x92 },
  596. { 0x68, 0xcf },
  597. { 0x69, 0x76 },
  598. { 0x6a, 0x22 },
  599. { 0x6b, 0x00 },
  600. { 0x6c, 0x02 },
  601. { 0x6d, 0x44 },
  602. { 0x6e, 0x80 },
  603. { 0x6f, 0x1d },
  604. { 0x70, 0x8b },
  605. { 0x71, 0x00 },
  606. { 0x72, 0x14 },
  607. { 0x73, 0x54 },
  608. { 0x74, 0x00 },
  609. { 0x75, 0x8e },
  610. { 0x76, 0x00 },
  611. { 0x77, 0xff },
  612. { 0x78, 0x80 },
  613. { 0x79, 0x80 },
  614. { 0x7a, 0x80 },
  615. { 0x7b, 0xe2 },
  616. { 0x7c, 0x00 },
  617. };
  618. /* 7640 and 7648. The defaults should be OK for most registers. */
  619. static const struct ov_i2c_regvals norm_7640[] = {
  620. { 0x12, 0x80 },
  621. { 0x12, 0x14 },
  622. };
  623. /* 7670. Defaults taken from OmniVision provided data,
  624. * as provided by Jonathan Corbet of OLPC */
  625. static const struct ov_i2c_regvals norm_7670[] = {
  626. { OV7670_REG_COM7, OV7670_COM7_RESET },
  627. { OV7670_REG_TSLB, 0x04 }, /* OV */
  628. { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
  629. { OV7670_REG_CLKRC, 0x01 },
  630. /*
  631. * Set the hardware window. These values from OV don't entirely
  632. * make sense - hstop is less than hstart. But they work...
  633. */
  634. { OV7670_REG_HSTART, 0x13 },
  635. { OV7670_REG_HSTOP, 0x01 },
  636. { OV7670_REG_HREF, 0xb6 },
  637. { OV7670_REG_VSTART, 0x02 },
  638. { OV7670_REG_VSTOP, 0x7a },
  639. { OV7670_REG_VREF, 0x0a },
  640. { OV7670_REG_COM3, 0x00 },
  641. { OV7670_REG_COM14, 0x00 },
  642. /* Mystery scaling numbers */
  643. { 0x70, 0x3a },
  644. { 0x71, 0x35 },
  645. { 0x72, 0x11 },
  646. { 0x73, 0xf0 },
  647. { 0xa2, 0x02 },
  648. /* { OV7670_REG_COM10, 0x0 }, */
  649. /* Gamma curve values */
  650. { 0x7a, 0x20 },
  651. { 0x7b, 0x10 },
  652. { 0x7c, 0x1e },
  653. { 0x7d, 0x35 },
  654. { 0x7e, 0x5a },
  655. { 0x7f, 0x69 },
  656. { 0x80, 0x76 },
  657. { 0x81, 0x80 },
  658. { 0x82, 0x88 },
  659. { 0x83, 0x8f },
  660. { 0x84, 0x96 },
  661. { 0x85, 0xa3 },
  662. { 0x86, 0xaf },
  663. { 0x87, 0xc4 },
  664. { 0x88, 0xd7 },
  665. { 0x89, 0xe8 },
  666. /* AGC and AEC parameters. Note we start by disabling those features,
  667. then turn them only after tweaking the values. */
  668. { OV7670_REG_COM8, OV7670_COM8_FASTAEC
  669. | OV7670_COM8_AECSTEP
  670. | OV7670_COM8_BFILT },
  671. { OV7670_REG_GAIN, 0x00 },
  672. { OV7670_REG_AECH, 0x00 },
  673. { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
  674. { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
  675. { OV7670_REG_BD50MAX, 0x05 },
  676. { OV7670_REG_BD60MAX, 0x07 },
  677. { OV7670_REG_AEW, 0x95 },
  678. { OV7670_REG_AEB, 0x33 },
  679. { OV7670_REG_VPT, 0xe3 },
  680. { OV7670_REG_HAECC1, 0x78 },
  681. { OV7670_REG_HAECC2, 0x68 },
  682. { 0xa1, 0x03 }, /* magic */
  683. { OV7670_REG_HAECC3, 0xd8 },
  684. { OV7670_REG_HAECC4, 0xd8 },
  685. { OV7670_REG_HAECC5, 0xf0 },
  686. { OV7670_REG_HAECC6, 0x90 },
  687. { OV7670_REG_HAECC7, 0x94 },
  688. { OV7670_REG_COM8, OV7670_COM8_FASTAEC
  689. | OV7670_COM8_AECSTEP
  690. | OV7670_COM8_BFILT
  691. | OV7670_COM8_AGC
  692. | OV7670_COM8_AEC },
  693. /* Almost all of these are magic "reserved" values. */
  694. { OV7670_REG_COM5, 0x61 },
  695. { OV7670_REG_COM6, 0x4b },
  696. { 0x16, 0x02 },
  697. { OV7670_REG_MVFP, 0x07 },
  698. { 0x21, 0x02 },
  699. { 0x22, 0x91 },
  700. { 0x29, 0x07 },
  701. { 0x33, 0x0b },
  702. { 0x35, 0x0b },
  703. { 0x37, 0x1d },
  704. { 0x38, 0x71 },
  705. { 0x39, 0x2a },
  706. { OV7670_REG_COM12, 0x78 },
  707. { 0x4d, 0x40 },
  708. { 0x4e, 0x20 },
  709. { OV7670_REG_GFIX, 0x00 },
  710. { 0x6b, 0x4a },
  711. { 0x74, 0x10 },
  712. { 0x8d, 0x4f },
  713. { 0x8e, 0x00 },
  714. { 0x8f, 0x00 },
  715. { 0x90, 0x00 },
  716. { 0x91, 0x00 },
  717. { 0x96, 0x00 },
  718. { 0x9a, 0x00 },
  719. { 0xb0, 0x84 },
  720. { 0xb1, 0x0c },
  721. { 0xb2, 0x0e },
  722. { 0xb3, 0x82 },
  723. { 0xb8, 0x0a },
  724. /* More reserved magic, some of which tweaks white balance */
  725. { 0x43, 0x0a },
  726. { 0x44, 0xf0 },
  727. { 0x45, 0x34 },
  728. { 0x46, 0x58 },
  729. { 0x47, 0x28 },
  730. { 0x48, 0x3a },
  731. { 0x59, 0x88 },
  732. { 0x5a, 0x88 },
  733. { 0x5b, 0x44 },
  734. { 0x5c, 0x67 },
  735. { 0x5d, 0x49 },
  736. { 0x5e, 0x0e },
  737. { 0x6c, 0x0a },
  738. { 0x6d, 0x55 },
  739. { 0x6e, 0x11 },
  740. { 0x6f, 0x9f },
  741. /* "9e for advance AWB" */
  742. { 0x6a, 0x40 },
  743. { OV7670_REG_BLUE, 0x40 },
  744. { OV7670_REG_RED, 0x60 },
  745. { OV7670_REG_COM8, OV7670_COM8_FASTAEC
  746. | OV7670_COM8_AECSTEP
  747. | OV7670_COM8_BFILT
  748. | OV7670_COM8_AGC
  749. | OV7670_COM8_AEC
  750. | OV7670_COM8_AWB },
  751. /* Matrix coefficients */
  752. { 0x4f, 0x80 },
  753. { 0x50, 0x80 },
  754. { 0x51, 0x00 },
  755. { 0x52, 0x22 },
  756. { 0x53, 0x5e },
  757. { 0x54, 0x80 },
  758. { 0x58, 0x9e },
  759. { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
  760. { OV7670_REG_EDGE, 0x00 },
  761. { 0x75, 0x05 },
  762. { 0x76, 0xe1 },
  763. { 0x4c, 0x00 },
  764. { 0x77, 0x01 },
  765. { OV7670_REG_COM13, OV7670_COM13_GAMMA
  766. | OV7670_COM13_UVSAT
  767. | 2}, /* was 3 */
  768. { 0x4b, 0x09 },
  769. { 0xc9, 0x60 },
  770. { OV7670_REG_COM16, 0x38 },
  771. { 0x56, 0x40 },
  772. { 0x34, 0x11 },
  773. { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
  774. { 0xa4, 0x88 },
  775. { 0x96, 0x00 },
  776. { 0x97, 0x30 },
  777. { 0x98, 0x20 },
  778. { 0x99, 0x30 },
  779. { 0x9a, 0x84 },
  780. { 0x9b, 0x29 },
  781. { 0x9c, 0x03 },
  782. { 0x9d, 0x4c },
  783. { 0x9e, 0x3f },
  784. { 0x78, 0x04 },
  785. /* Extra-weird stuff. Some sort of multiplexor register */
  786. { 0x79, 0x01 },
  787. { 0xc8, 0xf0 },
  788. { 0x79, 0x0f },
  789. { 0xc8, 0x00 },
  790. { 0x79, 0x10 },
  791. { 0xc8, 0x7e },
  792. { 0x79, 0x0a },
  793. { 0xc8, 0x80 },
  794. { 0x79, 0x0b },
  795. { 0xc8, 0x01 },
  796. { 0x79, 0x0c },
  797. { 0xc8, 0x0f },
  798. { 0x79, 0x0d },
  799. { 0xc8, 0x20 },
  800. { 0x79, 0x09 },
  801. { 0xc8, 0x80 },
  802. { 0x79, 0x02 },
  803. { 0xc8, 0xc0 },
  804. { 0x79, 0x03 },
  805. { 0xc8, 0x40 },
  806. { 0x79, 0x05 },
  807. { 0xc8, 0x30 },
  808. { 0x79, 0x26 },
  809. };
  810. static const struct ov_i2c_regvals norm_8610[] = {
  811. { 0x12, 0x80 },
  812. { 0x00, 0x00 },
  813. { 0x01, 0x80 },
  814. { 0x02, 0x80 },
  815. { 0x03, 0xc0 },
  816. { 0x04, 0x30 },
  817. { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
  818. { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
  819. { 0x0a, 0x86 },
  820. { 0x0b, 0xb0 },
  821. { 0x0c, 0x20 },
  822. { 0x0d, 0x20 },
  823. { 0x11, 0x01 },
  824. { 0x12, 0x25 },
  825. { 0x13, 0x01 },
  826. { 0x14, 0x04 },
  827. { 0x15, 0x01 }, /* Lin and Win think different about UV order */
  828. { 0x16, 0x03 },
  829. { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
  830. { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
  831. { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
  832. { 0x1a, 0xf5 },
  833. { 0x1b, 0x00 },
  834. { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
  835. { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
  836. { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
  837. { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
  838. { 0x26, 0xa2 },
  839. { 0x27, 0xea },
  840. { 0x28, 0x00 },
  841. { 0x29, 0x00 },
  842. { 0x2a, 0x80 },
  843. { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
  844. { 0x2c, 0xac },
  845. { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
  846. { 0x2e, 0x80 },
  847. { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
  848. { 0x4c, 0x00 },
  849. { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
  850. { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
  851. { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
  852. { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
  853. { 0x63, 0xff },
  854. { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
  855. * maybe thats wrong */
  856. { 0x65, 0x00 },
  857. { 0x66, 0x55 },
  858. { 0x67, 0xb0 },
  859. { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
  860. { 0x69, 0x02 },
  861. { 0x6a, 0x22 },
  862. { 0x6b, 0x00 },
  863. { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
  864. * deleting bit7 colors the first images red */
  865. { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
  866. { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
  867. { 0x6f, 0x01 },
  868. { 0x70, 0x8b },
  869. { 0x71, 0x00 },
  870. { 0x72, 0x14 },
  871. { 0x73, 0x54 },
  872. { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
  873. { 0x75, 0x0e },
  874. { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
  875. { 0x77, 0xff },
  876. { 0x78, 0x80 },
  877. { 0x79, 0x80 },
  878. { 0x7a, 0x80 },
  879. { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
  880. { 0x7c, 0x00 },
  881. { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
  882. { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
  883. { 0x7f, 0xfb },
  884. { 0x80, 0x28 },
  885. { 0x81, 0x00 },
  886. { 0x82, 0x23 },
  887. { 0x83, 0x0b },
  888. { 0x84, 0x00 },
  889. { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
  890. { 0x86, 0xc9 },
  891. { 0x87, 0x00 },
  892. { 0x88, 0x00 },
  893. { 0x89, 0x01 },
  894. { 0x12, 0x20 },
  895. { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
  896. };
  897. static unsigned char ov7670_abs_to_sm(unsigned char v)
  898. {
  899. if (v > 127)
  900. return v & 0x7f;
  901. return (128 - v) | 0x80;
  902. }
  903. /* Write a OV519 register */
  904. static int reg_w(struct sd *sd, __u16 index, __u8 value)
  905. {
  906. int ret;
  907. int req = (sd->bridge <= BRIDGE_OV511PLUS) ? 2 : 1;
  908. sd->gspca_dev.usb_buf[0] = value;
  909. ret = usb_control_msg(sd->gspca_dev.dev,
  910. usb_sndctrlpipe(sd->gspca_dev.dev, 0),
  911. req,
  912. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  913. 0, index,
  914. sd->gspca_dev.usb_buf, 1, 500);
  915. if (ret < 0)
  916. PDEBUG(D_ERR, "Write reg [%02x] %02x failed", index, value);
  917. return ret;
  918. }
  919. /* Read from a OV519 register */
  920. /* returns: negative is error, pos or zero is data */
  921. static int reg_r(struct sd *sd, __u16 index)
  922. {
  923. int ret;
  924. int req = (sd->bridge <= BRIDGE_OV511PLUS) ? 3 : 1;
  925. ret = usb_control_msg(sd->gspca_dev.dev,
  926. usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
  927. req,
  928. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  929. 0, index, sd->gspca_dev.usb_buf, 1, 500);
  930. if (ret >= 0)
  931. ret = sd->gspca_dev.usb_buf[0];
  932. else
  933. PDEBUG(D_ERR, "Read reg [0x%02x] failed", index);
  934. return ret;
  935. }
  936. /* Read 8 values from a OV519 register */
  937. static int reg_r8(struct sd *sd,
  938. __u16 index)
  939. {
  940. int ret;
  941. ret = usb_control_msg(sd->gspca_dev.dev,
  942. usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
  943. 1, /* REQ_IO */
  944. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  945. 0, index, sd->gspca_dev.usb_buf, 8, 500);
  946. if (ret >= 0)
  947. ret = sd->gspca_dev.usb_buf[0];
  948. else
  949. PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index);
  950. return ret;
  951. }
  952. /*
  953. * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
  954. * the same position as 1's in "mask" are cleared and set to "value". Bits
  955. * that are in the same position as 0's in "mask" are preserved, regardless
  956. * of their respective state in "value".
  957. */
  958. static int reg_w_mask(struct sd *sd,
  959. __u16 index,
  960. __u8 value,
  961. __u8 mask)
  962. {
  963. int ret;
  964. __u8 oldval;
  965. if (mask != 0xff) {
  966. value &= mask; /* Enforce mask on value */
  967. ret = reg_r(sd, index);
  968. if (ret < 0)
  969. return ret;
  970. oldval = ret & ~mask; /* Clear the masked bits */
  971. value |= oldval; /* Set the desired bits */
  972. }
  973. return reg_w(sd, index, value);
  974. }
  975. /*
  976. * Writes multiple (n) byte value to a single register. Only valid with certain
  977. * registers (0x30 and 0xc4 - 0xce).
  978. */
  979. static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n)
  980. {
  981. int ret;
  982. *((u32 *)sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
  983. ret = usb_control_msg(sd->gspca_dev.dev,
  984. usb_sndctrlpipe(sd->gspca_dev.dev, 0),
  985. 1 /* REG_IO */,
  986. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  987. 0, index,
  988. sd->gspca_dev.usb_buf, n, 500);
  989. if (ret < 0)
  990. PDEBUG(D_ERR, "Write reg32 [%02x] %08x failed", index, value);
  991. return ret;
  992. }
  993. /*
  994. * The OV518 I2C I/O procedure is different, hence, this function.
  995. * This is normally only called from i2c_w(). Note that this function
  996. * always succeeds regardless of whether the sensor is present and working.
  997. */
  998. static int i2c_w(struct sd *sd,
  999. __u8 reg,
  1000. __u8 value)
  1001. {
  1002. int rc;
  1003. PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
  1004. /* Select camera register */
  1005. rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
  1006. if (rc < 0)
  1007. return rc;
  1008. /* Write "value" to I2C data port of OV511 */
  1009. rc = reg_w(sd, R51x_I2C_DATA, value);
  1010. if (rc < 0)
  1011. return rc;
  1012. /* Initiate 3-byte write cycle */
  1013. rc = reg_w(sd, R518_I2C_CTL, 0x01);
  1014. if (rc < 0)
  1015. return rc;
  1016. /* wait for write complete */
  1017. msleep(4);
  1018. return reg_r8(sd, R518_I2C_CTL);
  1019. }
  1020. /*
  1021. * returns: negative is error, pos or zero is data
  1022. *
  1023. * The OV518 I2C I/O procedure is different, hence, this function.
  1024. * This is normally only called from i2c_r(). Note that this function
  1025. * always succeeds regardless of whether the sensor is present and working.
  1026. */
  1027. static int i2c_r(struct sd *sd, __u8 reg)
  1028. {
  1029. int rc, value;
  1030. /* Select camera register */
  1031. rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
  1032. if (rc < 0)
  1033. return rc;
  1034. /* Initiate 2-byte write cycle */
  1035. rc = reg_w(sd, R518_I2C_CTL, 0x03);
  1036. if (rc < 0)
  1037. return rc;
  1038. /* Initiate 2-byte read cycle */
  1039. rc = reg_w(sd, R518_I2C_CTL, 0x05);
  1040. if (rc < 0)
  1041. return rc;
  1042. value = reg_r(sd, R51x_I2C_DATA);
  1043. PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
  1044. return value;
  1045. }
  1046. /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
  1047. * the same position as 1's in "mask" are cleared and set to "value". Bits
  1048. * that are in the same position as 0's in "mask" are preserved, regardless
  1049. * of their respective state in "value".
  1050. */
  1051. static int i2c_w_mask(struct sd *sd,
  1052. __u8 reg,
  1053. __u8 value,
  1054. __u8 mask)
  1055. {
  1056. int rc;
  1057. __u8 oldval;
  1058. value &= mask; /* Enforce mask on value */
  1059. rc = i2c_r(sd, reg);
  1060. if (rc < 0)
  1061. return rc;
  1062. oldval = rc & ~mask; /* Clear the masked bits */
  1063. value |= oldval; /* Set the desired bits */
  1064. return i2c_w(sd, reg, value);
  1065. }
  1066. /* Temporarily stops OV511 from functioning. Must do this before changing
  1067. * registers while the camera is streaming */
  1068. static inline int ov51x_stop(struct sd *sd)
  1069. {
  1070. PDEBUG(D_STREAM, "stopping");
  1071. sd->stopped = 1;
  1072. switch (sd->bridge) {
  1073. case BRIDGE_OV511:
  1074. case BRIDGE_OV511PLUS:
  1075. return reg_w(sd, R51x_SYS_RESET, 0x3d);
  1076. case BRIDGE_OV518:
  1077. case BRIDGE_OV518PLUS:
  1078. return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
  1079. case BRIDGE_OV519:
  1080. return reg_w(sd, OV519_SYS_RESET1, 0x0f);
  1081. }
  1082. return 0;
  1083. }
  1084. /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
  1085. * actually stopped (for performance). */
  1086. static inline int ov51x_restart(struct sd *sd)
  1087. {
  1088. int rc;
  1089. PDEBUG(D_STREAM, "restarting");
  1090. if (!sd->stopped)
  1091. return 0;
  1092. sd->stopped = 0;
  1093. /* Reinitialize the stream */
  1094. switch (sd->bridge) {
  1095. case BRIDGE_OV511:
  1096. case BRIDGE_OV511PLUS:
  1097. return reg_w(sd, R51x_SYS_RESET, 0x00);
  1098. case BRIDGE_OV518:
  1099. case BRIDGE_OV518PLUS:
  1100. rc = reg_w(sd, 0x2f, 0x80);
  1101. if (rc < 0)
  1102. return rc;
  1103. return reg_w(sd, R51x_SYS_RESET, 0x00);
  1104. case BRIDGE_OV519:
  1105. return reg_w(sd, OV519_SYS_RESET1, 0x00);
  1106. }
  1107. return 0;
  1108. }
  1109. /* This does an initial reset of an OmniVision sensor and ensures that I2C
  1110. * is synchronized. Returns <0 on failure.
  1111. */
  1112. static int init_ov_sensor(struct sd *sd)
  1113. {
  1114. int i;
  1115. /* Reset the sensor */
  1116. if (i2c_w(sd, 0x12, 0x80) < 0)
  1117. return -EIO;
  1118. /* Wait for it to initialize */
  1119. msleep(150);
  1120. for (i = 0; i < i2c_detect_tries; i++) {
  1121. if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
  1122. i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
  1123. PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
  1124. return 0;
  1125. }
  1126. /* Reset the sensor */
  1127. if (i2c_w(sd, 0x12, 0x80) < 0)
  1128. return -EIO;
  1129. /* Wait for it to initialize */
  1130. msleep(150);
  1131. /* Dummy read to sync I2C */
  1132. if (i2c_r(sd, 0x00) < 0)
  1133. return -EIO;
  1134. }
  1135. return -EIO;
  1136. }
  1137. /* Set the read and write slave IDs. The "slave" argument is the write slave,
  1138. * and the read slave will be set to (slave + 1).
  1139. * This should not be called from outside the i2c I/O functions.
  1140. * Sets I2C read and write slave IDs. Returns <0 for error
  1141. */
  1142. static int ov51x_set_slave_ids(struct sd *sd,
  1143. __u8 slave)
  1144. {
  1145. int rc;
  1146. rc = reg_w(sd, R51x_I2C_W_SID, slave);
  1147. if (rc < 0)
  1148. return rc;
  1149. return reg_w(sd, R51x_I2C_R_SID, slave + 1);
  1150. }
  1151. static int write_regvals(struct sd *sd,
  1152. const struct ov_regvals *regvals,
  1153. int n)
  1154. {
  1155. int rc;
  1156. while (--n >= 0) {
  1157. rc = reg_w(sd, regvals->reg, regvals->val);
  1158. if (rc < 0)
  1159. return rc;
  1160. regvals++;
  1161. }
  1162. return 0;
  1163. }
  1164. static int write_i2c_regvals(struct sd *sd,
  1165. const struct ov_i2c_regvals *regvals,
  1166. int n)
  1167. {
  1168. int rc;
  1169. while (--n >= 0) {
  1170. rc = i2c_w(sd, regvals->reg, regvals->val);
  1171. if (rc < 0)
  1172. return rc;
  1173. regvals++;
  1174. }
  1175. return 0;
  1176. }
  1177. /****************************************************************************
  1178. *
  1179. * OV511 and sensor configuration
  1180. *
  1181. ***************************************************************************/
  1182. /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
  1183. * the same register settings as the OV8610, since they are very similar.
  1184. */
  1185. static int ov8xx0_configure(struct sd *sd)
  1186. {
  1187. int rc;
  1188. PDEBUG(D_PROBE, "starting ov8xx0 configuration");
  1189. /* Detect sensor (sub)type */
  1190. rc = i2c_r(sd, OV7610_REG_COM_I);
  1191. if (rc < 0) {
  1192. PDEBUG(D_ERR, "Error detecting sensor type");
  1193. return -1;
  1194. }
  1195. if ((rc & 3) == 1) {
  1196. sd->sensor = SEN_OV8610;
  1197. } else {
  1198. PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
  1199. return -1;
  1200. }
  1201. /* Set sensor-specific vars */
  1202. /* sd->sif = 0; already done */
  1203. return 0;
  1204. }
  1205. /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
  1206. * the same register settings as the OV7610, since they are very similar.
  1207. */
  1208. static int ov7xx0_configure(struct sd *sd)
  1209. {
  1210. int rc, high, low;
  1211. PDEBUG(D_PROBE, "starting OV7xx0 configuration");
  1212. /* Detect sensor (sub)type */
  1213. rc = i2c_r(sd, OV7610_REG_COM_I);
  1214. /* add OV7670 here
  1215. * it appears to be wrongly detected as a 7610 by default */
  1216. if (rc < 0) {
  1217. PDEBUG(D_ERR, "Error detecting sensor type");
  1218. return -1;
  1219. }
  1220. if ((rc & 3) == 3) {
  1221. /* quick hack to make OV7670s work */
  1222. high = i2c_r(sd, 0x0a);
  1223. low = i2c_r(sd, 0x0b);
  1224. /* info("%x, %x", high, low); */
  1225. if (high == 0x76 && low == 0x73) {
  1226. PDEBUG(D_PROBE, "Sensor is an OV7670");
  1227. sd->sensor = SEN_OV7670;
  1228. } else {
  1229. PDEBUG(D_PROBE, "Sensor is an OV7610");
  1230. sd->sensor = SEN_OV7610;
  1231. }
  1232. } else if ((rc & 3) == 1) {
  1233. /* I don't know what's different about the 76BE yet. */
  1234. if (i2c_r(sd, 0x15) & 1)
  1235. PDEBUG(D_PROBE, "Sensor is an OV7620AE");
  1236. else
  1237. PDEBUG(D_PROBE, "Sensor is an OV76BE");
  1238. /* OV511+ will return all zero isoc data unless we
  1239. * configure the sensor as a 7620. Someone needs to
  1240. * find the exact reg. setting that causes this. */
  1241. sd->sensor = SEN_OV76BE;
  1242. } else if ((rc & 3) == 0) {
  1243. /* try to read product id registers */
  1244. high = i2c_r(sd, 0x0a);
  1245. if (high < 0) {
  1246. PDEBUG(D_ERR, "Error detecting camera chip PID");
  1247. return high;
  1248. }
  1249. low = i2c_r(sd, 0x0b);
  1250. if (low < 0) {
  1251. PDEBUG(D_ERR, "Error detecting camera chip VER");
  1252. return low;
  1253. }
  1254. if (high == 0x76) {
  1255. switch (low) {
  1256. case 0x30:
  1257. PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635");
  1258. PDEBUG(D_ERR,
  1259. "7630 is not supported by this driver");
  1260. return -1;
  1261. case 0x40:
  1262. PDEBUG(D_PROBE, "Sensor is an OV7645");
  1263. sd->sensor = SEN_OV7640; /* FIXME */
  1264. break;
  1265. case 0x45:
  1266. PDEBUG(D_PROBE, "Sensor is an OV7645B");
  1267. sd->sensor = SEN_OV7640; /* FIXME */
  1268. break;
  1269. case 0x48:
  1270. PDEBUG(D_PROBE, "Sensor is an OV7648");
  1271. sd->sensor = SEN_OV7640; /* FIXME */
  1272. break;
  1273. default:
  1274. PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
  1275. return -1;
  1276. }
  1277. } else {
  1278. PDEBUG(D_PROBE, "Sensor is an OV7620");
  1279. sd->sensor = SEN_OV7620;
  1280. }
  1281. } else {
  1282. PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
  1283. return -1;
  1284. }
  1285. /* Set sensor-specific vars */
  1286. /* sd->sif = 0; already done */
  1287. return 0;
  1288. }
  1289. /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
  1290. static int ov6xx0_configure(struct sd *sd)
  1291. {
  1292. int rc;
  1293. PDEBUG(D_PROBE, "starting OV6xx0 configuration");
  1294. /* Detect sensor (sub)type */
  1295. rc = i2c_r(sd, OV7610_REG_COM_I);
  1296. if (rc < 0) {
  1297. PDEBUG(D_ERR, "Error detecting sensor type");
  1298. return -1;
  1299. }
  1300. /* Ugh. The first two bits are the version bits, but
  1301. * the entire register value must be used. I guess OVT
  1302. * underestimated how many variants they would make. */
  1303. switch (rc) {
  1304. case 0x00:
  1305. sd->sensor = SEN_OV6630;
  1306. PDEBUG(D_ERR,
  1307. "WARNING: Sensor is an OV66308. Your camera may have");
  1308. PDEBUG(D_ERR, "been misdetected in previous driver versions.");
  1309. break;
  1310. case 0x01:
  1311. sd->sensor = SEN_OV6620;
  1312. break;
  1313. case 0x02:
  1314. sd->sensor = SEN_OV6630;
  1315. PDEBUG(D_PROBE, "Sensor is an OV66308AE");
  1316. break;
  1317. case 0x03:
  1318. sd->sensor = SEN_OV6630;
  1319. PDEBUG(D_PROBE, "Sensor is an OV66308AF");
  1320. break;
  1321. case 0x90:
  1322. sd->sensor = SEN_OV6630;
  1323. PDEBUG(D_ERR,
  1324. "WARNING: Sensor is an OV66307. Your camera may have");
  1325. PDEBUG(D_ERR, "been misdetected in previous driver versions.");
  1326. break;
  1327. default:
  1328. PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc);
  1329. return -1;
  1330. }
  1331. /* Set sensor-specific vars */
  1332. sd->sif = 1;
  1333. return 0;
  1334. }
  1335. /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
  1336. static void ov51x_led_control(struct sd *sd, int on)
  1337. {
  1338. switch (sd->bridge) {
  1339. /* OV511 has no LED control */
  1340. case BRIDGE_OV511PLUS:
  1341. reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
  1342. break;
  1343. case BRIDGE_OV518:
  1344. case BRIDGE_OV518PLUS:
  1345. reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
  1346. break;
  1347. case BRIDGE_OV519:
  1348. reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
  1349. break;
  1350. }
  1351. }
  1352. /* OV518 quantization tables are 8x4 (instead of 8x8) */
  1353. static int ov518_upload_quan_tables(struct sd *sd)
  1354. {
  1355. const unsigned char yQuanTable518[] = {
  1356. 5, 4, 5, 6, 6, 7, 7, 7,
  1357. 5, 5, 5, 5, 6, 7, 7, 7,
  1358. 6, 6, 6, 6, 7, 7, 7, 8,
  1359. 7, 7, 6, 7, 7, 7, 8, 8
  1360. };
  1361. const unsigned char uvQuanTable518[] = {
  1362. 6, 6, 6, 7, 7, 7, 7, 7,
  1363. 6, 6, 6, 7, 7, 7, 7, 7,
  1364. 6, 6, 6, 7, 7, 7, 7, 8,
  1365. 7, 7, 7, 7, 7, 7, 8, 8
  1366. };
  1367. const unsigned char *pYTable = yQuanTable518;
  1368. const unsigned char *pUVTable = uvQuanTable518;
  1369. unsigned char val0, val1;
  1370. int i, rc, reg = R51x_COMP_LUT_BEGIN;
  1371. PDEBUG(D_PROBE, "Uploading quantization tables");
  1372. for (i = 0; i < 16; i++) {
  1373. val0 = *pYTable++;
  1374. val1 = *pYTable++;
  1375. val0 &= 0x0f;
  1376. val1 &= 0x0f;
  1377. val0 |= val1 << 4;
  1378. rc = reg_w(sd, reg, val0);
  1379. if (rc < 0)
  1380. return rc;
  1381. val0 = *pUVTable++;
  1382. val1 = *pUVTable++;
  1383. val0 &= 0x0f;
  1384. val1 &= 0x0f;
  1385. val0 |= val1 << 4;
  1386. rc = reg_w(sd, reg + 16, val0);
  1387. if (rc < 0)
  1388. return rc;
  1389. reg++;
  1390. }
  1391. return 0;
  1392. }
  1393. /* This initializes the OV518/OV518+ and the sensor */
  1394. static int ov518_configure(struct gspca_dev *gspca_dev)
  1395. {
  1396. struct sd *sd = (struct sd *) gspca_dev;
  1397. int rc;
  1398. /* For 518 and 518+ */
  1399. static struct ov_regvals init_518[] = {
  1400. { R51x_SYS_RESET, 0x40 },
  1401. { R51x_SYS_INIT, 0xe1 },
  1402. { R51x_SYS_RESET, 0x3e },
  1403. { R51x_SYS_INIT, 0xe1 },
  1404. { R51x_SYS_RESET, 0x00 },
  1405. { R51x_SYS_INIT, 0xe1 },
  1406. { 0x46, 0x00 },
  1407. { 0x5d, 0x03 },
  1408. };
  1409. static struct ov_regvals norm_518[] = {
  1410. { R51x_SYS_SNAP, 0x02 }, /* Reset */
  1411. { R51x_SYS_SNAP, 0x01 }, /* Enable */
  1412. { 0x31, 0x0f },
  1413. { 0x5d, 0x03 },
  1414. { 0x24, 0x9f },
  1415. { 0x25, 0x90 },
  1416. { 0x20, 0x00 },
  1417. { 0x51, 0x04 },
  1418. { 0x71, 0x19 },
  1419. { 0x2f, 0x80 },
  1420. };
  1421. static struct ov_regvals norm_518_p[] = {
  1422. { R51x_SYS_SNAP, 0x02 }, /* Reset */
  1423. { R51x_SYS_SNAP, 0x01 }, /* Enable */
  1424. { 0x31, 0x0f },
  1425. { 0x5d, 0x03 },
  1426. { 0x24, 0x9f },
  1427. { 0x25, 0x90 },
  1428. { 0x20, 0x60 },
  1429. { 0x51, 0x02 },
  1430. { 0x71, 0x19 },
  1431. { 0x40, 0xff },
  1432. { 0x41, 0x42 },
  1433. { 0x46, 0x00 },
  1434. { 0x33, 0x04 },
  1435. { 0x21, 0x19 },
  1436. { 0x3f, 0x10 },
  1437. { 0x2f, 0x80 },
  1438. };
  1439. /* First 5 bits of custom ID reg are a revision ID on OV518 */
  1440. PDEBUG(D_PROBE, "Device revision %d",
  1441. 0x1F & reg_r(sd, R51x_SYS_CUST_ID));
  1442. rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518));
  1443. if (rc < 0)
  1444. return rc;
  1445. /* Set LED GPIO pin to output mode */
  1446. rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
  1447. if (rc < 0)
  1448. return rc;
  1449. switch (sd->bridge) {
  1450. case BRIDGE_OV518:
  1451. rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
  1452. if (rc < 0)
  1453. return rc;
  1454. break;
  1455. case BRIDGE_OV518PLUS:
  1456. rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
  1457. if (rc < 0)
  1458. return rc;
  1459. break;
  1460. }
  1461. rc = ov518_upload_quan_tables(sd);
  1462. if (rc < 0) {
  1463. PDEBUG(D_ERR, "Error uploading quantization tables");
  1464. return rc;
  1465. }
  1466. rc = reg_w(sd, 0x2f, 0x80);
  1467. if (rc < 0)
  1468. return rc;
  1469. return 0;
  1470. }
  1471. static int ov519_configure(struct sd *sd)
  1472. {
  1473. static const struct ov_regvals init_519[] = {
  1474. { 0x5a, 0x6d }, /* EnableSystem */
  1475. { 0x53, 0x9b },
  1476. { 0x54, 0xff }, /* set bit2 to enable jpeg */
  1477. { 0x5d, 0x03 },
  1478. { 0x49, 0x01 },
  1479. { 0x48, 0x00 },
  1480. /* Set LED pin to output mode. Bit 4 must be cleared or sensor
  1481. * detection will fail. This deserves further investigation. */
  1482. { OV519_GPIO_IO_CTRL0, 0xee },
  1483. { 0x51, 0x0f }, /* SetUsbInit */
  1484. { 0x51, 0x00 },
  1485. { 0x22, 0x00 },
  1486. /* windows reads 0x55 at this point*/
  1487. };
  1488. return write_regvals(sd, init_519, ARRAY_SIZE(init_519));
  1489. }
  1490. /* this function is called at probe time */
  1491. static int sd_config(struct gspca_dev *gspca_dev,
  1492. const struct usb_device_id *id)
  1493. {
  1494. struct sd *sd = (struct sd *) gspca_dev;
  1495. struct cam *cam;
  1496. int ret = 0;
  1497. sd->bridge = id->driver_info;
  1498. switch (sd->bridge) {
  1499. case BRIDGE_OV518:
  1500. case BRIDGE_OV518PLUS:
  1501. ret = ov518_configure(gspca_dev);
  1502. break;
  1503. case BRIDGE_OV519:
  1504. ret = ov519_configure(sd);
  1505. break;
  1506. }
  1507. if (ret)
  1508. goto error;
  1509. ov51x_led_control(sd, 0); /* turn LED off */
  1510. /* Test for 76xx */
  1511. if (ov51x_set_slave_ids(sd, OV7xx0_SID) < 0)
  1512. goto error;
  1513. /* The OV519 must be more aggressive about sensor detection since
  1514. * I2C write will never fail if the sensor is not present. We have
  1515. * to try to initialize the sensor to detect its presence */
  1516. if (init_ov_sensor(sd) >= 0) {
  1517. if (ov7xx0_configure(sd) < 0) {
  1518. PDEBUG(D_ERR, "Failed to configure OV7xx0");
  1519. goto error;
  1520. }
  1521. } else {
  1522. /* Test for 6xx0 */
  1523. if (ov51x_set_slave_ids(sd, OV6xx0_SID) < 0)
  1524. goto error;
  1525. if (init_ov_sensor(sd) >= 0) {
  1526. if (ov6xx0_configure(sd) < 0) {
  1527. PDEBUG(D_ERR, "Failed to configure OV6xx0");
  1528. goto error;
  1529. }
  1530. } else {
  1531. /* Test for 8xx0 */
  1532. if (ov51x_set_slave_ids(sd, OV8xx0_SID) < 0)
  1533. goto error;
  1534. if (init_ov_sensor(sd) < 0) {
  1535. PDEBUG(D_ERR,
  1536. "Can't determine sensor slave IDs");
  1537. goto error;
  1538. }
  1539. if (ov8xx0_configure(sd) < 0) {
  1540. PDEBUG(D_ERR,
  1541. "Failed to configure OV8xx0 sensor");
  1542. goto error;
  1543. }
  1544. }
  1545. }
  1546. cam = &gspca_dev->cam;
  1547. switch (sd->bridge) {
  1548. case BRIDGE_OV518:
  1549. case BRIDGE_OV518PLUS:
  1550. if (!sd->sif) {
  1551. cam->cam_mode = ov518_vga_mode;
  1552. cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
  1553. } else {
  1554. cam->cam_mode = ov518_sif_mode;
  1555. cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
  1556. }
  1557. break;
  1558. case BRIDGE_OV519:
  1559. if (!sd->sif) {
  1560. cam->cam_mode = ov519_vga_mode;
  1561. cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
  1562. } else {
  1563. cam->cam_mode = ov519_sif_mode;
  1564. cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
  1565. }
  1566. break;
  1567. }
  1568. sd->brightness = BRIGHTNESS_DEF;
  1569. sd->contrast = CONTRAST_DEF;
  1570. sd->colors = COLOR_DEF;
  1571. sd->hflip = HFLIP_DEF;
  1572. sd->vflip = VFLIP_DEF;
  1573. sd->autobrightness = AUTOBRIGHT_DEF;
  1574. if (sd->sensor == SEN_OV7670) {
  1575. sd->freq = OV7670_FREQ_DEF;
  1576. gspca_dev->ctrl_dis = 1 << FREQ_IDX;
  1577. } else {
  1578. sd->freq = FREQ_DEF;
  1579. gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX) |
  1580. (1 << OV7670_FREQ_IDX);
  1581. }
  1582. if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670)
  1583. gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX;
  1584. /* OV8610 Frequency filter control should work but needs testing */
  1585. if (sd->sensor == SEN_OV8610)
  1586. gspca_dev->ctrl_dis |= 1 << FREQ_IDX;
  1587. return 0;
  1588. error:
  1589. PDEBUG(D_ERR, "OV519 Config failed");
  1590. return -EBUSY;
  1591. }
  1592. /* this function is called at probe and resume time */
  1593. static int sd_init(struct gspca_dev *gspca_dev)
  1594. {
  1595. struct sd *sd = (struct sd *) gspca_dev;
  1596. /* initialize the sensor */
  1597. switch (sd->sensor) {
  1598. case SEN_OV6620:
  1599. if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
  1600. return -EIO;
  1601. break;
  1602. case SEN_OV6630:
  1603. if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
  1604. return -EIO;
  1605. break;
  1606. default:
  1607. /* case SEN_OV7610: */
  1608. /* case SEN_OV76BE: */
  1609. if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
  1610. return -EIO;
  1611. break;
  1612. case SEN_OV7620:
  1613. if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
  1614. return -EIO;
  1615. break;
  1616. case SEN_OV7640:
  1617. if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
  1618. return -EIO;
  1619. break;
  1620. case SEN_OV7670:
  1621. if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
  1622. return -EIO;
  1623. break;
  1624. case SEN_OV8610:
  1625. if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
  1626. return -EIO;
  1627. break;
  1628. }
  1629. return 0;
  1630. }
  1631. /* Sets up the OV518/OV518+ with the given image parameters
  1632. *
  1633. * OV518 needs a completely different approach, until we can figure out what
  1634. * the individual registers do. Also, only 15 FPS is supported now.
  1635. *
  1636. * Do not put any sensor-specific code in here (including I2C I/O functions)
  1637. */
  1638. static int ov518_mode_init_regs(struct sd *sd)
  1639. {
  1640. int hsegs, vsegs;
  1641. /******** Set the mode ********/
  1642. reg_w(sd, 0x2b, 0);
  1643. reg_w(sd, 0x2c, 0);
  1644. reg_w(sd, 0x2d, 0);
  1645. reg_w(sd, 0x2e, 0);
  1646. reg_w(sd, 0x3b, 0);
  1647. reg_w(sd, 0x3c, 0);
  1648. reg_w(sd, 0x3d, 0);
  1649. reg_w(sd, 0x3e, 0);
  1650. if (sd->bridge == BRIDGE_OV518) {
  1651. /* Set 8-bit (YVYU) input format */
  1652. reg_w_mask(sd, 0x20, 0x08, 0x08);
  1653. /* Set 12-bit (4:2:0) output format */
  1654. reg_w_mask(sd, 0x28, 0x80, 0xf0);
  1655. reg_w_mask(sd, 0x38, 0x80, 0xf0);
  1656. } else {
  1657. reg_w(sd, 0x28, 0x80);
  1658. reg_w(sd, 0x38, 0x80);
  1659. }
  1660. hsegs = sd->gspca_dev.width / 16;
  1661. vsegs = sd->gspca_dev.height / 4;
  1662. reg_w(sd, 0x29, hsegs);
  1663. reg_w(sd, 0x2a, vsegs);
  1664. reg_w(sd, 0x39, hsegs);
  1665. reg_w(sd, 0x3a, vsegs);
  1666. /* Windows driver does this here; who knows why */
  1667. reg_w(sd, 0x2f, 0x80);
  1668. /******** Set the framerate (to 30 FPS) ********/
  1669. if (sd->bridge == BRIDGE_OV518PLUS)
  1670. sd->clockdiv = 1;
  1671. else
  1672. sd->clockdiv = 0;
  1673. /* Mode independent, but framerate dependent, regs */
  1674. reg_w(sd, 0x51, 0x04); /* Clock divider; lower==faster */
  1675. reg_w(sd, 0x22, 0x18);
  1676. reg_w(sd, 0x23, 0xff);
  1677. if (sd->bridge == BRIDGE_OV518PLUS)
  1678. reg_w(sd, 0x21, 0x19);
  1679. else
  1680. reg_w(sd, 0x71, 0x17); /* Compression-related? */
  1681. /* FIXME: Sensor-specific */
  1682. /* Bit 5 is what matters here. Of course, it is "reserved" */
  1683. i2c_w(sd, 0x54, 0x23);
  1684. reg_w(sd, 0x2f, 0x80);
  1685. if (sd->bridge == BRIDGE_OV518PLUS) {
  1686. reg_w(sd, 0x24, 0x94);
  1687. reg_w(sd, 0x25, 0x90);
  1688. ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
  1689. ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
  1690. ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
  1691. ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
  1692. ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
  1693. ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
  1694. ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
  1695. ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
  1696. ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
  1697. } else {
  1698. reg_w(sd, 0x24, 0x9f);
  1699. reg_w(sd, 0x25, 0x90);
  1700. ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
  1701. ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
  1702. ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
  1703. ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
  1704. ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
  1705. ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
  1706. ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
  1707. ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
  1708. ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
  1709. }
  1710. reg_w(sd, 0x2f, 0x80);
  1711. return 0;
  1712. }
  1713. /* Sets up the OV519 with the given image parameters
  1714. *
  1715. * OV519 needs a completely different approach, until we can figure out what
  1716. * the individual registers do.
  1717. *
  1718. * Do not put any sensor-specific code in here (including I2C I/O functions)
  1719. */
  1720. static int ov519_mode_init_regs(struct sd *sd)
  1721. {
  1722. static const struct ov_regvals mode_init_519_ov7670[] = {
  1723. { 0x5d, 0x03 }, /* Turn off suspend mode */
  1724. { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
  1725. { 0x54, 0x0f }, /* bit2 (jpeg enable) */
  1726. { 0xa2, 0x20 }, /* a2-a5 are undocumented */
  1727. { 0xa3, 0x18 },
  1728. { 0xa4, 0x04 },
  1729. { 0xa5, 0x28 },
  1730. { 0x37, 0x00 }, /* SetUsbInit */
  1731. { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
  1732. /* Enable both fields, YUV Input, disable defect comp (why?) */
  1733. { 0x20, 0x0c },
  1734. { 0x21, 0x38 },
  1735. { 0x22, 0x1d },
  1736. { 0x17, 0x50 }, /* undocumented */
  1737. { 0x37, 0x00 }, /* undocumented */
  1738. { 0x40, 0xff }, /* I2C timeout counter */
  1739. { 0x46, 0x00 }, /* I2C clock prescaler */
  1740. { 0x59, 0x04 }, /* new from windrv 090403 */
  1741. { 0xff, 0x00 }, /* undocumented */
  1742. /* windows reads 0x55 at this point, why? */
  1743. };
  1744. static const struct ov_regvals mode_init_519[] = {
  1745. { 0x5d, 0x03 }, /* Turn off suspend mode */
  1746. { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
  1747. { 0x54, 0x0f }, /* bit2 (jpeg enable) */
  1748. { 0xa2, 0x20 }, /* a2-a5 are undocumented */
  1749. { 0xa3, 0x18 },
  1750. { 0xa4, 0x04 },
  1751. { 0xa5, 0x28 },
  1752. { 0x37, 0x00 }, /* SetUsbInit */
  1753. { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
  1754. /* Enable both fields, YUV Input, disable defect comp (why?) */
  1755. { 0x22, 0x1d },
  1756. { 0x17, 0x50 }, /* undocumented */
  1757. { 0x37, 0x00 }, /* undocumented */
  1758. { 0x40, 0xff }, /* I2C timeout counter */
  1759. { 0x46, 0x00 }, /* I2C clock prescaler */
  1760. { 0x59, 0x04 }, /* new from windrv 090403 */
  1761. { 0xff, 0x00 }, /* undocumented */
  1762. /* windows reads 0x55 at this point, why? */
  1763. };
  1764. /******** Set the mode ********/
  1765. if (sd->sensor != SEN_OV7670) {
  1766. if (write_regvals(sd, mode_init_519,
  1767. ARRAY_SIZE(mode_init_519)))
  1768. return -EIO;
  1769. if (sd->sensor == SEN_OV7640) {
  1770. /* Select 8-bit input mode */
  1771. reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
  1772. }
  1773. } else {
  1774. if (write_regvals(sd, mode_init_519_ov7670,
  1775. ARRAY_SIZE(mode_init_519_ov7670)))
  1776. return -EIO;
  1777. }
  1778. reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
  1779. reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
  1780. reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
  1781. reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
  1782. reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
  1783. reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
  1784. reg_w(sd, OV519_R16_DIVIDER, 0x00);
  1785. reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
  1786. reg_w(sd, 0x26, 0x00); /* Undocumented */
  1787. /******** Set the framerate ********/
  1788. if (frame_rate > 0)
  1789. sd->frame_rate = frame_rate;
  1790. /* FIXME: These are only valid at the max resolution. */
  1791. sd->clockdiv = 0;
  1792. switch (sd->sensor) {
  1793. case SEN_OV7640:
  1794. switch (sd->frame_rate) {
  1795. default:
  1796. /* case 30: */
  1797. reg_w(sd, 0xa4, 0x0c);
  1798. reg_w(sd, 0x23, 0xff);
  1799. break;
  1800. case 25:
  1801. reg_w(sd, 0xa4, 0x0c);
  1802. reg_w(sd, 0x23, 0x1f);
  1803. break;
  1804. case 20:
  1805. reg_w(sd, 0xa4, 0x0c);
  1806. reg_w(sd, 0x23, 0x1b);
  1807. break;
  1808. case 15:
  1809. reg_w(sd, 0xa4, 0x04);
  1810. reg_w(sd, 0x23, 0xff);
  1811. sd->clockdiv = 1;
  1812. break;
  1813. case 10:
  1814. reg_w(sd, 0xa4, 0x04);
  1815. reg_w(sd, 0x23, 0x1f);
  1816. sd->clockdiv = 1;
  1817. break;
  1818. case 5:
  1819. reg_w(sd, 0xa4, 0x04);
  1820. reg_w(sd, 0x23, 0x1b);
  1821. sd->clockdiv = 1;
  1822. break;
  1823. }
  1824. break;
  1825. case SEN_OV8610:
  1826. switch (sd->frame_rate) {
  1827. default: /* 15 fps */
  1828. /* case 15: */
  1829. reg_w(sd, 0xa4, 0x06);
  1830. reg_w(sd, 0x23, 0xff);
  1831. break;
  1832. case 10:
  1833. reg_w(sd, 0xa4, 0x06);
  1834. reg_w(sd, 0x23, 0x1f);
  1835. break;
  1836. case 5:
  1837. reg_w(sd, 0xa4, 0x06);
  1838. reg_w(sd, 0x23, 0x1b);
  1839. break;
  1840. }
  1841. break;
  1842. case SEN_OV7670: /* guesses, based on 7640 */
  1843. PDEBUG(D_STREAM, "Setting framerate to %d fps",
  1844. (sd->frame_rate == 0) ? 15 : sd->frame_rate);
  1845. reg_w(sd, 0xa4, 0x10);
  1846. switch (sd->frame_rate) {
  1847. case 30:
  1848. reg_w(sd, 0x23, 0xff);
  1849. break;
  1850. case 20:
  1851. reg_w(sd, 0x23, 0x1b);
  1852. break;
  1853. default:
  1854. /* case 15: */
  1855. reg_w(sd, 0x23, 0xff);
  1856. sd->clockdiv = 1;
  1857. break;
  1858. }
  1859. break;
  1860. }
  1861. return 0;
  1862. }
  1863. static int mode_init_ov_sensor_regs(struct sd *sd)
  1864. {
  1865. struct gspca_dev *gspca_dev;
  1866. int qvga;
  1867. gspca_dev = &sd->gspca_dev;
  1868. qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv;
  1869. /******** Mode (VGA/QVGA) and sensor specific regs ********/
  1870. switch (sd->sensor) {
  1871. case SEN_OV8610:
  1872. /* For OV8610 qvga means qsvga */
  1873. i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
  1874. break;
  1875. case SEN_OV7610:
  1876. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  1877. break;
  1878. case SEN_OV7620:
  1879. /* i2c_w(sd, 0x2b, 0x00); */
  1880. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  1881. i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
  1882. i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
  1883. i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
  1884. i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
  1885. i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
  1886. i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
  1887. break;
  1888. case SEN_OV76BE:
  1889. /* i2c_w(sd, 0x2b, 0x00); */
  1890. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  1891. break;
  1892. case SEN_OV7640:
  1893. /* i2c_w(sd, 0x2b, 0x00); */
  1894. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  1895. i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
  1896. /* i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); */
  1897. /* i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); */
  1898. /* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */
  1899. /* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */
  1900. /* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */
  1901. break;
  1902. case SEN_OV7670:
  1903. /* set COM7_FMT_VGA or COM7_FMT_QVGA
  1904. * do we need to set anything else?
  1905. * HSTART etc are set in set_ov_sensor_window itself */
  1906. i2c_w_mask(sd, OV7670_REG_COM7,
  1907. qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
  1908. OV7670_COM7_FMT_MASK);
  1909. break;
  1910. case SEN_OV6620:
  1911. case SEN_OV6630:
  1912. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  1913. break;
  1914. default:
  1915. return -EINVAL;
  1916. }
  1917. /******** Palette-specific regs ********/
  1918. if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
  1919. /* not valid on the OV6620/OV7620/6630? */
  1920. i2c_w_mask(sd, 0x0e, 0x00, 0x40);
  1921. }
  1922. /* The OV518 needs special treatment. Although both the OV518
  1923. * and the OV6630 support a 16-bit video bus, only the 8 bit Y
  1924. * bus is actually used. The UV bus is tied to ground.
  1925. * Therefore, the OV6630 needs to be in 8-bit multiplexed
  1926. * output mode */
  1927. /* OV7640 is 8-bit only */
  1928. if (sd->sensor != SEN_OV6630 && sd->sensor != SEN_OV7640)
  1929. i2c_w_mask(sd, 0x13, 0x00, 0x20);
  1930. /******** Clock programming ********/
  1931. /* The OV6620 needs special handling. This prevents the
  1932. * severe banding that normally occurs */
  1933. if (sd->sensor == SEN_OV6620) {
  1934. /* Clock down */
  1935. i2c_w(sd, 0x2a, 0x04);
  1936. i2c_w(sd, 0x11, sd->clockdiv);
  1937. i2c_w(sd, 0x2a, 0x84);
  1938. /* This next setting is critical. It seems to improve
  1939. * the gain or the contrast. The "reserved" bits seem
  1940. * to have some effect in this case. */
  1941. i2c_w(sd, 0x2d, 0x85);
  1942. } else {
  1943. i2c_w(sd, 0x11, sd->clockdiv);
  1944. }
  1945. /******** Special Features ********/
  1946. /* no evidence this is possible with OV7670, either */
  1947. /* Test Pattern */
  1948. if (sd->sensor != SEN_OV7640 && sd->sensor != SEN_OV7670)
  1949. i2c_w_mask(sd, 0x12, 0x00, 0x02);
  1950. /* Enable auto white balance */
  1951. if (sd->sensor == SEN_OV7670)
  1952. i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
  1953. OV7670_COM8_AWB);
  1954. else
  1955. i2c_w_mask(sd, 0x12, 0x04, 0x04);
  1956. /* This will go away as soon as ov51x_mode_init_sensor_regs() */
  1957. /* is fully tested. */
  1958. /* 7620/6620/6630? don't have register 0x35, so play it safe */
  1959. if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
  1960. if (!qvga)
  1961. i2c_w(sd, 0x35, 0x9e);
  1962. else
  1963. i2c_w(sd, 0x35, 0x1e);
  1964. }
  1965. return 0;
  1966. }
  1967. static void sethvflip(struct sd *sd)
  1968. {
  1969. if (sd->sensor != SEN_OV7670)
  1970. return;
  1971. if (sd->gspca_dev.streaming)
  1972. ov51x_stop(sd);
  1973. i2c_w_mask(sd, OV7670_REG_MVFP,
  1974. OV7670_MVFP_MIRROR * sd->hflip
  1975. | OV7670_MVFP_VFLIP * sd->vflip,
  1976. OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
  1977. if (sd->gspca_dev.streaming)
  1978. ov51x_restart(sd);
  1979. }
  1980. static int set_ov_sensor_window(struct sd *sd)
  1981. {
  1982. struct gspca_dev *gspca_dev;
  1983. int qvga;
  1984. int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
  1985. int ret, hstart, hstop, vstop, vstart;
  1986. __u8 v;
  1987. gspca_dev = &sd->gspca_dev;
  1988. qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv;
  1989. /* The different sensor ICs handle setting up of window differently.
  1990. * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
  1991. switch (sd->sensor) {
  1992. case SEN_OV8610:
  1993. hwsbase = 0x1e;
  1994. hwebase = 0x1e;
  1995. vwsbase = 0x02;
  1996. vwebase = 0x02;
  1997. break;
  1998. case SEN_OV7610:
  1999. case SEN_OV76BE:
  2000. hwsbase = 0x38;
  2001. hwebase = 0x3a;
  2002. vwsbase = vwebase = 0x05;
  2003. break;
  2004. case SEN_OV6620:
  2005. case SEN_OV6630:
  2006. hwsbase = 0x38;
  2007. hwebase = 0x3a;
  2008. vwsbase = 0x05;
  2009. vwebase = 0x06;
  2010. if (qvga) {
  2011. /* HDG: this fixes U and V getting swapped */
  2012. hwsbase--;
  2013. vwsbase--;
  2014. }
  2015. break;
  2016. case SEN_OV7620:
  2017. hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
  2018. hwebase = 0x2f;
  2019. vwsbase = vwebase = 0x05;
  2020. break;
  2021. case SEN_OV7640:
  2022. hwsbase = 0x1a;
  2023. hwebase = 0x1a;
  2024. vwsbase = vwebase = 0x03;
  2025. break;
  2026. case SEN_OV7670:
  2027. /*handling of OV7670 hardware sensor start and stop values
  2028. * is very odd, compared to the other OV sensors */
  2029. vwsbase = vwebase = hwebase = hwsbase = 0x00;
  2030. break;
  2031. default:
  2032. return -EINVAL;
  2033. }
  2034. switch (sd->sensor) {
  2035. case SEN_OV6620:
  2036. case SEN_OV6630:
  2037. if (qvga) { /* QCIF */
  2038. hwscale = 0;
  2039. vwscale = 0;
  2040. } else { /* CIF */
  2041. hwscale = 1;
  2042. vwscale = 1; /* The datasheet says 0;
  2043. * it's wrong */
  2044. }
  2045. break;
  2046. case SEN_OV8610:
  2047. if (qvga) { /* QSVGA */
  2048. hwscale = 1;
  2049. vwscale = 1;
  2050. } else { /* SVGA */
  2051. hwscale = 2;
  2052. vwscale = 2;
  2053. }
  2054. break;
  2055. default: /* SEN_OV7xx0 */
  2056. if (qvga) { /* QVGA */
  2057. hwscale = 1;
  2058. vwscale = 0;
  2059. } else { /* VGA */
  2060. hwscale = 2;
  2061. vwscale = 1;
  2062. }
  2063. }
  2064. ret = mode_init_ov_sensor_regs(sd);
  2065. if (ret < 0)
  2066. return ret;
  2067. if (sd->sensor == SEN_OV8610) {
  2068. i2c_w_mask(sd, 0x2d, 0x05, 0x40);
  2069. /* old 0x95, new 0x05 from windrv 090403 */
  2070. /* bits 5-7: reserved */
  2071. i2c_w_mask(sd, 0x28, 0x20, 0x20);
  2072. /* bit 5: progressive mode on */
  2073. }
  2074. /* The below is wrong for OV7670s because their window registers
  2075. * only store the high bits in 0x17 to 0x1a */
  2076. /* SRH Use sd->max values instead of requested win values */
  2077. /* SCS Since we're sticking with only the max hardware widths
  2078. * for a given mode */
  2079. /* I can hard code this for OV7670s */
  2080. /* Yes, these numbers do look odd, but they're tested and work! */
  2081. if (sd->sensor == SEN_OV7670) {
  2082. if (qvga) { /* QVGA from ov7670.c by
  2083. * Jonathan Corbet */
  2084. hstart = 164;
  2085. hstop = 20;
  2086. vstart = 14;
  2087. vstop = 494;
  2088. } else { /* VGA */
  2089. hstart = 158;
  2090. hstop = 14;
  2091. vstart = 10;
  2092. vstop = 490;
  2093. }
  2094. /* OV7670 hardware window registers are split across
  2095. * multiple locations */
  2096. i2c_w(sd, OV7670_REG_HSTART, hstart >> 3);
  2097. i2c_w(sd, OV7670_REG_HSTOP, hstop >> 3);
  2098. v = i2c_r(sd, OV7670_REG_HREF);
  2099. v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x07);
  2100. msleep(10); /* need to sleep between read and write to
  2101. * same reg! */
  2102. i2c_w(sd, OV7670_REG_HREF, v);
  2103. i2c_w(sd, OV7670_REG_VSTART, vstart >> 2);
  2104. i2c_w(sd, OV7670_REG_VSTOP, vstop >> 2);
  2105. v = i2c_r(sd, OV7670_REG_VREF);
  2106. v = (v & 0xc0) | ((vstop & 0x3) << 2) | (vstart & 0x03);
  2107. msleep(10); /* need to sleep between read and write to
  2108. * same reg! */
  2109. i2c_w(sd, OV7670_REG_VREF, v);
  2110. } else {
  2111. i2c_w(sd, 0x17, hwsbase);
  2112. i2c_w(sd, 0x18, hwebase + (sd->gspca_dev.width >> hwscale));
  2113. i2c_w(sd, 0x19, vwsbase);
  2114. i2c_w(sd, 0x1a, vwebase + (sd->gspca_dev.height >> vwscale));
  2115. }
  2116. return 0;
  2117. }
  2118. /* -- start the camera -- */
  2119. static int sd_start(struct gspca_dev *gspca_dev)
  2120. {
  2121. struct sd *sd = (struct sd *) gspca_dev;
  2122. int ret = 0;
  2123. switch (sd->bridge) {
  2124. case BRIDGE_OV518:
  2125. case BRIDGE_OV518PLUS:
  2126. ret = ov518_mode_init_regs(sd);
  2127. break;
  2128. case BRIDGE_OV519:
  2129. ret = ov519_mode_init_regs(sd);
  2130. break;
  2131. }
  2132. if (ret < 0)
  2133. goto out;
  2134. ret = set_ov_sensor_window(sd);
  2135. if (ret < 0)
  2136. goto out;
  2137. setcontrast(gspca_dev);
  2138. setbrightness(gspca_dev);
  2139. setcolors(gspca_dev);
  2140. sethvflip(sd);
  2141. setautobrightness(sd);
  2142. setfreq(sd);
  2143. ret = ov51x_restart(sd);
  2144. if (ret < 0)
  2145. goto out;
  2146. ov51x_led_control(sd, 1);
  2147. return 0;
  2148. out:
  2149. PDEBUG(D_ERR, "camera start error:%d", ret);
  2150. return ret;
  2151. }
  2152. static void sd_stopN(struct gspca_dev *gspca_dev)
  2153. {
  2154. struct sd *sd = (struct sd *) gspca_dev;
  2155. ov51x_stop(sd);
  2156. ov51x_led_control(sd, 0);
  2157. }
  2158. static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
  2159. struct gspca_frame *frame, /* target */
  2160. __u8 *data, /* isoc packet */
  2161. int len) /* iso packet length */
  2162. {
  2163. PDEBUG(D_STREAM, "ov518_pkt_scan: %d bytes", len);
  2164. if (len & 7) {
  2165. len--;
  2166. PDEBUG(D_STREAM, "packet number: %d\n", (int)data[len]);
  2167. }
  2168. /* A false positive here is likely, until OVT gives me
  2169. * the definitive SOF/EOF format */
  2170. if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
  2171. gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0);
  2172. gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0);
  2173. }
  2174. /* intermediate packet */
  2175. gspca_frame_add(gspca_dev, INTER_PACKET, frame, data, len);
  2176. }
  2177. static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
  2178. struct gspca_frame *frame, /* target */
  2179. __u8 *data, /* isoc packet */
  2180. int len) /* iso packet length */
  2181. {
  2182. /* Header of ov519 is 16 bytes:
  2183. * Byte Value Description
  2184. * 0 0xff magic
  2185. * 1 0xff magic
  2186. * 2 0xff magic
  2187. * 3 0xXX 0x50 = SOF, 0x51 = EOF
  2188. * 9 0xXX 0x01 initial frame without data,
  2189. * 0x00 standard frame with image
  2190. * 14 Lo in EOF: length of image data / 8
  2191. * 15 Hi
  2192. */
  2193. if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
  2194. switch (data[3]) {
  2195. case 0x50: /* start of frame */
  2196. #define HDRSZ 16
  2197. data += HDRSZ;
  2198. len -= HDRSZ;
  2199. #undef HDRSZ
  2200. if (data[0] == 0xff || data[1] == 0xd8)
  2201. gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
  2202. data, len);
  2203. else
  2204. gspca_dev->last_packet_type = DISCARD_PACKET;
  2205. return;
  2206. case 0x51: /* end of frame */
  2207. if (data[9] != 0)
  2208. gspca_dev->last_packet_type = DISCARD_PACKET;
  2209. gspca_frame_add(gspca_dev, LAST_PACKET, frame,
  2210. data, 0);
  2211. return;
  2212. }
  2213. }
  2214. /* intermediate packet */
  2215. gspca_frame_add(gspca_dev, INTER_PACKET, frame,
  2216. data, len);
  2217. }
  2218. static void sd_pkt_scan(struct gspca_dev *gspca_dev,
  2219. struct gspca_frame *frame, /* target */
  2220. __u8 *data, /* isoc packet */
  2221. int len) /* iso packet length */
  2222. {
  2223. struct sd *sd = (struct sd *) gspca_dev;
  2224. switch (sd->bridge) {
  2225. case BRIDGE_OV511:
  2226. case BRIDGE_OV511PLUS:
  2227. break;
  2228. case BRIDGE_OV518:
  2229. case BRIDGE_OV518PLUS:
  2230. ov518_pkt_scan(gspca_dev, frame, data, len);
  2231. break;
  2232. case BRIDGE_OV519:
  2233. ov519_pkt_scan(gspca_dev, frame, data, len);
  2234. break;
  2235. }
  2236. }
  2237. /* -- management routines -- */
  2238. static void setbrightness(struct gspca_dev *gspca_dev)
  2239. {
  2240. struct sd *sd = (struct sd *) gspca_dev;
  2241. int val;
  2242. val = sd->brightness;
  2243. switch (sd->sensor) {
  2244. case SEN_OV8610:
  2245. case SEN_OV7610:
  2246. case SEN_OV76BE:
  2247. case SEN_OV6620:
  2248. case SEN_OV6630:
  2249. case SEN_OV7640:
  2250. i2c_w(sd, OV7610_REG_BRT, val);
  2251. break;
  2252. case SEN_OV7620:
  2253. /* 7620 doesn't like manual changes when in auto mode */
  2254. if (!sd->autobrightness)
  2255. i2c_w(sd, OV7610_REG_BRT, val);
  2256. break;
  2257. case SEN_OV7670:
  2258. /*win trace
  2259. * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
  2260. i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
  2261. break;
  2262. }
  2263. }
  2264. static void setcontrast(struct gspca_dev *gspca_dev)
  2265. {
  2266. struct sd *sd = (struct sd *) gspca_dev;
  2267. int val;
  2268. val = sd->contrast;
  2269. switch (sd->sensor) {
  2270. case SEN_OV7610:
  2271. case SEN_OV6620:
  2272. i2c_w(sd, OV7610_REG_CNT, val);
  2273. break;
  2274. case SEN_OV6630:
  2275. i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
  2276. break;
  2277. case SEN_OV8610: {
  2278. static const __u8 ctab[] = {
  2279. 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
  2280. };
  2281. /* Use Y gamma control instead. Bit 0 enables it. */
  2282. i2c_w(sd, 0x64, ctab[val >> 5]);
  2283. break;
  2284. }
  2285. case SEN_OV7620: {
  2286. static const __u8 ctab[] = {
  2287. 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
  2288. 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
  2289. };
  2290. /* Use Y gamma control instead. Bit 0 enables it. */
  2291. i2c_w(sd, 0x64, ctab[val >> 4]);
  2292. break;
  2293. }
  2294. case SEN_OV7640:
  2295. /* Use gain control instead. */
  2296. i2c_w(sd, OV7610_REG_GAIN, val >> 2);
  2297. break;
  2298. case SEN_OV7670:
  2299. /* check that this isn't just the same as ov7610 */
  2300. i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
  2301. break;
  2302. }
  2303. }
  2304. static void setcolors(struct gspca_dev *gspca_dev)
  2305. {
  2306. struct sd *sd = (struct sd *) gspca_dev;
  2307. int val;
  2308. val = sd->colors;
  2309. switch (sd->sensor) {
  2310. case SEN_OV8610:
  2311. case SEN_OV7610:
  2312. case SEN_OV76BE:
  2313. case SEN_OV6620:
  2314. case SEN_OV6630:
  2315. i2c_w(sd, OV7610_REG_SAT, val);
  2316. break;
  2317. case SEN_OV7620:
  2318. /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
  2319. /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
  2320. if (rc < 0)
  2321. goto out; */
  2322. i2c_w(sd, OV7610_REG_SAT, val);
  2323. break;
  2324. case SEN_OV7640:
  2325. i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
  2326. break;
  2327. case SEN_OV7670:
  2328. /* supported later once I work out how to do it
  2329. * transparently fail now! */
  2330. /* set REG_COM13 values for UV sat auto mode */
  2331. break;
  2332. }
  2333. }
  2334. static void setautobrightness(struct sd *sd)
  2335. {
  2336. if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670)
  2337. return;
  2338. i2c_w_mask(sd, 0x2d, sd->autobrightness ? 0x10 : 0x00, 0x10);
  2339. }
  2340. static void setfreq(struct sd *sd)
  2341. {
  2342. if (sd->sensor == SEN_OV7670) {
  2343. switch (sd->freq) {
  2344. case 0: /* Banding filter disabled */
  2345. i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT);
  2346. break;
  2347. case 1: /* 50 hz */
  2348. i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
  2349. OV7670_COM8_BFILT);
  2350. i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18);
  2351. break;
  2352. case 2: /* 60 hz */
  2353. i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
  2354. OV7670_COM8_BFILT);
  2355. i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18);
  2356. break;
  2357. case 3: /* Auto hz */
  2358. i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
  2359. OV7670_COM8_BFILT);
  2360. i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO,
  2361. 0x18);
  2362. break;
  2363. }
  2364. } else {
  2365. switch (sd->freq) {
  2366. case 0: /* Banding filter disabled */
  2367. i2c_w_mask(sd, 0x2d, 0x00, 0x04);
  2368. i2c_w_mask(sd, 0x2a, 0x00, 0x80);
  2369. break;
  2370. case 1: /* 50 hz (filter on and framerate adj) */
  2371. i2c_w_mask(sd, 0x2d, 0x04, 0x04);
  2372. i2c_w_mask(sd, 0x2a, 0x80, 0x80);
  2373. /* 20 fps -> 16.667 fps */
  2374. if (sd->sensor == SEN_OV6620 ||
  2375. sd->sensor == SEN_OV6630)
  2376. i2c_w(sd, 0x2b, 0x5e);
  2377. else
  2378. i2c_w(sd, 0x2b, 0xac);
  2379. break;
  2380. case 2: /* 60 hz (filter on, ...) */
  2381. i2c_w_mask(sd, 0x2d, 0x04, 0x04);
  2382. if (sd->sensor == SEN_OV6620 ||
  2383. sd->sensor == SEN_OV6630) {
  2384. /* 20 fps -> 15 fps */
  2385. i2c_w_mask(sd, 0x2a, 0x80, 0x80);
  2386. i2c_w(sd, 0x2b, 0xa8);
  2387. } else {
  2388. /* no framerate adj. */
  2389. i2c_w_mask(sd, 0x2a, 0x00, 0x80);
  2390. }
  2391. break;
  2392. }
  2393. }
  2394. }
  2395. static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
  2396. {
  2397. struct sd *sd = (struct sd *) gspca_dev;
  2398. sd->brightness = val;
  2399. if (gspca_dev->streaming)
  2400. setbrightness(gspca_dev);
  2401. return 0;
  2402. }
  2403. static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
  2404. {
  2405. struct sd *sd = (struct sd *) gspca_dev;
  2406. *val = sd->brightness;
  2407. return 0;
  2408. }
  2409. static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
  2410. {
  2411. struct sd *sd = (struct sd *) gspca_dev;
  2412. sd->contrast = val;
  2413. if (gspca_dev->streaming)
  2414. setcontrast(gspca_dev);
  2415. return 0;
  2416. }
  2417. static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
  2418. {
  2419. struct sd *sd = (struct sd *) gspca_dev;
  2420. *val = sd->contrast;
  2421. return 0;
  2422. }
  2423. static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
  2424. {
  2425. struct sd *sd = (struct sd *) gspca_dev;
  2426. sd->colors = val;
  2427. if (gspca_dev->streaming)
  2428. setcolors(gspca_dev);
  2429. return 0;
  2430. }
  2431. static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
  2432. {
  2433. struct sd *sd = (struct sd *) gspca_dev;
  2434. *val = sd->colors;
  2435. return 0;
  2436. }
  2437. static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
  2438. {
  2439. struct sd *sd = (struct sd *) gspca_dev;
  2440. sd->hflip = val;
  2441. if (gspca_dev->streaming)
  2442. sethvflip(sd);
  2443. return 0;
  2444. }
  2445. static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
  2446. {
  2447. struct sd *sd = (struct sd *) gspca_dev;
  2448. *val = sd->hflip;
  2449. return 0;
  2450. }
  2451. static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
  2452. {
  2453. struct sd *sd = (struct sd *) gspca_dev;
  2454. sd->vflip = val;
  2455. if (gspca_dev->streaming)
  2456. sethvflip(sd);
  2457. return 0;
  2458. }
  2459. static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
  2460. {
  2461. struct sd *sd = (struct sd *) gspca_dev;
  2462. *val = sd->vflip;
  2463. return 0;
  2464. }
  2465. static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val)
  2466. {
  2467. struct sd *sd = (struct sd *) gspca_dev;
  2468. sd->autobrightness = val;
  2469. if (gspca_dev->streaming)
  2470. setautobrightness(sd);
  2471. return 0;
  2472. }
  2473. static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val)
  2474. {
  2475. struct sd *sd = (struct sd *) gspca_dev;
  2476. *val = sd->autobrightness;
  2477. return 0;
  2478. }
  2479. static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
  2480. {
  2481. struct sd *sd = (struct sd *) gspca_dev;
  2482. sd->freq = val;
  2483. if (gspca_dev->streaming)
  2484. setfreq(sd);
  2485. return 0;
  2486. }
  2487. static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
  2488. {
  2489. struct sd *sd = (struct sd *) gspca_dev;
  2490. *val = sd->freq;
  2491. return 0;
  2492. }
  2493. static int sd_querymenu(struct gspca_dev *gspca_dev,
  2494. struct v4l2_querymenu *menu)
  2495. {
  2496. struct sd *sd = (struct sd *) gspca_dev;
  2497. switch (menu->id) {
  2498. case V4L2_CID_POWER_LINE_FREQUENCY:
  2499. switch (menu->index) {
  2500. case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
  2501. strcpy((char *) menu->name, "NoFliker");
  2502. return 0;
  2503. case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
  2504. strcpy((char *) menu->name, "50 Hz");
  2505. return 0;
  2506. case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
  2507. strcpy((char *) menu->name, "60 Hz");
  2508. return 0;
  2509. case 3:
  2510. if (sd->sensor != SEN_OV7670)
  2511. return -EINVAL;
  2512. strcpy((char *) menu->name, "Automatic");
  2513. return 0;
  2514. }
  2515. break;
  2516. }
  2517. return -EINVAL;
  2518. }
  2519. /* sub-driver description */
  2520. static const struct sd_desc sd_desc = {
  2521. .name = MODULE_NAME,
  2522. .ctrls = sd_ctrls,
  2523. .nctrls = ARRAY_SIZE(sd_ctrls),
  2524. .config = sd_config,
  2525. .init = sd_init,
  2526. .start = sd_start,
  2527. .stopN = sd_stopN,
  2528. .pkt_scan = sd_pkt_scan,
  2529. .querymenu = sd_querymenu,
  2530. };
  2531. /* -- module initialisation -- */
  2532. static const __devinitdata struct usb_device_id device_table[] = {
  2533. {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
  2534. {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
  2535. {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
  2536. {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
  2537. {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 },
  2538. {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 },
  2539. {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
  2540. {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
  2541. {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
  2542. {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
  2543. {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
  2544. {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
  2545. {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
  2546. {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
  2547. {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
  2548. {}
  2549. };
  2550. MODULE_DEVICE_TABLE(usb, device_table);
  2551. /* -- device connect -- */
  2552. static int sd_probe(struct usb_interface *intf,
  2553. const struct usb_device_id *id)
  2554. {
  2555. return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
  2556. THIS_MODULE);
  2557. }
  2558. static struct usb_driver sd_driver = {
  2559. .name = MODULE_NAME,
  2560. .id_table = device_table,
  2561. .probe = sd_probe,
  2562. .disconnect = gspca_disconnect,
  2563. #ifdef CONFIG_PM
  2564. .suspend = gspca_suspend,
  2565. .resume = gspca_resume,
  2566. #endif
  2567. };
  2568. /* -- module insert / remove -- */
  2569. static int __init sd_mod_init(void)
  2570. {
  2571. int ret;
  2572. ret = usb_register(&sd_driver);
  2573. if (ret < 0)
  2574. return ret;
  2575. PDEBUG(D_PROBE, "registered");
  2576. return 0;
  2577. }
  2578. static void __exit sd_mod_exit(void)
  2579. {
  2580. usb_deregister(&sd_driver);
  2581. PDEBUG(D_PROBE, "deregistered");
  2582. }
  2583. module_init(sd_mod_init);
  2584. module_exit(sd_mod_exit);
  2585. module_param(frame_rate, int, 0644);
  2586. MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");