edac_mc.c 52 KB

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  1. /*
  2. * edac_mc kernel module
  3. * (C) 2005 Linux Networx (http://lnxi.com)
  4. * This file may be distributed under the terms of the
  5. * GNU General Public License.
  6. *
  7. * Written by Thayne Harbaugh
  8. * Based on work by Dan Hollis <goemon at anime dot net> and others.
  9. * http://www.anime.net/~goemon/linux-ecc/
  10. *
  11. * Modified by Dave Peterson and Doug Thompson
  12. *
  13. */
  14. #include <linux/config.h>
  15. #include <linux/module.h>
  16. #include <linux/proc_fs.h>
  17. #include <linux/kernel.h>
  18. #include <linux/types.h>
  19. #include <linux/smp.h>
  20. #include <linux/init.h>
  21. #include <linux/sysctl.h>
  22. #include <linux/highmem.h>
  23. #include <linux/timer.h>
  24. #include <linux/slab.h>
  25. #include <linux/jiffies.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/list.h>
  28. #include <linux/sysdev.h>
  29. #include <linux/ctype.h>
  30. #include <linux/kthread.h>
  31. #include <asm/uaccess.h>
  32. #include <asm/page.h>
  33. #include <asm/edac.h>
  34. #include "edac_mc.h"
  35. #define EDAC_MC_VERSION "Ver: 2.0.0 " __DATE__
  36. /* For now, disable the EDAC sysfs code. The sysfs interface that EDAC
  37. * presents to user space needs more thought, and is likely to change
  38. * substantially.
  39. */
  40. #define DISABLE_EDAC_SYSFS
  41. #ifdef CONFIG_EDAC_DEBUG
  42. /* Values of 0 to 4 will generate output */
  43. int edac_debug_level = 1;
  44. EXPORT_SYMBOL(edac_debug_level);
  45. #endif
  46. /* EDAC Controls, setable by module parameter, and sysfs */
  47. static int log_ue = 1;
  48. static int log_ce = 1;
  49. static int panic_on_ue;
  50. static int poll_msec = 1000;
  51. static int check_pci_parity = 0; /* default YES check PCI parity */
  52. static int panic_on_pci_parity; /* default no panic on PCI Parity */
  53. static atomic_t pci_parity_count = ATOMIC_INIT(0);
  54. /* lock to memory controller's control array */
  55. static DECLARE_MUTEX(mem_ctls_mutex);
  56. static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices);
  57. static struct task_struct *edac_thread;
  58. /* Structure of the whitelist and blacklist arrays */
  59. struct edac_pci_device_list {
  60. unsigned int vendor; /* Vendor ID */
  61. unsigned int device; /* Deviice ID */
  62. };
  63. #define MAX_LISTED_PCI_DEVICES 32
  64. /* List of PCI devices (vendor-id:device-id) that should be skipped */
  65. static struct edac_pci_device_list pci_blacklist[MAX_LISTED_PCI_DEVICES];
  66. static int pci_blacklist_count;
  67. /* List of PCI devices (vendor-id:device-id) that should be scanned */
  68. static struct edac_pci_device_list pci_whitelist[MAX_LISTED_PCI_DEVICES];
  69. static int pci_whitelist_count ;
  70. /* START sysfs data and methods */
  71. #ifndef DISABLE_EDAC_SYSFS
  72. static const char *mem_types[] = {
  73. [MEM_EMPTY] = "Empty",
  74. [MEM_RESERVED] = "Reserved",
  75. [MEM_UNKNOWN] = "Unknown",
  76. [MEM_FPM] = "FPM",
  77. [MEM_EDO] = "EDO",
  78. [MEM_BEDO] = "BEDO",
  79. [MEM_SDR] = "Unbuffered-SDR",
  80. [MEM_RDR] = "Registered-SDR",
  81. [MEM_DDR] = "Unbuffered-DDR",
  82. [MEM_RDDR] = "Registered-DDR",
  83. [MEM_RMBS] = "RMBS"
  84. };
  85. static const char *dev_types[] = {
  86. [DEV_UNKNOWN] = "Unknown",
  87. [DEV_X1] = "x1",
  88. [DEV_X2] = "x2",
  89. [DEV_X4] = "x4",
  90. [DEV_X8] = "x8",
  91. [DEV_X16] = "x16",
  92. [DEV_X32] = "x32",
  93. [DEV_X64] = "x64"
  94. };
  95. static const char *edac_caps[] = {
  96. [EDAC_UNKNOWN] = "Unknown",
  97. [EDAC_NONE] = "None",
  98. [EDAC_RESERVED] = "Reserved",
  99. [EDAC_PARITY] = "PARITY",
  100. [EDAC_EC] = "EC",
  101. [EDAC_SECDED] = "SECDED",
  102. [EDAC_S2ECD2ED] = "S2ECD2ED",
  103. [EDAC_S4ECD4ED] = "S4ECD4ED",
  104. [EDAC_S8ECD8ED] = "S8ECD8ED",
  105. [EDAC_S16ECD16ED] = "S16ECD16ED"
  106. };
  107. /* sysfs object: /sys/devices/system/edac */
  108. static struct sysdev_class edac_class = {
  109. set_kset_name("edac"),
  110. };
  111. /* sysfs objects:
  112. * /sys/devices/system/edac/mc
  113. * /sys/devices/system/edac/pci
  114. */
  115. static struct kobject edac_memctrl_kobj;
  116. static struct kobject edac_pci_kobj;
  117. /*
  118. * /sys/devices/system/edac/mc;
  119. * data structures and methods
  120. */
  121. #if 0
  122. static ssize_t memctrl_string_show(void *ptr, char *buffer)
  123. {
  124. char *value = (char*) ptr;
  125. return sprintf(buffer, "%s\n", value);
  126. }
  127. #endif
  128. static ssize_t memctrl_int_show(void *ptr, char *buffer)
  129. {
  130. int *value = (int*) ptr;
  131. return sprintf(buffer, "%d\n", *value);
  132. }
  133. static ssize_t memctrl_int_store(void *ptr, const char *buffer, size_t count)
  134. {
  135. int *value = (int*) ptr;
  136. if (isdigit(*buffer))
  137. *value = simple_strtoul(buffer, NULL, 0);
  138. return count;
  139. }
  140. struct memctrl_dev_attribute {
  141. struct attribute attr;
  142. void *value;
  143. ssize_t (*show)(void *,char *);
  144. ssize_t (*store)(void *, const char *, size_t);
  145. };
  146. /* Set of show/store abstract level functions for memory control object */
  147. static ssize_t
  148. memctrl_dev_show(struct kobject *kobj, struct attribute *attr, char *buffer)
  149. {
  150. struct memctrl_dev_attribute *memctrl_dev;
  151. memctrl_dev = (struct memctrl_dev_attribute*)attr;
  152. if (memctrl_dev->show)
  153. return memctrl_dev->show(memctrl_dev->value, buffer);
  154. return -EIO;
  155. }
  156. static ssize_t
  157. memctrl_dev_store(struct kobject *kobj, struct attribute *attr,
  158. const char *buffer, size_t count)
  159. {
  160. struct memctrl_dev_attribute *memctrl_dev;
  161. memctrl_dev = (struct memctrl_dev_attribute*)attr;
  162. if (memctrl_dev->store)
  163. return memctrl_dev->store(memctrl_dev->value, buffer, count);
  164. return -EIO;
  165. }
  166. static struct sysfs_ops memctrlfs_ops = {
  167. .show = memctrl_dev_show,
  168. .store = memctrl_dev_store
  169. };
  170. #define MEMCTRL_ATTR(_name,_mode,_show,_store) \
  171. struct memctrl_dev_attribute attr_##_name = { \
  172. .attr = {.name = __stringify(_name), .mode = _mode }, \
  173. .value = &_name, \
  174. .show = _show, \
  175. .store = _store, \
  176. };
  177. #define MEMCTRL_STRING_ATTR(_name,_data,_mode,_show,_store) \
  178. struct memctrl_dev_attribute attr_##_name = { \
  179. .attr = {.name = __stringify(_name), .mode = _mode }, \
  180. .value = _data, \
  181. .show = _show, \
  182. .store = _store, \
  183. };
  184. /* cwrow<id> attribute f*/
  185. #if 0
  186. MEMCTRL_STRING_ATTR(mc_version,EDAC_MC_VERSION,S_IRUGO,memctrl_string_show,NULL);
  187. #endif
  188. /* csrow<id> control files */
  189. MEMCTRL_ATTR(panic_on_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
  190. MEMCTRL_ATTR(log_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
  191. MEMCTRL_ATTR(log_ce,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
  192. MEMCTRL_ATTR(poll_msec,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
  193. /* Base Attributes of the memory ECC object */
  194. static struct memctrl_dev_attribute *memctrl_attr[] = {
  195. &attr_panic_on_ue,
  196. &attr_log_ue,
  197. &attr_log_ce,
  198. &attr_poll_msec,
  199. NULL,
  200. };
  201. /* Main MC kobject release() function */
  202. static void edac_memctrl_master_release(struct kobject *kobj)
  203. {
  204. debugf1("%s()\n", __func__);
  205. }
  206. static struct kobj_type ktype_memctrl = {
  207. .release = edac_memctrl_master_release,
  208. .sysfs_ops = &memctrlfs_ops,
  209. .default_attrs = (struct attribute **) memctrl_attr,
  210. };
  211. #endif /* DISABLE_EDAC_SYSFS */
  212. /* Initialize the main sysfs entries for edac:
  213. * /sys/devices/system/edac
  214. *
  215. * and children
  216. *
  217. * Return: 0 SUCCESS
  218. * !0 FAILURE
  219. */
  220. static int edac_sysfs_memctrl_setup(void)
  221. #ifdef DISABLE_EDAC_SYSFS
  222. {
  223. return 0;
  224. }
  225. #else
  226. {
  227. int err=0;
  228. debugf1("%s()\n", __func__);
  229. /* create the /sys/devices/system/edac directory */
  230. err = sysdev_class_register(&edac_class);
  231. if (!err) {
  232. /* Init the MC's kobject */
  233. memset(&edac_memctrl_kobj, 0, sizeof (edac_memctrl_kobj));
  234. kobject_init(&edac_memctrl_kobj);
  235. edac_memctrl_kobj.parent = &edac_class.kset.kobj;
  236. edac_memctrl_kobj.ktype = &ktype_memctrl;
  237. /* generate sysfs "..../edac/mc" */
  238. err = kobject_set_name(&edac_memctrl_kobj,"mc");
  239. if (!err) {
  240. /* FIXME: maybe new sysdev_create_subdir() */
  241. err = kobject_register(&edac_memctrl_kobj);
  242. if (err) {
  243. debugf1("Failed to register '.../edac/mc'\n");
  244. } else {
  245. debugf1("Registered '.../edac/mc' kobject\n");
  246. }
  247. }
  248. } else {
  249. debugf1("%s() error=%d\n", __func__, err);
  250. }
  251. return err;
  252. }
  253. #endif /* DISABLE_EDAC_SYSFS */
  254. /*
  255. * MC teardown:
  256. * the '..../edac/mc' kobject followed by '..../edac' itself
  257. */
  258. static void edac_sysfs_memctrl_teardown(void)
  259. {
  260. #ifndef DISABLE_EDAC_SYSFS
  261. debugf0("MC: " __FILE__ ": %s()\n", __func__);
  262. /* Unregister the MC's kobject */
  263. kobject_unregister(&edac_memctrl_kobj);
  264. /* release the master edac mc kobject */
  265. kobject_put(&edac_memctrl_kobj);
  266. /* Unregister the 'edac' object */
  267. sysdev_class_unregister(&edac_class);
  268. #endif /* DISABLE_EDAC_SYSFS */
  269. }
  270. #ifndef DISABLE_EDAC_SYSFS
  271. /*
  272. * /sys/devices/system/edac/pci;
  273. * data structures and methods
  274. */
  275. struct list_control {
  276. struct edac_pci_device_list *list;
  277. int *count;
  278. };
  279. #if 0
  280. /* Output the list as: vendor_id:device:id<,vendor_id:device_id> */
  281. static ssize_t edac_pci_list_string_show(void *ptr, char *buffer)
  282. {
  283. struct list_control *listctl;
  284. struct edac_pci_device_list *list;
  285. char *p = buffer;
  286. int len=0;
  287. int i;
  288. listctl = ptr;
  289. list = listctl->list;
  290. for (i = 0; i < *(listctl->count); i++, list++ ) {
  291. if (len > 0)
  292. len += snprintf(p + len, (PAGE_SIZE-len), ",");
  293. len += snprintf(p + len,
  294. (PAGE_SIZE-len),
  295. "%x:%x",
  296. list->vendor,list->device);
  297. }
  298. len += snprintf(p + len,(PAGE_SIZE-len), "\n");
  299. return (ssize_t) len;
  300. }
  301. /**
  302. *
  303. * Scan string from **s to **e looking for one 'vendor:device' tuple
  304. * where each field is a hex value
  305. *
  306. * return 0 if an entry is NOT found
  307. * return 1 if an entry is found
  308. * fill in *vendor_id and *device_id with values found
  309. *
  310. * In both cases, make sure *s has been moved forward toward *e
  311. */
  312. static int parse_one_device(const char **s,const char **e,
  313. unsigned int *vendor_id, unsigned int *device_id)
  314. {
  315. const char *runner, *p;
  316. /* if null byte, we are done */
  317. if (!**s) {
  318. (*s)++; /* keep *s moving */
  319. return 0;
  320. }
  321. /* skip over newlines & whitespace */
  322. if ((**s == '\n') || isspace(**s)) {
  323. (*s)++;
  324. return 0;
  325. }
  326. if (!isxdigit(**s)) {
  327. (*s)++;
  328. return 0;
  329. }
  330. /* parse vendor_id */
  331. runner = *s;
  332. while (runner < *e) {
  333. /* scan for vendor:device delimiter */
  334. if (*runner == ':') {
  335. *vendor_id = simple_strtol((char*) *s, (char**) &p, 16);
  336. runner = p + 1;
  337. break;
  338. }
  339. runner++;
  340. }
  341. if (!isxdigit(*runner)) {
  342. *s = ++runner;
  343. return 0;
  344. }
  345. /* parse device_id */
  346. if (runner < *e) {
  347. *device_id = simple_strtol((char*)runner, (char**)&p, 16);
  348. runner = p;
  349. }
  350. *s = runner;
  351. return 1;
  352. }
  353. static ssize_t edac_pci_list_string_store(void *ptr, const char *buffer,
  354. size_t count)
  355. {
  356. struct list_control *listctl;
  357. struct edac_pci_device_list *list;
  358. unsigned int vendor_id, device_id;
  359. const char *s, *e;
  360. int *index;
  361. s = (char*)buffer;
  362. e = s + count;
  363. listctl = ptr;
  364. list = listctl->list;
  365. index = listctl->count;
  366. *index = 0;
  367. while (*index < MAX_LISTED_PCI_DEVICES) {
  368. if (parse_one_device(&s,&e,&vendor_id,&device_id)) {
  369. list[ *index ].vendor = vendor_id;
  370. list[ *index ].device = device_id;
  371. (*index)++;
  372. }
  373. /* check for all data consume */
  374. if (s >= e)
  375. break;
  376. }
  377. return count;
  378. }
  379. #endif
  380. static ssize_t edac_pci_int_show(void *ptr, char *buffer)
  381. {
  382. int *value = ptr;
  383. return sprintf(buffer,"%d\n",*value);
  384. }
  385. static ssize_t edac_pci_int_store(void *ptr, const char *buffer, size_t count)
  386. {
  387. int *value = ptr;
  388. if (isdigit(*buffer))
  389. *value = simple_strtoul(buffer,NULL,0);
  390. return count;
  391. }
  392. struct edac_pci_dev_attribute {
  393. struct attribute attr;
  394. void *value;
  395. ssize_t (*show)(void *,char *);
  396. ssize_t (*store)(void *, const char *,size_t);
  397. };
  398. /* Set of show/store abstract level functions for PCI Parity object */
  399. static ssize_t edac_pci_dev_show(struct kobject *kobj, struct attribute *attr,
  400. char *buffer)
  401. {
  402. struct edac_pci_dev_attribute *edac_pci_dev;
  403. edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
  404. if (edac_pci_dev->show)
  405. return edac_pci_dev->show(edac_pci_dev->value, buffer);
  406. return -EIO;
  407. }
  408. static ssize_t edac_pci_dev_store(struct kobject *kobj, struct attribute *attr,
  409. const char *buffer, size_t count)
  410. {
  411. struct edac_pci_dev_attribute *edac_pci_dev;
  412. edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
  413. if (edac_pci_dev->show)
  414. return edac_pci_dev->store(edac_pci_dev->value, buffer, count);
  415. return -EIO;
  416. }
  417. static struct sysfs_ops edac_pci_sysfs_ops = {
  418. .show = edac_pci_dev_show,
  419. .store = edac_pci_dev_store
  420. };
  421. #define EDAC_PCI_ATTR(_name,_mode,_show,_store) \
  422. struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
  423. .attr = {.name = __stringify(_name), .mode = _mode }, \
  424. .value = &_name, \
  425. .show = _show, \
  426. .store = _store, \
  427. };
  428. #define EDAC_PCI_STRING_ATTR(_name,_data,_mode,_show,_store) \
  429. struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
  430. .attr = {.name = __stringify(_name), .mode = _mode }, \
  431. .value = _data, \
  432. .show = _show, \
  433. .store = _store, \
  434. };
  435. #if 0
  436. static struct list_control pci_whitelist_control = {
  437. .list = pci_whitelist,
  438. .count = &pci_whitelist_count
  439. };
  440. static struct list_control pci_blacklist_control = {
  441. .list = pci_blacklist,
  442. .count = &pci_blacklist_count
  443. };
  444. /* whitelist attribute */
  445. EDAC_PCI_STRING_ATTR(pci_parity_whitelist,
  446. &pci_whitelist_control,
  447. S_IRUGO|S_IWUSR,
  448. edac_pci_list_string_show,
  449. edac_pci_list_string_store);
  450. EDAC_PCI_STRING_ATTR(pci_parity_blacklist,
  451. &pci_blacklist_control,
  452. S_IRUGO|S_IWUSR,
  453. edac_pci_list_string_show,
  454. edac_pci_list_string_store);
  455. #endif
  456. /* PCI Parity control files */
  457. EDAC_PCI_ATTR(check_pci_parity,S_IRUGO|S_IWUSR,edac_pci_int_show,edac_pci_int_store);
  458. EDAC_PCI_ATTR(panic_on_pci_parity,S_IRUGO|S_IWUSR,edac_pci_int_show,edac_pci_int_store);
  459. EDAC_PCI_ATTR(pci_parity_count,S_IRUGO,edac_pci_int_show,NULL);
  460. /* Base Attributes of the memory ECC object */
  461. static struct edac_pci_dev_attribute *edac_pci_attr[] = {
  462. &edac_pci_attr_check_pci_parity,
  463. &edac_pci_attr_panic_on_pci_parity,
  464. &edac_pci_attr_pci_parity_count,
  465. NULL,
  466. };
  467. /* No memory to release */
  468. static void edac_pci_release(struct kobject *kobj)
  469. {
  470. debugf1("%s()\n", __func__);
  471. }
  472. static struct kobj_type ktype_edac_pci = {
  473. .release = edac_pci_release,
  474. .sysfs_ops = &edac_pci_sysfs_ops,
  475. .default_attrs = (struct attribute **) edac_pci_attr,
  476. };
  477. #endif /* DISABLE_EDAC_SYSFS */
  478. /**
  479. * edac_sysfs_pci_setup()
  480. *
  481. */
  482. static int edac_sysfs_pci_setup(void)
  483. #ifdef DISABLE_EDAC_SYSFS
  484. {
  485. return 0;
  486. }
  487. #else
  488. {
  489. int err;
  490. debugf1("%s()\n", __func__);
  491. memset(&edac_pci_kobj, 0, sizeof(edac_pci_kobj));
  492. kobject_init(&edac_pci_kobj);
  493. edac_pci_kobj.parent = &edac_class.kset.kobj;
  494. edac_pci_kobj.ktype = &ktype_edac_pci;
  495. err = kobject_set_name(&edac_pci_kobj, "pci");
  496. if (!err) {
  497. /* Instanstiate the csrow object */
  498. /* FIXME: maybe new sysdev_create_subdir() */
  499. err = kobject_register(&edac_pci_kobj);
  500. if (err)
  501. debugf1("Failed to register '.../edac/pci'\n");
  502. else
  503. debugf1("Registered '.../edac/pci' kobject\n");
  504. }
  505. return err;
  506. }
  507. #endif /* DISABLE_EDAC_SYSFS */
  508. static void edac_sysfs_pci_teardown(void)
  509. {
  510. #ifndef DISABLE_EDAC_SYSFS
  511. debugf0("%s()\n", __func__);
  512. kobject_unregister(&edac_pci_kobj);
  513. kobject_put(&edac_pci_kobj);
  514. #endif
  515. }
  516. #ifndef DISABLE_EDAC_SYSFS
  517. /* EDAC sysfs CSROW data structures and methods */
  518. /* Set of more detailed csrow<id> attribute show/store functions */
  519. static ssize_t csrow_ch0_dimm_label_show(struct csrow_info *csrow, char *data)
  520. {
  521. ssize_t size = 0;
  522. if (csrow->nr_channels > 0) {
  523. size = snprintf(data, EDAC_MC_LABEL_LEN,"%s\n",
  524. csrow->channels[0].label);
  525. }
  526. return size;
  527. }
  528. static ssize_t csrow_ch1_dimm_label_show(struct csrow_info *csrow, char *data)
  529. {
  530. ssize_t size = 0;
  531. if (csrow->nr_channels > 0) {
  532. size = snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",
  533. csrow->channels[1].label);
  534. }
  535. return size;
  536. }
  537. static ssize_t csrow_ch0_dimm_label_store(struct csrow_info *csrow,
  538. const char *data, size_t size)
  539. {
  540. ssize_t max_size = 0;
  541. if (csrow->nr_channels > 0) {
  542. max_size = min((ssize_t)size,(ssize_t)EDAC_MC_LABEL_LEN-1);
  543. strncpy(csrow->channels[0].label, data, max_size);
  544. csrow->channels[0].label[max_size] = '\0';
  545. }
  546. return size;
  547. }
  548. static ssize_t csrow_ch1_dimm_label_store(struct csrow_info *csrow,
  549. const char *data, size_t size)
  550. {
  551. ssize_t max_size = 0;
  552. if (csrow->nr_channels > 1) {
  553. max_size = min((ssize_t)size,(ssize_t)EDAC_MC_LABEL_LEN-1);
  554. strncpy(csrow->channels[1].label, data, max_size);
  555. csrow->channels[1].label[max_size] = '\0';
  556. }
  557. return max_size;
  558. }
  559. static ssize_t csrow_ue_count_show(struct csrow_info *csrow, char *data)
  560. {
  561. return sprintf(data,"%u\n", csrow->ue_count);
  562. }
  563. static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data)
  564. {
  565. return sprintf(data,"%u\n", csrow->ce_count);
  566. }
  567. static ssize_t csrow_ch0_ce_count_show(struct csrow_info *csrow, char *data)
  568. {
  569. ssize_t size = 0;
  570. if (csrow->nr_channels > 0) {
  571. size = sprintf(data,"%u\n", csrow->channels[0].ce_count);
  572. }
  573. return size;
  574. }
  575. static ssize_t csrow_ch1_ce_count_show(struct csrow_info *csrow, char *data)
  576. {
  577. ssize_t size = 0;
  578. if (csrow->nr_channels > 1) {
  579. size = sprintf(data,"%u\n", csrow->channels[1].ce_count);
  580. }
  581. return size;
  582. }
  583. static ssize_t csrow_size_show(struct csrow_info *csrow, char *data)
  584. {
  585. return sprintf(data,"%u\n", PAGES_TO_MiB(csrow->nr_pages));
  586. }
  587. static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data)
  588. {
  589. return sprintf(data,"%s\n", mem_types[csrow->mtype]);
  590. }
  591. static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data)
  592. {
  593. return sprintf(data,"%s\n", dev_types[csrow->dtype]);
  594. }
  595. static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data)
  596. {
  597. return sprintf(data,"%s\n", edac_caps[csrow->edac_mode]);
  598. }
  599. struct csrowdev_attribute {
  600. struct attribute attr;
  601. ssize_t (*show)(struct csrow_info *,char *);
  602. ssize_t (*store)(struct csrow_info *, const char *,size_t);
  603. };
  604. #define to_csrow(k) container_of(k, struct csrow_info, kobj)
  605. #define to_csrowdev_attr(a) container_of(a, struct csrowdev_attribute, attr)
  606. /* Set of show/store higher level functions for csrow objects */
  607. static ssize_t csrowdev_show(struct kobject *kobj, struct attribute *attr,
  608. char *buffer)
  609. {
  610. struct csrow_info *csrow = to_csrow(kobj);
  611. struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr);
  612. if (csrowdev_attr->show)
  613. return csrowdev_attr->show(csrow, buffer);
  614. return -EIO;
  615. }
  616. static ssize_t csrowdev_store(struct kobject *kobj, struct attribute *attr,
  617. const char *buffer, size_t count)
  618. {
  619. struct csrow_info *csrow = to_csrow(kobj);
  620. struct csrowdev_attribute * csrowdev_attr = to_csrowdev_attr(attr);
  621. if (csrowdev_attr->store)
  622. return csrowdev_attr->store(csrow, buffer, count);
  623. return -EIO;
  624. }
  625. static struct sysfs_ops csrowfs_ops = {
  626. .show = csrowdev_show,
  627. .store = csrowdev_store
  628. };
  629. #define CSROWDEV_ATTR(_name,_mode,_show,_store) \
  630. struct csrowdev_attribute attr_##_name = { \
  631. .attr = {.name = __stringify(_name), .mode = _mode }, \
  632. .show = _show, \
  633. .store = _store, \
  634. };
  635. /* cwrow<id>/attribute files */
  636. CSROWDEV_ATTR(size_mb,S_IRUGO,csrow_size_show,NULL);
  637. CSROWDEV_ATTR(dev_type,S_IRUGO,csrow_dev_type_show,NULL);
  638. CSROWDEV_ATTR(mem_type,S_IRUGO,csrow_mem_type_show,NULL);
  639. CSROWDEV_ATTR(edac_mode,S_IRUGO,csrow_edac_mode_show,NULL);
  640. CSROWDEV_ATTR(ue_count,S_IRUGO,csrow_ue_count_show,NULL);
  641. CSROWDEV_ATTR(ce_count,S_IRUGO,csrow_ce_count_show,NULL);
  642. CSROWDEV_ATTR(ch0_ce_count,S_IRUGO,csrow_ch0_ce_count_show,NULL);
  643. CSROWDEV_ATTR(ch1_ce_count,S_IRUGO,csrow_ch1_ce_count_show,NULL);
  644. /* control/attribute files */
  645. CSROWDEV_ATTR(ch0_dimm_label,S_IRUGO|S_IWUSR,
  646. csrow_ch0_dimm_label_show,
  647. csrow_ch0_dimm_label_store);
  648. CSROWDEV_ATTR(ch1_dimm_label,S_IRUGO|S_IWUSR,
  649. csrow_ch1_dimm_label_show,
  650. csrow_ch1_dimm_label_store);
  651. /* Attributes of the CSROW<id> object */
  652. static struct csrowdev_attribute *csrow_attr[] = {
  653. &attr_dev_type,
  654. &attr_mem_type,
  655. &attr_edac_mode,
  656. &attr_size_mb,
  657. &attr_ue_count,
  658. &attr_ce_count,
  659. &attr_ch0_ce_count,
  660. &attr_ch1_ce_count,
  661. &attr_ch0_dimm_label,
  662. &attr_ch1_dimm_label,
  663. NULL,
  664. };
  665. /* No memory to release */
  666. static void edac_csrow_instance_release(struct kobject *kobj)
  667. {
  668. debugf1("%s()\n", __func__);
  669. }
  670. static struct kobj_type ktype_csrow = {
  671. .release = edac_csrow_instance_release,
  672. .sysfs_ops = &csrowfs_ops,
  673. .default_attrs = (struct attribute **) csrow_attr,
  674. };
  675. /* Create a CSROW object under specifed edac_mc_device */
  676. static int edac_create_csrow_object(struct kobject *edac_mci_kobj,
  677. struct csrow_info *csrow, int index )
  678. {
  679. int err = 0;
  680. debugf0("%s()\n", __func__);
  681. memset(&csrow->kobj, 0, sizeof(csrow->kobj));
  682. /* generate ..../edac/mc/mc<id>/csrow<index> */
  683. kobject_init(&csrow->kobj);
  684. csrow->kobj.parent = edac_mci_kobj;
  685. csrow->kobj.ktype = &ktype_csrow;
  686. /* name this instance of csrow<id> */
  687. err = kobject_set_name(&csrow->kobj,"csrow%d",index);
  688. if (!err) {
  689. /* Instanstiate the csrow object */
  690. err = kobject_register(&csrow->kobj);
  691. if (err)
  692. debugf0("Failed to register CSROW%d\n",index);
  693. else
  694. debugf0("Registered CSROW%d\n",index);
  695. }
  696. return err;
  697. }
  698. /* sysfs data structures and methods for the MCI kobjects */
  699. static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci,
  700. const char *data, size_t count )
  701. {
  702. int row, chan;
  703. mci->ue_noinfo_count = 0;
  704. mci->ce_noinfo_count = 0;
  705. mci->ue_count = 0;
  706. mci->ce_count = 0;
  707. for (row = 0; row < mci->nr_csrows; row++) {
  708. struct csrow_info *ri = &mci->csrows[row];
  709. ri->ue_count = 0;
  710. ri->ce_count = 0;
  711. for (chan = 0; chan < ri->nr_channels; chan++)
  712. ri->channels[chan].ce_count = 0;
  713. }
  714. mci->start_time = jiffies;
  715. return count;
  716. }
  717. static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data)
  718. {
  719. return sprintf(data,"%d\n", mci->ue_count);
  720. }
  721. static ssize_t mci_ce_count_show(struct mem_ctl_info *mci, char *data)
  722. {
  723. return sprintf(data,"%d\n", mci->ce_count);
  724. }
  725. static ssize_t mci_ce_noinfo_show(struct mem_ctl_info *mci, char *data)
  726. {
  727. return sprintf(data,"%d\n", mci->ce_noinfo_count);
  728. }
  729. static ssize_t mci_ue_noinfo_show(struct mem_ctl_info *mci, char *data)
  730. {
  731. return sprintf(data,"%d\n", mci->ue_noinfo_count);
  732. }
  733. static ssize_t mci_seconds_show(struct mem_ctl_info *mci, char *data)
  734. {
  735. return sprintf(data,"%ld\n", (jiffies - mci->start_time) / HZ);
  736. }
  737. static ssize_t mci_mod_name_show(struct mem_ctl_info *mci, char *data)
  738. {
  739. return sprintf(data,"%s %s\n", mci->mod_name, mci->mod_ver);
  740. }
  741. static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data)
  742. {
  743. return sprintf(data,"%s\n", mci->ctl_name);
  744. }
  745. static int mci_output_edac_cap(char *buf, unsigned long edac_cap)
  746. {
  747. char *p = buf;
  748. int bit_idx;
  749. for (bit_idx = 0; bit_idx < 8 * sizeof(edac_cap); bit_idx++) {
  750. if ((edac_cap >> bit_idx) & 0x1)
  751. p += sprintf(p, "%s ", edac_caps[bit_idx]);
  752. }
  753. return p - buf;
  754. }
  755. static ssize_t mci_edac_capability_show(struct mem_ctl_info *mci, char *data)
  756. {
  757. char *p = data;
  758. p += mci_output_edac_cap(p,mci->edac_ctl_cap);
  759. p += sprintf(p, "\n");
  760. return p - data;
  761. }
  762. static ssize_t mci_edac_current_capability_show(struct mem_ctl_info *mci,
  763. char *data)
  764. {
  765. char *p = data;
  766. p += mci_output_edac_cap(p,mci->edac_cap);
  767. p += sprintf(p, "\n");
  768. return p - data;
  769. }
  770. static int mci_output_mtype_cap(char *buf, unsigned long mtype_cap)
  771. {
  772. char *p = buf;
  773. int bit_idx;
  774. for (bit_idx = 0; bit_idx < 8 * sizeof(mtype_cap); bit_idx++) {
  775. if ((mtype_cap >> bit_idx) & 0x1)
  776. p += sprintf(p, "%s ", mem_types[bit_idx]);
  777. }
  778. return p - buf;
  779. }
  780. static ssize_t mci_supported_mem_type_show(struct mem_ctl_info *mci, char *data)
  781. {
  782. char *p = data;
  783. p += mci_output_mtype_cap(p,mci->mtype_cap);
  784. p += sprintf(p, "\n");
  785. return p - data;
  786. }
  787. static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data)
  788. {
  789. int total_pages, csrow_idx;
  790. for (total_pages = csrow_idx = 0; csrow_idx < mci->nr_csrows;
  791. csrow_idx++) {
  792. struct csrow_info *csrow = &mci->csrows[csrow_idx];
  793. if (!csrow->nr_pages)
  794. continue;
  795. total_pages += csrow->nr_pages;
  796. }
  797. return sprintf(data,"%u\n", PAGES_TO_MiB(total_pages));
  798. }
  799. struct mcidev_attribute {
  800. struct attribute attr;
  801. ssize_t (*show)(struct mem_ctl_info *,char *);
  802. ssize_t (*store)(struct mem_ctl_info *, const char *,size_t);
  803. };
  804. #define to_mci(k) container_of(k, struct mem_ctl_info, edac_mci_kobj)
  805. #define to_mcidev_attr(a) container_of(a, struct mcidev_attribute, attr)
  806. static ssize_t mcidev_show(struct kobject *kobj, struct attribute *attr,
  807. char *buffer)
  808. {
  809. struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
  810. struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
  811. if (mcidev_attr->show)
  812. return mcidev_attr->show(mem_ctl_info, buffer);
  813. return -EIO;
  814. }
  815. static ssize_t mcidev_store(struct kobject *kobj, struct attribute *attr,
  816. const char *buffer, size_t count)
  817. {
  818. struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
  819. struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
  820. if (mcidev_attr->store)
  821. return mcidev_attr->store(mem_ctl_info, buffer, count);
  822. return -EIO;
  823. }
  824. static struct sysfs_ops mci_ops = {
  825. .show = mcidev_show,
  826. .store = mcidev_store
  827. };
  828. #define MCIDEV_ATTR(_name,_mode,_show,_store) \
  829. struct mcidev_attribute mci_attr_##_name = { \
  830. .attr = {.name = __stringify(_name), .mode = _mode }, \
  831. .show = _show, \
  832. .store = _store, \
  833. };
  834. /* Control file */
  835. MCIDEV_ATTR(reset_counters,S_IWUSR,NULL,mci_reset_counters_store);
  836. /* Attribute files */
  837. MCIDEV_ATTR(mc_name,S_IRUGO,mci_ctl_name_show,NULL);
  838. MCIDEV_ATTR(module_name,S_IRUGO,mci_mod_name_show,NULL);
  839. MCIDEV_ATTR(edac_capability,S_IRUGO,mci_edac_capability_show,NULL);
  840. MCIDEV_ATTR(size_mb,S_IRUGO,mci_size_mb_show,NULL);
  841. MCIDEV_ATTR(seconds_since_reset,S_IRUGO,mci_seconds_show,NULL);
  842. MCIDEV_ATTR(ue_noinfo_count,S_IRUGO,mci_ue_noinfo_show,NULL);
  843. MCIDEV_ATTR(ce_noinfo_count,S_IRUGO,mci_ce_noinfo_show,NULL);
  844. MCIDEV_ATTR(ue_count,S_IRUGO,mci_ue_count_show,NULL);
  845. MCIDEV_ATTR(ce_count,S_IRUGO,mci_ce_count_show,NULL);
  846. MCIDEV_ATTR(edac_current_capability,S_IRUGO,
  847. mci_edac_current_capability_show,NULL);
  848. MCIDEV_ATTR(supported_mem_type,S_IRUGO,
  849. mci_supported_mem_type_show,NULL);
  850. static struct mcidev_attribute *mci_attr[] = {
  851. &mci_attr_reset_counters,
  852. &mci_attr_module_name,
  853. &mci_attr_mc_name,
  854. &mci_attr_edac_capability,
  855. &mci_attr_edac_current_capability,
  856. &mci_attr_supported_mem_type,
  857. &mci_attr_size_mb,
  858. &mci_attr_seconds_since_reset,
  859. &mci_attr_ue_noinfo_count,
  860. &mci_attr_ce_noinfo_count,
  861. &mci_attr_ue_count,
  862. &mci_attr_ce_count,
  863. NULL
  864. };
  865. /*
  866. * Release of a MC controlling instance
  867. */
  868. static void edac_mci_instance_release(struct kobject *kobj)
  869. {
  870. struct mem_ctl_info *mci;
  871. mci = container_of(kobj,struct mem_ctl_info,edac_mci_kobj);
  872. debugf0("%s() idx=%d calling kfree\n", __func__, mci->mc_idx);
  873. kfree(mci);
  874. }
  875. static struct kobj_type ktype_mci = {
  876. .release = edac_mci_instance_release,
  877. .sysfs_ops = &mci_ops,
  878. .default_attrs = (struct attribute **) mci_attr,
  879. };
  880. #endif /* DISABLE_EDAC_SYSFS */
  881. #define EDAC_DEVICE_SYMLINK "device"
  882. /*
  883. * Create a new Memory Controller kobject instance,
  884. * mc<id> under the 'mc' directory
  885. *
  886. * Return:
  887. * 0 Success
  888. * !0 Failure
  889. */
  890. static int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
  891. #ifdef DISABLE_EDAC_SYSFS
  892. {
  893. return 0;
  894. }
  895. #else
  896. {
  897. int i;
  898. int err;
  899. struct csrow_info *csrow;
  900. struct kobject *edac_mci_kobj=&mci->edac_mci_kobj;
  901. debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
  902. memset(edac_mci_kobj, 0, sizeof(*edac_mci_kobj));
  903. kobject_init(edac_mci_kobj);
  904. /* set the name of the mc<id> object */
  905. err = kobject_set_name(edac_mci_kobj,"mc%d",mci->mc_idx);
  906. if (err)
  907. return err;
  908. /* link to our parent the '..../edac/mc' object */
  909. edac_mci_kobj->parent = &edac_memctrl_kobj;
  910. edac_mci_kobj->ktype = &ktype_mci;
  911. /* register the mc<id> kobject */
  912. err = kobject_register(edac_mci_kobj);
  913. if (err)
  914. return err;
  915. /* create a symlink for the device */
  916. err = sysfs_create_link(edac_mci_kobj, &mci->pdev->dev.kobj,
  917. EDAC_DEVICE_SYMLINK);
  918. if (err) {
  919. kobject_unregister(edac_mci_kobj);
  920. return err;
  921. }
  922. /* Make directories for each CSROW object
  923. * under the mc<id> kobject
  924. */
  925. for (i = 0; i < mci->nr_csrows; i++) {
  926. csrow = &mci->csrows[i];
  927. /* Only expose populated CSROWs */
  928. if (csrow->nr_pages > 0) {
  929. err = edac_create_csrow_object(edac_mci_kobj,csrow,i);
  930. if (err)
  931. goto fail;
  932. }
  933. }
  934. /* Mark this MCI instance as having sysfs entries */
  935. mci->sysfs_active = MCI_SYSFS_ACTIVE;
  936. return 0;
  937. /* CSROW error: backout what has already been registered, */
  938. fail:
  939. for ( i--; i >= 0; i--) {
  940. if (csrow->nr_pages > 0) {
  941. kobject_unregister(&mci->csrows[i].kobj);
  942. kobject_put(&mci->csrows[i].kobj);
  943. }
  944. }
  945. kobject_unregister(edac_mci_kobj);
  946. kobject_put(edac_mci_kobj);
  947. return err;
  948. }
  949. #endif /* DISABLE_EDAC_SYSFS */
  950. /*
  951. * remove a Memory Controller instance
  952. */
  953. static void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
  954. {
  955. #ifndef DISABLE_EDAC_SYSFS
  956. int i;
  957. debugf0("%s()\n", __func__);
  958. /* remove all csrow kobjects */
  959. for (i = 0; i < mci->nr_csrows; i++) {
  960. if (mci->csrows[i].nr_pages > 0) {
  961. kobject_unregister(&mci->csrows[i].kobj);
  962. kobject_put(&mci->csrows[i].kobj);
  963. }
  964. }
  965. sysfs_remove_link(&mci->edac_mci_kobj, EDAC_DEVICE_SYMLINK);
  966. kobject_unregister(&mci->edac_mci_kobj);
  967. kobject_put(&mci->edac_mci_kobj);
  968. #endif /* DISABLE_EDAC_SYSFS */
  969. }
  970. /* END OF sysfs data and methods */
  971. #ifdef CONFIG_EDAC_DEBUG
  972. EXPORT_SYMBOL(edac_mc_dump_channel);
  973. void edac_mc_dump_channel(struct channel_info *chan)
  974. {
  975. debugf4("\tchannel = %p\n", chan);
  976. debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx);
  977. debugf4("\tchannel->ce_count = %d\n", chan->ce_count);
  978. debugf4("\tchannel->label = '%s'\n", chan->label);
  979. debugf4("\tchannel->csrow = %p\n\n", chan->csrow);
  980. }
  981. EXPORT_SYMBOL(edac_mc_dump_csrow);
  982. void edac_mc_dump_csrow(struct csrow_info *csrow)
  983. {
  984. debugf4("\tcsrow = %p\n", csrow);
  985. debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx);
  986. debugf4("\tcsrow->first_page = 0x%lx\n",
  987. csrow->first_page);
  988. debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page);
  989. debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask);
  990. debugf4("\tcsrow->nr_pages = 0x%x\n", csrow->nr_pages);
  991. debugf4("\tcsrow->nr_channels = %d\n",
  992. csrow->nr_channels);
  993. debugf4("\tcsrow->channels = %p\n", csrow->channels);
  994. debugf4("\tcsrow->mci = %p\n\n", csrow->mci);
  995. }
  996. EXPORT_SYMBOL(edac_mc_dump_mci);
  997. void edac_mc_dump_mci(struct mem_ctl_info *mci)
  998. {
  999. debugf3("\tmci = %p\n", mci);
  1000. debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap);
  1001. debugf3("\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
  1002. debugf3("\tmci->edac_cap = %lx\n", mci->edac_cap);
  1003. debugf4("\tmci->edac_check = %p\n", mci->edac_check);
  1004. debugf3("\tmci->nr_csrows = %d, csrows = %p\n",
  1005. mci->nr_csrows, mci->csrows);
  1006. debugf3("\tpdev = %p\n", mci->pdev);
  1007. debugf3("\tmod_name:ctl_name = %s:%s\n",
  1008. mci->mod_name, mci->ctl_name);
  1009. debugf3("\tpvt_info = %p\n\n", mci->pvt_info);
  1010. }
  1011. #endif /* CONFIG_EDAC_DEBUG */
  1012. /* 'ptr' points to a possibly unaligned item X such that sizeof(X) is 'size'.
  1013. * Adjust 'ptr' so that its alignment is at least as stringent as what the
  1014. * compiler would provide for X and return the aligned result.
  1015. *
  1016. * If 'size' is a constant, the compiler will optimize this whole function
  1017. * down to either a no-op or the addition of a constant to the value of 'ptr'.
  1018. */
  1019. static inline char * align_ptr (void *ptr, unsigned size)
  1020. {
  1021. unsigned align, r;
  1022. /* Here we assume that the alignment of a "long long" is the most
  1023. * stringent alignment that the compiler will ever provide by default.
  1024. * As far as I know, this is a reasonable assumption.
  1025. */
  1026. if (size > sizeof(long))
  1027. align = sizeof(long long);
  1028. else if (size > sizeof(int))
  1029. align = sizeof(long);
  1030. else if (size > sizeof(short))
  1031. align = sizeof(int);
  1032. else if (size > sizeof(char))
  1033. align = sizeof(short);
  1034. else
  1035. return (char *) ptr;
  1036. r = size % align;
  1037. if (r == 0)
  1038. return (char *) ptr;
  1039. return (char *) (((unsigned long) ptr) + align - r);
  1040. }
  1041. EXPORT_SYMBOL(edac_mc_alloc);
  1042. /**
  1043. * edac_mc_alloc: Allocate a struct mem_ctl_info structure
  1044. * @size_pvt: size of private storage needed
  1045. * @nr_csrows: Number of CWROWS needed for this MC
  1046. * @nr_chans: Number of channels for the MC
  1047. *
  1048. * Everything is kmalloc'ed as one big chunk - more efficient.
  1049. * Only can be used if all structures have the same lifetime - otherwise
  1050. * you have to allocate and initialize your own structures.
  1051. *
  1052. * Use edac_mc_free() to free mc structures allocated by this function.
  1053. *
  1054. * Returns:
  1055. * NULL allocation failed
  1056. * struct mem_ctl_info pointer
  1057. */
  1058. struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
  1059. unsigned nr_chans)
  1060. {
  1061. struct mem_ctl_info *mci;
  1062. struct csrow_info *csi, *csrow;
  1063. struct channel_info *chi, *chp, *chan;
  1064. void *pvt;
  1065. unsigned size;
  1066. int row, chn;
  1067. /* Figure out the offsets of the various items from the start of an mc
  1068. * structure. We want the alignment of each item to be at least as
  1069. * stringent as what the compiler would provide if we could simply
  1070. * hardcode everything into a single struct.
  1071. */
  1072. mci = (struct mem_ctl_info *) 0;
  1073. csi = (struct csrow_info *)align_ptr(&mci[1], sizeof(*csi));
  1074. chi = (struct channel_info *)
  1075. align_ptr(&csi[nr_csrows], sizeof(*chi));
  1076. pvt = align_ptr(&chi[nr_chans * nr_csrows], sz_pvt);
  1077. size = ((unsigned long) pvt) + sz_pvt;
  1078. if ((mci = kmalloc(size, GFP_KERNEL)) == NULL)
  1079. return NULL;
  1080. /* Adjust pointers so they point within the memory we just allocated
  1081. * rather than an imaginary chunk of memory located at address 0.
  1082. */
  1083. csi = (struct csrow_info *) (((char *) mci) + ((unsigned long) csi));
  1084. chi = (struct channel_info *) (((char *) mci) + ((unsigned long) chi));
  1085. pvt = sz_pvt ? (((char *) mci) + ((unsigned long) pvt)) : NULL;
  1086. memset(mci, 0, size); /* clear all fields */
  1087. mci->csrows = csi;
  1088. mci->pvt_info = pvt;
  1089. mci->nr_csrows = nr_csrows;
  1090. for (row = 0; row < nr_csrows; row++) {
  1091. csrow = &csi[row];
  1092. csrow->csrow_idx = row;
  1093. csrow->mci = mci;
  1094. csrow->nr_channels = nr_chans;
  1095. chp = &chi[row * nr_chans];
  1096. csrow->channels = chp;
  1097. for (chn = 0; chn < nr_chans; chn++) {
  1098. chan = &chp[chn];
  1099. chan->chan_idx = chn;
  1100. chan->csrow = csrow;
  1101. }
  1102. }
  1103. return mci;
  1104. }
  1105. EXPORT_SYMBOL(edac_mc_free);
  1106. /**
  1107. * edac_mc_free: Free a previously allocated 'mci' structure
  1108. * @mci: pointer to a struct mem_ctl_info structure
  1109. *
  1110. * Free up a previously allocated mci structure
  1111. * A MCI structure can be in 2 states after being allocated
  1112. * by edac_mc_alloc().
  1113. * 1) Allocated in a MC driver's probe, but not yet committed
  1114. * 2) Allocated and committed, by a call to edac_mc_add_mc()
  1115. * edac_mc_add_mc() is the function that adds the sysfs entries
  1116. * thus, this free function must determine which state the 'mci'
  1117. * structure is in, then either free it directly or
  1118. * perform kobject cleanup by calling edac_remove_sysfs_mci_device().
  1119. *
  1120. * VOID Return
  1121. */
  1122. void edac_mc_free(struct mem_ctl_info *mci)
  1123. {
  1124. /* only if sysfs entries for this mci instance exist
  1125. * do we remove them and defer the actual kfree via
  1126. * the kobject 'release()' callback.
  1127. *
  1128. * Otherwise, do a straight kfree now.
  1129. */
  1130. if (mci->sysfs_active == MCI_SYSFS_ACTIVE)
  1131. edac_remove_sysfs_mci_device(mci);
  1132. else
  1133. kfree(mci);
  1134. }
  1135. EXPORT_SYMBOL(edac_mc_find_mci_by_pdev);
  1136. struct mem_ctl_info *edac_mc_find_mci_by_pdev(struct pci_dev *pdev)
  1137. {
  1138. struct mem_ctl_info *mci;
  1139. struct list_head *item;
  1140. debugf3("%s()\n", __func__);
  1141. list_for_each(item, &mc_devices) {
  1142. mci = list_entry(item, struct mem_ctl_info, link);
  1143. if (mci->pdev == pdev)
  1144. return mci;
  1145. }
  1146. return NULL;
  1147. }
  1148. static int add_mc_to_global_list (struct mem_ctl_info *mci)
  1149. {
  1150. struct list_head *item, *insert_before;
  1151. struct mem_ctl_info *p;
  1152. int i;
  1153. if (list_empty(&mc_devices)) {
  1154. mci->mc_idx = 0;
  1155. insert_before = &mc_devices;
  1156. } else {
  1157. if (edac_mc_find_mci_by_pdev(mci->pdev)) {
  1158. edac_printk(KERN_WARNING, EDAC_MC,
  1159. "%s (%s) %s %s already assigned %d\n",
  1160. mci->pdev->dev.bus_id,
  1161. pci_name(mci->pdev), mci->mod_name,
  1162. mci->ctl_name, mci->mc_idx);
  1163. return 1;
  1164. }
  1165. insert_before = NULL;
  1166. i = 0;
  1167. list_for_each(item, &mc_devices) {
  1168. p = list_entry(item, struct mem_ctl_info, link);
  1169. if (p->mc_idx != i) {
  1170. insert_before = item;
  1171. break;
  1172. }
  1173. i++;
  1174. }
  1175. mci->mc_idx = i;
  1176. if (insert_before == NULL)
  1177. insert_before = &mc_devices;
  1178. }
  1179. list_add_tail_rcu(&mci->link, insert_before);
  1180. return 0;
  1181. }
  1182. static void complete_mc_list_del (struct rcu_head *head)
  1183. {
  1184. struct mem_ctl_info *mci;
  1185. mci = container_of(head, struct mem_ctl_info, rcu);
  1186. INIT_LIST_HEAD(&mci->link);
  1187. complete(&mci->complete);
  1188. }
  1189. static void del_mc_from_global_list (struct mem_ctl_info *mci)
  1190. {
  1191. list_del_rcu(&mci->link);
  1192. init_completion(&mci->complete);
  1193. call_rcu(&mci->rcu, complete_mc_list_del);
  1194. wait_for_completion(&mci->complete);
  1195. }
  1196. EXPORT_SYMBOL(edac_mc_add_mc);
  1197. /**
  1198. * edac_mc_add_mc: Insert the 'mci' structure into the mci global list
  1199. * @mci: pointer to the mci structure to be added to the list
  1200. *
  1201. * Return:
  1202. * 0 Success
  1203. * !0 Failure
  1204. */
  1205. /* FIXME - should a warning be printed if no error detection? correction? */
  1206. int edac_mc_add_mc(struct mem_ctl_info *mci)
  1207. {
  1208. debugf0("%s()\n", __func__);
  1209. #ifdef CONFIG_EDAC_DEBUG
  1210. if (edac_debug_level >= 3)
  1211. edac_mc_dump_mci(mci);
  1212. if (edac_debug_level >= 4) {
  1213. int i;
  1214. for (i = 0; i < mci->nr_csrows; i++) {
  1215. int j;
  1216. edac_mc_dump_csrow(&mci->csrows[i]);
  1217. for (j = 0; j < mci->csrows[i].nr_channels; j++)
  1218. edac_mc_dump_channel(&mci->csrows[i].
  1219. channels[j]);
  1220. }
  1221. }
  1222. #endif
  1223. down(&mem_ctls_mutex);
  1224. if (add_mc_to_global_list(mci))
  1225. goto fail0;
  1226. /* set load time so that error rate can be tracked */
  1227. mci->start_time = jiffies;
  1228. if (edac_create_sysfs_mci_device(mci)) {
  1229. edac_mc_printk(mci, KERN_WARNING,
  1230. "failed to create sysfs device\n");
  1231. goto fail1;
  1232. }
  1233. /* Report action taken */
  1234. edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: PCI %s\n",
  1235. mci->mod_name, mci->ctl_name, pci_name(mci->pdev));
  1236. up(&mem_ctls_mutex);
  1237. return 0;
  1238. fail1:
  1239. del_mc_from_global_list(mci);
  1240. fail0:
  1241. up(&mem_ctls_mutex);
  1242. return 1;
  1243. }
  1244. EXPORT_SYMBOL(edac_mc_del_mc);
  1245. /**
  1246. * edac_mc_del_mc: Remove the specified mci structure from global list
  1247. * @mci: Pointer to struct mem_ctl_info structure
  1248. *
  1249. * Returns:
  1250. * 0 Success
  1251. * 1 Failure
  1252. */
  1253. int edac_mc_del_mc(struct mem_ctl_info *mci)
  1254. {
  1255. int rc = 1;
  1256. debugf0("MC%d: %s()\n", mci->mc_idx, __func__);
  1257. down(&mem_ctls_mutex);
  1258. del_mc_from_global_list(mci);
  1259. edac_printk(KERN_INFO, EDAC_MC,
  1260. "Removed device %d for %s %s: PCI %s\n", mci->mc_idx,
  1261. mci->mod_name, mci->ctl_name, pci_name(mci->pdev));
  1262. rc = 0;
  1263. up(&mem_ctls_mutex);
  1264. return rc;
  1265. }
  1266. EXPORT_SYMBOL(edac_mc_scrub_block);
  1267. void edac_mc_scrub_block(unsigned long page, unsigned long offset,
  1268. u32 size)
  1269. {
  1270. struct page *pg;
  1271. void *virt_addr;
  1272. unsigned long flags = 0;
  1273. debugf3("%s()\n", __func__);
  1274. /* ECC error page was not in our memory. Ignore it. */
  1275. if(!pfn_valid(page))
  1276. return;
  1277. /* Find the actual page structure then map it and fix */
  1278. pg = pfn_to_page(page);
  1279. if (PageHighMem(pg))
  1280. local_irq_save(flags);
  1281. virt_addr = kmap_atomic(pg, KM_BOUNCE_READ);
  1282. /* Perform architecture specific atomic scrub operation */
  1283. atomic_scrub(virt_addr + offset, size);
  1284. /* Unmap and complete */
  1285. kunmap_atomic(virt_addr, KM_BOUNCE_READ);
  1286. if (PageHighMem(pg))
  1287. local_irq_restore(flags);
  1288. }
  1289. /* FIXME - should return -1 */
  1290. EXPORT_SYMBOL(edac_mc_find_csrow_by_page);
  1291. int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci,
  1292. unsigned long page)
  1293. {
  1294. struct csrow_info *csrows = mci->csrows;
  1295. int row, i;
  1296. debugf1("MC%d: %s(): 0x%lx\n", mci->mc_idx, __func__, page);
  1297. row = -1;
  1298. for (i = 0; i < mci->nr_csrows; i++) {
  1299. struct csrow_info *csrow = &csrows[i];
  1300. if (csrow->nr_pages == 0)
  1301. continue;
  1302. debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) "
  1303. "mask(0x%lx)\n", mci->mc_idx, __func__,
  1304. csrow->first_page, page, csrow->last_page,
  1305. csrow->page_mask);
  1306. if ((page >= csrow->first_page) &&
  1307. (page <= csrow->last_page) &&
  1308. ((page & csrow->page_mask) ==
  1309. (csrow->first_page & csrow->page_mask))) {
  1310. row = i;
  1311. break;
  1312. }
  1313. }
  1314. if (row == -1)
  1315. edac_mc_printk(mci, KERN_ERR,
  1316. "could not look up page error address %lx\n",
  1317. (unsigned long) page);
  1318. return row;
  1319. }
  1320. EXPORT_SYMBOL(edac_mc_handle_ce);
  1321. /* FIXME - setable log (warning/emerg) levels */
  1322. /* FIXME - integrate with evlog: http://evlog.sourceforge.net/ */
  1323. void edac_mc_handle_ce(struct mem_ctl_info *mci,
  1324. unsigned long page_frame_number,
  1325. unsigned long offset_in_page,
  1326. unsigned long syndrome, int row, int channel,
  1327. const char *msg)
  1328. {
  1329. unsigned long remapped_page;
  1330. debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
  1331. /* FIXME - maybe make panic on INTERNAL ERROR an option */
  1332. if (row >= mci->nr_csrows || row < 0) {
  1333. /* something is wrong */
  1334. edac_mc_printk(mci, KERN_ERR,
  1335. "INTERNAL ERROR: row out of range "
  1336. "(%d >= %d)\n", row, mci->nr_csrows);
  1337. edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
  1338. return;
  1339. }
  1340. if (channel >= mci->csrows[row].nr_channels || channel < 0) {
  1341. /* something is wrong */
  1342. edac_mc_printk(mci, KERN_ERR,
  1343. "INTERNAL ERROR: channel out of range "
  1344. "(%d >= %d)\n", channel,
  1345. mci->csrows[row].nr_channels);
  1346. edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
  1347. return;
  1348. }
  1349. if (log_ce)
  1350. /* FIXME - put in DIMM location */
  1351. edac_mc_printk(mci, KERN_WARNING,
  1352. "CE page 0x%lx, offset 0x%lx, grain %d, syndrome "
  1353. "0x%lx, row %d, channel %d, label \"%s\": %s\n",
  1354. page_frame_number, offset_in_page,
  1355. mci->csrows[row].grain, syndrome, row, channel,
  1356. mci->csrows[row].channels[channel].label, msg);
  1357. mci->ce_count++;
  1358. mci->csrows[row].ce_count++;
  1359. mci->csrows[row].channels[channel].ce_count++;
  1360. if (mci->scrub_mode & SCRUB_SW_SRC) {
  1361. /*
  1362. * Some MC's can remap memory so that it is still available
  1363. * at a different address when PCI devices map into memory.
  1364. * MC's that can't do this lose the memory where PCI devices
  1365. * are mapped. This mapping is MC dependant and so we call
  1366. * back into the MC driver for it to map the MC page to
  1367. * a physical (CPU) page which can then be mapped to a virtual
  1368. * page - which can then be scrubbed.
  1369. */
  1370. remapped_page = mci->ctl_page_to_phys ?
  1371. mci->ctl_page_to_phys(mci, page_frame_number) :
  1372. page_frame_number;
  1373. edac_mc_scrub_block(remapped_page, offset_in_page,
  1374. mci->csrows[row].grain);
  1375. }
  1376. }
  1377. EXPORT_SYMBOL(edac_mc_handle_ce_no_info);
  1378. void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci,
  1379. const char *msg)
  1380. {
  1381. if (log_ce)
  1382. edac_mc_printk(mci, KERN_WARNING,
  1383. "CE - no information available: %s\n", msg);
  1384. mci->ce_noinfo_count++;
  1385. mci->ce_count++;
  1386. }
  1387. EXPORT_SYMBOL(edac_mc_handle_ue);
  1388. void edac_mc_handle_ue(struct mem_ctl_info *mci,
  1389. unsigned long page_frame_number,
  1390. unsigned long offset_in_page, int row,
  1391. const char *msg)
  1392. {
  1393. int len = EDAC_MC_LABEL_LEN * 4;
  1394. char labels[len + 1];
  1395. char *pos = labels;
  1396. int chan;
  1397. int chars;
  1398. debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
  1399. /* FIXME - maybe make panic on INTERNAL ERROR an option */
  1400. if (row >= mci->nr_csrows || row < 0) {
  1401. /* something is wrong */
  1402. edac_mc_printk(mci, KERN_ERR,
  1403. "INTERNAL ERROR: row out of range "
  1404. "(%d >= %d)\n", row, mci->nr_csrows);
  1405. edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR");
  1406. return;
  1407. }
  1408. chars = snprintf(pos, len + 1, "%s",
  1409. mci->csrows[row].channels[0].label);
  1410. len -= chars;
  1411. pos += chars;
  1412. for (chan = 1; (chan < mci->csrows[row].nr_channels) && (len > 0);
  1413. chan++) {
  1414. chars = snprintf(pos, len + 1, ":%s",
  1415. mci->csrows[row].channels[chan].label);
  1416. len -= chars;
  1417. pos += chars;
  1418. }
  1419. if (log_ue)
  1420. edac_mc_printk(mci, KERN_EMERG,
  1421. "UE page 0x%lx, offset 0x%lx, grain %d, row %d, "
  1422. "labels \"%s\": %s\n", page_frame_number,
  1423. offset_in_page, mci->csrows[row].grain, row, labels,
  1424. msg);
  1425. if (panic_on_ue)
  1426. panic
  1427. ("EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, row %d,"
  1428. " labels \"%s\": %s\n", mci->mc_idx,
  1429. page_frame_number, offset_in_page,
  1430. mci->csrows[row].grain, row, labels, msg);
  1431. mci->ue_count++;
  1432. mci->csrows[row].ue_count++;
  1433. }
  1434. EXPORT_SYMBOL(edac_mc_handle_ue_no_info);
  1435. void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci,
  1436. const char *msg)
  1437. {
  1438. if (panic_on_ue)
  1439. panic("EDAC MC%d: Uncorrected Error", mci->mc_idx);
  1440. if (log_ue)
  1441. edac_mc_printk(mci, KERN_WARNING,
  1442. "UE - no information available: %s\n", msg);
  1443. mci->ue_noinfo_count++;
  1444. mci->ue_count++;
  1445. }
  1446. #ifdef CONFIG_PCI
  1447. static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
  1448. {
  1449. int where;
  1450. u16 status;
  1451. where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
  1452. pci_read_config_word(dev, where, &status);
  1453. /* If we get back 0xFFFF then we must suspect that the card has been pulled but
  1454. the Linux PCI layer has not yet finished cleaning up. We don't want to report
  1455. on such devices */
  1456. if (status == 0xFFFF) {
  1457. u32 sanity;
  1458. pci_read_config_dword(dev, 0, &sanity);
  1459. if (sanity == 0xFFFFFFFF)
  1460. return 0;
  1461. }
  1462. status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
  1463. PCI_STATUS_PARITY;
  1464. if (status)
  1465. /* reset only the bits we are interested in */
  1466. pci_write_config_word(dev, where, status);
  1467. return status;
  1468. }
  1469. typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
  1470. /* Clear any PCI parity errors logged by this device. */
  1471. static void edac_pci_dev_parity_clear( struct pci_dev *dev )
  1472. {
  1473. u8 header_type;
  1474. get_pci_parity_status(dev, 0);
  1475. /* read the device TYPE, looking for bridges */
  1476. pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
  1477. if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
  1478. get_pci_parity_status(dev, 1);
  1479. }
  1480. /*
  1481. * PCI Parity polling
  1482. *
  1483. */
  1484. static void edac_pci_dev_parity_test(struct pci_dev *dev)
  1485. {
  1486. u16 status;
  1487. u8 header_type;
  1488. /* read the STATUS register on this device
  1489. */
  1490. status = get_pci_parity_status(dev, 0);
  1491. debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id );
  1492. /* check the status reg for errors */
  1493. if (status) {
  1494. if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
  1495. edac_printk(KERN_CRIT, EDAC_PCI,
  1496. "Signaled System Error on %s\n",
  1497. pci_name(dev));
  1498. if (status & (PCI_STATUS_PARITY)) {
  1499. edac_printk(KERN_CRIT, EDAC_PCI,
  1500. "Master Data Parity Error on %s\n",
  1501. pci_name(dev));
  1502. atomic_inc(&pci_parity_count);
  1503. }
  1504. if (status & (PCI_STATUS_DETECTED_PARITY)) {
  1505. edac_printk(KERN_CRIT, EDAC_PCI,
  1506. "Detected Parity Error on %s\n",
  1507. pci_name(dev));
  1508. atomic_inc(&pci_parity_count);
  1509. }
  1510. }
  1511. /* read the device TYPE, looking for bridges */
  1512. pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
  1513. debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id );
  1514. if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
  1515. /* On bridges, need to examine secondary status register */
  1516. status = get_pci_parity_status(dev, 1);
  1517. debugf2("PCI SEC_STATUS= 0x%04x %s\n",
  1518. status, dev->dev.bus_id );
  1519. /* check the secondary status reg for errors */
  1520. if (status) {
  1521. if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
  1522. edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
  1523. "Signaled System Error on %s\n",
  1524. pci_name(dev));
  1525. if (status & (PCI_STATUS_PARITY)) {
  1526. edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
  1527. "Master Data Parity Error on "
  1528. "%s\n", pci_name(dev));
  1529. atomic_inc(&pci_parity_count);
  1530. }
  1531. if (status & (PCI_STATUS_DETECTED_PARITY)) {
  1532. edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
  1533. "Detected Parity Error on %s\n",
  1534. pci_name(dev));
  1535. atomic_inc(&pci_parity_count);
  1536. }
  1537. }
  1538. }
  1539. }
  1540. /*
  1541. * check_dev_on_list: Scan for a PCI device on a white/black list
  1542. * @list: an EDAC &edac_pci_device_list white/black list pointer
  1543. * @free_index: index of next free entry on the list
  1544. * @pci_dev: PCI Device pointer
  1545. *
  1546. * see if list contains the device.
  1547. *
  1548. * Returns: 0 not found
  1549. * 1 found on list
  1550. */
  1551. static int check_dev_on_list(struct edac_pci_device_list *list, int free_index,
  1552. struct pci_dev *dev)
  1553. {
  1554. int i;
  1555. int rc = 0; /* Assume not found */
  1556. unsigned short vendor=dev->vendor;
  1557. unsigned short device=dev->device;
  1558. /* Scan the list, looking for a vendor/device match
  1559. */
  1560. for (i = 0; i < free_index; i++, list++ ) {
  1561. if ( (list->vendor == vendor ) &&
  1562. (list->device == device )) {
  1563. rc = 1;
  1564. break;
  1565. }
  1566. }
  1567. return rc;
  1568. }
  1569. /*
  1570. * pci_dev parity list iterator
  1571. * Scan the PCI device list for one iteration, looking for SERRORs
  1572. * Master Parity ERRORS or Parity ERRORs on primary or secondary devices
  1573. */
  1574. static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
  1575. {
  1576. struct pci_dev *dev=NULL;
  1577. /* request for kernel access to the next PCI device, if any,
  1578. * and while we are looking at it have its reference count
  1579. * bumped until we are done with it
  1580. */
  1581. while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
  1582. /* if whitelist exists then it has priority, so only scan those
  1583. * devices on the whitelist
  1584. */
  1585. if (pci_whitelist_count > 0 ) {
  1586. if (check_dev_on_list(pci_whitelist,
  1587. pci_whitelist_count, dev))
  1588. fn(dev);
  1589. } else {
  1590. /*
  1591. * if no whitelist, then check if this devices is
  1592. * blacklisted
  1593. */
  1594. if (!check_dev_on_list(pci_blacklist,
  1595. pci_blacklist_count, dev))
  1596. fn(dev);
  1597. }
  1598. }
  1599. }
  1600. static void do_pci_parity_check(void)
  1601. {
  1602. unsigned long flags;
  1603. int before_count;
  1604. debugf3("%s()\n", __func__);
  1605. if (!check_pci_parity)
  1606. return;
  1607. before_count = atomic_read(&pci_parity_count);
  1608. /* scan all PCI devices looking for a Parity Error on devices and
  1609. * bridges
  1610. */
  1611. local_irq_save(flags);
  1612. edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
  1613. local_irq_restore(flags);
  1614. /* Only if operator has selected panic on PCI Error */
  1615. if (panic_on_pci_parity) {
  1616. /* If the count is different 'after' from 'before' */
  1617. if (before_count != atomic_read(&pci_parity_count))
  1618. panic("EDAC: PCI Parity Error");
  1619. }
  1620. }
  1621. static inline void clear_pci_parity_errors(void)
  1622. {
  1623. /* Clear any PCI bus parity errors that devices initially have logged
  1624. * in their registers.
  1625. */
  1626. edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
  1627. }
  1628. #else /* CONFIG_PCI */
  1629. static inline void do_pci_parity_check(void)
  1630. {
  1631. /* no-op */
  1632. }
  1633. static inline void clear_pci_parity_errors(void)
  1634. {
  1635. /* no-op */
  1636. }
  1637. #endif /* CONFIG_PCI */
  1638. /*
  1639. * Iterate over all MC instances and check for ECC, et al, errors
  1640. */
  1641. static inline void check_mc_devices (void)
  1642. {
  1643. unsigned long flags;
  1644. struct list_head *item;
  1645. struct mem_ctl_info *mci;
  1646. debugf3("%s()\n", __func__);
  1647. /* during poll, have interrupts off */
  1648. local_irq_save(flags);
  1649. list_for_each(item, &mc_devices) {
  1650. mci = list_entry(item, struct mem_ctl_info, link);
  1651. if (mci->edac_check != NULL)
  1652. mci->edac_check(mci);
  1653. }
  1654. local_irq_restore(flags);
  1655. }
  1656. /*
  1657. * Check MC status every poll_msec.
  1658. * Check PCI status every poll_msec as well.
  1659. *
  1660. * This where the work gets done for edac.
  1661. *
  1662. * SMP safe, doesn't use NMI, and auto-rate-limits.
  1663. */
  1664. static void do_edac_check(void)
  1665. {
  1666. debugf3("%s()\n", __func__);
  1667. check_mc_devices();
  1668. do_pci_parity_check();
  1669. }
  1670. static int edac_kernel_thread(void *arg)
  1671. {
  1672. while (!kthread_should_stop()) {
  1673. do_edac_check();
  1674. /* goto sleep for the interval */
  1675. schedule_timeout_interruptible((HZ * poll_msec) / 1000);
  1676. try_to_freeze();
  1677. }
  1678. return 0;
  1679. }
  1680. /*
  1681. * edac_mc_init
  1682. * module initialization entry point
  1683. */
  1684. static int __init edac_mc_init(void)
  1685. {
  1686. edac_printk(KERN_INFO, EDAC_MC, EDAC_MC_VERSION "\n");
  1687. /*
  1688. * Harvest and clear any boot/initialization PCI parity errors
  1689. *
  1690. * FIXME: This only clears errors logged by devices present at time of
  1691. * module initialization. We should also do an initial clear
  1692. * of each newly hotplugged device.
  1693. */
  1694. clear_pci_parity_errors();
  1695. /* Create the MC sysfs entires */
  1696. if (edac_sysfs_memctrl_setup()) {
  1697. edac_printk(KERN_ERR, EDAC_MC,
  1698. "Error initializing sysfs code\n");
  1699. return -ENODEV;
  1700. }
  1701. /* Create the PCI parity sysfs entries */
  1702. if (edac_sysfs_pci_setup()) {
  1703. edac_sysfs_memctrl_teardown();
  1704. edac_printk(KERN_ERR, EDAC_MC,
  1705. "EDAC PCI: Error initializing sysfs code\n");
  1706. return -ENODEV;
  1707. }
  1708. /* create our kernel thread */
  1709. edac_thread = kthread_run(edac_kernel_thread, NULL, "kedac");
  1710. if (IS_ERR(edac_thread)) {
  1711. /* remove the sysfs entries */
  1712. edac_sysfs_memctrl_teardown();
  1713. edac_sysfs_pci_teardown();
  1714. return PTR_ERR(edac_thread);
  1715. }
  1716. return 0;
  1717. }
  1718. /*
  1719. * edac_mc_exit()
  1720. * module exit/termination functioni
  1721. */
  1722. static void __exit edac_mc_exit(void)
  1723. {
  1724. debugf0("%s()\n", __func__);
  1725. kthread_stop(edac_thread);
  1726. /* tear down the sysfs device */
  1727. edac_sysfs_memctrl_teardown();
  1728. edac_sysfs_pci_teardown();
  1729. }
  1730. module_init(edac_mc_init);
  1731. module_exit(edac_mc_exit);
  1732. MODULE_LICENSE("GPL");
  1733. MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n"
  1734. "Based on.work by Dan Hollis et al");
  1735. MODULE_DESCRIPTION("Core library routines for MC reporting");
  1736. module_param(panic_on_ue, int, 0644);
  1737. MODULE_PARM_DESC(panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
  1738. module_param(check_pci_parity, int, 0644);
  1739. MODULE_PARM_DESC(check_pci_parity, "Check for PCI bus parity errors: 0=off 1=on");
  1740. module_param(panic_on_pci_parity, int, 0644);
  1741. MODULE_PARM_DESC(panic_on_pci_parity, "Panic on PCI Bus Parity error: 0=off 1=on");
  1742. module_param(log_ue, int, 0644);
  1743. MODULE_PARM_DESC(log_ue, "Log uncorrectable error to console: 0=off 1=on");
  1744. module_param(log_ce, int, 0644);
  1745. MODULE_PARM_DESC(log_ce, "Log correctable error to console: 0=off 1=on");
  1746. module_param(poll_msec, int, 0644);
  1747. MODULE_PARM_DESC(poll_msec, "Polling period in milliseconds");
  1748. #ifdef CONFIG_EDAC_DEBUG
  1749. module_param(edac_debug_level, int, 0644);
  1750. MODULE_PARM_DESC(edac_debug_level, "Debug level");
  1751. #endif