esp_scsi.c 64 KB

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  1. /* esp_scsi.c: ESP SCSI driver.
  2. *
  3. * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/types.h>
  7. #include <linux/slab.h>
  8. #include <linux/delay.h>
  9. #include <linux/list.h>
  10. #include <linux/completion.h>
  11. #include <linux/kallsyms.h>
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/init.h>
  15. #include <asm/irq.h>
  16. #include <asm/io.h>
  17. #include <asm/dma.h>
  18. #include <scsi/scsi.h>
  19. #include <scsi/scsi_host.h>
  20. #include <scsi/scsi_cmnd.h>
  21. #include <scsi/scsi_device.h>
  22. #include <scsi/scsi_tcq.h>
  23. #include <scsi/scsi_dbg.h>
  24. #include <scsi/scsi_transport_spi.h>
  25. #include "esp_scsi.h"
  26. #define DRV_MODULE_NAME "esp"
  27. #define PFX DRV_MODULE_NAME ": "
  28. #define DRV_VERSION "2.000"
  29. #define DRV_MODULE_RELDATE "April 19, 2007"
  30. /* SCSI bus reset settle time in seconds. */
  31. static int esp_bus_reset_settle = 3;
  32. static u32 esp_debug;
  33. #define ESP_DEBUG_INTR 0x00000001
  34. #define ESP_DEBUG_SCSICMD 0x00000002
  35. #define ESP_DEBUG_RESET 0x00000004
  36. #define ESP_DEBUG_MSGIN 0x00000008
  37. #define ESP_DEBUG_MSGOUT 0x00000010
  38. #define ESP_DEBUG_CMDDONE 0x00000020
  39. #define ESP_DEBUG_DISCONNECT 0x00000040
  40. #define ESP_DEBUG_DATASTART 0x00000080
  41. #define ESP_DEBUG_DATADONE 0x00000100
  42. #define ESP_DEBUG_RECONNECT 0x00000200
  43. #define ESP_DEBUG_AUTOSENSE 0x00000400
  44. #define esp_log_intr(f, a...) \
  45. do { if (esp_debug & ESP_DEBUG_INTR) \
  46. printk(f, ## a); \
  47. } while (0)
  48. #define esp_log_reset(f, a...) \
  49. do { if (esp_debug & ESP_DEBUG_RESET) \
  50. printk(f, ## a); \
  51. } while (0)
  52. #define esp_log_msgin(f, a...) \
  53. do { if (esp_debug & ESP_DEBUG_MSGIN) \
  54. printk(f, ## a); \
  55. } while (0)
  56. #define esp_log_msgout(f, a...) \
  57. do { if (esp_debug & ESP_DEBUG_MSGOUT) \
  58. printk(f, ## a); \
  59. } while (0)
  60. #define esp_log_cmddone(f, a...) \
  61. do { if (esp_debug & ESP_DEBUG_CMDDONE) \
  62. printk(f, ## a); \
  63. } while (0)
  64. #define esp_log_disconnect(f, a...) \
  65. do { if (esp_debug & ESP_DEBUG_DISCONNECT) \
  66. printk(f, ## a); \
  67. } while (0)
  68. #define esp_log_datastart(f, a...) \
  69. do { if (esp_debug & ESP_DEBUG_DATASTART) \
  70. printk(f, ## a); \
  71. } while (0)
  72. #define esp_log_datadone(f, a...) \
  73. do { if (esp_debug & ESP_DEBUG_DATADONE) \
  74. printk(f, ## a); \
  75. } while (0)
  76. #define esp_log_reconnect(f, a...) \
  77. do { if (esp_debug & ESP_DEBUG_RECONNECT) \
  78. printk(f, ## a); \
  79. } while (0)
  80. #define esp_log_autosense(f, a...) \
  81. do { if (esp_debug & ESP_DEBUG_AUTOSENSE) \
  82. printk(f, ## a); \
  83. } while (0)
  84. #define esp_read8(REG) esp->ops->esp_read8(esp, REG)
  85. #define esp_write8(VAL,REG) esp->ops->esp_write8(esp, VAL, REG)
  86. static void esp_log_fill_regs(struct esp *esp,
  87. struct esp_event_ent *p)
  88. {
  89. p->sreg = esp->sreg;
  90. p->seqreg = esp->seqreg;
  91. p->sreg2 = esp->sreg2;
  92. p->ireg = esp->ireg;
  93. p->select_state = esp->select_state;
  94. p->event = esp->event;
  95. }
  96. void scsi_esp_cmd(struct esp *esp, u8 val)
  97. {
  98. struct esp_event_ent *p;
  99. int idx = esp->esp_event_cur;
  100. p = &esp->esp_event_log[idx];
  101. p->type = ESP_EVENT_TYPE_CMD;
  102. p->val = val;
  103. esp_log_fill_regs(esp, p);
  104. esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
  105. esp_write8(val, ESP_CMD);
  106. }
  107. EXPORT_SYMBOL(scsi_esp_cmd);
  108. static void esp_event(struct esp *esp, u8 val)
  109. {
  110. struct esp_event_ent *p;
  111. int idx = esp->esp_event_cur;
  112. p = &esp->esp_event_log[idx];
  113. p->type = ESP_EVENT_TYPE_EVENT;
  114. p->val = val;
  115. esp_log_fill_regs(esp, p);
  116. esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
  117. esp->event = val;
  118. }
  119. static void esp_dump_cmd_log(struct esp *esp)
  120. {
  121. int idx = esp->esp_event_cur;
  122. int stop = idx;
  123. printk(KERN_INFO PFX "esp%d: Dumping command log\n",
  124. esp->host->unique_id);
  125. do {
  126. struct esp_event_ent *p = &esp->esp_event_log[idx];
  127. printk(KERN_INFO PFX "esp%d: ent[%d] %s ",
  128. esp->host->unique_id, idx,
  129. p->type == ESP_EVENT_TYPE_CMD ? "CMD" : "EVENT");
  130. printk("val[%02x] sreg[%02x] seqreg[%02x] "
  131. "sreg2[%02x] ireg[%02x] ss[%02x] event[%02x]\n",
  132. p->val, p->sreg, p->seqreg,
  133. p->sreg2, p->ireg, p->select_state, p->event);
  134. idx = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
  135. } while (idx != stop);
  136. }
  137. static void esp_flush_fifo(struct esp *esp)
  138. {
  139. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  140. if (esp->rev == ESP236) {
  141. int lim = 1000;
  142. while (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES) {
  143. if (--lim == 0) {
  144. printk(KERN_ALERT PFX "esp%d: ESP_FF_BYTES "
  145. "will not clear!\n",
  146. esp->host->unique_id);
  147. break;
  148. }
  149. udelay(1);
  150. }
  151. }
  152. }
  153. static void hme_read_fifo(struct esp *esp)
  154. {
  155. int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  156. int idx = 0;
  157. while (fcnt--) {
  158. esp->fifo[idx++] = esp_read8(ESP_FDATA);
  159. esp->fifo[idx++] = esp_read8(ESP_FDATA);
  160. }
  161. if (esp->sreg2 & ESP_STAT2_F1BYTE) {
  162. esp_write8(0, ESP_FDATA);
  163. esp->fifo[idx++] = esp_read8(ESP_FDATA);
  164. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  165. }
  166. esp->fifo_cnt = idx;
  167. }
  168. static void esp_set_all_config3(struct esp *esp, u8 val)
  169. {
  170. int i;
  171. for (i = 0; i < ESP_MAX_TARGET; i++)
  172. esp->target[i].esp_config3 = val;
  173. }
  174. /* Reset the ESP chip, _not_ the SCSI bus. */
  175. static void esp_reset_esp(struct esp *esp)
  176. {
  177. u8 family_code, version;
  178. /* Now reset the ESP chip */
  179. scsi_esp_cmd(esp, ESP_CMD_RC);
  180. scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
  181. scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
  182. /* Reload the configuration registers */
  183. esp_write8(esp->cfact, ESP_CFACT);
  184. esp->prev_stp = 0;
  185. esp_write8(esp->prev_stp, ESP_STP);
  186. esp->prev_soff = 0;
  187. esp_write8(esp->prev_soff, ESP_SOFF);
  188. esp_write8(esp->neg_defp, ESP_TIMEO);
  189. /* This is the only point at which it is reliable to read
  190. * the ID-code for a fast ESP chip variants.
  191. */
  192. esp->max_period = ((35 * esp->ccycle) / 1000);
  193. if (esp->rev == FAST) {
  194. version = esp_read8(ESP_UID);
  195. family_code = (version & 0xf8) >> 3;
  196. if (family_code == 0x02)
  197. esp->rev = FAS236;
  198. else if (family_code == 0x0a)
  199. esp->rev = FASHME; /* Version is usually '5'. */
  200. else
  201. esp->rev = FAS100A;
  202. esp->min_period = ((4 * esp->ccycle) / 1000);
  203. } else {
  204. esp->min_period = ((5 * esp->ccycle) / 1000);
  205. }
  206. esp->max_period = (esp->max_period + 3)>>2;
  207. esp->min_period = (esp->min_period + 3)>>2;
  208. esp_write8(esp->config1, ESP_CFG1);
  209. switch (esp->rev) {
  210. case ESP100:
  211. /* nothing to do */
  212. break;
  213. case ESP100A:
  214. esp_write8(esp->config2, ESP_CFG2);
  215. break;
  216. case ESP236:
  217. /* Slow 236 */
  218. esp_write8(esp->config2, ESP_CFG2);
  219. esp->prev_cfg3 = esp->target[0].esp_config3;
  220. esp_write8(esp->prev_cfg3, ESP_CFG3);
  221. break;
  222. case FASHME:
  223. esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
  224. /* fallthrough... */
  225. case FAS236:
  226. /* Fast 236 or HME */
  227. esp_write8(esp->config2, ESP_CFG2);
  228. if (esp->rev == FASHME) {
  229. u8 cfg3 = esp->target[0].esp_config3;
  230. cfg3 |= ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH;
  231. if (esp->scsi_id >= 8)
  232. cfg3 |= ESP_CONFIG3_IDBIT3;
  233. esp_set_all_config3(esp, cfg3);
  234. } else {
  235. u32 cfg3 = esp->target[0].esp_config3;
  236. cfg3 |= ESP_CONFIG3_FCLK;
  237. esp_set_all_config3(esp, cfg3);
  238. }
  239. esp->prev_cfg3 = esp->target[0].esp_config3;
  240. esp_write8(esp->prev_cfg3, ESP_CFG3);
  241. if (esp->rev == FASHME) {
  242. esp->radelay = 80;
  243. } else {
  244. if (esp->flags & ESP_FLAG_DIFFERENTIAL)
  245. esp->radelay = 0;
  246. else
  247. esp->radelay = 96;
  248. }
  249. break;
  250. case FAS100A:
  251. /* Fast 100a */
  252. esp_write8(esp->config2, ESP_CFG2);
  253. esp_set_all_config3(esp,
  254. (esp->target[0].esp_config3 |
  255. ESP_CONFIG3_FCLOCK));
  256. esp->prev_cfg3 = esp->target[0].esp_config3;
  257. esp_write8(esp->prev_cfg3, ESP_CFG3);
  258. esp->radelay = 32;
  259. break;
  260. default:
  261. break;
  262. }
  263. /* Eat any bitrot in the chip */
  264. esp_read8(ESP_INTRPT);
  265. udelay(100);
  266. }
  267. static void esp_map_dma(struct esp *esp, struct scsi_cmnd *cmd)
  268. {
  269. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  270. struct scatterlist *sg = cmd->request_buffer;
  271. int dir = cmd->sc_data_direction;
  272. int total, i;
  273. if (dir == DMA_NONE)
  274. return;
  275. BUG_ON(cmd->use_sg == 0);
  276. spriv->u.num_sg = esp->ops->map_sg(esp, sg,
  277. cmd->use_sg, dir);
  278. spriv->cur_residue = sg_dma_len(sg);
  279. spriv->cur_sg = sg;
  280. total = 0;
  281. for (i = 0; i < spriv->u.num_sg; i++)
  282. total += sg_dma_len(&sg[i]);
  283. spriv->tot_residue = total;
  284. }
  285. static dma_addr_t esp_cur_dma_addr(struct esp_cmd_entry *ent,
  286. struct scsi_cmnd *cmd)
  287. {
  288. struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
  289. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  290. return ent->sense_dma +
  291. (ent->sense_ptr - cmd->sense_buffer);
  292. }
  293. return sg_dma_address(p->cur_sg) +
  294. (sg_dma_len(p->cur_sg) -
  295. p->cur_residue);
  296. }
  297. static unsigned int esp_cur_dma_len(struct esp_cmd_entry *ent,
  298. struct scsi_cmnd *cmd)
  299. {
  300. struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
  301. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  302. return SCSI_SENSE_BUFFERSIZE -
  303. (ent->sense_ptr - cmd->sense_buffer);
  304. }
  305. return p->cur_residue;
  306. }
  307. static void esp_advance_dma(struct esp *esp, struct esp_cmd_entry *ent,
  308. struct scsi_cmnd *cmd, unsigned int len)
  309. {
  310. struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
  311. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  312. ent->sense_ptr += len;
  313. return;
  314. }
  315. p->cur_residue -= len;
  316. p->tot_residue -= len;
  317. if (p->cur_residue < 0 || p->tot_residue < 0) {
  318. printk(KERN_ERR PFX "esp%d: Data transfer overflow.\n",
  319. esp->host->unique_id);
  320. printk(KERN_ERR PFX "esp%d: cur_residue[%d] tot_residue[%d] "
  321. "len[%u]\n",
  322. esp->host->unique_id,
  323. p->cur_residue, p->tot_residue, len);
  324. p->cur_residue = 0;
  325. p->tot_residue = 0;
  326. }
  327. if (!p->cur_residue && p->tot_residue) {
  328. p->cur_sg++;
  329. p->cur_residue = sg_dma_len(p->cur_sg);
  330. }
  331. }
  332. static void esp_unmap_dma(struct esp *esp, struct scsi_cmnd *cmd)
  333. {
  334. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  335. int dir = cmd->sc_data_direction;
  336. if (dir == DMA_NONE)
  337. return;
  338. esp->ops->unmap_sg(esp, cmd->request_buffer,
  339. spriv->u.num_sg, dir);
  340. }
  341. static void esp_save_pointers(struct esp *esp, struct esp_cmd_entry *ent)
  342. {
  343. struct scsi_cmnd *cmd = ent->cmd;
  344. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  345. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  346. ent->saved_sense_ptr = ent->sense_ptr;
  347. return;
  348. }
  349. ent->saved_cur_residue = spriv->cur_residue;
  350. ent->saved_cur_sg = spriv->cur_sg;
  351. ent->saved_tot_residue = spriv->tot_residue;
  352. }
  353. static void esp_restore_pointers(struct esp *esp, struct esp_cmd_entry *ent)
  354. {
  355. struct scsi_cmnd *cmd = ent->cmd;
  356. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  357. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  358. ent->sense_ptr = ent->saved_sense_ptr;
  359. return;
  360. }
  361. spriv->cur_residue = ent->saved_cur_residue;
  362. spriv->cur_sg = ent->saved_cur_sg;
  363. spriv->tot_residue = ent->saved_tot_residue;
  364. }
  365. static void esp_check_command_len(struct esp *esp, struct scsi_cmnd *cmd)
  366. {
  367. if (cmd->cmd_len == 6 ||
  368. cmd->cmd_len == 10 ||
  369. cmd->cmd_len == 12) {
  370. esp->flags &= ~ESP_FLAG_DOING_SLOWCMD;
  371. } else {
  372. esp->flags |= ESP_FLAG_DOING_SLOWCMD;
  373. }
  374. }
  375. static void esp_write_tgt_config3(struct esp *esp, int tgt)
  376. {
  377. if (esp->rev > ESP100A) {
  378. u8 val = esp->target[tgt].esp_config3;
  379. if (val != esp->prev_cfg3) {
  380. esp->prev_cfg3 = val;
  381. esp_write8(val, ESP_CFG3);
  382. }
  383. }
  384. }
  385. static void esp_write_tgt_sync(struct esp *esp, int tgt)
  386. {
  387. u8 off = esp->target[tgt].esp_offset;
  388. u8 per = esp->target[tgt].esp_period;
  389. if (off != esp->prev_soff) {
  390. esp->prev_soff = off;
  391. esp_write8(off, ESP_SOFF);
  392. }
  393. if (per != esp->prev_stp) {
  394. esp->prev_stp = per;
  395. esp_write8(per, ESP_STP);
  396. }
  397. }
  398. static u32 esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
  399. {
  400. if (esp->rev == FASHME) {
  401. /* Arbitrary segment boundaries, 24-bit counts. */
  402. if (dma_len > (1U << 24))
  403. dma_len = (1U << 24);
  404. } else {
  405. u32 base, end;
  406. /* ESP chip limits other variants by 16-bits of transfer
  407. * count. Actually on FAS100A and FAS236 we could get
  408. * 24-bits of transfer count by enabling ESP_CONFIG2_FENAB
  409. * in the ESP_CFG2 register but that causes other unwanted
  410. * changes so we don't use it currently.
  411. */
  412. if (dma_len > (1U << 16))
  413. dma_len = (1U << 16);
  414. /* All of the DMA variants hooked up to these chips
  415. * cannot handle crossing a 24-bit address boundary.
  416. */
  417. base = dma_addr & ((1U << 24) - 1U);
  418. end = base + dma_len;
  419. if (end > (1U << 24))
  420. end = (1U <<24);
  421. dma_len = end - base;
  422. }
  423. return dma_len;
  424. }
  425. static int esp_need_to_nego_wide(struct esp_target_data *tp)
  426. {
  427. struct scsi_target *target = tp->starget;
  428. return spi_width(target) != tp->nego_goal_width;
  429. }
  430. static int esp_need_to_nego_sync(struct esp_target_data *tp)
  431. {
  432. struct scsi_target *target = tp->starget;
  433. /* When offset is zero, period is "don't care". */
  434. if (!spi_offset(target) && !tp->nego_goal_offset)
  435. return 0;
  436. if (spi_offset(target) == tp->nego_goal_offset &&
  437. spi_period(target) == tp->nego_goal_period)
  438. return 0;
  439. return 1;
  440. }
  441. static int esp_alloc_lun_tag(struct esp_cmd_entry *ent,
  442. struct esp_lun_data *lp)
  443. {
  444. if (!ent->tag[0]) {
  445. /* Non-tagged, slot already taken? */
  446. if (lp->non_tagged_cmd)
  447. return -EBUSY;
  448. if (lp->hold) {
  449. /* We are being held by active tagged
  450. * commands.
  451. */
  452. if (lp->num_tagged)
  453. return -EBUSY;
  454. /* Tagged commands completed, we can unplug
  455. * the queue and run this untagged command.
  456. */
  457. lp->hold = 0;
  458. } else if (lp->num_tagged) {
  459. /* Plug the queue until num_tagged decreases
  460. * to zero in esp_free_lun_tag.
  461. */
  462. lp->hold = 1;
  463. return -EBUSY;
  464. }
  465. lp->non_tagged_cmd = ent;
  466. return 0;
  467. } else {
  468. /* Tagged command, see if blocked by a
  469. * non-tagged one.
  470. */
  471. if (lp->non_tagged_cmd || lp->hold)
  472. return -EBUSY;
  473. }
  474. BUG_ON(lp->tagged_cmds[ent->tag[1]]);
  475. lp->tagged_cmds[ent->tag[1]] = ent;
  476. lp->num_tagged++;
  477. return 0;
  478. }
  479. static void esp_free_lun_tag(struct esp_cmd_entry *ent,
  480. struct esp_lun_data *lp)
  481. {
  482. if (ent->tag[0]) {
  483. BUG_ON(lp->tagged_cmds[ent->tag[1]] != ent);
  484. lp->tagged_cmds[ent->tag[1]] = NULL;
  485. lp->num_tagged--;
  486. } else {
  487. BUG_ON(lp->non_tagged_cmd != ent);
  488. lp->non_tagged_cmd = NULL;
  489. }
  490. }
  491. /* When a contingent allegiance conditon is created, we force feed a
  492. * REQUEST_SENSE command to the device to fetch the sense data. I
  493. * tried many other schemes, relying on the scsi error handling layer
  494. * to send out the REQUEST_SENSE automatically, but this was difficult
  495. * to get right especially in the presence of applications like smartd
  496. * which use SG_IO to send out their own REQUEST_SENSE commands.
  497. */
  498. static void esp_autosense(struct esp *esp, struct esp_cmd_entry *ent)
  499. {
  500. struct scsi_cmnd *cmd = ent->cmd;
  501. struct scsi_device *dev = cmd->device;
  502. int tgt, lun;
  503. u8 *p, val;
  504. tgt = dev->id;
  505. lun = dev->lun;
  506. if (!ent->sense_ptr) {
  507. esp_log_autosense("esp%d: Doing auto-sense for "
  508. "tgt[%d] lun[%d]\n",
  509. esp->host->unique_id, tgt, lun);
  510. ent->sense_ptr = cmd->sense_buffer;
  511. ent->sense_dma = esp->ops->map_single(esp,
  512. ent->sense_ptr,
  513. SCSI_SENSE_BUFFERSIZE,
  514. DMA_FROM_DEVICE);
  515. }
  516. ent->saved_sense_ptr = ent->sense_ptr;
  517. esp->active_cmd = ent;
  518. p = esp->command_block;
  519. esp->msg_out_len = 0;
  520. *p++ = IDENTIFY(0, lun);
  521. *p++ = REQUEST_SENSE;
  522. *p++ = ((dev->scsi_level <= SCSI_2) ?
  523. (lun << 5) : 0);
  524. *p++ = 0;
  525. *p++ = 0;
  526. *p++ = SCSI_SENSE_BUFFERSIZE;
  527. *p++ = 0;
  528. esp->select_state = ESP_SELECT_BASIC;
  529. val = tgt;
  530. if (esp->rev == FASHME)
  531. val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
  532. esp_write8(val, ESP_BUSID);
  533. esp_write_tgt_sync(esp, tgt);
  534. esp_write_tgt_config3(esp, tgt);
  535. val = (p - esp->command_block);
  536. if (esp->rev == FASHME)
  537. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  538. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  539. val, 16, 0, ESP_CMD_DMA | ESP_CMD_SELA);
  540. }
  541. static struct esp_cmd_entry *find_and_prep_issuable_command(struct esp *esp)
  542. {
  543. struct esp_cmd_entry *ent;
  544. list_for_each_entry(ent, &esp->queued_cmds, list) {
  545. struct scsi_cmnd *cmd = ent->cmd;
  546. struct scsi_device *dev = cmd->device;
  547. struct esp_lun_data *lp = dev->hostdata;
  548. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  549. ent->tag[0] = 0;
  550. ent->tag[1] = 0;
  551. return ent;
  552. }
  553. if (!scsi_populate_tag_msg(cmd, &ent->tag[0])) {
  554. ent->tag[0] = 0;
  555. ent->tag[1] = 0;
  556. }
  557. if (esp_alloc_lun_tag(ent, lp) < 0)
  558. continue;
  559. return ent;
  560. }
  561. return NULL;
  562. }
  563. static void esp_maybe_execute_command(struct esp *esp)
  564. {
  565. struct esp_target_data *tp;
  566. struct esp_lun_data *lp;
  567. struct scsi_device *dev;
  568. struct scsi_cmnd *cmd;
  569. struct esp_cmd_entry *ent;
  570. int tgt, lun, i;
  571. u32 val, start_cmd;
  572. u8 *p;
  573. if (esp->active_cmd ||
  574. (esp->flags & ESP_FLAG_RESETTING))
  575. return;
  576. ent = find_and_prep_issuable_command(esp);
  577. if (!ent)
  578. return;
  579. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  580. esp_autosense(esp, ent);
  581. return;
  582. }
  583. cmd = ent->cmd;
  584. dev = cmd->device;
  585. tgt = dev->id;
  586. lun = dev->lun;
  587. tp = &esp->target[tgt];
  588. lp = dev->hostdata;
  589. list_del(&ent->list);
  590. list_add(&ent->list, &esp->active_cmds);
  591. esp->active_cmd = ent;
  592. esp_map_dma(esp, cmd);
  593. esp_save_pointers(esp, ent);
  594. esp_check_command_len(esp, cmd);
  595. p = esp->command_block;
  596. esp->msg_out_len = 0;
  597. if (tp->flags & ESP_TGT_CHECK_NEGO) {
  598. /* Need to negotiate. If the target is broken
  599. * go for synchronous transfers and non-wide.
  600. */
  601. if (tp->flags & ESP_TGT_BROKEN) {
  602. tp->flags &= ~ESP_TGT_DISCONNECT;
  603. tp->nego_goal_period = 0;
  604. tp->nego_goal_offset = 0;
  605. tp->nego_goal_width = 0;
  606. tp->nego_goal_tags = 0;
  607. }
  608. /* If the settings are not changing, skip this. */
  609. if (spi_width(tp->starget) == tp->nego_goal_width &&
  610. spi_period(tp->starget) == tp->nego_goal_period &&
  611. spi_offset(tp->starget) == tp->nego_goal_offset) {
  612. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  613. goto build_identify;
  614. }
  615. if (esp->rev == FASHME && esp_need_to_nego_wide(tp)) {
  616. esp->msg_out_len =
  617. spi_populate_width_msg(&esp->msg_out[0],
  618. (tp->nego_goal_width ?
  619. 1 : 0));
  620. tp->flags |= ESP_TGT_NEGO_WIDE;
  621. } else if (esp_need_to_nego_sync(tp)) {
  622. esp->msg_out_len =
  623. spi_populate_sync_msg(&esp->msg_out[0],
  624. tp->nego_goal_period,
  625. tp->nego_goal_offset);
  626. tp->flags |= ESP_TGT_NEGO_SYNC;
  627. } else {
  628. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  629. }
  630. /* Process it like a slow command. */
  631. if (tp->flags & (ESP_TGT_NEGO_WIDE | ESP_TGT_NEGO_SYNC))
  632. esp->flags |= ESP_FLAG_DOING_SLOWCMD;
  633. }
  634. build_identify:
  635. /* If we don't have a lun-data struct yet, we're probing
  636. * so do not disconnect. Also, do not disconnect unless
  637. * we have a tag on this command.
  638. */
  639. if (lp && (tp->flags & ESP_TGT_DISCONNECT) && ent->tag[0])
  640. *p++ = IDENTIFY(1, lun);
  641. else
  642. *p++ = IDENTIFY(0, lun);
  643. if (ent->tag[0] && esp->rev == ESP100) {
  644. /* ESP100 lacks select w/atn3 command, use select
  645. * and stop instead.
  646. */
  647. esp->flags |= ESP_FLAG_DOING_SLOWCMD;
  648. }
  649. if (!(esp->flags & ESP_FLAG_DOING_SLOWCMD)) {
  650. start_cmd = ESP_CMD_DMA | ESP_CMD_SELA;
  651. if (ent->tag[0]) {
  652. *p++ = ent->tag[0];
  653. *p++ = ent->tag[1];
  654. start_cmd = ESP_CMD_DMA | ESP_CMD_SA3;
  655. }
  656. for (i = 0; i < cmd->cmd_len; i++)
  657. *p++ = cmd->cmnd[i];
  658. esp->select_state = ESP_SELECT_BASIC;
  659. } else {
  660. esp->cmd_bytes_left = cmd->cmd_len;
  661. esp->cmd_bytes_ptr = &cmd->cmnd[0];
  662. if (ent->tag[0]) {
  663. for (i = esp->msg_out_len - 1;
  664. i >= 0; i--)
  665. esp->msg_out[i + 2] = esp->msg_out[i];
  666. esp->msg_out[0] = ent->tag[0];
  667. esp->msg_out[1] = ent->tag[1];
  668. esp->msg_out_len += 2;
  669. }
  670. start_cmd = ESP_CMD_DMA | ESP_CMD_SELAS;
  671. esp->select_state = ESP_SELECT_MSGOUT;
  672. }
  673. val = tgt;
  674. if (esp->rev == FASHME)
  675. val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
  676. esp_write8(val, ESP_BUSID);
  677. esp_write_tgt_sync(esp, tgt);
  678. esp_write_tgt_config3(esp, tgt);
  679. val = (p - esp->command_block);
  680. if (esp_debug & ESP_DEBUG_SCSICMD) {
  681. printk("ESP: tgt[%d] lun[%d] scsi_cmd [ ", tgt, lun);
  682. for (i = 0; i < cmd->cmd_len; i++)
  683. printk("%02x ", cmd->cmnd[i]);
  684. printk("]\n");
  685. }
  686. if (esp->rev == FASHME)
  687. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  688. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  689. val, 16, 0, start_cmd);
  690. }
  691. static struct esp_cmd_entry *esp_get_ent(struct esp *esp)
  692. {
  693. struct list_head *head = &esp->esp_cmd_pool;
  694. struct esp_cmd_entry *ret;
  695. if (list_empty(head)) {
  696. ret = kzalloc(sizeof(struct esp_cmd_entry), GFP_ATOMIC);
  697. } else {
  698. ret = list_entry(head->next, struct esp_cmd_entry, list);
  699. list_del(&ret->list);
  700. memset(ret, 0, sizeof(*ret));
  701. }
  702. return ret;
  703. }
  704. static void esp_put_ent(struct esp *esp, struct esp_cmd_entry *ent)
  705. {
  706. list_add(&ent->list, &esp->esp_cmd_pool);
  707. }
  708. static void esp_cmd_is_done(struct esp *esp, struct esp_cmd_entry *ent,
  709. struct scsi_cmnd *cmd, unsigned int result)
  710. {
  711. struct scsi_device *dev = cmd->device;
  712. int tgt = dev->id;
  713. int lun = dev->lun;
  714. esp->active_cmd = NULL;
  715. esp_unmap_dma(esp, cmd);
  716. esp_free_lun_tag(ent, dev->hostdata);
  717. cmd->result = result;
  718. if (ent->eh_done) {
  719. complete(ent->eh_done);
  720. ent->eh_done = NULL;
  721. }
  722. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  723. esp->ops->unmap_single(esp, ent->sense_dma,
  724. SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
  725. ent->sense_ptr = NULL;
  726. /* Restore the message/status bytes to what we actually
  727. * saw originally. Also, report that we are providing
  728. * the sense data.
  729. */
  730. cmd->result = ((DRIVER_SENSE << 24) |
  731. (DID_OK << 16) |
  732. (COMMAND_COMPLETE << 8) |
  733. (SAM_STAT_CHECK_CONDITION << 0));
  734. ent->flags &= ~ESP_CMD_FLAG_AUTOSENSE;
  735. if (esp_debug & ESP_DEBUG_AUTOSENSE) {
  736. int i;
  737. printk("esp%d: tgt[%d] lun[%d] AUTO SENSE[ ",
  738. esp->host->unique_id, tgt, lun);
  739. for (i = 0; i < 18; i++)
  740. printk("%02x ", cmd->sense_buffer[i]);
  741. printk("]\n");
  742. }
  743. }
  744. cmd->scsi_done(cmd);
  745. list_del(&ent->list);
  746. esp_put_ent(esp, ent);
  747. esp_maybe_execute_command(esp);
  748. }
  749. static unsigned int compose_result(unsigned int status, unsigned int message,
  750. unsigned int driver_code)
  751. {
  752. return (status | (message << 8) | (driver_code << 16));
  753. }
  754. static void esp_event_queue_full(struct esp *esp, struct esp_cmd_entry *ent)
  755. {
  756. struct scsi_device *dev = ent->cmd->device;
  757. struct esp_lun_data *lp = dev->hostdata;
  758. scsi_track_queue_full(dev, lp->num_tagged - 1);
  759. }
  760. static int esp_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  761. {
  762. struct scsi_device *dev = cmd->device;
  763. struct esp *esp = host_to_esp(dev->host);
  764. struct esp_cmd_priv *spriv;
  765. struct esp_cmd_entry *ent;
  766. ent = esp_get_ent(esp);
  767. if (!ent)
  768. return SCSI_MLQUEUE_HOST_BUSY;
  769. ent->cmd = cmd;
  770. cmd->scsi_done = done;
  771. spriv = ESP_CMD_PRIV(cmd);
  772. spriv->u.dma_addr = ~(dma_addr_t)0x0;
  773. list_add_tail(&ent->list, &esp->queued_cmds);
  774. esp_maybe_execute_command(esp);
  775. return 0;
  776. }
  777. static int esp_check_gross_error(struct esp *esp)
  778. {
  779. if (esp->sreg & ESP_STAT_SPAM) {
  780. /* Gross Error, could be one of:
  781. * - top of fifo overwritten
  782. * - top of command register overwritten
  783. * - DMA programmed with wrong direction
  784. * - improper phase change
  785. */
  786. printk(KERN_ERR PFX "esp%d: Gross error sreg[%02x]\n",
  787. esp->host->unique_id, esp->sreg);
  788. /* XXX Reset the chip. XXX */
  789. return 1;
  790. }
  791. return 0;
  792. }
  793. static int esp_check_spur_intr(struct esp *esp)
  794. {
  795. switch (esp->rev) {
  796. case ESP100:
  797. case ESP100A:
  798. /* The interrupt pending bit of the status register cannot
  799. * be trusted on these revisions.
  800. */
  801. esp->sreg &= ~ESP_STAT_INTR;
  802. break;
  803. default:
  804. if (!(esp->sreg & ESP_STAT_INTR)) {
  805. esp->ireg = esp_read8(ESP_INTRPT);
  806. if (esp->ireg & ESP_INTR_SR)
  807. return 1;
  808. /* If the DMA is indicating interrupt pending and the
  809. * ESP is not, the only possibility is a DMA error.
  810. */
  811. if (!esp->ops->dma_error(esp)) {
  812. printk(KERN_ERR PFX "esp%d: Spurious irq, "
  813. "sreg=%x.\n",
  814. esp->host->unique_id, esp->sreg);
  815. return -1;
  816. }
  817. printk(KERN_ERR PFX "esp%d: DMA error\n",
  818. esp->host->unique_id);
  819. /* XXX Reset the chip. XXX */
  820. return -1;
  821. }
  822. break;
  823. }
  824. return 0;
  825. }
  826. static void esp_schedule_reset(struct esp *esp)
  827. {
  828. esp_log_reset("ESP: esp_schedule_reset() from %p\n",
  829. __builtin_return_address(0));
  830. esp->flags |= ESP_FLAG_RESETTING;
  831. esp_event(esp, ESP_EVENT_RESET);
  832. }
  833. /* In order to avoid having to add a special half-reconnected state
  834. * into the driver we just sit here and poll through the rest of
  835. * the reselection process to get the tag message bytes.
  836. */
  837. static struct esp_cmd_entry *esp_reconnect_with_tag(struct esp *esp,
  838. struct esp_lun_data *lp)
  839. {
  840. struct esp_cmd_entry *ent;
  841. int i;
  842. if (!lp->num_tagged) {
  843. printk(KERN_ERR PFX "esp%d: Reconnect w/num_tagged==0\n",
  844. esp->host->unique_id);
  845. return NULL;
  846. }
  847. esp_log_reconnect("ESP: reconnect tag, ");
  848. for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
  849. if (esp->ops->irq_pending(esp))
  850. break;
  851. }
  852. if (i == ESP_QUICKIRQ_LIMIT) {
  853. printk(KERN_ERR PFX "esp%d: Reconnect IRQ1 timeout\n",
  854. esp->host->unique_id);
  855. return NULL;
  856. }
  857. esp->sreg = esp_read8(ESP_STATUS);
  858. esp->ireg = esp_read8(ESP_INTRPT);
  859. esp_log_reconnect("IRQ(%d:%x:%x), ",
  860. i, esp->ireg, esp->sreg);
  861. if (esp->ireg & ESP_INTR_DC) {
  862. printk(KERN_ERR PFX "esp%d: Reconnect, got disconnect.\n",
  863. esp->host->unique_id);
  864. return NULL;
  865. }
  866. if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP) {
  867. printk(KERN_ERR PFX "esp%d: Reconnect, not MIP sreg[%02x].\n",
  868. esp->host->unique_id, esp->sreg);
  869. return NULL;
  870. }
  871. /* DMA in the tag bytes... */
  872. esp->command_block[0] = 0xff;
  873. esp->command_block[1] = 0xff;
  874. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  875. 2, 2, 1, ESP_CMD_DMA | ESP_CMD_TI);
  876. /* ACK the msssage. */
  877. scsi_esp_cmd(esp, ESP_CMD_MOK);
  878. for (i = 0; i < ESP_RESELECT_TAG_LIMIT; i++) {
  879. if (esp->ops->irq_pending(esp)) {
  880. esp->sreg = esp_read8(ESP_STATUS);
  881. esp->ireg = esp_read8(ESP_INTRPT);
  882. if (esp->ireg & ESP_INTR_FDONE)
  883. break;
  884. }
  885. udelay(1);
  886. }
  887. if (i == ESP_RESELECT_TAG_LIMIT) {
  888. printk(KERN_ERR PFX "esp%d: Reconnect IRQ2 timeout\n",
  889. esp->host->unique_id);
  890. return NULL;
  891. }
  892. esp->ops->dma_drain(esp);
  893. esp->ops->dma_invalidate(esp);
  894. esp_log_reconnect("IRQ2(%d:%x:%x) tag[%x:%x]\n",
  895. i, esp->ireg, esp->sreg,
  896. esp->command_block[0],
  897. esp->command_block[1]);
  898. if (esp->command_block[0] < SIMPLE_QUEUE_TAG ||
  899. esp->command_block[0] > ORDERED_QUEUE_TAG) {
  900. printk(KERN_ERR PFX "esp%d: Reconnect, bad tag "
  901. "type %02x.\n",
  902. esp->host->unique_id, esp->command_block[0]);
  903. return NULL;
  904. }
  905. ent = lp->tagged_cmds[esp->command_block[1]];
  906. if (!ent) {
  907. printk(KERN_ERR PFX "esp%d: Reconnect, no entry for "
  908. "tag %02x.\n",
  909. esp->host->unique_id, esp->command_block[1]);
  910. return NULL;
  911. }
  912. return ent;
  913. }
  914. static int esp_reconnect(struct esp *esp)
  915. {
  916. struct esp_cmd_entry *ent;
  917. struct esp_target_data *tp;
  918. struct esp_lun_data *lp;
  919. struct scsi_device *dev;
  920. int target, lun;
  921. BUG_ON(esp->active_cmd);
  922. if (esp->rev == FASHME) {
  923. /* FASHME puts the target and lun numbers directly
  924. * into the fifo.
  925. */
  926. target = esp->fifo[0];
  927. lun = esp->fifo[1] & 0x7;
  928. } else {
  929. u8 bits = esp_read8(ESP_FDATA);
  930. /* Older chips put the lun directly into the fifo, but
  931. * the target is given as a sample of the arbitration
  932. * lines on the bus at reselection time. So we should
  933. * see the ID of the ESP and the one reconnecting target
  934. * set in the bitmap.
  935. */
  936. if (!(bits & esp->scsi_id_mask))
  937. goto do_reset;
  938. bits &= ~esp->scsi_id_mask;
  939. if (!bits || (bits & (bits - 1)))
  940. goto do_reset;
  941. target = ffs(bits) - 1;
  942. lun = (esp_read8(ESP_FDATA) & 0x7);
  943. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  944. if (esp->rev == ESP100) {
  945. u8 ireg = esp_read8(ESP_INTRPT);
  946. /* This chip has a bug during reselection that can
  947. * cause a spurious illegal-command interrupt, which
  948. * we simply ACK here. Another possibility is a bus
  949. * reset so we must check for that.
  950. */
  951. if (ireg & ESP_INTR_SR)
  952. goto do_reset;
  953. }
  954. scsi_esp_cmd(esp, ESP_CMD_NULL);
  955. }
  956. esp_write_tgt_sync(esp, target);
  957. esp_write_tgt_config3(esp, target);
  958. scsi_esp_cmd(esp, ESP_CMD_MOK);
  959. if (esp->rev == FASHME)
  960. esp_write8(target | ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT,
  961. ESP_BUSID);
  962. tp = &esp->target[target];
  963. dev = __scsi_device_lookup_by_target(tp->starget, lun);
  964. if (!dev) {
  965. printk(KERN_ERR PFX "esp%d: Reconnect, no lp "
  966. "tgt[%u] lun[%u]\n",
  967. esp->host->unique_id, target, lun);
  968. goto do_reset;
  969. }
  970. lp = dev->hostdata;
  971. ent = lp->non_tagged_cmd;
  972. if (!ent) {
  973. ent = esp_reconnect_with_tag(esp, lp);
  974. if (!ent)
  975. goto do_reset;
  976. }
  977. esp->active_cmd = ent;
  978. if (ent->flags & ESP_CMD_FLAG_ABORT) {
  979. esp->msg_out[0] = ABORT_TASK_SET;
  980. esp->msg_out_len = 1;
  981. scsi_esp_cmd(esp, ESP_CMD_SATN);
  982. }
  983. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  984. esp_restore_pointers(esp, ent);
  985. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  986. return 1;
  987. do_reset:
  988. esp_schedule_reset(esp);
  989. return 0;
  990. }
  991. static int esp_finish_select(struct esp *esp)
  992. {
  993. struct esp_cmd_entry *ent;
  994. struct scsi_cmnd *cmd;
  995. u8 orig_select_state;
  996. orig_select_state = esp->select_state;
  997. /* No longer selecting. */
  998. esp->select_state = ESP_SELECT_NONE;
  999. esp->seqreg = esp_read8(ESP_SSTEP) & ESP_STEP_VBITS;
  1000. ent = esp->active_cmd;
  1001. cmd = ent->cmd;
  1002. if (esp->ops->dma_error(esp)) {
  1003. /* If we see a DMA error during or as a result of selection,
  1004. * all bets are off.
  1005. */
  1006. esp_schedule_reset(esp);
  1007. esp_cmd_is_done(esp, ent, cmd, (DID_ERROR << 16));
  1008. return 0;
  1009. }
  1010. esp->ops->dma_invalidate(esp);
  1011. if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
  1012. struct esp_target_data *tp = &esp->target[cmd->device->id];
  1013. /* Carefully back out of the selection attempt. Release
  1014. * resources (such as DMA mapping & TAG) and reset state (such
  1015. * as message out and command delivery variables).
  1016. */
  1017. if (!(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
  1018. esp_unmap_dma(esp, cmd);
  1019. esp_free_lun_tag(ent, cmd->device->hostdata);
  1020. tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_NEGO_WIDE);
  1021. esp->flags &= ~ESP_FLAG_DOING_SLOWCMD;
  1022. esp->cmd_bytes_ptr = NULL;
  1023. esp->cmd_bytes_left = 0;
  1024. } else {
  1025. esp->ops->unmap_single(esp, ent->sense_dma,
  1026. SCSI_SENSE_BUFFERSIZE,
  1027. DMA_FROM_DEVICE);
  1028. ent->sense_ptr = NULL;
  1029. }
  1030. /* Now that the state is unwound properly, put back onto
  1031. * the issue queue. This command is no longer active.
  1032. */
  1033. list_del(&ent->list);
  1034. list_add(&ent->list, &esp->queued_cmds);
  1035. esp->active_cmd = NULL;
  1036. /* Return value ignored by caller, it directly invokes
  1037. * esp_reconnect().
  1038. */
  1039. return 0;
  1040. }
  1041. if (esp->ireg == ESP_INTR_DC) {
  1042. struct scsi_device *dev = cmd->device;
  1043. /* Disconnect. Make sure we re-negotiate sync and
  1044. * wide parameters if this target starts responding
  1045. * again in the future.
  1046. */
  1047. esp->target[dev->id].flags |= ESP_TGT_CHECK_NEGO;
  1048. scsi_esp_cmd(esp, ESP_CMD_ESEL);
  1049. esp_cmd_is_done(esp, ent, cmd, (DID_BAD_TARGET << 16));
  1050. return 1;
  1051. }
  1052. if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
  1053. /* Selection successful. On pre-FAST chips we have
  1054. * to do a NOP and possibly clean out the FIFO.
  1055. */
  1056. if (esp->rev <= ESP236) {
  1057. int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  1058. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1059. if (!fcnt &&
  1060. (!esp->prev_soff ||
  1061. ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
  1062. esp_flush_fifo(esp);
  1063. }
  1064. /* If we are doing a slow command, negotiation, etc.
  1065. * we'll do the right thing as we transition to the
  1066. * next phase.
  1067. */
  1068. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1069. return 0;
  1070. }
  1071. printk("ESP: Unexpected selection completion ireg[%x].\n",
  1072. esp->ireg);
  1073. esp_schedule_reset(esp);
  1074. return 0;
  1075. }
  1076. static int esp_data_bytes_sent(struct esp *esp, struct esp_cmd_entry *ent,
  1077. struct scsi_cmnd *cmd)
  1078. {
  1079. int fifo_cnt, ecount, bytes_sent, flush_fifo;
  1080. fifo_cnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  1081. if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE)
  1082. fifo_cnt <<= 1;
  1083. ecount = 0;
  1084. if (!(esp->sreg & ESP_STAT_TCNT)) {
  1085. ecount = ((unsigned int)esp_read8(ESP_TCLOW) |
  1086. (((unsigned int)esp_read8(ESP_TCMED)) << 8));
  1087. if (esp->rev == FASHME)
  1088. ecount |= ((unsigned int)esp_read8(FAS_RLO)) << 16;
  1089. }
  1090. bytes_sent = esp->data_dma_len;
  1091. bytes_sent -= ecount;
  1092. if (!(ent->flags & ESP_CMD_FLAG_WRITE))
  1093. bytes_sent -= fifo_cnt;
  1094. flush_fifo = 0;
  1095. if (!esp->prev_soff) {
  1096. /* Synchronous data transfer, always flush fifo. */
  1097. flush_fifo = 1;
  1098. } else {
  1099. if (esp->rev == ESP100) {
  1100. u32 fflags, phase;
  1101. /* ESP100 has a chip bug where in the synchronous data
  1102. * phase it can mistake a final long REQ pulse from the
  1103. * target as an extra data byte. Fun.
  1104. *
  1105. * To detect this case we resample the status register
  1106. * and fifo flags. If we're still in a data phase and
  1107. * we see spurious chunks in the fifo, we return error
  1108. * to the caller which should reset and set things up
  1109. * such that we only try future transfers to this
  1110. * target in synchronous mode.
  1111. */
  1112. esp->sreg = esp_read8(ESP_STATUS);
  1113. phase = esp->sreg & ESP_STAT_PMASK;
  1114. fflags = esp_read8(ESP_FFLAGS);
  1115. if ((phase == ESP_DOP &&
  1116. (fflags & ESP_FF_ONOTZERO)) ||
  1117. (phase == ESP_DIP &&
  1118. (fflags & ESP_FF_FBYTES)))
  1119. return -1;
  1120. }
  1121. if (!(ent->flags & ESP_CMD_FLAG_WRITE))
  1122. flush_fifo = 1;
  1123. }
  1124. if (flush_fifo)
  1125. esp_flush_fifo(esp);
  1126. return bytes_sent;
  1127. }
  1128. static void esp_setsync(struct esp *esp, struct esp_target_data *tp,
  1129. u8 scsi_period, u8 scsi_offset,
  1130. u8 esp_stp, u8 esp_soff)
  1131. {
  1132. spi_period(tp->starget) = scsi_period;
  1133. spi_offset(tp->starget) = scsi_offset;
  1134. spi_width(tp->starget) = (tp->flags & ESP_TGT_WIDE) ? 1 : 0;
  1135. if (esp_soff) {
  1136. esp_stp &= 0x1f;
  1137. esp_soff |= esp->radelay;
  1138. if (esp->rev >= FAS236) {
  1139. u8 bit = ESP_CONFIG3_FSCSI;
  1140. if (esp->rev >= FAS100A)
  1141. bit = ESP_CONFIG3_FAST;
  1142. if (scsi_period < 50) {
  1143. if (esp->rev == FASHME)
  1144. esp_soff &= ~esp->radelay;
  1145. tp->esp_config3 |= bit;
  1146. } else {
  1147. tp->esp_config3 &= ~bit;
  1148. }
  1149. esp->prev_cfg3 = tp->esp_config3;
  1150. esp_write8(esp->prev_cfg3, ESP_CFG3);
  1151. }
  1152. }
  1153. tp->esp_period = esp->prev_stp = esp_stp;
  1154. tp->esp_offset = esp->prev_soff = esp_soff;
  1155. esp_write8(esp_soff, ESP_SOFF);
  1156. esp_write8(esp_stp, ESP_STP);
  1157. tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
  1158. spi_display_xfer_agreement(tp->starget);
  1159. }
  1160. static void esp_msgin_reject(struct esp *esp)
  1161. {
  1162. struct esp_cmd_entry *ent = esp->active_cmd;
  1163. struct scsi_cmnd *cmd = ent->cmd;
  1164. struct esp_target_data *tp;
  1165. int tgt;
  1166. tgt = cmd->device->id;
  1167. tp = &esp->target[tgt];
  1168. if (tp->flags & ESP_TGT_NEGO_WIDE) {
  1169. tp->flags &= ~(ESP_TGT_NEGO_WIDE | ESP_TGT_WIDE);
  1170. if (!esp_need_to_nego_sync(tp)) {
  1171. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  1172. scsi_esp_cmd(esp, ESP_CMD_RATN);
  1173. } else {
  1174. esp->msg_out_len =
  1175. spi_populate_sync_msg(&esp->msg_out[0],
  1176. tp->nego_goal_period,
  1177. tp->nego_goal_offset);
  1178. tp->flags |= ESP_TGT_NEGO_SYNC;
  1179. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1180. }
  1181. return;
  1182. }
  1183. if (tp->flags & ESP_TGT_NEGO_SYNC) {
  1184. tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
  1185. tp->esp_period = 0;
  1186. tp->esp_offset = 0;
  1187. esp_setsync(esp, tp, 0, 0, 0, 0);
  1188. scsi_esp_cmd(esp, ESP_CMD_RATN);
  1189. return;
  1190. }
  1191. esp->msg_out[0] = ABORT_TASK_SET;
  1192. esp->msg_out_len = 1;
  1193. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1194. }
  1195. static void esp_msgin_sdtr(struct esp *esp, struct esp_target_data *tp)
  1196. {
  1197. u8 period = esp->msg_in[3];
  1198. u8 offset = esp->msg_in[4];
  1199. u8 stp;
  1200. if (!(tp->flags & ESP_TGT_NEGO_SYNC))
  1201. goto do_reject;
  1202. if (offset > 15)
  1203. goto do_reject;
  1204. if (offset) {
  1205. int rounded_up, one_clock;
  1206. if (period > esp->max_period) {
  1207. period = offset = 0;
  1208. goto do_sdtr;
  1209. }
  1210. if (period < esp->min_period)
  1211. goto do_reject;
  1212. one_clock = esp->ccycle / 1000;
  1213. rounded_up = (period << 2);
  1214. rounded_up = (rounded_up + one_clock - 1) / one_clock;
  1215. stp = rounded_up;
  1216. if (stp && esp->rev >= FAS236) {
  1217. if (stp >= 50)
  1218. stp--;
  1219. }
  1220. } else {
  1221. stp = 0;
  1222. }
  1223. esp_setsync(esp, tp, period, offset, stp, offset);
  1224. return;
  1225. do_reject:
  1226. esp->msg_out[0] = MESSAGE_REJECT;
  1227. esp->msg_out_len = 1;
  1228. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1229. return;
  1230. do_sdtr:
  1231. tp->nego_goal_period = period;
  1232. tp->nego_goal_offset = offset;
  1233. esp->msg_out_len =
  1234. spi_populate_sync_msg(&esp->msg_out[0],
  1235. tp->nego_goal_period,
  1236. tp->nego_goal_offset);
  1237. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1238. }
  1239. static void esp_msgin_wdtr(struct esp *esp, struct esp_target_data *tp)
  1240. {
  1241. int size = 8 << esp->msg_in[3];
  1242. u8 cfg3;
  1243. if (esp->rev != FASHME)
  1244. goto do_reject;
  1245. if (size != 8 && size != 16)
  1246. goto do_reject;
  1247. if (!(tp->flags & ESP_TGT_NEGO_WIDE))
  1248. goto do_reject;
  1249. cfg3 = tp->esp_config3;
  1250. if (size == 16) {
  1251. tp->flags |= ESP_TGT_WIDE;
  1252. cfg3 |= ESP_CONFIG3_EWIDE;
  1253. } else {
  1254. tp->flags &= ~ESP_TGT_WIDE;
  1255. cfg3 &= ~ESP_CONFIG3_EWIDE;
  1256. }
  1257. tp->esp_config3 = cfg3;
  1258. esp->prev_cfg3 = cfg3;
  1259. esp_write8(cfg3, ESP_CFG3);
  1260. tp->flags &= ~ESP_TGT_NEGO_WIDE;
  1261. spi_period(tp->starget) = 0;
  1262. spi_offset(tp->starget) = 0;
  1263. if (!esp_need_to_nego_sync(tp)) {
  1264. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  1265. scsi_esp_cmd(esp, ESP_CMD_RATN);
  1266. } else {
  1267. esp->msg_out_len =
  1268. spi_populate_sync_msg(&esp->msg_out[0],
  1269. tp->nego_goal_period,
  1270. tp->nego_goal_offset);
  1271. tp->flags |= ESP_TGT_NEGO_SYNC;
  1272. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1273. }
  1274. return;
  1275. do_reject:
  1276. esp->msg_out[0] = MESSAGE_REJECT;
  1277. esp->msg_out_len = 1;
  1278. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1279. }
  1280. static void esp_msgin_extended(struct esp *esp)
  1281. {
  1282. struct esp_cmd_entry *ent = esp->active_cmd;
  1283. struct scsi_cmnd *cmd = ent->cmd;
  1284. struct esp_target_data *tp;
  1285. int tgt = cmd->device->id;
  1286. tp = &esp->target[tgt];
  1287. if (esp->msg_in[2] == EXTENDED_SDTR) {
  1288. esp_msgin_sdtr(esp, tp);
  1289. return;
  1290. }
  1291. if (esp->msg_in[2] == EXTENDED_WDTR) {
  1292. esp_msgin_wdtr(esp, tp);
  1293. return;
  1294. }
  1295. printk("ESP: Unexpected extended msg type %x\n",
  1296. esp->msg_in[2]);
  1297. esp->msg_out[0] = ABORT_TASK_SET;
  1298. esp->msg_out_len = 1;
  1299. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1300. }
  1301. /* Analyze msgin bytes received from target so far. Return non-zero
  1302. * if there are more bytes needed to complete the message.
  1303. */
  1304. static int esp_msgin_process(struct esp *esp)
  1305. {
  1306. u8 msg0 = esp->msg_in[0];
  1307. int len = esp->msg_in_len;
  1308. if (msg0 & 0x80) {
  1309. /* Identify */
  1310. printk("ESP: Unexpected msgin identify\n");
  1311. return 0;
  1312. }
  1313. switch (msg0) {
  1314. case EXTENDED_MESSAGE:
  1315. if (len == 1)
  1316. return 1;
  1317. if (len < esp->msg_in[1] + 2)
  1318. return 1;
  1319. esp_msgin_extended(esp);
  1320. return 0;
  1321. case IGNORE_WIDE_RESIDUE: {
  1322. struct esp_cmd_entry *ent;
  1323. struct esp_cmd_priv *spriv;
  1324. if (len == 1)
  1325. return 1;
  1326. if (esp->msg_in[1] != 1)
  1327. goto do_reject;
  1328. ent = esp->active_cmd;
  1329. spriv = ESP_CMD_PRIV(ent->cmd);
  1330. if (spriv->cur_residue == sg_dma_len(spriv->cur_sg)) {
  1331. spriv->cur_sg--;
  1332. spriv->cur_residue = 1;
  1333. } else
  1334. spriv->cur_residue++;
  1335. spriv->tot_residue++;
  1336. return 0;
  1337. }
  1338. case NOP:
  1339. return 0;
  1340. case RESTORE_POINTERS:
  1341. esp_restore_pointers(esp, esp->active_cmd);
  1342. return 0;
  1343. case SAVE_POINTERS:
  1344. esp_save_pointers(esp, esp->active_cmd);
  1345. return 0;
  1346. case COMMAND_COMPLETE:
  1347. case DISCONNECT: {
  1348. struct esp_cmd_entry *ent = esp->active_cmd;
  1349. ent->message = msg0;
  1350. esp_event(esp, ESP_EVENT_FREE_BUS);
  1351. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1352. return 0;
  1353. }
  1354. case MESSAGE_REJECT:
  1355. esp_msgin_reject(esp);
  1356. return 0;
  1357. default:
  1358. do_reject:
  1359. esp->msg_out[0] = MESSAGE_REJECT;
  1360. esp->msg_out_len = 1;
  1361. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1362. return 0;
  1363. }
  1364. }
  1365. static int esp_process_event(struct esp *esp)
  1366. {
  1367. int write;
  1368. again:
  1369. write = 0;
  1370. switch (esp->event) {
  1371. case ESP_EVENT_CHECK_PHASE:
  1372. switch (esp->sreg & ESP_STAT_PMASK) {
  1373. case ESP_DOP:
  1374. esp_event(esp, ESP_EVENT_DATA_OUT);
  1375. break;
  1376. case ESP_DIP:
  1377. esp_event(esp, ESP_EVENT_DATA_IN);
  1378. break;
  1379. case ESP_STATP:
  1380. esp_flush_fifo(esp);
  1381. scsi_esp_cmd(esp, ESP_CMD_ICCSEQ);
  1382. esp_event(esp, ESP_EVENT_STATUS);
  1383. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1384. return 1;
  1385. case ESP_MOP:
  1386. esp_event(esp, ESP_EVENT_MSGOUT);
  1387. break;
  1388. case ESP_MIP:
  1389. esp_event(esp, ESP_EVENT_MSGIN);
  1390. break;
  1391. case ESP_CMDP:
  1392. esp_event(esp, ESP_EVENT_CMD_START);
  1393. break;
  1394. default:
  1395. printk("ESP: Unexpected phase, sreg=%02x\n",
  1396. esp->sreg);
  1397. esp_schedule_reset(esp);
  1398. return 0;
  1399. }
  1400. goto again;
  1401. break;
  1402. case ESP_EVENT_DATA_IN:
  1403. write = 1;
  1404. /* fallthru */
  1405. case ESP_EVENT_DATA_OUT: {
  1406. struct esp_cmd_entry *ent = esp->active_cmd;
  1407. struct scsi_cmnd *cmd = ent->cmd;
  1408. dma_addr_t dma_addr = esp_cur_dma_addr(ent, cmd);
  1409. unsigned int dma_len = esp_cur_dma_len(ent, cmd);
  1410. if (esp->rev == ESP100)
  1411. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1412. if (write)
  1413. ent->flags |= ESP_CMD_FLAG_WRITE;
  1414. else
  1415. ent->flags &= ~ESP_CMD_FLAG_WRITE;
  1416. dma_len = esp_dma_length_limit(esp, dma_addr, dma_len);
  1417. esp->data_dma_len = dma_len;
  1418. if (!dma_len) {
  1419. printk(KERN_ERR PFX "esp%d: DMA length is zero!\n",
  1420. esp->host->unique_id);
  1421. printk(KERN_ERR PFX "esp%d: cur adr[%08x] len[%08x]\n",
  1422. esp->host->unique_id,
  1423. esp_cur_dma_addr(ent, cmd),
  1424. esp_cur_dma_len(ent, cmd));
  1425. esp_schedule_reset(esp);
  1426. return 0;
  1427. }
  1428. esp_log_datastart("ESP: start data addr[%08x] len[%u] "
  1429. "write(%d)\n",
  1430. dma_addr, dma_len, write);
  1431. esp->ops->send_dma_cmd(esp, dma_addr, dma_len, dma_len,
  1432. write, ESP_CMD_DMA | ESP_CMD_TI);
  1433. esp_event(esp, ESP_EVENT_DATA_DONE);
  1434. break;
  1435. }
  1436. case ESP_EVENT_DATA_DONE: {
  1437. struct esp_cmd_entry *ent = esp->active_cmd;
  1438. struct scsi_cmnd *cmd = ent->cmd;
  1439. int bytes_sent;
  1440. if (esp->ops->dma_error(esp)) {
  1441. printk("ESP: data done, DMA error, resetting\n");
  1442. esp_schedule_reset(esp);
  1443. return 0;
  1444. }
  1445. if (ent->flags & ESP_CMD_FLAG_WRITE) {
  1446. /* XXX parity errors, etc. XXX */
  1447. esp->ops->dma_drain(esp);
  1448. }
  1449. esp->ops->dma_invalidate(esp);
  1450. if (esp->ireg != ESP_INTR_BSERV) {
  1451. /* We should always see exactly a bus-service
  1452. * interrupt at the end of a successful transfer.
  1453. */
  1454. printk("ESP: data done, not BSERV, resetting\n");
  1455. esp_schedule_reset(esp);
  1456. return 0;
  1457. }
  1458. bytes_sent = esp_data_bytes_sent(esp, ent, cmd);
  1459. esp_log_datadone("ESP: data done flgs[%x] sent[%d]\n",
  1460. ent->flags, bytes_sent);
  1461. if (bytes_sent < 0) {
  1462. /* XXX force sync mode for this target XXX */
  1463. esp_schedule_reset(esp);
  1464. return 0;
  1465. }
  1466. esp_advance_dma(esp, ent, cmd, bytes_sent);
  1467. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1468. goto again;
  1469. break;
  1470. }
  1471. case ESP_EVENT_STATUS: {
  1472. struct esp_cmd_entry *ent = esp->active_cmd;
  1473. if (esp->ireg & ESP_INTR_FDONE) {
  1474. ent->status = esp_read8(ESP_FDATA);
  1475. ent->message = esp_read8(ESP_FDATA);
  1476. scsi_esp_cmd(esp, ESP_CMD_MOK);
  1477. } else if (esp->ireg == ESP_INTR_BSERV) {
  1478. ent->status = esp_read8(ESP_FDATA);
  1479. ent->message = 0xff;
  1480. esp_event(esp, ESP_EVENT_MSGIN);
  1481. return 0;
  1482. }
  1483. if (ent->message != COMMAND_COMPLETE) {
  1484. printk("ESP: Unexpected message %x in status\n",
  1485. ent->message);
  1486. esp_schedule_reset(esp);
  1487. return 0;
  1488. }
  1489. esp_event(esp, ESP_EVENT_FREE_BUS);
  1490. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1491. break;
  1492. }
  1493. case ESP_EVENT_FREE_BUS: {
  1494. struct esp_cmd_entry *ent = esp->active_cmd;
  1495. struct scsi_cmnd *cmd = ent->cmd;
  1496. if (ent->message == COMMAND_COMPLETE ||
  1497. ent->message == DISCONNECT)
  1498. scsi_esp_cmd(esp, ESP_CMD_ESEL);
  1499. if (ent->message == COMMAND_COMPLETE) {
  1500. esp_log_cmddone("ESP: Command done status[%x] "
  1501. "message[%x]\n",
  1502. ent->status, ent->message);
  1503. if (ent->status == SAM_STAT_TASK_SET_FULL)
  1504. esp_event_queue_full(esp, ent);
  1505. if (ent->status == SAM_STAT_CHECK_CONDITION &&
  1506. !(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
  1507. ent->flags |= ESP_CMD_FLAG_AUTOSENSE;
  1508. esp_autosense(esp, ent);
  1509. } else {
  1510. esp_cmd_is_done(esp, ent, cmd,
  1511. compose_result(ent->status,
  1512. ent->message,
  1513. DID_OK));
  1514. }
  1515. } else if (ent->message == DISCONNECT) {
  1516. esp_log_disconnect("ESP: Disconnecting tgt[%d] "
  1517. "tag[%x:%x]\n",
  1518. cmd->device->id,
  1519. ent->tag[0], ent->tag[1]);
  1520. esp->active_cmd = NULL;
  1521. esp_maybe_execute_command(esp);
  1522. } else {
  1523. printk("ESP: Unexpected message %x in freebus\n",
  1524. ent->message);
  1525. esp_schedule_reset(esp);
  1526. return 0;
  1527. }
  1528. if (esp->active_cmd)
  1529. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1530. break;
  1531. }
  1532. case ESP_EVENT_MSGOUT: {
  1533. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1534. if (esp_debug & ESP_DEBUG_MSGOUT) {
  1535. int i;
  1536. printk("ESP: Sending message [ ");
  1537. for (i = 0; i < esp->msg_out_len; i++)
  1538. printk("%02x ", esp->msg_out[i]);
  1539. printk("]\n");
  1540. }
  1541. if (esp->rev == FASHME) {
  1542. int i;
  1543. /* Always use the fifo. */
  1544. for (i = 0; i < esp->msg_out_len; i++) {
  1545. esp_write8(esp->msg_out[i], ESP_FDATA);
  1546. esp_write8(0, ESP_FDATA);
  1547. }
  1548. scsi_esp_cmd(esp, ESP_CMD_TI);
  1549. } else {
  1550. if (esp->msg_out_len == 1) {
  1551. esp_write8(esp->msg_out[0], ESP_FDATA);
  1552. scsi_esp_cmd(esp, ESP_CMD_TI);
  1553. } else {
  1554. /* Use DMA. */
  1555. memcpy(esp->command_block,
  1556. esp->msg_out,
  1557. esp->msg_out_len);
  1558. esp->ops->send_dma_cmd(esp,
  1559. esp->command_block_dma,
  1560. esp->msg_out_len,
  1561. esp->msg_out_len,
  1562. 0,
  1563. ESP_CMD_DMA|ESP_CMD_TI);
  1564. }
  1565. }
  1566. esp_event(esp, ESP_EVENT_MSGOUT_DONE);
  1567. break;
  1568. }
  1569. case ESP_EVENT_MSGOUT_DONE:
  1570. if (esp->rev == FASHME) {
  1571. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1572. } else {
  1573. if (esp->msg_out_len > 1)
  1574. esp->ops->dma_invalidate(esp);
  1575. }
  1576. if (!(esp->ireg & ESP_INTR_DC)) {
  1577. if (esp->rev != FASHME)
  1578. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1579. }
  1580. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1581. goto again;
  1582. case ESP_EVENT_MSGIN:
  1583. if (esp->ireg & ESP_INTR_BSERV) {
  1584. if (esp->rev == FASHME) {
  1585. if (!(esp_read8(ESP_STATUS2) &
  1586. ESP_STAT2_FEMPTY))
  1587. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1588. } else {
  1589. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1590. if (esp->rev == ESP100)
  1591. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1592. }
  1593. scsi_esp_cmd(esp, ESP_CMD_TI);
  1594. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1595. return 1;
  1596. }
  1597. if (esp->ireg & ESP_INTR_FDONE) {
  1598. u8 val;
  1599. if (esp->rev == FASHME)
  1600. val = esp->fifo[0];
  1601. else
  1602. val = esp_read8(ESP_FDATA);
  1603. esp->msg_in[esp->msg_in_len++] = val;
  1604. esp_log_msgin("ESP: Got msgin byte %x\n", val);
  1605. if (!esp_msgin_process(esp))
  1606. esp->msg_in_len = 0;
  1607. if (esp->rev == FASHME)
  1608. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1609. scsi_esp_cmd(esp, ESP_CMD_MOK);
  1610. if (esp->event != ESP_EVENT_FREE_BUS)
  1611. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1612. } else {
  1613. printk("ESP: MSGIN neither BSERV not FDON, resetting");
  1614. esp_schedule_reset(esp);
  1615. return 0;
  1616. }
  1617. break;
  1618. case ESP_EVENT_CMD_START:
  1619. memcpy(esp->command_block, esp->cmd_bytes_ptr,
  1620. esp->cmd_bytes_left);
  1621. if (esp->rev == FASHME)
  1622. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1623. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  1624. esp->cmd_bytes_left, 16, 0,
  1625. ESP_CMD_DMA | ESP_CMD_TI);
  1626. esp_event(esp, ESP_EVENT_CMD_DONE);
  1627. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1628. break;
  1629. case ESP_EVENT_CMD_DONE:
  1630. esp->ops->dma_invalidate(esp);
  1631. if (esp->ireg & ESP_INTR_BSERV) {
  1632. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1633. goto again;
  1634. }
  1635. esp_schedule_reset(esp);
  1636. return 0;
  1637. break;
  1638. case ESP_EVENT_RESET:
  1639. scsi_esp_cmd(esp, ESP_CMD_RS);
  1640. break;
  1641. default:
  1642. printk("ESP: Unexpected event %x, resetting\n",
  1643. esp->event);
  1644. esp_schedule_reset(esp);
  1645. return 0;
  1646. break;
  1647. }
  1648. return 1;
  1649. }
  1650. static void esp_reset_cleanup_one(struct esp *esp, struct esp_cmd_entry *ent)
  1651. {
  1652. struct scsi_cmnd *cmd = ent->cmd;
  1653. esp_unmap_dma(esp, cmd);
  1654. esp_free_lun_tag(ent, cmd->device->hostdata);
  1655. cmd->result = DID_RESET << 16;
  1656. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  1657. esp->ops->unmap_single(esp, ent->sense_dma,
  1658. SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
  1659. ent->sense_ptr = NULL;
  1660. }
  1661. cmd->scsi_done(cmd);
  1662. list_del(&ent->list);
  1663. esp_put_ent(esp, ent);
  1664. }
  1665. static void esp_clear_hold(struct scsi_device *dev, void *data)
  1666. {
  1667. struct esp_lun_data *lp = dev->hostdata;
  1668. BUG_ON(lp->num_tagged);
  1669. lp->hold = 0;
  1670. }
  1671. static void esp_reset_cleanup(struct esp *esp)
  1672. {
  1673. struct esp_cmd_entry *ent, *tmp;
  1674. int i;
  1675. list_for_each_entry_safe(ent, tmp, &esp->queued_cmds, list) {
  1676. struct scsi_cmnd *cmd = ent->cmd;
  1677. list_del(&ent->list);
  1678. cmd->result = DID_RESET << 16;
  1679. cmd->scsi_done(cmd);
  1680. esp_put_ent(esp, ent);
  1681. }
  1682. list_for_each_entry_safe(ent, tmp, &esp->active_cmds, list) {
  1683. if (ent == esp->active_cmd)
  1684. esp->active_cmd = NULL;
  1685. esp_reset_cleanup_one(esp, ent);
  1686. }
  1687. BUG_ON(esp->active_cmd != NULL);
  1688. /* Force renegotiation of sync/wide transfers. */
  1689. for (i = 0; i < ESP_MAX_TARGET; i++) {
  1690. struct esp_target_data *tp = &esp->target[i];
  1691. tp->esp_period = 0;
  1692. tp->esp_offset = 0;
  1693. tp->esp_config3 &= ~(ESP_CONFIG3_EWIDE |
  1694. ESP_CONFIG3_FSCSI |
  1695. ESP_CONFIG3_FAST);
  1696. tp->flags &= ~ESP_TGT_WIDE;
  1697. tp->flags |= ESP_TGT_CHECK_NEGO;
  1698. if (tp->starget)
  1699. starget_for_each_device(tp->starget, NULL,
  1700. esp_clear_hold);
  1701. }
  1702. }
  1703. /* Runs under host->lock */
  1704. static void __esp_interrupt(struct esp *esp)
  1705. {
  1706. int finish_reset, intr_done;
  1707. u8 phase;
  1708. esp->sreg = esp_read8(ESP_STATUS);
  1709. if (esp->flags & ESP_FLAG_RESETTING) {
  1710. finish_reset = 1;
  1711. } else {
  1712. if (esp_check_gross_error(esp))
  1713. return;
  1714. finish_reset = esp_check_spur_intr(esp);
  1715. if (finish_reset < 0)
  1716. return;
  1717. }
  1718. esp->ireg = esp_read8(ESP_INTRPT);
  1719. if (esp->ireg & ESP_INTR_SR)
  1720. finish_reset = 1;
  1721. if (finish_reset) {
  1722. esp_reset_cleanup(esp);
  1723. if (esp->eh_reset) {
  1724. complete(esp->eh_reset);
  1725. esp->eh_reset = NULL;
  1726. }
  1727. return;
  1728. }
  1729. phase = (esp->sreg & ESP_STAT_PMASK);
  1730. if (esp->rev == FASHME) {
  1731. if (((phase != ESP_DIP && phase != ESP_DOP) &&
  1732. esp->select_state == ESP_SELECT_NONE &&
  1733. esp->event != ESP_EVENT_STATUS &&
  1734. esp->event != ESP_EVENT_DATA_DONE) ||
  1735. (esp->ireg & ESP_INTR_RSEL)) {
  1736. esp->sreg2 = esp_read8(ESP_STATUS2);
  1737. if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
  1738. (esp->sreg2 & ESP_STAT2_F1BYTE))
  1739. hme_read_fifo(esp);
  1740. }
  1741. }
  1742. esp_log_intr("ESP: intr sreg[%02x] seqreg[%02x] "
  1743. "sreg2[%02x] ireg[%02x]\n",
  1744. esp->sreg, esp->seqreg, esp->sreg2, esp->ireg);
  1745. intr_done = 0;
  1746. if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN | ESP_INTR_IC)) {
  1747. printk("ESP: unexpected IREG %02x\n", esp->ireg);
  1748. if (esp->ireg & ESP_INTR_IC)
  1749. esp_dump_cmd_log(esp);
  1750. esp_schedule_reset(esp);
  1751. } else {
  1752. if (!(esp->ireg & ESP_INTR_RSEL)) {
  1753. /* Some combination of FDONE, BSERV, DC. */
  1754. if (esp->select_state != ESP_SELECT_NONE)
  1755. intr_done = esp_finish_select(esp);
  1756. } else if (esp->ireg & ESP_INTR_RSEL) {
  1757. if (esp->active_cmd)
  1758. (void) esp_finish_select(esp);
  1759. intr_done = esp_reconnect(esp);
  1760. }
  1761. }
  1762. while (!intr_done)
  1763. intr_done = esp_process_event(esp);
  1764. }
  1765. irqreturn_t scsi_esp_intr(int irq, void *dev_id)
  1766. {
  1767. struct esp *esp = dev_id;
  1768. unsigned long flags;
  1769. irqreturn_t ret;
  1770. spin_lock_irqsave(esp->host->host_lock, flags);
  1771. ret = IRQ_NONE;
  1772. if (esp->ops->irq_pending(esp)) {
  1773. ret = IRQ_HANDLED;
  1774. for (;;) {
  1775. int i;
  1776. __esp_interrupt(esp);
  1777. if (!(esp->flags & ESP_FLAG_QUICKIRQ_CHECK))
  1778. break;
  1779. esp->flags &= ~ESP_FLAG_QUICKIRQ_CHECK;
  1780. for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
  1781. if (esp->ops->irq_pending(esp))
  1782. break;
  1783. }
  1784. if (i == ESP_QUICKIRQ_LIMIT)
  1785. break;
  1786. }
  1787. }
  1788. spin_unlock_irqrestore(esp->host->host_lock, flags);
  1789. return ret;
  1790. }
  1791. EXPORT_SYMBOL(scsi_esp_intr);
  1792. static void __devinit esp_get_revision(struct esp *esp)
  1793. {
  1794. u8 val;
  1795. esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
  1796. esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
  1797. esp_write8(esp->config2, ESP_CFG2);
  1798. val = esp_read8(ESP_CFG2);
  1799. val &= ~ESP_CONFIG2_MAGIC;
  1800. if (val != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
  1801. /* If what we write to cfg2 does not come back, cfg2 is not
  1802. * implemented, therefore this must be a plain esp100.
  1803. */
  1804. esp->rev = ESP100;
  1805. } else {
  1806. esp->config2 = 0;
  1807. esp_set_all_config3(esp, 5);
  1808. esp->prev_cfg3 = 5;
  1809. esp_write8(esp->config2, ESP_CFG2);
  1810. esp_write8(0, ESP_CFG3);
  1811. esp_write8(esp->prev_cfg3, ESP_CFG3);
  1812. val = esp_read8(ESP_CFG3);
  1813. if (val != 5) {
  1814. /* The cfg2 register is implemented, however
  1815. * cfg3 is not, must be esp100a.
  1816. */
  1817. esp->rev = ESP100A;
  1818. } else {
  1819. esp_set_all_config3(esp, 0);
  1820. esp->prev_cfg3 = 0;
  1821. esp_write8(esp->prev_cfg3, ESP_CFG3);
  1822. /* All of cfg{1,2,3} implemented, must be one of
  1823. * the fas variants, figure out which one.
  1824. */
  1825. if (esp->cfact == 0 || esp->cfact > ESP_CCF_F5) {
  1826. esp->rev = FAST;
  1827. esp->sync_defp = SYNC_DEFP_FAST;
  1828. } else {
  1829. esp->rev = ESP236;
  1830. }
  1831. esp->config2 = 0;
  1832. esp_write8(esp->config2, ESP_CFG2);
  1833. }
  1834. }
  1835. }
  1836. static void __devinit esp_init_swstate(struct esp *esp)
  1837. {
  1838. int i;
  1839. INIT_LIST_HEAD(&esp->queued_cmds);
  1840. INIT_LIST_HEAD(&esp->active_cmds);
  1841. INIT_LIST_HEAD(&esp->esp_cmd_pool);
  1842. /* Start with a clear state, domain validation (via ->slave_configure,
  1843. * spi_dv_device()) will attempt to enable SYNC, WIDE, and tagged
  1844. * commands.
  1845. */
  1846. for (i = 0 ; i < ESP_MAX_TARGET; i++) {
  1847. esp->target[i].flags = 0;
  1848. esp->target[i].nego_goal_period = 0;
  1849. esp->target[i].nego_goal_offset = 0;
  1850. esp->target[i].nego_goal_width = 0;
  1851. esp->target[i].nego_goal_tags = 0;
  1852. }
  1853. }
  1854. /* This places the ESP into a known state at boot time. */
  1855. static void __devinit esp_bootup_reset(struct esp *esp)
  1856. {
  1857. u8 val;
  1858. /* Reset the DMA */
  1859. esp->ops->reset_dma(esp);
  1860. /* Reset the ESP */
  1861. esp_reset_esp(esp);
  1862. /* Reset the SCSI bus, but tell ESP not to generate an irq */
  1863. val = esp_read8(ESP_CFG1);
  1864. val |= ESP_CONFIG1_SRRDISAB;
  1865. esp_write8(val, ESP_CFG1);
  1866. scsi_esp_cmd(esp, ESP_CMD_RS);
  1867. udelay(400);
  1868. esp_write8(esp->config1, ESP_CFG1);
  1869. /* Eat any bitrot in the chip and we are done... */
  1870. esp_read8(ESP_INTRPT);
  1871. }
  1872. static void __devinit esp_set_clock_params(struct esp *esp)
  1873. {
  1874. int fmhz;
  1875. u8 ccf;
  1876. /* This is getting messy but it has to be done correctly or else
  1877. * you get weird behavior all over the place. We are trying to
  1878. * basically figure out three pieces of information.
  1879. *
  1880. * a) Clock Conversion Factor
  1881. *
  1882. * This is a representation of the input crystal clock frequency
  1883. * going into the ESP on this machine. Any operation whose timing
  1884. * is longer than 400ns depends on this value being correct. For
  1885. * example, you'll get blips for arbitration/selection during high
  1886. * load or with multiple targets if this is not set correctly.
  1887. *
  1888. * b) Selection Time-Out
  1889. *
  1890. * The ESP isn't very bright and will arbitrate for the bus and try
  1891. * to select a target forever if you let it. This value tells the
  1892. * ESP when it has taken too long to negotiate and that it should
  1893. * interrupt the CPU so we can see what happened. The value is
  1894. * computed as follows (from NCR/Symbios chip docs).
  1895. *
  1896. * (Time Out Period) * (Input Clock)
  1897. * STO = ----------------------------------
  1898. * (8192) * (Clock Conversion Factor)
  1899. *
  1900. * We use a time out period of 250ms (ESP_BUS_TIMEOUT).
  1901. *
  1902. * c) Imperical constants for synchronous offset and transfer period
  1903. * register values
  1904. *
  1905. * This entails the smallest and largest sync period we could ever
  1906. * handle on this ESP.
  1907. */
  1908. fmhz = esp->cfreq;
  1909. ccf = ((fmhz / 1000000) + 4) / 5;
  1910. if (ccf == 1)
  1911. ccf = 2;
  1912. /* If we can't find anything reasonable, just assume 20MHZ.
  1913. * This is the clock frequency of the older sun4c's where I've
  1914. * been unable to find the clock-frequency PROM property. All
  1915. * other machines provide useful values it seems.
  1916. */
  1917. if (fmhz <= 5000000 || ccf < 1 || ccf > 8) {
  1918. fmhz = 20000000;
  1919. ccf = 4;
  1920. }
  1921. esp->cfact = (ccf == 8 ? 0 : ccf);
  1922. esp->cfreq = fmhz;
  1923. esp->ccycle = ESP_MHZ_TO_CYCLE(fmhz);
  1924. esp->ctick = ESP_TICK(ccf, esp->ccycle);
  1925. esp->neg_defp = ESP_NEG_DEFP(fmhz, ccf);
  1926. esp->sync_defp = SYNC_DEFP_SLOW;
  1927. }
  1928. static const char *esp_chip_names[] = {
  1929. "ESP100",
  1930. "ESP100A",
  1931. "ESP236",
  1932. "FAS236",
  1933. "FAS100A",
  1934. "FAST",
  1935. "FASHME",
  1936. };
  1937. static struct scsi_transport_template *esp_transport_template;
  1938. int __devinit scsi_esp_register(struct esp *esp, struct device *dev)
  1939. {
  1940. static int instance;
  1941. int err;
  1942. esp->host->transportt = esp_transport_template;
  1943. esp->host->max_lun = ESP_MAX_LUN;
  1944. esp->host->cmd_per_lun = 2;
  1945. esp_set_clock_params(esp);
  1946. esp_get_revision(esp);
  1947. esp_init_swstate(esp);
  1948. esp_bootup_reset(esp);
  1949. printk(KERN_INFO PFX "esp%u, regs[%1p:%1p] irq[%u]\n",
  1950. esp->host->unique_id, esp->regs, esp->dma_regs,
  1951. esp->host->irq);
  1952. printk(KERN_INFO PFX "esp%u is a %s, %u MHz (ccf=%u), SCSI ID %u\n",
  1953. esp->host->unique_id, esp_chip_names[esp->rev],
  1954. esp->cfreq / 1000000, esp->cfact, esp->scsi_id);
  1955. /* Let the SCSI bus reset settle. */
  1956. ssleep(esp_bus_reset_settle);
  1957. err = scsi_add_host(esp->host, dev);
  1958. if (err)
  1959. return err;
  1960. esp->host->unique_id = instance++;
  1961. scsi_scan_host(esp->host);
  1962. return 0;
  1963. }
  1964. EXPORT_SYMBOL(scsi_esp_register);
  1965. void __devexit scsi_esp_unregister(struct esp *esp)
  1966. {
  1967. scsi_remove_host(esp->host);
  1968. }
  1969. EXPORT_SYMBOL(scsi_esp_unregister);
  1970. static int esp_slave_alloc(struct scsi_device *dev)
  1971. {
  1972. struct esp *esp = host_to_esp(dev->host);
  1973. struct esp_target_data *tp = &esp->target[dev->id];
  1974. struct esp_lun_data *lp;
  1975. lp = kzalloc(sizeof(*lp), GFP_KERNEL);
  1976. if (!lp)
  1977. return -ENOMEM;
  1978. dev->hostdata = lp;
  1979. tp->starget = dev->sdev_target;
  1980. spi_min_period(tp->starget) = esp->min_period;
  1981. spi_max_offset(tp->starget) = 15;
  1982. if (esp->flags & ESP_FLAG_WIDE_CAPABLE)
  1983. spi_max_width(tp->starget) = 1;
  1984. else
  1985. spi_max_width(tp->starget) = 0;
  1986. return 0;
  1987. }
  1988. static int esp_slave_configure(struct scsi_device *dev)
  1989. {
  1990. struct esp *esp = host_to_esp(dev->host);
  1991. struct esp_target_data *tp = &esp->target[dev->id];
  1992. int goal_tags, queue_depth;
  1993. goal_tags = 0;
  1994. if (dev->tagged_supported) {
  1995. /* XXX make this configurable somehow XXX */
  1996. goal_tags = ESP_DEFAULT_TAGS;
  1997. if (goal_tags > ESP_MAX_TAG)
  1998. goal_tags = ESP_MAX_TAG;
  1999. }
  2000. queue_depth = goal_tags;
  2001. if (queue_depth < dev->host->cmd_per_lun)
  2002. queue_depth = dev->host->cmd_per_lun;
  2003. if (goal_tags) {
  2004. scsi_set_tag_type(dev, MSG_ORDERED_TAG);
  2005. scsi_activate_tcq(dev, queue_depth);
  2006. } else {
  2007. scsi_deactivate_tcq(dev, queue_depth);
  2008. }
  2009. tp->flags |= ESP_TGT_DISCONNECT;
  2010. if (!spi_initial_dv(dev->sdev_target))
  2011. spi_dv_device(dev);
  2012. return 0;
  2013. }
  2014. static void esp_slave_destroy(struct scsi_device *dev)
  2015. {
  2016. struct esp_lun_data *lp = dev->hostdata;
  2017. kfree(lp);
  2018. dev->hostdata = NULL;
  2019. }
  2020. static int esp_eh_abort_handler(struct scsi_cmnd *cmd)
  2021. {
  2022. struct esp *esp = host_to_esp(cmd->device->host);
  2023. struct esp_cmd_entry *ent, *tmp;
  2024. struct completion eh_done;
  2025. unsigned long flags;
  2026. /* XXX This helps a lot with debugging but might be a bit
  2027. * XXX much for the final driver.
  2028. */
  2029. spin_lock_irqsave(esp->host->host_lock, flags);
  2030. printk(KERN_ERR PFX "esp%d: Aborting command [%p:%02x]\n",
  2031. esp->host->unique_id, cmd, cmd->cmnd[0]);
  2032. ent = esp->active_cmd;
  2033. if (ent)
  2034. printk(KERN_ERR PFX "esp%d: Current command [%p:%02x]\n",
  2035. esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
  2036. list_for_each_entry(ent, &esp->queued_cmds, list) {
  2037. printk(KERN_ERR PFX "esp%d: Queued command [%p:%02x]\n",
  2038. esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
  2039. }
  2040. list_for_each_entry(ent, &esp->active_cmds, list) {
  2041. printk(KERN_ERR PFX "esp%d: Active command [%p:%02x]\n",
  2042. esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
  2043. }
  2044. esp_dump_cmd_log(esp);
  2045. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2046. spin_lock_irqsave(esp->host->host_lock, flags);
  2047. ent = NULL;
  2048. list_for_each_entry(tmp, &esp->queued_cmds, list) {
  2049. if (tmp->cmd == cmd) {
  2050. ent = tmp;
  2051. break;
  2052. }
  2053. }
  2054. if (ent) {
  2055. /* Easiest case, we didn't even issue the command
  2056. * yet so it is trivial to abort.
  2057. */
  2058. list_del(&ent->list);
  2059. cmd->result = DID_ABORT << 16;
  2060. cmd->scsi_done(cmd);
  2061. esp_put_ent(esp, ent);
  2062. goto out_success;
  2063. }
  2064. init_completion(&eh_done);
  2065. ent = esp->active_cmd;
  2066. if (ent && ent->cmd == cmd) {
  2067. /* Command is the currently active command on
  2068. * the bus. If we already have an output message
  2069. * pending, no dice.
  2070. */
  2071. if (esp->msg_out_len)
  2072. goto out_failure;
  2073. /* Send out an abort, encouraging the target to
  2074. * go to MSGOUT phase by asserting ATN.
  2075. */
  2076. esp->msg_out[0] = ABORT_TASK_SET;
  2077. esp->msg_out_len = 1;
  2078. ent->eh_done = &eh_done;
  2079. scsi_esp_cmd(esp, ESP_CMD_SATN);
  2080. } else {
  2081. /* The command is disconnected. This is not easy to
  2082. * abort. For now we fail and let the scsi error
  2083. * handling layer go try a scsi bus reset or host
  2084. * reset.
  2085. *
  2086. * What we could do is put together a scsi command
  2087. * solely for the purpose of sending an abort message
  2088. * to the target. Coming up with all the code to
  2089. * cook up scsi commands, special case them everywhere,
  2090. * etc. is for questionable gain and it would be better
  2091. * if the generic scsi error handling layer could do at
  2092. * least some of that for us.
  2093. *
  2094. * Anyways this is an area for potential future improvement
  2095. * in this driver.
  2096. */
  2097. goto out_failure;
  2098. }
  2099. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2100. if (!wait_for_completion_timeout(&eh_done, 5 * HZ)) {
  2101. spin_lock_irqsave(esp->host->host_lock, flags);
  2102. ent->eh_done = NULL;
  2103. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2104. return FAILED;
  2105. }
  2106. return SUCCESS;
  2107. out_success:
  2108. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2109. return SUCCESS;
  2110. out_failure:
  2111. /* XXX This might be a good location to set ESP_TGT_BROKEN
  2112. * XXX since we know which target/lun in particular is
  2113. * XXX causing trouble.
  2114. */
  2115. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2116. return FAILED;
  2117. }
  2118. static int esp_eh_bus_reset_handler(struct scsi_cmnd *cmd)
  2119. {
  2120. struct esp *esp = host_to_esp(cmd->device->host);
  2121. struct completion eh_reset;
  2122. unsigned long flags;
  2123. init_completion(&eh_reset);
  2124. spin_lock_irqsave(esp->host->host_lock, flags);
  2125. esp->eh_reset = &eh_reset;
  2126. /* XXX This is too simple... We should add lots of
  2127. * XXX checks here so that if we find that the chip is
  2128. * XXX very wedged we return failure immediately so
  2129. * XXX that we can perform a full chip reset.
  2130. */
  2131. esp->flags |= ESP_FLAG_RESETTING;
  2132. scsi_esp_cmd(esp, ESP_CMD_RS);
  2133. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2134. ssleep(esp_bus_reset_settle);
  2135. if (!wait_for_completion_timeout(&eh_reset, 5 * HZ)) {
  2136. spin_lock_irqsave(esp->host->host_lock, flags);
  2137. esp->eh_reset = NULL;
  2138. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2139. return FAILED;
  2140. }
  2141. return SUCCESS;
  2142. }
  2143. /* All bets are off, reset the entire device. */
  2144. static int esp_eh_host_reset_handler(struct scsi_cmnd *cmd)
  2145. {
  2146. struct esp *esp = host_to_esp(cmd->device->host);
  2147. unsigned long flags;
  2148. spin_lock_irqsave(esp->host->host_lock, flags);
  2149. esp_bootup_reset(esp);
  2150. esp_reset_cleanup(esp);
  2151. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2152. ssleep(esp_bus_reset_settle);
  2153. return SUCCESS;
  2154. }
  2155. static const char *esp_info(struct Scsi_Host *host)
  2156. {
  2157. return "esp";
  2158. }
  2159. struct scsi_host_template scsi_esp_template = {
  2160. .module = THIS_MODULE,
  2161. .name = "esp",
  2162. .info = esp_info,
  2163. .queuecommand = esp_queuecommand,
  2164. .slave_alloc = esp_slave_alloc,
  2165. .slave_configure = esp_slave_configure,
  2166. .slave_destroy = esp_slave_destroy,
  2167. .eh_abort_handler = esp_eh_abort_handler,
  2168. .eh_bus_reset_handler = esp_eh_bus_reset_handler,
  2169. .eh_host_reset_handler = esp_eh_host_reset_handler,
  2170. .can_queue = 7,
  2171. .this_id = 7,
  2172. .sg_tablesize = SG_ALL,
  2173. .use_clustering = ENABLE_CLUSTERING,
  2174. .max_sectors = 0xffff,
  2175. .skip_settle_delay = 1,
  2176. };
  2177. EXPORT_SYMBOL(scsi_esp_template);
  2178. static void esp_get_signalling(struct Scsi_Host *host)
  2179. {
  2180. struct esp *esp = host_to_esp(host);
  2181. enum spi_signal_type type;
  2182. if (esp->flags & ESP_FLAG_DIFFERENTIAL)
  2183. type = SPI_SIGNAL_HVD;
  2184. else
  2185. type = SPI_SIGNAL_SE;
  2186. spi_signalling(host) = type;
  2187. }
  2188. static void esp_set_offset(struct scsi_target *target, int offset)
  2189. {
  2190. struct Scsi_Host *host = dev_to_shost(target->dev.parent);
  2191. struct esp *esp = host_to_esp(host);
  2192. struct esp_target_data *tp = &esp->target[target->id];
  2193. tp->nego_goal_offset = offset;
  2194. tp->flags |= ESP_TGT_CHECK_NEGO;
  2195. }
  2196. static void esp_set_period(struct scsi_target *target, int period)
  2197. {
  2198. struct Scsi_Host *host = dev_to_shost(target->dev.parent);
  2199. struct esp *esp = host_to_esp(host);
  2200. struct esp_target_data *tp = &esp->target[target->id];
  2201. tp->nego_goal_period = period;
  2202. tp->flags |= ESP_TGT_CHECK_NEGO;
  2203. }
  2204. static void esp_set_width(struct scsi_target *target, int width)
  2205. {
  2206. struct Scsi_Host *host = dev_to_shost(target->dev.parent);
  2207. struct esp *esp = host_to_esp(host);
  2208. struct esp_target_data *tp = &esp->target[target->id];
  2209. tp->nego_goal_width = (width ? 1 : 0);
  2210. tp->flags |= ESP_TGT_CHECK_NEGO;
  2211. }
  2212. static struct spi_function_template esp_transport_ops = {
  2213. .set_offset = esp_set_offset,
  2214. .show_offset = 1,
  2215. .set_period = esp_set_period,
  2216. .show_period = 1,
  2217. .set_width = esp_set_width,
  2218. .show_width = 1,
  2219. .get_signalling = esp_get_signalling,
  2220. };
  2221. static int __init esp_init(void)
  2222. {
  2223. BUILD_BUG_ON(sizeof(struct scsi_pointer) <
  2224. sizeof(struct esp_cmd_priv));
  2225. esp_transport_template = spi_attach_transport(&esp_transport_ops);
  2226. if (!esp_transport_template)
  2227. return -ENODEV;
  2228. return 0;
  2229. }
  2230. static void __exit esp_exit(void)
  2231. {
  2232. spi_release_transport(esp_transport_template);
  2233. }
  2234. MODULE_DESCRIPTION("ESP SCSI driver core");
  2235. MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
  2236. MODULE_LICENSE("GPL");
  2237. MODULE_VERSION(DRV_VERSION);
  2238. module_param(esp_bus_reset_settle, int, 0);
  2239. MODULE_PARM_DESC(esp_bus_reset_settle,
  2240. "ESP scsi bus reset delay in seconds");
  2241. module_param(esp_debug, int, 0);
  2242. MODULE_PARM_DESC(esp_debug,
  2243. "ESP bitmapped debugging message enable value:\n"
  2244. " 0x00000001 Log interrupt events\n"
  2245. " 0x00000002 Log scsi commands\n"
  2246. " 0x00000004 Log resets\n"
  2247. " 0x00000008 Log message in events\n"
  2248. " 0x00000010 Log message out events\n"
  2249. " 0x00000020 Log command completion\n"
  2250. " 0x00000040 Log disconnects\n"
  2251. " 0x00000080 Log data start\n"
  2252. " 0x00000100 Log data done\n"
  2253. " 0x00000200 Log reconnects\n"
  2254. " 0x00000400 Log auto-sense data\n"
  2255. );
  2256. module_init(esp_init);
  2257. module_exit(esp_exit);