psb_drv.c 20 KB

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  1. /**************************************************************************
  2. * Copyright (c) 2007-2011, Intel Corporation.
  3. * All Rights Reserved.
  4. * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
  5. * All Rights Reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms and conditions of the GNU General Public License,
  9. * version 2, as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. **************************************************************************/
  21. #include <drm/drmP.h>
  22. #include <drm/drm.h>
  23. #include "gma_drm.h"
  24. #include "psb_drv.h"
  25. #include "framebuffer.h"
  26. #include "psb_reg.h"
  27. #include "psb_intel_reg.h"
  28. #include "intel_bios.h"
  29. #include "mid_bios.h"
  30. #include <drm/drm_pciids.h>
  31. #include "power.h"
  32. #include <linux/cpu.h>
  33. #include <linux/notifier.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/pm_runtime.h>
  36. #include <acpi/video.h>
  37. #include <linux/module.h>
  38. static int drm_psb_trap_pagefaults;
  39. static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  40. MODULE_PARM_DESC(trap_pagefaults, "Error and reset on MMU pagefaults");
  41. module_param_named(trap_pagefaults, drm_psb_trap_pagefaults, int, 0600);
  42. static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {
  43. { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  44. { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  45. #if defined(CONFIG_DRM_GMA600)
  46. { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  47. { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  48. { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  49. { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  50. { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  51. { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  52. { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  53. { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  54. /* Atom E620 */
  55. { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  56. #endif
  57. #if defined(CONFIG_DRM_MEDFIELD)
  58. {0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  59. {0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  60. {0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  61. {0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  62. {0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  63. {0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  64. {0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  65. {0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  66. #endif
  67. #if defined(CONFIG_DRM_GMA3600)
  68. { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  69. { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  70. { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  71. { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  72. { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  73. { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  74. { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  75. { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  76. #endif
  77. { 0, 0, 0}
  78. };
  79. MODULE_DEVICE_TABLE(pci, pciidlist);
  80. /*
  81. * Standard IOCTLs.
  82. */
  83. #define DRM_IOCTL_PSB_ADB \
  84. DRM_IOWR(DRM_GMA_ADB + DRM_COMMAND_BASE, uint32_t)
  85. #define DRM_IOCTL_PSB_MODE_OPERATION \
  86. DRM_IOWR(DRM_GMA_MODE_OPERATION + DRM_COMMAND_BASE, \
  87. struct drm_psb_mode_operation_arg)
  88. #define DRM_IOCTL_PSB_STOLEN_MEMORY \
  89. DRM_IOWR(DRM_GMA_STOLEN_MEMORY + DRM_COMMAND_BASE, \
  90. struct drm_psb_stolen_memory_arg)
  91. #define DRM_IOCTL_PSB_GAMMA \
  92. DRM_IOWR(DRM_GMA_GAMMA + DRM_COMMAND_BASE, \
  93. struct drm_psb_dpst_lut_arg)
  94. #define DRM_IOCTL_PSB_DPST_BL \
  95. DRM_IOWR(DRM_GMA_DPST_BL + DRM_COMMAND_BASE, \
  96. uint32_t)
  97. #define DRM_IOCTL_PSB_GET_PIPE_FROM_CRTC_ID \
  98. DRM_IOWR(DRM_GMA_GET_PIPE_FROM_CRTC_ID + DRM_COMMAND_BASE, \
  99. struct drm_psb_get_pipe_from_crtc_id_arg)
  100. #define DRM_IOCTL_PSB_GEM_CREATE \
  101. DRM_IOWR(DRM_GMA_GEM_CREATE + DRM_COMMAND_BASE, \
  102. struct drm_psb_gem_create)
  103. #define DRM_IOCTL_PSB_GEM_MMAP \
  104. DRM_IOWR(DRM_GMA_GEM_MMAP + DRM_COMMAND_BASE, \
  105. struct drm_psb_gem_mmap)
  106. static int psb_adb_ioctl(struct drm_device *dev, void *data,
  107. struct drm_file *file_priv);
  108. static int psb_mode_operation_ioctl(struct drm_device *dev, void *data,
  109. struct drm_file *file_priv);
  110. static int psb_stolen_memory_ioctl(struct drm_device *dev, void *data,
  111. struct drm_file *file_priv);
  112. static int psb_gamma_ioctl(struct drm_device *dev, void *data,
  113. struct drm_file *file_priv);
  114. static int psb_dpst_bl_ioctl(struct drm_device *dev, void *data,
  115. struct drm_file *file_priv);
  116. #define PSB_IOCTL_DEF(ioctl, func, flags) \
  117. [DRM_IOCTL_NR(ioctl) - DRM_COMMAND_BASE] = {ioctl, flags, func}
  118. static struct drm_ioctl_desc psb_ioctls[] = {
  119. PSB_IOCTL_DEF(DRM_IOCTL_PSB_ADB, psb_adb_ioctl, DRM_AUTH),
  120. PSB_IOCTL_DEF(DRM_IOCTL_PSB_MODE_OPERATION, psb_mode_operation_ioctl,
  121. DRM_AUTH),
  122. PSB_IOCTL_DEF(DRM_IOCTL_PSB_STOLEN_MEMORY, psb_stolen_memory_ioctl,
  123. DRM_AUTH),
  124. PSB_IOCTL_DEF(DRM_IOCTL_PSB_GAMMA, psb_gamma_ioctl, DRM_AUTH),
  125. PSB_IOCTL_DEF(DRM_IOCTL_PSB_DPST_BL, psb_dpst_bl_ioctl, DRM_AUTH),
  126. PSB_IOCTL_DEF(DRM_IOCTL_PSB_GET_PIPE_FROM_CRTC_ID,
  127. psb_intel_get_pipe_from_crtc_id, 0),
  128. PSB_IOCTL_DEF(DRM_IOCTL_PSB_GEM_CREATE, psb_gem_create_ioctl,
  129. DRM_UNLOCKED | DRM_AUTH),
  130. PSB_IOCTL_DEF(DRM_IOCTL_PSB_GEM_MMAP, psb_gem_mmap_ioctl,
  131. DRM_UNLOCKED | DRM_AUTH),
  132. };
  133. static void psb_lastclose(struct drm_device *dev)
  134. {
  135. return;
  136. }
  137. static void psb_do_takedown(struct drm_device *dev)
  138. {
  139. }
  140. static int psb_do_init(struct drm_device *dev)
  141. {
  142. struct drm_psb_private *dev_priv = dev->dev_private;
  143. struct psb_gtt *pg = &dev_priv->gtt;
  144. uint32_t stolen_gtt;
  145. int ret = -ENOMEM;
  146. if (pg->mmu_gatt_start & 0x0FFFFFFF) {
  147. dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
  148. ret = -EINVAL;
  149. goto out_err;
  150. }
  151. stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
  152. stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
  153. stolen_gtt =
  154. (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
  155. dev_priv->gatt_free_offset = pg->mmu_gatt_start +
  156. (stolen_gtt << PAGE_SHIFT) * 1024;
  157. if (1 || drm_debug) {
  158. uint32_t core_id = PSB_RSGX32(PSB_CR_CORE_ID);
  159. uint32_t core_rev = PSB_RSGX32(PSB_CR_CORE_REVISION);
  160. DRM_INFO("SGX core id = 0x%08x\n", core_id);
  161. DRM_INFO("SGX core rev major = 0x%02x, minor = 0x%02x\n",
  162. (core_rev & _PSB_CC_REVISION_MAJOR_MASK) >>
  163. _PSB_CC_REVISION_MAJOR_SHIFT,
  164. (core_rev & _PSB_CC_REVISION_MINOR_MASK) >>
  165. _PSB_CC_REVISION_MINOR_SHIFT);
  166. DRM_INFO
  167. ("SGX core rev maintenance = 0x%02x, designer = 0x%02x\n",
  168. (core_rev & _PSB_CC_REVISION_MAINTENANCE_MASK) >>
  169. _PSB_CC_REVISION_MAINTENANCE_SHIFT,
  170. (core_rev & _PSB_CC_REVISION_DESIGNER_MASK) >>
  171. _PSB_CC_REVISION_DESIGNER_SHIFT);
  172. }
  173. spin_lock_init(&dev_priv->irqmask_lock);
  174. spin_lock_init(&dev_priv->lock_2d);
  175. PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
  176. PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
  177. PSB_RSGX32(PSB_CR_BIF_BANK1);
  178. PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_MMU_ER_MASK,
  179. PSB_CR_BIF_CTRL);
  180. psb_spank(dev_priv);
  181. /* mmu_gatt ?? */
  182. PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
  183. return 0;
  184. out_err:
  185. psb_do_takedown(dev);
  186. return ret;
  187. }
  188. static int psb_driver_unload(struct drm_device *dev)
  189. {
  190. struct drm_psb_private *dev_priv = dev->dev_private;
  191. /* Kill vblank etc here */
  192. gma_backlight_exit(dev);
  193. psb_modeset_cleanup(dev);
  194. if (dev_priv) {
  195. psb_lid_timer_takedown(dev_priv);
  196. gma_intel_opregion_exit(dev);
  197. if (dev_priv->ops->chip_teardown)
  198. dev_priv->ops->chip_teardown(dev);
  199. psb_do_takedown(dev);
  200. if (dev_priv->pf_pd) {
  201. psb_mmu_free_pagedir(dev_priv->pf_pd);
  202. dev_priv->pf_pd = NULL;
  203. }
  204. if (dev_priv->mmu) {
  205. struct psb_gtt *pg = &dev_priv->gtt;
  206. down_read(&pg->sem);
  207. psb_mmu_remove_pfn_sequence(
  208. psb_mmu_get_default_pd
  209. (dev_priv->mmu),
  210. pg->mmu_gatt_start,
  211. dev_priv->vram_stolen_size >> PAGE_SHIFT);
  212. up_read(&pg->sem);
  213. psb_mmu_driver_takedown(dev_priv->mmu);
  214. dev_priv->mmu = NULL;
  215. }
  216. psb_gtt_takedown(dev);
  217. if (dev_priv->scratch_page) {
  218. __free_page(dev_priv->scratch_page);
  219. dev_priv->scratch_page = NULL;
  220. }
  221. if (dev_priv->vdc_reg) {
  222. iounmap(dev_priv->vdc_reg);
  223. dev_priv->vdc_reg = NULL;
  224. }
  225. if (dev_priv->sgx_reg) {
  226. iounmap(dev_priv->sgx_reg);
  227. dev_priv->sgx_reg = NULL;
  228. }
  229. kfree(dev_priv);
  230. dev->dev_private = NULL;
  231. /*destroy VBT data*/
  232. psb_intel_destroy_bios(dev);
  233. }
  234. gma_power_uninit(dev);
  235. return 0;
  236. }
  237. static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
  238. {
  239. struct drm_psb_private *dev_priv;
  240. unsigned long resource_start;
  241. struct psb_gtt *pg;
  242. unsigned long irqflags;
  243. int ret = -ENOMEM;
  244. uint32_t tt_pages;
  245. struct drm_connector *connector;
  246. struct psb_intel_encoder *psb_intel_encoder;
  247. dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
  248. if (dev_priv == NULL)
  249. return -ENOMEM;
  250. dev_priv->ops = (struct psb_ops *)chipset;
  251. dev_priv->dev = dev;
  252. dev->dev_private = (void *) dev_priv;
  253. pci_set_master(dev->pdev);
  254. if (!IS_PSB(dev)) {
  255. if (pci_enable_msi(dev->pdev))
  256. dev_warn(dev->dev, "Enabling MSI failed!\n");
  257. }
  258. dev_priv->num_pipe = dev_priv->ops->pipes;
  259. resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE);
  260. dev_priv->vdc_reg =
  261. ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
  262. if (!dev_priv->vdc_reg)
  263. goto out_err;
  264. dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
  265. PSB_SGX_SIZE);
  266. if (!dev_priv->sgx_reg)
  267. goto out_err;
  268. ret = dev_priv->ops->chip_setup(dev);
  269. if (ret)
  270. goto out_err;
  271. /* Init OSPM support */
  272. gma_power_init(dev);
  273. ret = -ENOMEM;
  274. dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
  275. if (!dev_priv->scratch_page)
  276. goto out_err;
  277. set_pages_uc(dev_priv->scratch_page, 1);
  278. ret = psb_gtt_init(dev, 0);
  279. if (ret)
  280. goto out_err;
  281. dev_priv->mmu = psb_mmu_driver_init((void *)0,
  282. drm_psb_trap_pagefaults, 0,
  283. dev_priv);
  284. if (!dev_priv->mmu)
  285. goto out_err;
  286. pg = &dev_priv->gtt;
  287. tt_pages = (pg->gatt_pages < PSB_TT_PRIV0_PLIMIT) ?
  288. (pg->gatt_pages) : PSB_TT_PRIV0_PLIMIT;
  289. dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
  290. if (!dev_priv->pf_pd)
  291. goto out_err;
  292. psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
  293. psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
  294. ret = psb_do_init(dev);
  295. if (ret)
  296. return ret;
  297. PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
  298. PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
  299. /* igd_opregion_init(&dev_priv->opregion_dev); */
  300. acpi_video_register();
  301. if (dev_priv->lid_state)
  302. psb_lid_timer_init(dev_priv);
  303. ret = drm_vblank_init(dev, dev_priv->num_pipe);
  304. if (ret)
  305. goto out_err;
  306. /*
  307. * Install interrupt handlers prior to powering off SGX or else we will
  308. * crash.
  309. */
  310. dev_priv->vdc_irq_mask = 0;
  311. dev_priv->pipestat[0] = 0;
  312. dev_priv->pipestat[1] = 0;
  313. dev_priv->pipestat[2] = 0;
  314. spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
  315. PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
  316. PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
  317. PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
  318. spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
  319. if (IS_PSB(dev) && drm_core_check_feature(dev, DRIVER_MODESET))
  320. drm_irq_install(dev);
  321. dev->vblank_disable_allowed = 1;
  322. dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
  323. dev->driver->get_vblank_counter = psb_get_vblank_counter;
  324. psb_modeset_init(dev);
  325. psb_fbdev_init(dev);
  326. drm_kms_helper_poll_init(dev);
  327. /* Only add backlight support if we have LVDS output */
  328. list_for_each_entry(connector, &dev->mode_config.connector_list,
  329. head) {
  330. psb_intel_encoder = psb_intel_attached_encoder(connector);
  331. switch (psb_intel_encoder->type) {
  332. case INTEL_OUTPUT_LVDS:
  333. case INTEL_OUTPUT_MIPI:
  334. ret = gma_backlight_init(dev);
  335. break;
  336. }
  337. }
  338. if (ret)
  339. return ret;
  340. #if 0
  341. /*enable runtime pm at last*/
  342. pm_runtime_enable(&dev->pdev->dev);
  343. pm_runtime_set_active(&dev->pdev->dev);
  344. #endif
  345. /*Intel drm driver load is done, continue doing pvr load*/
  346. return 0;
  347. out_err:
  348. psb_driver_unload(dev);
  349. return ret;
  350. }
  351. int psb_driver_device_is_agp(struct drm_device *dev)
  352. {
  353. return 0;
  354. }
  355. static inline void get_brightness(struct backlight_device *bd)
  356. {
  357. #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
  358. if (bd) {
  359. bd->props.brightness = bd->ops->get_brightness(bd);
  360. backlight_update_status(bd);
  361. }
  362. #endif
  363. }
  364. static int psb_dpst_bl_ioctl(struct drm_device *dev, void *data,
  365. struct drm_file *file_priv)
  366. {
  367. struct drm_psb_private *dev_priv = psb_priv(dev);
  368. uint32_t *arg = data;
  369. dev_priv->blc_adj2 = *arg;
  370. get_brightness(dev_priv->backlight_device);
  371. return 0;
  372. }
  373. static int psb_adb_ioctl(struct drm_device *dev, void *data,
  374. struct drm_file *file_priv)
  375. {
  376. struct drm_psb_private *dev_priv = psb_priv(dev);
  377. uint32_t *arg = data;
  378. dev_priv->blc_adj1 = *arg;
  379. get_brightness(dev_priv->backlight_device);
  380. return 0;
  381. }
  382. static int psb_gamma_ioctl(struct drm_device *dev, void *data,
  383. struct drm_file *file_priv)
  384. {
  385. struct drm_psb_dpst_lut_arg *lut_arg = data;
  386. struct drm_mode_object *obj;
  387. struct drm_crtc *crtc;
  388. struct drm_connector *connector;
  389. struct psb_intel_crtc *psb_intel_crtc;
  390. int i = 0;
  391. int32_t obj_id;
  392. obj_id = lut_arg->output_id;
  393. obj = drm_mode_object_find(dev, obj_id, DRM_MODE_OBJECT_CONNECTOR);
  394. if (!obj) {
  395. dev_dbg(dev->dev, "Invalid Connector object.\n");
  396. return -EINVAL;
  397. }
  398. connector = obj_to_connector(obj);
  399. crtc = connector->encoder->crtc;
  400. psb_intel_crtc = to_psb_intel_crtc(crtc);
  401. for (i = 0; i < 256; i++)
  402. psb_intel_crtc->lut_adj[i] = lut_arg->lut[i];
  403. psb_intel_crtc_load_lut(crtc);
  404. return 0;
  405. }
  406. static int psb_mode_operation_ioctl(struct drm_device *dev, void *data,
  407. struct drm_file *file_priv)
  408. {
  409. uint32_t obj_id;
  410. uint16_t op;
  411. struct drm_mode_modeinfo *umode;
  412. struct drm_display_mode *mode = NULL;
  413. struct drm_psb_mode_operation_arg *arg;
  414. struct drm_mode_object *obj;
  415. struct drm_connector *connector;
  416. struct drm_connector_helper_funcs *connector_funcs;
  417. int ret = 0;
  418. int resp = MODE_OK;
  419. arg = (struct drm_psb_mode_operation_arg *)data;
  420. obj_id = arg->obj_id;
  421. op = arg->operation;
  422. switch (op) {
  423. case PSB_MODE_OPERATION_MODE_VALID:
  424. umode = &arg->mode;
  425. mutex_lock(&dev->mode_config.mutex);
  426. obj = drm_mode_object_find(dev, obj_id,
  427. DRM_MODE_OBJECT_CONNECTOR);
  428. if (!obj) {
  429. ret = -EINVAL;
  430. goto mode_op_out;
  431. }
  432. connector = obj_to_connector(obj);
  433. mode = drm_mode_create(dev);
  434. if (!mode) {
  435. ret = -ENOMEM;
  436. goto mode_op_out;
  437. }
  438. /* drm_crtc_convert_umode(mode, umode); */
  439. {
  440. mode->clock = umode->clock;
  441. mode->hdisplay = umode->hdisplay;
  442. mode->hsync_start = umode->hsync_start;
  443. mode->hsync_end = umode->hsync_end;
  444. mode->htotal = umode->htotal;
  445. mode->hskew = umode->hskew;
  446. mode->vdisplay = umode->vdisplay;
  447. mode->vsync_start = umode->vsync_start;
  448. mode->vsync_end = umode->vsync_end;
  449. mode->vtotal = umode->vtotal;
  450. mode->vscan = umode->vscan;
  451. mode->vrefresh = umode->vrefresh;
  452. mode->flags = umode->flags;
  453. mode->type = umode->type;
  454. strncpy(mode->name, umode->name, DRM_DISPLAY_MODE_LEN);
  455. mode->name[DRM_DISPLAY_MODE_LEN-1] = 0;
  456. }
  457. connector_funcs = (struct drm_connector_helper_funcs *)
  458. connector->helper_private;
  459. if (connector_funcs->mode_valid) {
  460. resp = connector_funcs->mode_valid(connector, mode);
  461. arg->data = resp;
  462. }
  463. /*do some clean up work*/
  464. if (mode)
  465. drm_mode_destroy(dev, mode);
  466. mode_op_out:
  467. mutex_unlock(&dev->mode_config.mutex);
  468. return ret;
  469. default:
  470. dev_dbg(dev->dev, "Unsupported psb mode operation\n");
  471. return -EOPNOTSUPP;
  472. }
  473. return 0;
  474. }
  475. static int psb_stolen_memory_ioctl(struct drm_device *dev, void *data,
  476. struct drm_file *file_priv)
  477. {
  478. struct drm_psb_private *dev_priv = psb_priv(dev);
  479. struct drm_psb_stolen_memory_arg *arg = data;
  480. arg->base = dev_priv->stolen_base;
  481. arg->size = dev_priv->vram_stolen_size;
  482. return 0;
  483. }
  484. static int psb_driver_open(struct drm_device *dev, struct drm_file *priv)
  485. {
  486. return 0;
  487. }
  488. static void psb_driver_close(struct drm_device *dev, struct drm_file *priv)
  489. {
  490. }
  491. static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
  492. unsigned long arg)
  493. {
  494. struct drm_file *file_priv = filp->private_data;
  495. struct drm_device *dev = file_priv->minor->dev;
  496. struct drm_psb_private *dev_priv = dev->dev_private;
  497. static unsigned int runtime_allowed;
  498. if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
  499. runtime_allowed++;
  500. pm_runtime_allow(&dev->pdev->dev);
  501. dev_priv->rpm_enabled = 1;
  502. }
  503. return drm_ioctl(filp, cmd, arg);
  504. /* FIXME: do we need to wrap the other side of this */
  505. }
  506. /* When a client dies:
  507. * - Check for and clean up flipped page state
  508. */
  509. void psb_driver_preclose(struct drm_device *dev, struct drm_file *priv)
  510. {
  511. }
  512. static void psb_remove(struct pci_dev *pdev)
  513. {
  514. struct drm_device *dev = pci_get_drvdata(pdev);
  515. drm_put_dev(dev);
  516. }
  517. static const struct dev_pm_ops psb_pm_ops = {
  518. .resume = gma_power_resume,
  519. .suspend = gma_power_suspend,
  520. .runtime_suspend = psb_runtime_suspend,
  521. .runtime_resume = psb_runtime_resume,
  522. .runtime_idle = psb_runtime_idle,
  523. };
  524. static struct vm_operations_struct psb_gem_vm_ops = {
  525. .fault = psb_gem_fault,
  526. .open = drm_gem_vm_open,
  527. .close = drm_gem_vm_close,
  528. };
  529. static const struct file_operations psb_gem_fops = {
  530. .owner = THIS_MODULE,
  531. .open = drm_open,
  532. .release = drm_release,
  533. .unlocked_ioctl = psb_unlocked_ioctl,
  534. .mmap = drm_gem_mmap,
  535. .poll = drm_poll,
  536. .fasync = drm_fasync,
  537. .read = drm_read,
  538. };
  539. static struct drm_driver driver = {
  540. .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | \
  541. DRIVER_IRQ_VBL | DRIVER_MODESET | DRIVER_GEM ,
  542. .load = psb_driver_load,
  543. .unload = psb_driver_unload,
  544. .ioctls = psb_ioctls,
  545. .num_ioctls = DRM_ARRAY_SIZE(psb_ioctls),
  546. .device_is_agp = psb_driver_device_is_agp,
  547. .irq_preinstall = psb_irq_preinstall,
  548. .irq_postinstall = psb_irq_postinstall,
  549. .irq_uninstall = psb_irq_uninstall,
  550. .irq_handler = psb_irq_handler,
  551. .enable_vblank = psb_enable_vblank,
  552. .disable_vblank = psb_disable_vblank,
  553. .get_vblank_counter = psb_get_vblank_counter,
  554. .lastclose = psb_lastclose,
  555. .open = psb_driver_open,
  556. .preclose = psb_driver_preclose,
  557. .postclose = psb_driver_close,
  558. .reclaim_buffers = drm_core_reclaim_buffers,
  559. .gem_init_object = psb_gem_init_object,
  560. .gem_free_object = psb_gem_free_object,
  561. .gem_vm_ops = &psb_gem_vm_ops,
  562. .dumb_create = psb_gem_dumb_create,
  563. .dumb_map_offset = psb_gem_dumb_map_gtt,
  564. .dumb_destroy = psb_gem_dumb_destroy,
  565. .fops = &psb_gem_fops,
  566. .name = DRIVER_NAME,
  567. .desc = DRIVER_DESC,
  568. .date = PSB_DRM_DRIVER_DATE,
  569. .major = PSB_DRM_DRIVER_MAJOR,
  570. .minor = PSB_DRM_DRIVER_MINOR,
  571. .patchlevel = PSB_DRM_DRIVER_PATCHLEVEL
  572. };
  573. static struct pci_driver psb_pci_driver = {
  574. .name = DRIVER_NAME,
  575. .id_table = pciidlist,
  576. .probe = psb_probe,
  577. .remove = psb_remove,
  578. .driver.pm = &psb_pm_ops,
  579. };
  580. static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  581. {
  582. return drm_get_pci_dev(pdev, ent, &driver);
  583. }
  584. static int __init psb_init(void)
  585. {
  586. return drm_pci_init(&driver, &psb_pci_driver);
  587. }
  588. static void __exit psb_exit(void)
  589. {
  590. drm_pci_exit(&driver, &psb_pci_driver);
  591. }
  592. late_initcall(psb_init);
  593. module_exit(psb_exit);
  594. MODULE_AUTHOR("Alan Cox <alan@linux.intel.com> and others");
  595. MODULE_DESCRIPTION(DRIVER_DESC);
  596. MODULE_LICENSE("GPL");