cm_bf527.c 24 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/etherdevice.h>
  17. #include <linux/i2c.h>
  18. #include <linux/irq.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/usb/musb.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/reboot.h>
  24. #include <asm/nand.h>
  25. #include <asm/portmux.h>
  26. #include <asm/dpmc.h>
  27. #include <linux/spi/ad7877.h>
  28. /*
  29. * Name the Board for the /proc/cpuinfo
  30. */
  31. const char bfin_board_name[] = "Bluetechnix CM-BF527";
  32. /*
  33. * Driver needs to know address, irq and flag pin.
  34. */
  35. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  36. #include <linux/usb/isp1760.h>
  37. static struct resource bfin_isp1760_resources[] = {
  38. [0] = {
  39. .start = 0x203C0000,
  40. .end = 0x203C0000 + 0x000fffff,
  41. .flags = IORESOURCE_MEM,
  42. },
  43. [1] = {
  44. .start = IRQ_PF7,
  45. .end = IRQ_PF7,
  46. .flags = IORESOURCE_IRQ,
  47. },
  48. };
  49. static struct isp1760_platform_data isp1760_priv = {
  50. .is_isp1761 = 0,
  51. .bus_width_16 = 1,
  52. .port1_otg = 0,
  53. .analog_oc = 0,
  54. .dack_polarity_high = 0,
  55. .dreq_polarity_high = 0,
  56. };
  57. static struct platform_device bfin_isp1760_device = {
  58. .name = "isp1760",
  59. .id = 0,
  60. .dev = {
  61. .platform_data = &isp1760_priv,
  62. },
  63. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  64. .resource = bfin_isp1760_resources,
  65. };
  66. #endif
  67. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  68. static struct resource musb_resources[] = {
  69. [0] = {
  70. .start = 0xffc03800,
  71. .end = 0xffc03cff,
  72. .flags = IORESOURCE_MEM,
  73. },
  74. [1] = { /* general IRQ */
  75. .start = IRQ_USB_INT0,
  76. .end = IRQ_USB_INT0,
  77. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  78. },
  79. [2] = { /* DMA IRQ */
  80. .start = IRQ_USB_DMA,
  81. .end = IRQ_USB_DMA,
  82. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  83. },
  84. };
  85. static struct musb_hdrc_config musb_config = {
  86. .multipoint = 0,
  87. .dyn_fifo = 0,
  88. .soft_con = 1,
  89. .dma = 1,
  90. .num_eps = 8,
  91. .dma_channels = 8,
  92. .gpio_vrsel = GPIO_PF11,
  93. /* Some custom boards need to be active low, just set it to "0"
  94. * if it is the case.
  95. */
  96. .gpio_vrsel_active = 1,
  97. };
  98. static struct musb_hdrc_platform_data musb_plat = {
  99. #if defined(CONFIG_USB_MUSB_OTG)
  100. .mode = MUSB_OTG,
  101. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  102. .mode = MUSB_HOST,
  103. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  104. .mode = MUSB_PERIPHERAL,
  105. #endif
  106. .config = &musb_config,
  107. };
  108. static u64 musb_dmamask = ~(u32)0;
  109. static struct platform_device musb_device = {
  110. .name = "musb_hdrc",
  111. .id = 0,
  112. .dev = {
  113. .dma_mask = &musb_dmamask,
  114. .coherent_dma_mask = 0xffffffff,
  115. .platform_data = &musb_plat,
  116. },
  117. .num_resources = ARRAY_SIZE(musb_resources),
  118. .resource = musb_resources,
  119. };
  120. #endif
  121. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  122. static struct mtd_partition partition_info[] = {
  123. {
  124. .name = "linux kernel(nand)",
  125. .offset = 0,
  126. .size = 4 * 1024 * 1024,
  127. },
  128. {
  129. .name = "file system(nand)",
  130. .offset = MTDPART_OFS_APPEND,
  131. .size = MTDPART_SIZ_FULL,
  132. },
  133. };
  134. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  135. .data_width = NFC_NWIDTH_8,
  136. .partitions = partition_info,
  137. .nr_partitions = ARRAY_SIZE(partition_info),
  138. .rd_dly = 3,
  139. .wr_dly = 3,
  140. };
  141. static struct resource bf5xx_nand_resources[] = {
  142. {
  143. .start = NFC_CTL,
  144. .end = NFC_DATA_RD + 2,
  145. .flags = IORESOURCE_MEM,
  146. },
  147. {
  148. .start = CH_NFC,
  149. .end = CH_NFC,
  150. .flags = IORESOURCE_IRQ,
  151. },
  152. };
  153. static struct platform_device bf5xx_nand_device = {
  154. .name = "bf5xx-nand",
  155. .id = 0,
  156. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  157. .resource = bf5xx_nand_resources,
  158. .dev = {
  159. .platform_data = &bf5xx_nand_platform,
  160. },
  161. };
  162. #endif
  163. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  164. static struct resource bfin_pcmcia_cf_resources[] = {
  165. {
  166. .start = 0x20310000, /* IO PORT */
  167. .end = 0x20312000,
  168. .flags = IORESOURCE_MEM,
  169. }, {
  170. .start = 0x20311000, /* Attribute Memory */
  171. .end = 0x20311FFF,
  172. .flags = IORESOURCE_MEM,
  173. }, {
  174. .start = IRQ_PF4,
  175. .end = IRQ_PF4,
  176. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  177. }, {
  178. .start = 6, /* Card Detect PF6 */
  179. .end = 6,
  180. .flags = IORESOURCE_IRQ,
  181. },
  182. };
  183. static struct platform_device bfin_pcmcia_cf_device = {
  184. .name = "bfin_cf_pcmcia",
  185. .id = -1,
  186. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  187. .resource = bfin_pcmcia_cf_resources,
  188. };
  189. #endif
  190. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  191. static struct platform_device rtc_device = {
  192. .name = "rtc-bfin",
  193. .id = -1,
  194. };
  195. #endif
  196. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  197. #include <linux/smc91x.h>
  198. static struct smc91x_platdata smc91x_info = {
  199. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  200. .leda = RPC_LED_100_10,
  201. .ledb = RPC_LED_TX_RX,
  202. };
  203. static struct resource smc91x_resources[] = {
  204. {
  205. .name = "smc91x-regs",
  206. .start = 0x20300300,
  207. .end = 0x20300300 + 16,
  208. .flags = IORESOURCE_MEM,
  209. }, {
  210. .start = IRQ_PF7,
  211. .end = IRQ_PF7,
  212. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  213. },
  214. };
  215. static struct platform_device smc91x_device = {
  216. .name = "smc91x",
  217. .id = 0,
  218. .num_resources = ARRAY_SIZE(smc91x_resources),
  219. .resource = smc91x_resources,
  220. .dev = {
  221. .platform_data = &smc91x_info,
  222. },
  223. };
  224. #endif
  225. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  226. static struct resource dm9000_resources[] = {
  227. [0] = {
  228. .start = 0x203FB800,
  229. .end = 0x203FB800 + 1,
  230. .flags = IORESOURCE_MEM,
  231. },
  232. [1] = {
  233. .start = 0x203FB804,
  234. .end = 0x203FB804 + 1,
  235. .flags = IORESOURCE_MEM,
  236. },
  237. [2] = {
  238. .start = IRQ_PF9,
  239. .end = IRQ_PF9,
  240. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  241. },
  242. };
  243. static struct platform_device dm9000_device = {
  244. .name = "dm9000",
  245. .id = -1,
  246. .num_resources = ARRAY_SIZE(dm9000_resources),
  247. .resource = dm9000_resources,
  248. };
  249. #endif
  250. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  251. #include <linux/bfin_mac.h>
  252. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  253. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  254. {
  255. .addr = 1,
  256. .irq = IRQ_MAC_PHYINT,
  257. },
  258. };
  259. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  260. .phydev_number = 1,
  261. .phydev_data = bfin_phydev_data,
  262. .phy_mode = PHY_INTERFACE_MODE_RMII,
  263. .mac_peripherals = bfin_mac_peripherals,
  264. };
  265. static struct platform_device bfin_mii_bus = {
  266. .name = "bfin_mii_bus",
  267. .dev = {
  268. .platform_data = &bfin_mii_bus_data,
  269. }
  270. };
  271. static struct platform_device bfin_mac_device = {
  272. .name = "bfin_mac",
  273. .dev = {
  274. .platform_data = &bfin_mii_bus,
  275. }
  276. };
  277. #endif
  278. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  279. static struct resource net2272_bfin_resources[] = {
  280. {
  281. .start = 0x20300000,
  282. .end = 0x20300000 + 0x100,
  283. .flags = IORESOURCE_MEM,
  284. }, {
  285. .start = IRQ_PF7,
  286. .end = IRQ_PF7,
  287. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  288. },
  289. };
  290. static struct platform_device net2272_bfin_device = {
  291. .name = "net2272",
  292. .id = -1,
  293. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  294. .resource = net2272_bfin_resources,
  295. };
  296. #endif
  297. #if defined(CONFIG_MTD_M25P80) \
  298. || defined(CONFIG_MTD_M25P80_MODULE)
  299. static struct mtd_partition bfin_spi_flash_partitions[] = {
  300. {
  301. .name = "bootloader(spi)",
  302. .size = 0x00040000,
  303. .offset = 0,
  304. .mask_flags = MTD_CAP_ROM
  305. }, {
  306. .name = "linux kernel(spi)",
  307. .size = MTDPART_SIZ_FULL,
  308. .offset = MTDPART_OFS_APPEND,
  309. }
  310. };
  311. static struct flash_platform_data bfin_spi_flash_data = {
  312. .name = "m25p80",
  313. .parts = bfin_spi_flash_partitions,
  314. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  315. .type = "m25p16",
  316. };
  317. /* SPI flash chip (m25p64) */
  318. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  319. .enable_dma = 0, /* use dma transfer with this chip*/
  320. .bits_per_word = 8,
  321. };
  322. #endif
  323. #if defined(CONFIG_BFIN_SPI_ADC) \
  324. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  325. /* SPI ADC chip */
  326. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  327. .enable_dma = 1, /* use dma transfer with this chip*/
  328. .bits_per_word = 16,
  329. };
  330. #endif
  331. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  332. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  333. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  334. .enable_dma = 0,
  335. .bits_per_word = 16,
  336. };
  337. #endif
  338. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  339. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  340. .enable_dma = 0,
  341. .bits_per_word = 8,
  342. };
  343. #endif
  344. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  345. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  346. .enable_dma = 0,
  347. .bits_per_word = 16,
  348. };
  349. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  350. .model = 7877,
  351. .vref_delay_usecs = 50, /* internal, no capacitor */
  352. .x_plate_ohms = 419,
  353. .y_plate_ohms = 486,
  354. .pressure_max = 1000,
  355. .pressure_min = 0,
  356. .stopacq_polarity = 1,
  357. .first_conversion_delay = 3,
  358. .acquisition_time = 1,
  359. .averaging = 1,
  360. .pen_down_acc_interval = 1,
  361. };
  362. #endif
  363. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  364. && defined(CONFIG_SND_SOC_WM8731_SPI)
  365. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  366. .enable_dma = 0,
  367. .bits_per_word = 16,
  368. };
  369. #endif
  370. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  371. static struct bfin5xx_spi_chip spidev_chip_info = {
  372. .enable_dma = 0,
  373. .bits_per_word = 8,
  374. };
  375. #endif
  376. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  377. #if defined(CONFIG_MTD_M25P80) \
  378. || defined(CONFIG_MTD_M25P80_MODULE)
  379. {
  380. /* the modalias must be the same as spi device driver name */
  381. .modalias = "m25p80", /* Name of spi_driver for this device */
  382. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  383. .bus_num = 0, /* Framework bus number */
  384. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  385. .platform_data = &bfin_spi_flash_data,
  386. .controller_data = &spi_flash_chip_info,
  387. .mode = SPI_MODE_3,
  388. },
  389. #endif
  390. #if defined(CONFIG_BFIN_SPI_ADC) \
  391. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  392. {
  393. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  394. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  395. .bus_num = 0, /* Framework bus number */
  396. .chip_select = 1, /* Framework chip select. */
  397. .platform_data = NULL, /* No spi_driver specific config */
  398. .controller_data = &spi_adc_chip_info,
  399. },
  400. #endif
  401. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  402. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  403. {
  404. .modalias = "ad183x",
  405. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  406. .bus_num = 0,
  407. .chip_select = 4,
  408. .controller_data = &ad1836_spi_chip_info,
  409. },
  410. #endif
  411. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  412. {
  413. .modalias = "mmc_spi",
  414. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  415. .bus_num = 0,
  416. .chip_select = 5,
  417. .controller_data = &mmc_spi_chip_info,
  418. .mode = SPI_MODE_3,
  419. },
  420. #endif
  421. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  422. {
  423. .modalias = "ad7877",
  424. .platform_data = &bfin_ad7877_ts_info,
  425. .irq = IRQ_PF8,
  426. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  427. .bus_num = 0,
  428. .chip_select = 2,
  429. .controller_data = &spi_ad7877_chip_info,
  430. },
  431. #endif
  432. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  433. && defined(CONFIG_SND_SOC_WM8731_SPI)
  434. {
  435. .modalias = "wm8731",
  436. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  437. .bus_num = 0,
  438. .chip_select = 5,
  439. .controller_data = &spi_wm8731_chip_info,
  440. .mode = SPI_MODE_0,
  441. },
  442. #endif
  443. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  444. {
  445. .modalias = "spidev",
  446. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  447. .bus_num = 0,
  448. .chip_select = 1,
  449. .controller_data = &spidev_chip_info,
  450. },
  451. #endif
  452. };
  453. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  454. /* SPI controller data */
  455. static struct bfin5xx_spi_master bfin_spi0_info = {
  456. .num_chipselect = 8,
  457. .enable_dma = 1, /* master has the ability to do dma transfer */
  458. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  459. };
  460. /* SPI (0) */
  461. static struct resource bfin_spi0_resource[] = {
  462. [0] = {
  463. .start = SPI0_REGBASE,
  464. .end = SPI0_REGBASE + 0xFF,
  465. .flags = IORESOURCE_MEM,
  466. },
  467. [1] = {
  468. .start = CH_SPI,
  469. .end = CH_SPI,
  470. .flags = IORESOURCE_DMA,
  471. },
  472. [2] = {
  473. .start = IRQ_SPI,
  474. .end = IRQ_SPI,
  475. .flags = IORESOURCE_IRQ,
  476. },
  477. };
  478. static struct platform_device bfin_spi0_device = {
  479. .name = "bfin-spi",
  480. .id = 0, /* Bus number */
  481. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  482. .resource = bfin_spi0_resource,
  483. .dev = {
  484. .platform_data = &bfin_spi0_info, /* Passed to driver */
  485. },
  486. };
  487. #endif /* spi master and devices */
  488. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  489. static struct mtd_partition cm_partitions[] = {
  490. {
  491. .name = "bootloader(nor)",
  492. .size = 0x40000,
  493. .offset = 0,
  494. }, {
  495. .name = "linux kernel(nor)",
  496. .size = 0x100000,
  497. .offset = MTDPART_OFS_APPEND,
  498. }, {
  499. .name = "file system(nor)",
  500. .size = MTDPART_SIZ_FULL,
  501. .offset = MTDPART_OFS_APPEND,
  502. }
  503. };
  504. static struct physmap_flash_data cm_flash_data = {
  505. .width = 2,
  506. .parts = cm_partitions,
  507. .nr_parts = ARRAY_SIZE(cm_partitions),
  508. };
  509. static unsigned cm_flash_gpios[] = { GPIO_PH9, GPIO_PG11 };
  510. static struct resource cm_flash_resource[] = {
  511. {
  512. .name = "cfi_probe",
  513. .start = 0x20000000,
  514. .end = 0x201fffff,
  515. .flags = IORESOURCE_MEM,
  516. }, {
  517. .start = (unsigned long)cm_flash_gpios,
  518. .end = ARRAY_SIZE(cm_flash_gpios),
  519. .flags = IORESOURCE_IRQ,
  520. }
  521. };
  522. static struct platform_device cm_flash_device = {
  523. .name = "gpio-addr-flash",
  524. .id = 0,
  525. .dev = {
  526. .platform_data = &cm_flash_data,
  527. },
  528. .num_resources = ARRAY_SIZE(cm_flash_resource),
  529. .resource = cm_flash_resource,
  530. };
  531. #endif
  532. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  533. #ifdef CONFIG_SERIAL_BFIN_UART0
  534. static struct resource bfin_uart0_resources[] = {
  535. {
  536. .start = UART0_THR,
  537. .end = UART0_GCTL+2,
  538. .flags = IORESOURCE_MEM,
  539. },
  540. {
  541. .start = IRQ_UART0_RX,
  542. .end = IRQ_UART0_RX+1,
  543. .flags = IORESOURCE_IRQ,
  544. },
  545. {
  546. .start = IRQ_UART0_ERROR,
  547. .end = IRQ_UART0_ERROR,
  548. .flags = IORESOURCE_IRQ,
  549. },
  550. {
  551. .start = CH_UART0_TX,
  552. .end = CH_UART0_TX,
  553. .flags = IORESOURCE_DMA,
  554. },
  555. {
  556. .start = CH_UART0_RX,
  557. .end = CH_UART0_RX,
  558. .flags = IORESOURCE_DMA,
  559. },
  560. };
  561. unsigned short bfin_uart0_peripherals[] = {
  562. P_UART0_TX, P_UART0_RX, 0
  563. };
  564. static struct platform_device bfin_uart0_device = {
  565. .name = "bfin-uart",
  566. .id = 0,
  567. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  568. .resource = bfin_uart0_resources,
  569. .dev = {
  570. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  571. },
  572. };
  573. #endif
  574. #ifdef CONFIG_SERIAL_BFIN_UART1
  575. static struct resource bfin_uart1_resources[] = {
  576. {
  577. .start = UART1_THR,
  578. .end = UART1_GCTL+2,
  579. .flags = IORESOURCE_MEM,
  580. },
  581. {
  582. .start = IRQ_UART1_RX,
  583. .end = IRQ_UART1_RX+1,
  584. .flags = IORESOURCE_IRQ,
  585. },
  586. {
  587. .start = IRQ_UART1_ERROR,
  588. .end = IRQ_UART1_ERROR,
  589. .flags = IORESOURCE_IRQ,
  590. },
  591. {
  592. .start = CH_UART1_TX,
  593. .end = CH_UART1_TX,
  594. .flags = IORESOURCE_DMA,
  595. },
  596. {
  597. .start = CH_UART1_RX,
  598. .end = CH_UART1_RX,
  599. .flags = IORESOURCE_DMA,
  600. },
  601. #ifdef CONFIG_BFIN_UART1_CTSRTS
  602. { /* CTS pin */
  603. .start = GPIO_PF9,
  604. .end = GPIO_PF9,
  605. .flags = IORESOURCE_IO,
  606. },
  607. { /* RTS pin */
  608. .start = GPIO_PF10,
  609. .end = GPIO_PF10,
  610. .flags = IORESOURCE_IO,
  611. },
  612. #endif
  613. };
  614. unsigned short bfin_uart1_peripherals[] = {
  615. P_UART1_TX, P_UART1_RX, 0
  616. };
  617. static struct platform_device bfin_uart1_device = {
  618. .name = "bfin-uart",
  619. .id = 1,
  620. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  621. .resource = bfin_uart1_resources,
  622. .dev = {
  623. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  624. },
  625. };
  626. #endif
  627. #endif
  628. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  629. #ifdef CONFIG_BFIN_SIR0
  630. static struct resource bfin_sir0_resources[] = {
  631. {
  632. .start = 0xFFC00400,
  633. .end = 0xFFC004FF,
  634. .flags = IORESOURCE_MEM,
  635. },
  636. {
  637. .start = IRQ_UART0_RX,
  638. .end = IRQ_UART0_RX+1,
  639. .flags = IORESOURCE_IRQ,
  640. },
  641. {
  642. .start = CH_UART0_RX,
  643. .end = CH_UART0_RX+1,
  644. .flags = IORESOURCE_DMA,
  645. },
  646. };
  647. static struct platform_device bfin_sir0_device = {
  648. .name = "bfin_sir",
  649. .id = 0,
  650. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  651. .resource = bfin_sir0_resources,
  652. };
  653. #endif
  654. #ifdef CONFIG_BFIN_SIR1
  655. static struct resource bfin_sir1_resources[] = {
  656. {
  657. .start = 0xFFC02000,
  658. .end = 0xFFC020FF,
  659. .flags = IORESOURCE_MEM,
  660. },
  661. {
  662. .start = IRQ_UART1_RX,
  663. .end = IRQ_UART1_RX+1,
  664. .flags = IORESOURCE_IRQ,
  665. },
  666. {
  667. .start = CH_UART1_RX,
  668. .end = CH_UART1_RX+1,
  669. .flags = IORESOURCE_DMA,
  670. },
  671. };
  672. static struct platform_device bfin_sir1_device = {
  673. .name = "bfin_sir",
  674. .id = 1,
  675. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  676. .resource = bfin_sir1_resources,
  677. };
  678. #endif
  679. #endif
  680. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  681. static struct resource bfin_twi0_resource[] = {
  682. [0] = {
  683. .start = TWI0_REGBASE,
  684. .end = TWI0_REGBASE,
  685. .flags = IORESOURCE_MEM,
  686. },
  687. [1] = {
  688. .start = IRQ_TWI,
  689. .end = IRQ_TWI,
  690. .flags = IORESOURCE_IRQ,
  691. },
  692. };
  693. static struct platform_device i2c_bfin_twi_device = {
  694. .name = "i2c-bfin-twi",
  695. .id = 0,
  696. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  697. .resource = bfin_twi0_resource,
  698. };
  699. #endif
  700. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  701. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  702. {
  703. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  704. },
  705. #endif
  706. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  707. {
  708. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  709. .irq = IRQ_PF8,
  710. },
  711. #endif
  712. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  713. {
  714. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  715. },
  716. #endif
  717. };
  718. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  719. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  720. static struct resource bfin_sport0_uart_resources[] = {
  721. {
  722. .start = SPORT0_TCR1,
  723. .end = SPORT0_MRCS3+4,
  724. .flags = IORESOURCE_MEM,
  725. },
  726. {
  727. .start = IRQ_SPORT0_RX,
  728. .end = IRQ_SPORT0_RX+1,
  729. .flags = IORESOURCE_IRQ,
  730. },
  731. {
  732. .start = IRQ_SPORT0_ERROR,
  733. .end = IRQ_SPORT0_ERROR,
  734. .flags = IORESOURCE_IRQ,
  735. },
  736. };
  737. unsigned short bfin_sport0_peripherals[] = {
  738. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  739. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  740. };
  741. static struct platform_device bfin_sport0_uart_device = {
  742. .name = "bfin-sport-uart",
  743. .id = 0,
  744. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  745. .resource = bfin_sport0_uart_resources,
  746. .dev = {
  747. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  748. },
  749. };
  750. #endif
  751. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  752. static struct resource bfin_sport1_uart_resources[] = {
  753. {
  754. .start = SPORT1_TCR1,
  755. .end = SPORT1_MRCS3+4,
  756. .flags = IORESOURCE_MEM,
  757. },
  758. {
  759. .start = IRQ_SPORT1_RX,
  760. .end = IRQ_SPORT1_RX+1,
  761. .flags = IORESOURCE_IRQ,
  762. },
  763. {
  764. .start = IRQ_SPORT1_ERROR,
  765. .end = IRQ_SPORT1_ERROR,
  766. .flags = IORESOURCE_IRQ,
  767. },
  768. };
  769. unsigned short bfin_sport1_peripherals[] = {
  770. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  771. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
  772. };
  773. static struct platform_device bfin_sport1_uart_device = {
  774. .name = "bfin-sport-uart",
  775. .id = 1,
  776. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  777. .resource = bfin_sport1_uart_resources,
  778. .dev = {
  779. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  780. },
  781. };
  782. #endif
  783. #endif
  784. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  785. #include <linux/input.h>
  786. #include <linux/gpio_keys.h>
  787. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  788. {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"},
  789. };
  790. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  791. .buttons = bfin_gpio_keys_table,
  792. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  793. };
  794. static struct platform_device bfin_device_gpiokeys = {
  795. .name = "gpio-keys",
  796. .dev = {
  797. .platform_data = &bfin_gpio_keys_data,
  798. },
  799. };
  800. #endif
  801. static const unsigned int cclk_vlev_datasheet[] =
  802. {
  803. VRPAIR(VLEV_100, 400000000),
  804. VRPAIR(VLEV_105, 426000000),
  805. VRPAIR(VLEV_110, 500000000),
  806. VRPAIR(VLEV_115, 533000000),
  807. VRPAIR(VLEV_120, 600000000),
  808. };
  809. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  810. .tuple_tab = cclk_vlev_datasheet,
  811. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  812. .vr_settling_time = 25 /* us */,
  813. };
  814. static struct platform_device bfin_dpmc = {
  815. .name = "bfin dpmc",
  816. .dev = {
  817. .platform_data = &bfin_dmpc_vreg_data,
  818. },
  819. };
  820. static struct platform_device *cmbf527_devices[] __initdata = {
  821. &bfin_dpmc,
  822. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  823. &bf5xx_nand_device,
  824. #endif
  825. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  826. &bfin_pcmcia_cf_device,
  827. #endif
  828. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  829. &rtc_device,
  830. #endif
  831. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  832. &bfin_isp1760_device,
  833. #endif
  834. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  835. &musb_device,
  836. #endif
  837. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  838. &smc91x_device,
  839. #endif
  840. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  841. &dm9000_device,
  842. #endif
  843. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  844. &bfin_mii_bus,
  845. &bfin_mac_device,
  846. #endif
  847. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  848. &net2272_bfin_device,
  849. #endif
  850. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  851. &bfin_spi0_device,
  852. #endif
  853. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  854. #ifdef CONFIG_SERIAL_BFIN_UART0
  855. &bfin_uart0_device,
  856. #endif
  857. #ifdef CONFIG_SERIAL_BFIN_UART1
  858. &bfin_uart1_device,
  859. #endif
  860. #endif
  861. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  862. #ifdef CONFIG_BFIN_SIR0
  863. &bfin_sir0_device,
  864. #endif
  865. #ifdef CONFIG_BFIN_SIR1
  866. &bfin_sir1_device,
  867. #endif
  868. #endif
  869. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  870. &i2c_bfin_twi_device,
  871. #endif
  872. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  873. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  874. &bfin_sport0_uart_device,
  875. #endif
  876. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  877. &bfin_sport1_uart_device,
  878. #endif
  879. #endif
  880. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  881. &bfin_device_gpiokeys,
  882. #endif
  883. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  884. &cm_flash_device,
  885. #endif
  886. };
  887. static int __init cm_init(void)
  888. {
  889. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  890. i2c_register_board_info(0, bfin_i2c_board_info,
  891. ARRAY_SIZE(bfin_i2c_board_info));
  892. platform_add_devices(cmbf527_devices, ARRAY_SIZE(cmbf527_devices));
  893. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  894. return 0;
  895. }
  896. arch_initcall(cm_init);
  897. static struct platform_device *cmbf527_early_devices[] __initdata = {
  898. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  899. #ifdef CONFIG_SERIAL_BFIN_UART0
  900. &bfin_uart0_device,
  901. #endif
  902. #ifdef CONFIG_SERIAL_BFIN_UART1
  903. &bfin_uart1_device,
  904. #endif
  905. #endif
  906. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  907. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  908. &bfin_sport0_uart_device,
  909. #endif
  910. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  911. &bfin_sport1_uart_device,
  912. #endif
  913. #endif
  914. };
  915. void __init native_machine_early_platform_add_devices(void)
  916. {
  917. printk(KERN_INFO "register early platform devices\n");
  918. early_platform_add_devices(cmbf527_early_devices,
  919. ARRAY_SIZE(cmbf527_early_devices));
  920. }
  921. void native_machine_restart(char *cmd)
  922. {
  923. /* workaround reboot hang when booting from SPI */
  924. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  925. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  926. }
  927. void bfin_get_ether_addr(char *addr)
  928. {
  929. random_ether_addr(addr);
  930. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  931. }
  932. EXPORT_SYMBOL(bfin_get_ether_addr);