regcache.c 9.6 KB

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  1. /*
  2. * Register cache access API
  3. *
  4. * Copyright 2011 Wolfson Microelectronics plc
  5. *
  6. * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/slab.h>
  13. #include <linux/export.h>
  14. #include <trace/events/regmap.h>
  15. #include <linux/bsearch.h>
  16. #include <linux/sort.h>
  17. #include "internal.h"
  18. static const struct regcache_ops *cache_types[] = {
  19. &regcache_indexed_ops,
  20. &regcache_rbtree_ops,
  21. &regcache_lzo_ops,
  22. };
  23. static int regcache_hw_init(struct regmap *map)
  24. {
  25. int i, j;
  26. int ret;
  27. int count;
  28. unsigned int val;
  29. void *tmp_buf;
  30. if (!map->num_reg_defaults_raw)
  31. return -EINVAL;
  32. if (!map->reg_defaults_raw) {
  33. dev_warn(map->dev, "No cache defaults, reading back from HW\n");
  34. tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
  35. if (!tmp_buf)
  36. return -EINVAL;
  37. ret = regmap_bulk_read(map, 0, tmp_buf,
  38. map->num_reg_defaults_raw);
  39. if (ret < 0) {
  40. kfree(tmp_buf);
  41. return ret;
  42. }
  43. map->reg_defaults_raw = tmp_buf;
  44. map->cache_free = 1;
  45. }
  46. /* calculate the size of reg_defaults */
  47. for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
  48. val = regcache_get_val(map->reg_defaults_raw,
  49. i, map->cache_word_size);
  50. if (!val)
  51. continue;
  52. count++;
  53. }
  54. map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
  55. GFP_KERNEL);
  56. if (!map->reg_defaults) {
  57. ret = -ENOMEM;
  58. goto err_free;
  59. }
  60. /* fill the reg_defaults */
  61. map->num_reg_defaults = count;
  62. for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
  63. val = regcache_get_val(map->reg_defaults_raw,
  64. i, map->cache_word_size);
  65. if (!val)
  66. continue;
  67. map->reg_defaults[j].reg = i;
  68. map->reg_defaults[j].def = val;
  69. j++;
  70. }
  71. return 0;
  72. err_free:
  73. if (map->cache_free)
  74. kfree(map->reg_defaults_raw);
  75. return ret;
  76. }
  77. int regcache_init(struct regmap *map)
  78. {
  79. int ret;
  80. int i;
  81. void *tmp_buf;
  82. if (map->cache_type == REGCACHE_NONE) {
  83. map->cache_bypass = true;
  84. return 0;
  85. }
  86. for (i = 0; i < ARRAY_SIZE(cache_types); i++)
  87. if (cache_types[i]->type == map->cache_type)
  88. break;
  89. if (i == ARRAY_SIZE(cache_types)) {
  90. dev_err(map->dev, "Could not match compress type: %d\n",
  91. map->cache_type);
  92. return -EINVAL;
  93. }
  94. map->cache = NULL;
  95. map->cache_ops = cache_types[i];
  96. if (!map->cache_ops->read ||
  97. !map->cache_ops->write ||
  98. !map->cache_ops->name)
  99. return -EINVAL;
  100. /* We still need to ensure that the reg_defaults
  101. * won't vanish from under us. We'll need to make
  102. * a copy of it.
  103. */
  104. if (map->reg_defaults) {
  105. if (!map->num_reg_defaults)
  106. return -EINVAL;
  107. tmp_buf = kmemdup(map->reg_defaults, map->num_reg_defaults *
  108. sizeof(struct reg_default), GFP_KERNEL);
  109. if (!tmp_buf)
  110. return -ENOMEM;
  111. map->reg_defaults = tmp_buf;
  112. } else if (map->num_reg_defaults_raw) {
  113. /* Some devices such as PMICs don't have cache defaults,
  114. * we cope with this by reading back the HW registers and
  115. * crafting the cache defaults by hand.
  116. */
  117. ret = regcache_hw_init(map);
  118. if (ret < 0)
  119. return ret;
  120. }
  121. if (!map->max_register)
  122. map->max_register = map->num_reg_defaults_raw;
  123. if (map->cache_ops->init) {
  124. dev_dbg(map->dev, "Initializing %s cache\n",
  125. map->cache_ops->name);
  126. return map->cache_ops->init(map);
  127. }
  128. return 0;
  129. }
  130. void regcache_exit(struct regmap *map)
  131. {
  132. if (map->cache_type == REGCACHE_NONE)
  133. return;
  134. BUG_ON(!map->cache_ops);
  135. kfree(map->reg_defaults);
  136. if (map->cache_free)
  137. kfree(map->reg_defaults_raw);
  138. if (map->cache_ops->exit) {
  139. dev_dbg(map->dev, "Destroying %s cache\n",
  140. map->cache_ops->name);
  141. map->cache_ops->exit(map);
  142. }
  143. }
  144. /**
  145. * regcache_read: Fetch the value of a given register from the cache.
  146. *
  147. * @map: map to configure.
  148. * @reg: The register index.
  149. * @value: The value to be returned.
  150. *
  151. * Return a negative value on failure, 0 on success.
  152. */
  153. int regcache_read(struct regmap *map,
  154. unsigned int reg, unsigned int *value)
  155. {
  156. if (map->cache_type == REGCACHE_NONE)
  157. return -ENOSYS;
  158. BUG_ON(!map->cache_ops);
  159. if (!regmap_readable(map, reg))
  160. return -EIO;
  161. if (!regmap_volatile(map, reg))
  162. return map->cache_ops->read(map, reg, value);
  163. return -EINVAL;
  164. }
  165. EXPORT_SYMBOL_GPL(regcache_read);
  166. /**
  167. * regcache_write: Set the value of a given register in the cache.
  168. *
  169. * @map: map to configure.
  170. * @reg: The register index.
  171. * @value: The new register value.
  172. *
  173. * Return a negative value on failure, 0 on success.
  174. */
  175. int regcache_write(struct regmap *map,
  176. unsigned int reg, unsigned int value)
  177. {
  178. if (map->cache_type == REGCACHE_NONE)
  179. return 0;
  180. BUG_ON(!map->cache_ops);
  181. if (!regmap_writeable(map, reg))
  182. return -EIO;
  183. if (!regmap_volatile(map, reg))
  184. return map->cache_ops->write(map, reg, value);
  185. return 0;
  186. }
  187. EXPORT_SYMBOL_GPL(regcache_write);
  188. /**
  189. * regcache_sync: Sync the register cache with the hardware.
  190. *
  191. * @map: map to configure.
  192. *
  193. * Any registers that should not be synced should be marked as
  194. * volatile. In general drivers can choose not to use the provided
  195. * syncing functionality if they so require.
  196. *
  197. * Return a negative value on failure, 0 on success.
  198. */
  199. int regcache_sync(struct regmap *map)
  200. {
  201. int ret = 0;
  202. unsigned int val;
  203. unsigned int i;
  204. const char *name;
  205. unsigned int bypass;
  206. BUG_ON(!map->cache_ops);
  207. mutex_lock(&map->lock);
  208. /* Remember the initial bypass state */
  209. bypass = map->cache_bypass;
  210. dev_dbg(map->dev, "Syncing %s cache\n",
  211. map->cache_ops->name);
  212. name = map->cache_ops->name;
  213. trace_regcache_sync(map->dev, name, "start");
  214. if (!map->cache_dirty)
  215. goto out;
  216. if (map->cache_ops->sync) {
  217. ret = map->cache_ops->sync(map);
  218. } else {
  219. for (i = 0; i < map->num_reg_defaults; i++) {
  220. ret = regcache_read(map, i, &val);
  221. if (ret < 0)
  222. goto out;
  223. map->cache_bypass = 1;
  224. ret = _regmap_write(map, i, val);
  225. map->cache_bypass = 0;
  226. if (ret < 0)
  227. goto out;
  228. dev_dbg(map->dev, "Synced register %#x, value %#x\n",
  229. map->reg_defaults[i].reg,
  230. map->reg_defaults[i].def);
  231. }
  232. }
  233. out:
  234. trace_regcache_sync(map->dev, name, "stop");
  235. /* Restore the bypass state */
  236. map->cache_bypass = bypass;
  237. mutex_unlock(&map->lock);
  238. return ret;
  239. }
  240. EXPORT_SYMBOL_GPL(regcache_sync);
  241. /**
  242. * regcache_cache_only: Put a register map into cache only mode
  243. *
  244. * @map: map to configure
  245. * @cache_only: flag if changes should be written to the hardware
  246. *
  247. * When a register map is marked as cache only writes to the register
  248. * map API will only update the register cache, they will not cause
  249. * any hardware changes. This is useful for allowing portions of
  250. * drivers to act as though the device were functioning as normal when
  251. * it is disabled for power saving reasons.
  252. */
  253. void regcache_cache_only(struct regmap *map, bool enable)
  254. {
  255. mutex_lock(&map->lock);
  256. WARN_ON(map->cache_bypass && enable);
  257. map->cache_only = enable;
  258. mutex_unlock(&map->lock);
  259. }
  260. EXPORT_SYMBOL_GPL(regcache_cache_only);
  261. /**
  262. * regcache_mark_dirty: Mark the register cache as dirty
  263. *
  264. * @map: map to mark
  265. *
  266. * Mark the register cache as dirty, for example due to the device
  267. * having been powered down for suspend. If the cache is not marked
  268. * as dirty then the cache sync will be suppressed.
  269. */
  270. void regcache_mark_dirty(struct regmap *map)
  271. {
  272. mutex_lock(&map->lock);
  273. map->cache_dirty = true;
  274. mutex_unlock(&map->lock);
  275. }
  276. EXPORT_SYMBOL_GPL(regcache_mark_dirty);
  277. /**
  278. * regcache_cache_bypass: Put a register map into cache bypass mode
  279. *
  280. * @map: map to configure
  281. * @cache_bypass: flag if changes should not be written to the hardware
  282. *
  283. * When a register map is marked with the cache bypass option, writes
  284. * to the register map API will only update the hardware and not the
  285. * the cache directly. This is useful when syncing the cache back to
  286. * the hardware.
  287. */
  288. void regcache_cache_bypass(struct regmap *map, bool enable)
  289. {
  290. mutex_lock(&map->lock);
  291. WARN_ON(map->cache_only && enable);
  292. map->cache_bypass = enable;
  293. mutex_unlock(&map->lock);
  294. }
  295. EXPORT_SYMBOL_GPL(regcache_cache_bypass);
  296. bool regcache_set_val(void *base, unsigned int idx,
  297. unsigned int val, unsigned int word_size)
  298. {
  299. switch (word_size) {
  300. case 1: {
  301. u8 *cache = base;
  302. if (cache[idx] == val)
  303. return true;
  304. cache[idx] = val;
  305. break;
  306. }
  307. case 2: {
  308. u16 *cache = base;
  309. if (cache[idx] == val)
  310. return true;
  311. cache[idx] = val;
  312. break;
  313. }
  314. default:
  315. BUG();
  316. }
  317. /* unreachable */
  318. return false;
  319. }
  320. unsigned int regcache_get_val(const void *base, unsigned int idx,
  321. unsigned int word_size)
  322. {
  323. if (!base)
  324. return -EINVAL;
  325. switch (word_size) {
  326. case 1: {
  327. const u8 *cache = base;
  328. return cache[idx];
  329. }
  330. case 2: {
  331. const u16 *cache = base;
  332. return cache[idx];
  333. }
  334. default:
  335. BUG();
  336. }
  337. /* unreachable */
  338. return -1;
  339. }
  340. static int regcache_default_cmp(const void *a, const void *b)
  341. {
  342. const struct reg_default *_a = a;
  343. const struct reg_default *_b = b;
  344. return _a->reg - _b->reg;
  345. }
  346. int regcache_lookup_reg(struct regmap *map, unsigned int reg)
  347. {
  348. struct reg_default key;
  349. struct reg_default *r;
  350. key.reg = reg;
  351. key.def = 0;
  352. r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
  353. sizeof(struct reg_default), regcache_default_cmp);
  354. if (r)
  355. return r - map->reg_defaults;
  356. else
  357. return -ENOENT;
  358. }
  359. int regcache_insert_reg(struct regmap *map, unsigned int reg,
  360. unsigned int val)
  361. {
  362. void *tmp;
  363. tmp = krealloc(map->reg_defaults,
  364. (map->num_reg_defaults + 1) * sizeof(struct reg_default),
  365. GFP_KERNEL);
  366. if (!tmp)
  367. return -ENOMEM;
  368. map->reg_defaults = tmp;
  369. map->num_reg_defaults++;
  370. map->reg_defaults[map->num_reg_defaults - 1].reg = reg;
  371. map->reg_defaults[map->num_reg_defaults - 1].def = val;
  372. sort(map->reg_defaults, map->num_reg_defaults,
  373. sizeof(struct reg_default), regcache_default_cmp, NULL);
  374. return 0;
  375. }