exynos_drm_plane.c 6.5 KB

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  1. /*
  2. * Copyright (C) 2011 Samsung Electronics Co.Ltd
  3. * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. *
  10. */
  11. #include "drmP.h"
  12. #include "exynos_drm.h"
  13. #include "exynos_drm_drv.h"
  14. #include "exynos_drm_encoder.h"
  15. #include "exynos_drm_fb.h"
  16. #include "exynos_drm_gem.h"
  17. #define to_exynos_plane(x) container_of(x, struct exynos_plane, base)
  18. struct exynos_plane {
  19. struct drm_plane base;
  20. struct exynos_drm_overlay overlay;
  21. bool enabled;
  22. };
  23. static const uint32_t formats[] = {
  24. DRM_FORMAT_XRGB8888,
  25. DRM_FORMAT_ARGB8888,
  26. DRM_FORMAT_NV12,
  27. DRM_FORMAT_NV12MT,
  28. };
  29. int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
  30. struct drm_framebuffer *fb, int crtc_x, int crtc_y,
  31. unsigned int crtc_w, unsigned int crtc_h,
  32. uint32_t src_x, uint32_t src_y,
  33. uint32_t src_w, uint32_t src_h)
  34. {
  35. struct exynos_plane *exynos_plane = to_exynos_plane(plane);
  36. struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
  37. unsigned int actual_w;
  38. unsigned int actual_h;
  39. int nr;
  40. int i;
  41. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  42. nr = exynos_drm_fb_get_buf_cnt(fb);
  43. for (i = 0; i < nr; i++) {
  44. struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i);
  45. if (!buffer) {
  46. DRM_LOG_KMS("buffer is null\n");
  47. return -EFAULT;
  48. }
  49. overlay->dma_addr[i] = buffer->dma_addr;
  50. overlay->vaddr[i] = buffer->kvaddr;
  51. DRM_DEBUG_KMS("buffer: %d, vaddr = 0x%lx, dma_addr = 0x%lx\n",
  52. i, (unsigned long)overlay->vaddr[i],
  53. (unsigned long)overlay->dma_addr[i]);
  54. }
  55. actual_w = min((unsigned)(crtc->mode.hdisplay - crtc_x), crtc_w);
  56. actual_h = min((unsigned)(crtc->mode.vdisplay - crtc_y), crtc_h);
  57. /* set drm framebuffer data. */
  58. overlay->fb_x = src_x;
  59. overlay->fb_y = src_y;
  60. overlay->fb_width = fb->width;
  61. overlay->fb_height = fb->height;
  62. overlay->src_width = src_w;
  63. overlay->src_height = src_h;
  64. overlay->bpp = fb->bits_per_pixel;
  65. overlay->pitch = fb->pitches[0];
  66. overlay->pixel_format = fb->pixel_format;
  67. /* set overlay range to be displayed. */
  68. overlay->crtc_x = crtc_x;
  69. overlay->crtc_y = crtc_y;
  70. overlay->crtc_width = actual_w;
  71. overlay->crtc_height = actual_h;
  72. /* set drm mode data. */
  73. overlay->mode_width = crtc->mode.hdisplay;
  74. overlay->mode_height = crtc->mode.vdisplay;
  75. overlay->refresh = crtc->mode.vrefresh;
  76. overlay->scan_flag = crtc->mode.flags;
  77. DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
  78. overlay->crtc_x, overlay->crtc_y,
  79. overlay->crtc_width, overlay->crtc_height);
  80. exynos_drm_fn_encoder(crtc, overlay, exynos_drm_encoder_plane_mode_set);
  81. return 0;
  82. }
  83. void exynos_plane_commit(struct drm_plane *plane)
  84. {
  85. struct exynos_plane *exynos_plane = to_exynos_plane(plane);
  86. struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
  87. exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
  88. exynos_drm_encoder_plane_commit);
  89. }
  90. void exynos_plane_dpms(struct drm_plane *plane, int mode)
  91. {
  92. struct exynos_plane *exynos_plane = to_exynos_plane(plane);
  93. struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
  94. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  95. if (mode == DRM_MODE_DPMS_ON) {
  96. if (exynos_plane->enabled)
  97. return;
  98. exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
  99. exynos_drm_encoder_plane_enable);
  100. exynos_plane->enabled = true;
  101. } else {
  102. if (!exynos_plane->enabled)
  103. return;
  104. exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
  105. exynos_drm_encoder_plane_disable);
  106. exynos_plane->enabled = false;
  107. }
  108. }
  109. static int
  110. exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
  111. struct drm_framebuffer *fb, int crtc_x, int crtc_y,
  112. unsigned int crtc_w, unsigned int crtc_h,
  113. uint32_t src_x, uint32_t src_y,
  114. uint32_t src_w, uint32_t src_h)
  115. {
  116. int ret;
  117. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  118. ret = exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y,
  119. crtc_w, crtc_h, src_x >> 16, src_y >> 16,
  120. src_w >> 16, src_h >> 16);
  121. if (ret < 0)
  122. return ret;
  123. plane->crtc = crtc;
  124. plane->fb = crtc->fb;
  125. exynos_plane_commit(plane);
  126. exynos_plane_dpms(plane, DRM_MODE_DPMS_ON);
  127. return 0;
  128. }
  129. static int exynos_disable_plane(struct drm_plane *plane)
  130. {
  131. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  132. exynos_plane_dpms(plane, DRM_MODE_DPMS_OFF);
  133. return 0;
  134. }
  135. static void exynos_plane_destroy(struct drm_plane *plane)
  136. {
  137. struct exynos_plane *exynos_plane = to_exynos_plane(plane);
  138. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  139. exynos_disable_plane(plane);
  140. drm_plane_cleanup(plane);
  141. kfree(exynos_plane);
  142. }
  143. static int exynos_plane_set_property(struct drm_plane *plane,
  144. struct drm_property *property,
  145. uint64_t val)
  146. {
  147. struct drm_device *dev = plane->dev;
  148. struct exynos_plane *exynos_plane = to_exynos_plane(plane);
  149. struct exynos_drm_private *dev_priv = dev->dev_private;
  150. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  151. if (property == dev_priv->plane_zpos_property) {
  152. exynos_plane->overlay.zpos = val;
  153. return 0;
  154. }
  155. return -EINVAL;
  156. }
  157. static struct drm_plane_funcs exynos_plane_funcs = {
  158. .update_plane = exynos_update_plane,
  159. .disable_plane = exynos_disable_plane,
  160. .destroy = exynos_plane_destroy,
  161. .set_property = exynos_plane_set_property,
  162. };
  163. static void exynos_plane_attach_zpos_property(struct drm_plane *plane)
  164. {
  165. struct drm_device *dev = plane->dev;
  166. struct exynos_drm_private *dev_priv = dev->dev_private;
  167. struct drm_property *prop;
  168. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  169. prop = dev_priv->plane_zpos_property;
  170. if (!prop) {
  171. prop = drm_property_create_range(dev, 0, "zpos", 0,
  172. MAX_PLANE - 1);
  173. if (!prop)
  174. return;
  175. dev_priv->plane_zpos_property = prop;
  176. }
  177. drm_object_attach_property(&plane->base, prop, 0);
  178. }
  179. struct drm_plane *exynos_plane_init(struct drm_device *dev,
  180. unsigned int possible_crtcs, bool priv)
  181. {
  182. struct exynos_plane *exynos_plane;
  183. int err;
  184. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  185. exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL);
  186. if (!exynos_plane) {
  187. DRM_ERROR("failed to allocate plane\n");
  188. return NULL;
  189. }
  190. err = drm_plane_init(dev, &exynos_plane->base, possible_crtcs,
  191. &exynos_plane_funcs, formats, ARRAY_SIZE(formats),
  192. priv);
  193. if (err) {
  194. DRM_ERROR("failed to initialize plane\n");
  195. kfree(exynos_plane);
  196. return NULL;
  197. }
  198. if (priv)
  199. exynos_plane->overlay.zpos = DEFAULT_ZPOS;
  200. else
  201. exynos_plane_attach_zpos_property(&exynos_plane->base);
  202. return &exynos_plane->base;
  203. }