be_main.c 57 KB

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  1. /*
  2. * Copyright (C) 2005 - 2009 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@serverengines.com
  12. *
  13. * ServerEngines
  14. * 209 N. Fair Oaks Ave
  15. * Sunnyvale, CA 94085
  16. */
  17. #include "be.h"
  18. #include "be_cmds.h"
  19. #include <asm/div64.h>
  20. MODULE_VERSION(DRV_VER);
  21. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  22. MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
  23. MODULE_AUTHOR("ServerEngines Corporation");
  24. MODULE_LICENSE("GPL");
  25. static unsigned int rx_frag_size = 2048;
  26. module_param(rx_frag_size, uint, S_IRUGO);
  27. MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
  28. static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
  29. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
  30. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
  31. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
  32. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
  33. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
  34. { 0 }
  35. };
  36. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  37. static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
  38. {
  39. struct be_dma_mem *mem = &q->dma_mem;
  40. if (mem->va)
  41. pci_free_consistent(adapter->pdev, mem->size,
  42. mem->va, mem->dma);
  43. }
  44. static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
  45. u16 len, u16 entry_size)
  46. {
  47. struct be_dma_mem *mem = &q->dma_mem;
  48. memset(q, 0, sizeof(*q));
  49. q->len = len;
  50. q->entry_size = entry_size;
  51. mem->size = len * entry_size;
  52. mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
  53. if (!mem->va)
  54. return -1;
  55. memset(mem->va, 0, mem->size);
  56. return 0;
  57. }
  58. static void be_intr_set(struct be_adapter *adapter, bool enable)
  59. {
  60. u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
  61. u32 reg = ioread32(addr);
  62. u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  63. if (!enabled && enable)
  64. reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  65. else if (enabled && !enable)
  66. reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  67. else
  68. return;
  69. iowrite32(reg, addr);
  70. }
  71. static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  72. {
  73. u32 val = 0;
  74. val |= qid & DB_RQ_RING_ID_MASK;
  75. val |= posted << DB_RQ_NUM_POSTED_SHIFT;
  76. iowrite32(val, adapter->db + DB_RQ_OFFSET);
  77. }
  78. static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  79. {
  80. u32 val = 0;
  81. val |= qid & DB_TXULP_RING_ID_MASK;
  82. val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
  83. iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
  84. }
  85. static void be_eq_notify(struct be_adapter *adapter, u16 qid,
  86. bool arm, bool clear_int, u16 num_popped)
  87. {
  88. u32 val = 0;
  89. val |= qid & DB_EQ_RING_ID_MASK;
  90. if (arm)
  91. val |= 1 << DB_EQ_REARM_SHIFT;
  92. if (clear_int)
  93. val |= 1 << DB_EQ_CLR_SHIFT;
  94. val |= 1 << DB_EQ_EVNT_SHIFT;
  95. val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
  96. iowrite32(val, adapter->db + DB_EQ_OFFSET);
  97. }
  98. void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
  99. {
  100. u32 val = 0;
  101. val |= qid & DB_CQ_RING_ID_MASK;
  102. if (arm)
  103. val |= 1 << DB_CQ_REARM_SHIFT;
  104. val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
  105. iowrite32(val, adapter->db + DB_CQ_OFFSET);
  106. }
  107. static int be_mac_addr_set(struct net_device *netdev, void *p)
  108. {
  109. struct be_adapter *adapter = netdev_priv(netdev);
  110. struct sockaddr *addr = p;
  111. int status = 0;
  112. status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
  113. if (status)
  114. return status;
  115. status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
  116. adapter->if_handle, &adapter->pmac_id);
  117. if (!status)
  118. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  119. return status;
  120. }
  121. void netdev_stats_update(struct be_adapter *adapter)
  122. {
  123. struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
  124. struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
  125. struct be_port_rxf_stats *port_stats =
  126. &rxf_stats->port[adapter->port_num];
  127. struct net_device_stats *dev_stats = &adapter->netdev->stats;
  128. struct be_erx_stats *erx_stats = &hw_stats->erx;
  129. dev_stats->rx_packets = port_stats->rx_total_frames;
  130. dev_stats->tx_packets = port_stats->tx_unicastframes +
  131. port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
  132. dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
  133. (u64) port_stats->rx_bytes_lsd;
  134. dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
  135. (u64) port_stats->tx_bytes_lsd;
  136. /* bad pkts received */
  137. dev_stats->rx_errors = port_stats->rx_crc_errors +
  138. port_stats->rx_alignment_symbol_errors +
  139. port_stats->rx_in_range_errors +
  140. port_stats->rx_out_range_errors +
  141. port_stats->rx_frame_too_long +
  142. port_stats->rx_dropped_too_small +
  143. port_stats->rx_dropped_too_short +
  144. port_stats->rx_dropped_header_too_small +
  145. port_stats->rx_dropped_tcp_length +
  146. port_stats->rx_dropped_runt +
  147. port_stats->rx_tcp_checksum_errs +
  148. port_stats->rx_ip_checksum_errs +
  149. port_stats->rx_udp_checksum_errs;
  150. /* no space in linux buffers: best possible approximation */
  151. dev_stats->rx_dropped =
  152. erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
  153. /* detailed rx errors */
  154. dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
  155. port_stats->rx_out_range_errors +
  156. port_stats->rx_frame_too_long;
  157. /* receive ring buffer overflow */
  158. dev_stats->rx_over_errors = 0;
  159. dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
  160. /* frame alignment errors */
  161. dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
  162. /* receiver fifo overrun */
  163. /* drops_no_pbuf is no per i/f, it's per BE card */
  164. dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
  165. port_stats->rx_input_fifo_overflow +
  166. rxf_stats->rx_drops_no_pbuf;
  167. /* receiver missed packetd */
  168. dev_stats->rx_missed_errors = 0;
  169. /* packet transmit problems */
  170. dev_stats->tx_errors = 0;
  171. /* no space available in linux */
  172. dev_stats->tx_dropped = 0;
  173. dev_stats->multicast = port_stats->rx_multicast_frames;
  174. dev_stats->collisions = 0;
  175. /* detailed tx_errors */
  176. dev_stats->tx_aborted_errors = 0;
  177. dev_stats->tx_carrier_errors = 0;
  178. dev_stats->tx_fifo_errors = 0;
  179. dev_stats->tx_heartbeat_errors = 0;
  180. dev_stats->tx_window_errors = 0;
  181. }
  182. void be_link_status_update(struct be_adapter *adapter, bool link_up)
  183. {
  184. struct net_device *netdev = adapter->netdev;
  185. /* If link came up or went down */
  186. if (adapter->link_up != link_up) {
  187. if (link_up) {
  188. netif_start_queue(netdev);
  189. netif_carrier_on(netdev);
  190. printk(KERN_INFO "%s: Link up\n", netdev->name);
  191. } else {
  192. netif_stop_queue(netdev);
  193. netif_carrier_off(netdev);
  194. printk(KERN_INFO "%s: Link down\n", netdev->name);
  195. }
  196. adapter->link_up = link_up;
  197. }
  198. }
  199. /* Update the EQ delay n BE based on the RX frags consumed / sec */
  200. static void be_rx_eqd_update(struct be_adapter *adapter)
  201. {
  202. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  203. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  204. ulong now = jiffies;
  205. u32 eqd;
  206. if (!rx_eq->enable_aic)
  207. return;
  208. /* Wrapped around */
  209. if (time_before(now, stats->rx_fps_jiffies)) {
  210. stats->rx_fps_jiffies = now;
  211. return;
  212. }
  213. /* Update once a second */
  214. if ((now - stats->rx_fps_jiffies) < HZ)
  215. return;
  216. stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
  217. ((now - stats->rx_fps_jiffies) / HZ);
  218. stats->rx_fps_jiffies = now;
  219. stats->be_prev_rx_frags = stats->be_rx_frags;
  220. eqd = stats->be_rx_fps / 110000;
  221. eqd = eqd << 3;
  222. if (eqd > rx_eq->max_eqd)
  223. eqd = rx_eq->max_eqd;
  224. if (eqd < rx_eq->min_eqd)
  225. eqd = rx_eq->min_eqd;
  226. if (eqd < 10)
  227. eqd = 0;
  228. if (eqd != rx_eq->cur_eqd)
  229. be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
  230. rx_eq->cur_eqd = eqd;
  231. }
  232. static struct net_device_stats *be_get_stats(struct net_device *dev)
  233. {
  234. return &dev->stats;
  235. }
  236. static u32 be_calc_rate(u64 bytes, unsigned long ticks)
  237. {
  238. u64 rate = bytes;
  239. do_div(rate, ticks / HZ);
  240. rate <<= 3; /* bytes/sec -> bits/sec */
  241. do_div(rate, 1000000ul); /* MB/Sec */
  242. return rate;
  243. }
  244. static void be_tx_rate_update(struct be_adapter *adapter)
  245. {
  246. struct be_drvr_stats *stats = drvr_stats(adapter);
  247. ulong now = jiffies;
  248. /* Wrapped around? */
  249. if (time_before(now, stats->be_tx_jiffies)) {
  250. stats->be_tx_jiffies = now;
  251. return;
  252. }
  253. /* Update tx rate once in two seconds */
  254. if ((now - stats->be_tx_jiffies) > 2 * HZ) {
  255. stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
  256. - stats->be_tx_bytes_prev,
  257. now - stats->be_tx_jiffies);
  258. stats->be_tx_jiffies = now;
  259. stats->be_tx_bytes_prev = stats->be_tx_bytes;
  260. }
  261. }
  262. static void be_tx_stats_update(struct be_adapter *adapter,
  263. u32 wrb_cnt, u32 copied, bool stopped)
  264. {
  265. struct be_drvr_stats *stats = drvr_stats(adapter);
  266. stats->be_tx_reqs++;
  267. stats->be_tx_wrbs += wrb_cnt;
  268. stats->be_tx_bytes += copied;
  269. if (stopped)
  270. stats->be_tx_stops++;
  271. }
  272. /* Determine number of WRB entries needed to xmit data in an skb */
  273. static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
  274. {
  275. int cnt = (skb->len > skb->data_len);
  276. cnt += skb_shinfo(skb)->nr_frags;
  277. /* to account for hdr wrb */
  278. cnt++;
  279. if (cnt & 1) {
  280. /* add a dummy to make it an even num */
  281. cnt++;
  282. *dummy = true;
  283. } else
  284. *dummy = false;
  285. BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
  286. return cnt;
  287. }
  288. static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
  289. {
  290. wrb->frag_pa_hi = upper_32_bits(addr);
  291. wrb->frag_pa_lo = addr & 0xFFFFFFFF;
  292. wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
  293. }
  294. static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
  295. bool vlan, u32 wrb_cnt, u32 len)
  296. {
  297. memset(hdr, 0, sizeof(*hdr));
  298. AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
  299. if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
  300. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
  301. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
  302. hdr, skb_shinfo(skb)->gso_size);
  303. } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
  304. if (is_tcp_pkt(skb))
  305. AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
  306. else if (is_udp_pkt(skb))
  307. AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
  308. }
  309. if (vlan && vlan_tx_tag_present(skb)) {
  310. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
  311. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
  312. hdr, vlan_tx_tag_get(skb));
  313. }
  314. AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
  315. AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
  316. AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
  317. AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
  318. }
  319. static int make_tx_wrbs(struct be_adapter *adapter,
  320. struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
  321. {
  322. u64 busaddr;
  323. u32 i, copied = 0;
  324. struct pci_dev *pdev = adapter->pdev;
  325. struct sk_buff *first_skb = skb;
  326. struct be_queue_info *txq = &adapter->tx_obj.q;
  327. struct be_eth_wrb *wrb;
  328. struct be_eth_hdr_wrb *hdr;
  329. hdr = queue_head_node(txq);
  330. atomic_add(wrb_cnt, &txq->used);
  331. queue_head_inc(txq);
  332. if (skb_dma_map(&pdev->dev, skb, DMA_TO_DEVICE)) {
  333. dev_err(&pdev->dev, "TX DMA mapping failed\n");
  334. return 0;
  335. }
  336. if (skb->len > skb->data_len) {
  337. int len = skb->len - skb->data_len;
  338. wrb = queue_head_node(txq);
  339. busaddr = skb_shinfo(skb)->dma_head;
  340. wrb_fill(wrb, busaddr, len);
  341. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  342. queue_head_inc(txq);
  343. copied += len;
  344. }
  345. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  346. struct skb_frag_struct *frag =
  347. &skb_shinfo(skb)->frags[i];
  348. busaddr = skb_shinfo(skb)->dma_maps[i];
  349. wrb = queue_head_node(txq);
  350. wrb_fill(wrb, busaddr, frag->size);
  351. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  352. queue_head_inc(txq);
  353. copied += frag->size;
  354. }
  355. if (dummy_wrb) {
  356. wrb = queue_head_node(txq);
  357. wrb_fill(wrb, 0, 0);
  358. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  359. queue_head_inc(txq);
  360. }
  361. wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
  362. wrb_cnt, copied);
  363. be_dws_cpu_to_le(hdr, sizeof(*hdr));
  364. return copied;
  365. }
  366. static netdev_tx_t be_xmit(struct sk_buff *skb,
  367. struct net_device *netdev)
  368. {
  369. struct be_adapter *adapter = netdev_priv(netdev);
  370. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  371. struct be_queue_info *txq = &tx_obj->q;
  372. u32 wrb_cnt = 0, copied = 0;
  373. u32 start = txq->head;
  374. bool dummy_wrb, stopped = false;
  375. wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
  376. copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
  377. if (copied) {
  378. /* record the sent skb in the sent_skb table */
  379. BUG_ON(tx_obj->sent_skb_list[start]);
  380. tx_obj->sent_skb_list[start] = skb;
  381. /* Ensure txq has space for the next skb; Else stop the queue
  382. * *BEFORE* ringing the tx doorbell, so that we serialze the
  383. * tx compls of the current transmit which'll wake up the queue
  384. */
  385. if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
  386. txq->len) {
  387. netif_stop_queue(netdev);
  388. stopped = true;
  389. }
  390. be_txq_notify(adapter, txq->id, wrb_cnt);
  391. be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
  392. } else {
  393. txq->head = start;
  394. dev_kfree_skb_any(skb);
  395. }
  396. return NETDEV_TX_OK;
  397. }
  398. static int be_change_mtu(struct net_device *netdev, int new_mtu)
  399. {
  400. struct be_adapter *adapter = netdev_priv(netdev);
  401. if (new_mtu < BE_MIN_MTU ||
  402. new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
  403. dev_info(&adapter->pdev->dev,
  404. "MTU must be between %d and %d bytes\n",
  405. BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
  406. return -EINVAL;
  407. }
  408. dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
  409. netdev->mtu, new_mtu);
  410. netdev->mtu = new_mtu;
  411. return 0;
  412. }
  413. /*
  414. * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
  415. * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
  416. * set the BE in promiscuous VLAN mode.
  417. */
  418. static int be_vid_config(struct be_adapter *adapter)
  419. {
  420. u16 vtag[BE_NUM_VLANS_SUPPORTED];
  421. u16 ntags = 0, i;
  422. int status;
  423. if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
  424. /* Construct VLAN Table to give to HW */
  425. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  426. if (adapter->vlan_tag[i]) {
  427. vtag[ntags] = cpu_to_le16(i);
  428. ntags++;
  429. }
  430. }
  431. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  432. vtag, ntags, 1, 0);
  433. } else {
  434. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  435. NULL, 0, 1, 1);
  436. }
  437. return status;
  438. }
  439. static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
  440. {
  441. struct be_adapter *adapter = netdev_priv(netdev);
  442. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  443. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  444. be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
  445. be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
  446. adapter->vlan_grp = grp;
  447. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  448. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  449. }
  450. static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
  451. {
  452. struct be_adapter *adapter = netdev_priv(netdev);
  453. adapter->num_vlans++;
  454. adapter->vlan_tag[vid] = 1;
  455. be_vid_config(adapter);
  456. }
  457. static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
  458. {
  459. struct be_adapter *adapter = netdev_priv(netdev);
  460. adapter->num_vlans--;
  461. adapter->vlan_tag[vid] = 0;
  462. vlan_group_set_device(adapter->vlan_grp, vid, NULL);
  463. be_vid_config(adapter);
  464. }
  465. static void be_set_multicast_list(struct net_device *netdev)
  466. {
  467. struct be_adapter *adapter = netdev_priv(netdev);
  468. if (netdev->flags & IFF_PROMISC) {
  469. be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
  470. adapter->promiscuous = true;
  471. goto done;
  472. }
  473. /* BE was previously in promiscous mode; disable it */
  474. if (adapter->promiscuous) {
  475. adapter->promiscuous = false;
  476. be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
  477. }
  478. /* Enable multicast promisc if num configured exceeds what we support */
  479. if (netdev->flags & IFF_ALLMULTI || netdev->mc_count > BE_MAX_MC) {
  480. be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0,
  481. &adapter->mc_cmd_mem);
  482. goto done;
  483. }
  484. be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
  485. netdev->mc_count, &adapter->mc_cmd_mem);
  486. done:
  487. return;
  488. }
  489. static void be_rx_rate_update(struct be_adapter *adapter)
  490. {
  491. struct be_drvr_stats *stats = drvr_stats(adapter);
  492. ulong now = jiffies;
  493. /* Wrapped around */
  494. if (time_before(now, stats->be_rx_jiffies)) {
  495. stats->be_rx_jiffies = now;
  496. return;
  497. }
  498. /* Update the rate once in two seconds */
  499. if ((now - stats->be_rx_jiffies) < 2 * HZ)
  500. return;
  501. stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
  502. - stats->be_rx_bytes_prev,
  503. now - stats->be_rx_jiffies);
  504. stats->be_rx_jiffies = now;
  505. stats->be_rx_bytes_prev = stats->be_rx_bytes;
  506. }
  507. static void be_rx_stats_update(struct be_adapter *adapter,
  508. u32 pktsize, u16 numfrags)
  509. {
  510. struct be_drvr_stats *stats = drvr_stats(adapter);
  511. stats->be_rx_compl++;
  512. stats->be_rx_frags += numfrags;
  513. stats->be_rx_bytes += pktsize;
  514. }
  515. static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
  516. {
  517. u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
  518. l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
  519. ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
  520. ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
  521. if (ip_version) {
  522. tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  523. udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
  524. }
  525. ipv6_chk = (ip_version && (tcpf || udpf));
  526. return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
  527. }
  528. static struct be_rx_page_info *
  529. get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
  530. {
  531. struct be_rx_page_info *rx_page_info;
  532. struct be_queue_info *rxq = &adapter->rx_obj.q;
  533. rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
  534. BUG_ON(!rx_page_info->page);
  535. if (rx_page_info->last_page_user)
  536. pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
  537. adapter->big_page_size, PCI_DMA_FROMDEVICE);
  538. atomic_dec(&rxq->used);
  539. return rx_page_info;
  540. }
  541. /* Throwaway the data in the Rx completion */
  542. static void be_rx_compl_discard(struct be_adapter *adapter,
  543. struct be_eth_rx_compl *rxcp)
  544. {
  545. struct be_queue_info *rxq = &adapter->rx_obj.q;
  546. struct be_rx_page_info *page_info;
  547. u16 rxq_idx, i, num_rcvd;
  548. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  549. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  550. for (i = 0; i < num_rcvd; i++) {
  551. page_info = get_rx_page_info(adapter, rxq_idx);
  552. put_page(page_info->page);
  553. memset(page_info, 0, sizeof(*page_info));
  554. index_inc(&rxq_idx, rxq->len);
  555. }
  556. }
  557. /*
  558. * skb_fill_rx_data forms a complete skb for an ether frame
  559. * indicated by rxcp.
  560. */
  561. static void skb_fill_rx_data(struct be_adapter *adapter,
  562. struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
  563. {
  564. struct be_queue_info *rxq = &adapter->rx_obj.q;
  565. struct be_rx_page_info *page_info;
  566. u16 rxq_idx, i, num_rcvd, j;
  567. u32 pktsize, hdr_len, curr_frag_len, size;
  568. u8 *start;
  569. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  570. pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  571. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  572. page_info = get_rx_page_info(adapter, rxq_idx);
  573. start = page_address(page_info->page) + page_info->page_offset;
  574. prefetch(start);
  575. /* Copy data in the first descriptor of this completion */
  576. curr_frag_len = min(pktsize, rx_frag_size);
  577. /* Copy the header portion into skb_data */
  578. hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
  579. memcpy(skb->data, start, hdr_len);
  580. skb->len = curr_frag_len;
  581. if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
  582. /* Complete packet has now been moved to data */
  583. put_page(page_info->page);
  584. skb->data_len = 0;
  585. skb->tail += curr_frag_len;
  586. } else {
  587. skb_shinfo(skb)->nr_frags = 1;
  588. skb_shinfo(skb)->frags[0].page = page_info->page;
  589. skb_shinfo(skb)->frags[0].page_offset =
  590. page_info->page_offset + hdr_len;
  591. skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
  592. skb->data_len = curr_frag_len - hdr_len;
  593. skb->tail += hdr_len;
  594. }
  595. memset(page_info, 0, sizeof(*page_info));
  596. if (pktsize <= rx_frag_size) {
  597. BUG_ON(num_rcvd != 1);
  598. goto done;
  599. }
  600. /* More frags present for this completion */
  601. size = pktsize;
  602. for (i = 1, j = 0; i < num_rcvd; i++) {
  603. size -= curr_frag_len;
  604. index_inc(&rxq_idx, rxq->len);
  605. page_info = get_rx_page_info(adapter, rxq_idx);
  606. curr_frag_len = min(size, rx_frag_size);
  607. /* Coalesce all frags from the same physical page in one slot */
  608. if (page_info->page_offset == 0) {
  609. /* Fresh page */
  610. j++;
  611. skb_shinfo(skb)->frags[j].page = page_info->page;
  612. skb_shinfo(skb)->frags[j].page_offset =
  613. page_info->page_offset;
  614. skb_shinfo(skb)->frags[j].size = 0;
  615. skb_shinfo(skb)->nr_frags++;
  616. } else {
  617. put_page(page_info->page);
  618. }
  619. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  620. skb->len += curr_frag_len;
  621. skb->data_len += curr_frag_len;
  622. memset(page_info, 0, sizeof(*page_info));
  623. }
  624. BUG_ON(j > MAX_SKB_FRAGS);
  625. done:
  626. be_rx_stats_update(adapter, pktsize, num_rcvd);
  627. return;
  628. }
  629. /* Process the RX completion indicated by rxcp when GRO is disabled */
  630. static void be_rx_compl_process(struct be_adapter *adapter,
  631. struct be_eth_rx_compl *rxcp)
  632. {
  633. struct sk_buff *skb;
  634. u32 vlanf, vid;
  635. u8 vtm;
  636. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  637. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  638. /* vlanf could be wrongly set in some cards.
  639. * ignore if vtm is not set */
  640. if ((adapter->cap == 0x400) && !vtm)
  641. vlanf = 0;
  642. skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
  643. if (!skb) {
  644. if (net_ratelimit())
  645. dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
  646. be_rx_compl_discard(adapter, rxcp);
  647. return;
  648. }
  649. skb_fill_rx_data(adapter, skb, rxcp);
  650. if (do_pkt_csum(rxcp, adapter->rx_csum))
  651. skb->ip_summed = CHECKSUM_NONE;
  652. else
  653. skb->ip_summed = CHECKSUM_UNNECESSARY;
  654. skb->truesize = skb->len + sizeof(struct sk_buff);
  655. skb->protocol = eth_type_trans(skb, adapter->netdev);
  656. skb->dev = adapter->netdev;
  657. if (vlanf) {
  658. if (!adapter->vlan_grp || adapter->num_vlans == 0) {
  659. kfree_skb(skb);
  660. return;
  661. }
  662. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  663. vid = be16_to_cpu(vid);
  664. vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
  665. } else {
  666. netif_receive_skb(skb);
  667. }
  668. return;
  669. }
  670. /* Process the RX completion indicated by rxcp when GRO is enabled */
  671. static void be_rx_compl_process_gro(struct be_adapter *adapter,
  672. struct be_eth_rx_compl *rxcp)
  673. {
  674. struct be_rx_page_info *page_info;
  675. struct sk_buff *skb = NULL;
  676. struct be_queue_info *rxq = &adapter->rx_obj.q;
  677. struct be_eq_obj *eq_obj = &adapter->rx_eq;
  678. u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
  679. u16 i, rxq_idx = 0, vid, j;
  680. u8 vtm;
  681. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  682. pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  683. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  684. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  685. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  686. /* vlanf could be wrongly set in some cards.
  687. * ignore if vtm is not set */
  688. if ((adapter->cap == 0x400) && !vtm)
  689. vlanf = 0;
  690. skb = napi_get_frags(&eq_obj->napi);
  691. if (!skb) {
  692. be_rx_compl_discard(adapter, rxcp);
  693. return;
  694. }
  695. remaining = pkt_size;
  696. for (i = 0, j = -1; i < num_rcvd; i++) {
  697. page_info = get_rx_page_info(adapter, rxq_idx);
  698. curr_frag_len = min(remaining, rx_frag_size);
  699. /* Coalesce all frags from the same physical page in one slot */
  700. if (i == 0 || page_info->page_offset == 0) {
  701. /* First frag or Fresh page */
  702. j++;
  703. skb_shinfo(skb)->frags[j].page = page_info->page;
  704. skb_shinfo(skb)->frags[j].page_offset =
  705. page_info->page_offset;
  706. skb_shinfo(skb)->frags[j].size = 0;
  707. } else {
  708. put_page(page_info->page);
  709. }
  710. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  711. remaining -= curr_frag_len;
  712. index_inc(&rxq_idx, rxq->len);
  713. memset(page_info, 0, sizeof(*page_info));
  714. }
  715. BUG_ON(j > MAX_SKB_FRAGS);
  716. skb_shinfo(skb)->nr_frags = j + 1;
  717. skb->len = pkt_size;
  718. skb->data_len = pkt_size;
  719. skb->truesize += pkt_size;
  720. skb->ip_summed = CHECKSUM_UNNECESSARY;
  721. if (likely(!vlanf)) {
  722. napi_gro_frags(&eq_obj->napi);
  723. } else {
  724. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  725. vid = be16_to_cpu(vid);
  726. if (!adapter->vlan_grp || adapter->num_vlans == 0)
  727. return;
  728. vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
  729. }
  730. be_rx_stats_update(adapter, pkt_size, num_rcvd);
  731. return;
  732. }
  733. static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
  734. {
  735. struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
  736. if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
  737. return NULL;
  738. be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
  739. queue_tail_inc(&adapter->rx_obj.cq);
  740. return rxcp;
  741. }
  742. /* To reset the valid bit, we need to reset the whole word as
  743. * when walking the queue the valid entries are little-endian
  744. * and invalid entries are host endian
  745. */
  746. static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
  747. {
  748. rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
  749. }
  750. static inline struct page *be_alloc_pages(u32 size)
  751. {
  752. gfp_t alloc_flags = GFP_ATOMIC;
  753. u32 order = get_order(size);
  754. if (order > 0)
  755. alloc_flags |= __GFP_COMP;
  756. return alloc_pages(alloc_flags, order);
  757. }
  758. /*
  759. * Allocate a page, split it to fragments of size rx_frag_size and post as
  760. * receive buffers to BE
  761. */
  762. static void be_post_rx_frags(struct be_adapter *adapter)
  763. {
  764. struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
  765. struct be_rx_page_info *page_info = NULL;
  766. struct be_queue_info *rxq = &adapter->rx_obj.q;
  767. struct page *pagep = NULL;
  768. struct be_eth_rx_d *rxd;
  769. u64 page_dmaaddr = 0, frag_dmaaddr;
  770. u32 posted, page_offset = 0;
  771. page_info = &page_info_tbl[rxq->head];
  772. for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
  773. if (!pagep) {
  774. pagep = be_alloc_pages(adapter->big_page_size);
  775. if (unlikely(!pagep)) {
  776. drvr_stats(adapter)->be_ethrx_post_fail++;
  777. break;
  778. }
  779. page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
  780. adapter->big_page_size,
  781. PCI_DMA_FROMDEVICE);
  782. page_info->page_offset = 0;
  783. } else {
  784. get_page(pagep);
  785. page_info->page_offset = page_offset + rx_frag_size;
  786. }
  787. page_offset = page_info->page_offset;
  788. page_info->page = pagep;
  789. pci_unmap_addr_set(page_info, bus, page_dmaaddr);
  790. frag_dmaaddr = page_dmaaddr + page_info->page_offset;
  791. rxd = queue_head_node(rxq);
  792. rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
  793. rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
  794. queue_head_inc(rxq);
  795. /* Any space left in the current big page for another frag? */
  796. if ((page_offset + rx_frag_size + rx_frag_size) >
  797. adapter->big_page_size) {
  798. pagep = NULL;
  799. page_info->last_page_user = true;
  800. }
  801. page_info = &page_info_tbl[rxq->head];
  802. }
  803. if (pagep)
  804. page_info->last_page_user = true;
  805. if (posted) {
  806. atomic_add(posted, &rxq->used);
  807. be_rxq_notify(adapter, rxq->id, posted);
  808. } else if (atomic_read(&rxq->used) == 0) {
  809. /* Let be_worker replenish when memory is available */
  810. adapter->rx_post_starved = true;
  811. }
  812. return;
  813. }
  814. static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
  815. {
  816. struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
  817. if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
  818. return NULL;
  819. be_dws_le_to_cpu(txcp, sizeof(*txcp));
  820. txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
  821. queue_tail_inc(tx_cq);
  822. return txcp;
  823. }
  824. static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
  825. {
  826. struct be_queue_info *txq = &adapter->tx_obj.q;
  827. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  828. struct sk_buff *sent_skb;
  829. u16 cur_index, num_wrbs = 0;
  830. cur_index = txq->tail;
  831. sent_skb = sent_skbs[cur_index];
  832. BUG_ON(!sent_skb);
  833. sent_skbs[cur_index] = NULL;
  834. do {
  835. cur_index = txq->tail;
  836. num_wrbs++;
  837. queue_tail_inc(txq);
  838. } while (cur_index != last_index);
  839. atomic_sub(num_wrbs, &txq->used);
  840. skb_dma_unmap(&adapter->pdev->dev, sent_skb, DMA_TO_DEVICE);
  841. kfree_skb(sent_skb);
  842. }
  843. static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
  844. {
  845. struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
  846. if (!eqe->evt)
  847. return NULL;
  848. eqe->evt = le32_to_cpu(eqe->evt);
  849. queue_tail_inc(&eq_obj->q);
  850. return eqe;
  851. }
  852. static int event_handle(struct be_adapter *adapter,
  853. struct be_eq_obj *eq_obj)
  854. {
  855. struct be_eq_entry *eqe;
  856. u16 num = 0;
  857. while ((eqe = event_get(eq_obj)) != NULL) {
  858. eqe->evt = 0;
  859. num++;
  860. }
  861. /* Deal with any spurious interrupts that come
  862. * without events
  863. */
  864. be_eq_notify(adapter, eq_obj->q.id, true, true, num);
  865. if (num)
  866. napi_schedule(&eq_obj->napi);
  867. return num;
  868. }
  869. /* Just read and notify events without processing them.
  870. * Used at the time of destroying event queues */
  871. static void be_eq_clean(struct be_adapter *adapter,
  872. struct be_eq_obj *eq_obj)
  873. {
  874. struct be_eq_entry *eqe;
  875. u16 num = 0;
  876. while ((eqe = event_get(eq_obj)) != NULL) {
  877. eqe->evt = 0;
  878. num++;
  879. }
  880. if (num)
  881. be_eq_notify(adapter, eq_obj->q.id, false, true, num);
  882. }
  883. static void be_rx_q_clean(struct be_adapter *adapter)
  884. {
  885. struct be_rx_page_info *page_info;
  886. struct be_queue_info *rxq = &adapter->rx_obj.q;
  887. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  888. struct be_eth_rx_compl *rxcp;
  889. u16 tail;
  890. /* First cleanup pending rx completions */
  891. while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
  892. be_rx_compl_discard(adapter, rxcp);
  893. be_rx_compl_reset(rxcp);
  894. be_cq_notify(adapter, rx_cq->id, true, 1);
  895. }
  896. /* Then free posted rx buffer that were not used */
  897. tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
  898. for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
  899. page_info = get_rx_page_info(adapter, tail);
  900. put_page(page_info->page);
  901. memset(page_info, 0, sizeof(*page_info));
  902. }
  903. BUG_ON(atomic_read(&rxq->used));
  904. }
  905. static void be_tx_compl_clean(struct be_adapter *adapter)
  906. {
  907. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  908. struct be_queue_info *txq = &adapter->tx_obj.q;
  909. struct be_eth_tx_compl *txcp;
  910. u16 end_idx, cmpl = 0, timeo = 0;
  911. /* Wait for a max of 200ms for all the tx-completions to arrive. */
  912. do {
  913. while ((txcp = be_tx_compl_get(tx_cq))) {
  914. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  915. wrb_index, txcp);
  916. be_tx_compl_process(adapter, end_idx);
  917. cmpl++;
  918. }
  919. if (cmpl) {
  920. be_cq_notify(adapter, tx_cq->id, false, cmpl);
  921. cmpl = 0;
  922. }
  923. if (atomic_read(&txq->used) == 0 || ++timeo > 200)
  924. break;
  925. mdelay(1);
  926. } while (true);
  927. if (atomic_read(&txq->used))
  928. dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
  929. atomic_read(&txq->used));
  930. }
  931. static void be_mcc_queues_destroy(struct be_adapter *adapter)
  932. {
  933. struct be_queue_info *q;
  934. q = &adapter->mcc_obj.q;
  935. if (q->created)
  936. be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
  937. be_queue_free(adapter, q);
  938. q = &adapter->mcc_obj.cq;
  939. if (q->created)
  940. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  941. be_queue_free(adapter, q);
  942. }
  943. /* Must be called only after TX qs are created as MCC shares TX EQ */
  944. static int be_mcc_queues_create(struct be_adapter *adapter)
  945. {
  946. struct be_queue_info *q, *cq;
  947. /* Alloc MCC compl queue */
  948. cq = &adapter->mcc_obj.cq;
  949. if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
  950. sizeof(struct be_mcc_compl)))
  951. goto err;
  952. /* Ask BE to create MCC compl queue; share TX's eq */
  953. if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
  954. goto mcc_cq_free;
  955. /* Alloc MCC queue */
  956. q = &adapter->mcc_obj.q;
  957. if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
  958. goto mcc_cq_destroy;
  959. /* Ask BE to create MCC queue */
  960. if (be_cmd_mccq_create(adapter, q, cq))
  961. goto mcc_q_free;
  962. return 0;
  963. mcc_q_free:
  964. be_queue_free(adapter, q);
  965. mcc_cq_destroy:
  966. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  967. mcc_cq_free:
  968. be_queue_free(adapter, cq);
  969. err:
  970. return -1;
  971. }
  972. static void be_tx_queues_destroy(struct be_adapter *adapter)
  973. {
  974. struct be_queue_info *q;
  975. q = &adapter->tx_obj.q;
  976. if (q->created)
  977. be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
  978. be_queue_free(adapter, q);
  979. q = &adapter->tx_obj.cq;
  980. if (q->created)
  981. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  982. be_queue_free(adapter, q);
  983. /* Clear any residual events */
  984. be_eq_clean(adapter, &adapter->tx_eq);
  985. q = &adapter->tx_eq.q;
  986. if (q->created)
  987. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  988. be_queue_free(adapter, q);
  989. }
  990. static int be_tx_queues_create(struct be_adapter *adapter)
  991. {
  992. struct be_queue_info *eq, *q, *cq;
  993. adapter->tx_eq.max_eqd = 0;
  994. adapter->tx_eq.min_eqd = 0;
  995. adapter->tx_eq.cur_eqd = 96;
  996. adapter->tx_eq.enable_aic = false;
  997. /* Alloc Tx Event queue */
  998. eq = &adapter->tx_eq.q;
  999. if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
  1000. return -1;
  1001. /* Ask BE to create Tx Event queue */
  1002. if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
  1003. goto tx_eq_free;
  1004. /* Alloc TX eth compl queue */
  1005. cq = &adapter->tx_obj.cq;
  1006. if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
  1007. sizeof(struct be_eth_tx_compl)))
  1008. goto tx_eq_destroy;
  1009. /* Ask BE to create Tx eth compl queue */
  1010. if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
  1011. goto tx_cq_free;
  1012. /* Alloc TX eth queue */
  1013. q = &adapter->tx_obj.q;
  1014. if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
  1015. goto tx_cq_destroy;
  1016. /* Ask BE to create Tx eth queue */
  1017. if (be_cmd_txq_create(adapter, q, cq))
  1018. goto tx_q_free;
  1019. return 0;
  1020. tx_q_free:
  1021. be_queue_free(adapter, q);
  1022. tx_cq_destroy:
  1023. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1024. tx_cq_free:
  1025. be_queue_free(adapter, cq);
  1026. tx_eq_destroy:
  1027. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1028. tx_eq_free:
  1029. be_queue_free(adapter, eq);
  1030. return -1;
  1031. }
  1032. static void be_rx_queues_destroy(struct be_adapter *adapter)
  1033. {
  1034. struct be_queue_info *q;
  1035. q = &adapter->rx_obj.q;
  1036. if (q->created) {
  1037. be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
  1038. be_rx_q_clean(adapter);
  1039. }
  1040. be_queue_free(adapter, q);
  1041. q = &adapter->rx_obj.cq;
  1042. if (q->created)
  1043. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  1044. be_queue_free(adapter, q);
  1045. /* Clear any residual events */
  1046. be_eq_clean(adapter, &adapter->rx_eq);
  1047. q = &adapter->rx_eq.q;
  1048. if (q->created)
  1049. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  1050. be_queue_free(adapter, q);
  1051. }
  1052. static int be_rx_queues_create(struct be_adapter *adapter)
  1053. {
  1054. struct be_queue_info *eq, *q, *cq;
  1055. int rc;
  1056. adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
  1057. adapter->rx_eq.max_eqd = BE_MAX_EQD;
  1058. adapter->rx_eq.min_eqd = 0;
  1059. adapter->rx_eq.cur_eqd = 0;
  1060. adapter->rx_eq.enable_aic = true;
  1061. /* Alloc Rx Event queue */
  1062. eq = &adapter->rx_eq.q;
  1063. rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
  1064. sizeof(struct be_eq_entry));
  1065. if (rc)
  1066. return rc;
  1067. /* Ask BE to create Rx Event queue */
  1068. rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
  1069. if (rc)
  1070. goto rx_eq_free;
  1071. /* Alloc RX eth compl queue */
  1072. cq = &adapter->rx_obj.cq;
  1073. rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
  1074. sizeof(struct be_eth_rx_compl));
  1075. if (rc)
  1076. goto rx_eq_destroy;
  1077. /* Ask BE to create Rx eth compl queue */
  1078. rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
  1079. if (rc)
  1080. goto rx_cq_free;
  1081. /* Alloc RX eth queue */
  1082. q = &adapter->rx_obj.q;
  1083. rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
  1084. if (rc)
  1085. goto rx_cq_destroy;
  1086. /* Ask BE to create Rx eth queue */
  1087. rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
  1088. BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
  1089. if (rc)
  1090. goto rx_q_free;
  1091. return 0;
  1092. rx_q_free:
  1093. be_queue_free(adapter, q);
  1094. rx_cq_destroy:
  1095. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1096. rx_cq_free:
  1097. be_queue_free(adapter, cq);
  1098. rx_eq_destroy:
  1099. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1100. rx_eq_free:
  1101. be_queue_free(adapter, eq);
  1102. return rc;
  1103. }
  1104. /* There are 8 evt ids per func. Retruns the evt id's bit number */
  1105. static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
  1106. {
  1107. return eq_id - 8 * be_pci_func(adapter);
  1108. }
  1109. static irqreturn_t be_intx(int irq, void *dev)
  1110. {
  1111. struct be_adapter *adapter = dev;
  1112. int isr;
  1113. isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
  1114. be_pci_func(adapter) * CEV_ISR_SIZE);
  1115. if (!isr)
  1116. return IRQ_NONE;
  1117. event_handle(adapter, &adapter->tx_eq);
  1118. event_handle(adapter, &adapter->rx_eq);
  1119. return IRQ_HANDLED;
  1120. }
  1121. static irqreturn_t be_msix_rx(int irq, void *dev)
  1122. {
  1123. struct be_adapter *adapter = dev;
  1124. event_handle(adapter, &adapter->rx_eq);
  1125. return IRQ_HANDLED;
  1126. }
  1127. static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
  1128. {
  1129. struct be_adapter *adapter = dev;
  1130. event_handle(adapter, &adapter->tx_eq);
  1131. return IRQ_HANDLED;
  1132. }
  1133. static inline bool do_gro(struct be_adapter *adapter,
  1134. struct be_eth_rx_compl *rxcp)
  1135. {
  1136. int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
  1137. int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  1138. if (err)
  1139. drvr_stats(adapter)->be_rxcp_err++;
  1140. return (tcp_frame && !err) ? true : false;
  1141. }
  1142. int be_poll_rx(struct napi_struct *napi, int budget)
  1143. {
  1144. struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
  1145. struct be_adapter *adapter =
  1146. container_of(rx_eq, struct be_adapter, rx_eq);
  1147. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  1148. struct be_eth_rx_compl *rxcp;
  1149. u32 work_done;
  1150. for (work_done = 0; work_done < budget; work_done++) {
  1151. rxcp = be_rx_compl_get(adapter);
  1152. if (!rxcp)
  1153. break;
  1154. if (do_gro(adapter, rxcp))
  1155. be_rx_compl_process_gro(adapter, rxcp);
  1156. else
  1157. be_rx_compl_process(adapter, rxcp);
  1158. be_rx_compl_reset(rxcp);
  1159. }
  1160. /* Refill the queue */
  1161. if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
  1162. be_post_rx_frags(adapter);
  1163. /* All consumed */
  1164. if (work_done < budget) {
  1165. napi_complete(napi);
  1166. be_cq_notify(adapter, rx_cq->id, true, work_done);
  1167. } else {
  1168. /* More to be consumed; continue with interrupts disabled */
  1169. be_cq_notify(adapter, rx_cq->id, false, work_done);
  1170. }
  1171. return work_done;
  1172. }
  1173. void be_process_tx(struct be_adapter *adapter)
  1174. {
  1175. struct be_queue_info *txq = &adapter->tx_obj.q;
  1176. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  1177. struct be_eth_tx_compl *txcp;
  1178. u32 num_cmpl = 0;
  1179. u16 end_idx;
  1180. while ((txcp = be_tx_compl_get(tx_cq))) {
  1181. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  1182. wrb_index, txcp);
  1183. be_tx_compl_process(adapter, end_idx);
  1184. num_cmpl++;
  1185. }
  1186. if (num_cmpl) {
  1187. be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
  1188. /* As Tx wrbs have been freed up, wake up netdev queue if
  1189. * it was stopped due to lack of tx wrbs.
  1190. */
  1191. if (netif_queue_stopped(adapter->netdev) &&
  1192. atomic_read(&txq->used) < txq->len / 2) {
  1193. netif_wake_queue(adapter->netdev);
  1194. }
  1195. drvr_stats(adapter)->be_tx_events++;
  1196. drvr_stats(adapter)->be_tx_compl += num_cmpl;
  1197. }
  1198. }
  1199. /* As TX and MCC share the same EQ check for both TX and MCC completions.
  1200. * For TX/MCC we don't honour budget; consume everything
  1201. */
  1202. static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
  1203. {
  1204. struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
  1205. struct be_adapter *adapter =
  1206. container_of(tx_eq, struct be_adapter, tx_eq);
  1207. napi_complete(napi);
  1208. be_process_tx(adapter);
  1209. be_process_mcc(adapter);
  1210. return 1;
  1211. }
  1212. static void be_worker(struct work_struct *work)
  1213. {
  1214. struct be_adapter *adapter =
  1215. container_of(work, struct be_adapter, work.work);
  1216. be_cmd_get_stats(adapter, &adapter->stats.cmd);
  1217. /* Set EQ delay */
  1218. be_rx_eqd_update(adapter);
  1219. be_tx_rate_update(adapter);
  1220. be_rx_rate_update(adapter);
  1221. if (adapter->rx_post_starved) {
  1222. adapter->rx_post_starved = false;
  1223. be_post_rx_frags(adapter);
  1224. }
  1225. schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
  1226. }
  1227. static void be_msix_enable(struct be_adapter *adapter)
  1228. {
  1229. int i, status;
  1230. for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
  1231. adapter->msix_entries[i].entry = i;
  1232. status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1233. BE_NUM_MSIX_VECTORS);
  1234. if (status == 0)
  1235. adapter->msix_enabled = true;
  1236. return;
  1237. }
  1238. static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
  1239. {
  1240. return adapter->msix_entries[
  1241. be_evt_bit_get(adapter, eq_id)].vector;
  1242. }
  1243. static int be_request_irq(struct be_adapter *adapter,
  1244. struct be_eq_obj *eq_obj,
  1245. void *handler, char *desc)
  1246. {
  1247. struct net_device *netdev = adapter->netdev;
  1248. int vec;
  1249. sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
  1250. vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1251. return request_irq(vec, handler, 0, eq_obj->desc, adapter);
  1252. }
  1253. static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
  1254. {
  1255. int vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1256. free_irq(vec, adapter);
  1257. }
  1258. static int be_msix_register(struct be_adapter *adapter)
  1259. {
  1260. int status;
  1261. status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
  1262. if (status)
  1263. goto err;
  1264. status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
  1265. if (status)
  1266. goto free_tx_irq;
  1267. return 0;
  1268. free_tx_irq:
  1269. be_free_irq(adapter, &adapter->tx_eq);
  1270. err:
  1271. dev_warn(&adapter->pdev->dev,
  1272. "MSIX Request IRQ failed - err %d\n", status);
  1273. pci_disable_msix(adapter->pdev);
  1274. adapter->msix_enabled = false;
  1275. return status;
  1276. }
  1277. static int be_irq_register(struct be_adapter *adapter)
  1278. {
  1279. struct net_device *netdev = adapter->netdev;
  1280. int status;
  1281. if (adapter->msix_enabled) {
  1282. status = be_msix_register(adapter);
  1283. if (status == 0)
  1284. goto done;
  1285. }
  1286. /* INTx */
  1287. netdev->irq = adapter->pdev->irq;
  1288. status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
  1289. adapter);
  1290. if (status) {
  1291. dev_err(&adapter->pdev->dev,
  1292. "INTx request IRQ failed - err %d\n", status);
  1293. return status;
  1294. }
  1295. done:
  1296. adapter->isr_registered = true;
  1297. return 0;
  1298. }
  1299. static void be_irq_unregister(struct be_adapter *adapter)
  1300. {
  1301. struct net_device *netdev = adapter->netdev;
  1302. if (!adapter->isr_registered)
  1303. return;
  1304. /* INTx */
  1305. if (!adapter->msix_enabled) {
  1306. free_irq(netdev->irq, adapter);
  1307. goto done;
  1308. }
  1309. /* MSIx */
  1310. be_free_irq(adapter, &adapter->tx_eq);
  1311. be_free_irq(adapter, &adapter->rx_eq);
  1312. done:
  1313. adapter->isr_registered = false;
  1314. return;
  1315. }
  1316. static int be_open(struct net_device *netdev)
  1317. {
  1318. struct be_adapter *adapter = netdev_priv(netdev);
  1319. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1320. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1321. bool link_up;
  1322. int status;
  1323. u8 mac_speed;
  1324. u16 link_speed;
  1325. /* First time posting */
  1326. be_post_rx_frags(adapter);
  1327. napi_enable(&rx_eq->napi);
  1328. napi_enable(&tx_eq->napi);
  1329. be_irq_register(adapter);
  1330. be_intr_set(adapter, true);
  1331. /* The evt queues are created in unarmed state; arm them */
  1332. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  1333. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  1334. /* Rx compl queue may be in unarmed state; rearm it */
  1335. be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
  1336. status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
  1337. &link_speed);
  1338. if (status)
  1339. goto ret_sts;
  1340. be_link_status_update(adapter, link_up);
  1341. status = be_vid_config(adapter);
  1342. if (status)
  1343. goto ret_sts;
  1344. status = be_cmd_set_flow_control(adapter,
  1345. adapter->tx_fc, adapter->rx_fc);
  1346. if (status)
  1347. goto ret_sts;
  1348. schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
  1349. ret_sts:
  1350. return status;
  1351. }
  1352. static int be_setup(struct be_adapter *adapter)
  1353. {
  1354. struct net_device *netdev = adapter->netdev;
  1355. u32 cap_flags, en_flags;
  1356. int status;
  1357. cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
  1358. BE_IF_FLAGS_MCAST_PROMISCUOUS |
  1359. BE_IF_FLAGS_PROMISCUOUS |
  1360. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1361. en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
  1362. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1363. status = be_cmd_if_create(adapter, cap_flags, en_flags,
  1364. netdev->dev_addr, false/* pmac_invalid */,
  1365. &adapter->if_handle, &adapter->pmac_id);
  1366. if (status != 0)
  1367. goto do_none;
  1368. status = be_tx_queues_create(adapter);
  1369. if (status != 0)
  1370. goto if_destroy;
  1371. status = be_rx_queues_create(adapter);
  1372. if (status != 0)
  1373. goto tx_qs_destroy;
  1374. status = be_mcc_queues_create(adapter);
  1375. if (status != 0)
  1376. goto rx_qs_destroy;
  1377. return 0;
  1378. rx_qs_destroy:
  1379. be_rx_queues_destroy(adapter);
  1380. tx_qs_destroy:
  1381. be_tx_queues_destroy(adapter);
  1382. if_destroy:
  1383. be_cmd_if_destroy(adapter, adapter->if_handle);
  1384. do_none:
  1385. return status;
  1386. }
  1387. static int be_clear(struct be_adapter *adapter)
  1388. {
  1389. be_mcc_queues_destroy(adapter);
  1390. be_rx_queues_destroy(adapter);
  1391. be_tx_queues_destroy(adapter);
  1392. be_cmd_if_destroy(adapter, adapter->if_handle);
  1393. return 0;
  1394. }
  1395. static int be_close(struct net_device *netdev)
  1396. {
  1397. struct be_adapter *adapter = netdev_priv(netdev);
  1398. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1399. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1400. int vec;
  1401. cancel_delayed_work_sync(&adapter->work);
  1402. netif_stop_queue(netdev);
  1403. netif_carrier_off(netdev);
  1404. adapter->link_up = false;
  1405. be_intr_set(adapter, false);
  1406. if (adapter->msix_enabled) {
  1407. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1408. synchronize_irq(vec);
  1409. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1410. synchronize_irq(vec);
  1411. } else {
  1412. synchronize_irq(netdev->irq);
  1413. }
  1414. be_irq_unregister(adapter);
  1415. napi_disable(&rx_eq->napi);
  1416. napi_disable(&tx_eq->napi);
  1417. /* Wait for all pending tx completions to arrive so that
  1418. * all tx skbs are freed.
  1419. */
  1420. be_tx_compl_clean(adapter);
  1421. return 0;
  1422. }
  1423. #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
  1424. char flash_cookie[2][16] = {"*** SE FLAS",
  1425. "H DIRECTORY *** "};
  1426. static bool be_flash_redboot(struct be_adapter *adapter,
  1427. const u8 *p)
  1428. {
  1429. u32 crc_offset;
  1430. u8 flashed_crc[4];
  1431. int status;
  1432. crc_offset = FLASH_REDBOOT_START + FLASH_REDBOOT_IMAGE_MAX_SIZE - 4
  1433. + sizeof(struct flash_file_hdr) - 32*1024;
  1434. p += crc_offset;
  1435. status = be_cmd_get_flash_crc(adapter, flashed_crc);
  1436. if (status) {
  1437. dev_err(&adapter->pdev->dev,
  1438. "could not get crc from flash, not flashing redboot\n");
  1439. return false;
  1440. }
  1441. /*update redboot only if crc does not match*/
  1442. if (!memcmp(flashed_crc, p, 4))
  1443. return false;
  1444. else
  1445. return true;
  1446. }
  1447. static int be_flash_image(struct be_adapter *adapter,
  1448. const struct firmware *fw,
  1449. struct be_dma_mem *flash_cmd, u32 flash_type)
  1450. {
  1451. int status;
  1452. u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
  1453. int num_bytes;
  1454. const u8 *p = fw->data;
  1455. struct be_cmd_write_flashrom *req = flash_cmd->va;
  1456. switch (flash_type) {
  1457. case FLASHROM_TYPE_ISCSI_ACTIVE:
  1458. image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
  1459. image_size = FLASH_IMAGE_MAX_SIZE;
  1460. break;
  1461. case FLASHROM_TYPE_ISCSI_BACKUP:
  1462. image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
  1463. image_size = FLASH_IMAGE_MAX_SIZE;
  1464. break;
  1465. case FLASHROM_TYPE_FCOE_FW_ACTIVE:
  1466. image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
  1467. image_size = FLASH_IMAGE_MAX_SIZE;
  1468. break;
  1469. case FLASHROM_TYPE_FCOE_FW_BACKUP:
  1470. image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
  1471. image_size = FLASH_IMAGE_MAX_SIZE;
  1472. break;
  1473. case FLASHROM_TYPE_BIOS:
  1474. image_offset = FLASH_iSCSI_BIOS_START;
  1475. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1476. break;
  1477. case FLASHROM_TYPE_FCOE_BIOS:
  1478. image_offset = FLASH_FCoE_BIOS_START;
  1479. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1480. break;
  1481. case FLASHROM_TYPE_PXE_BIOS:
  1482. image_offset = FLASH_PXE_BIOS_START;
  1483. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1484. break;
  1485. case FLASHROM_TYPE_REDBOOT:
  1486. if (!be_flash_redboot(adapter, fw->data))
  1487. return 0;
  1488. image_offset = FLASH_REDBOOT_ISM_START;
  1489. image_size = FLASH_REDBOOT_IMAGE_MAX_SIZE;
  1490. break;
  1491. default:
  1492. return 0;
  1493. }
  1494. p += sizeof(struct flash_file_hdr) + image_offset;
  1495. if (p + image_size > fw->data + fw->size)
  1496. return -1;
  1497. total_bytes = image_size;
  1498. while (total_bytes) {
  1499. if (total_bytes > 32*1024)
  1500. num_bytes = 32*1024;
  1501. else
  1502. num_bytes = total_bytes;
  1503. total_bytes -= num_bytes;
  1504. if (!total_bytes)
  1505. flash_op = FLASHROM_OPER_FLASH;
  1506. else
  1507. flash_op = FLASHROM_OPER_SAVE;
  1508. memcpy(req->params.data_buf, p, num_bytes);
  1509. p += num_bytes;
  1510. status = be_cmd_write_flashrom(adapter, flash_cmd,
  1511. flash_type, flash_op, num_bytes);
  1512. if (status) {
  1513. dev_err(&adapter->pdev->dev,
  1514. "cmd to write to flash rom failed. type/op %d/%d\n",
  1515. flash_type, flash_op);
  1516. return -1;
  1517. }
  1518. yield();
  1519. }
  1520. return 0;
  1521. }
  1522. int be_load_fw(struct be_adapter *adapter, u8 *func)
  1523. {
  1524. char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
  1525. const struct firmware *fw;
  1526. struct flash_file_hdr *fhdr;
  1527. struct flash_section_info *fsec = NULL;
  1528. struct be_dma_mem flash_cmd;
  1529. int status;
  1530. const u8 *p;
  1531. bool entry_found = false;
  1532. int flash_type;
  1533. char fw_ver[FW_VER_LEN];
  1534. char fw_cfg;
  1535. status = be_cmd_get_fw_ver(adapter, fw_ver);
  1536. if (status)
  1537. return status;
  1538. fw_cfg = *(fw_ver + 2);
  1539. if (fw_cfg == '0')
  1540. fw_cfg = '1';
  1541. strcpy(fw_file, func);
  1542. status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
  1543. if (status)
  1544. goto fw_exit;
  1545. p = fw->data;
  1546. fhdr = (struct flash_file_hdr *) p;
  1547. if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
  1548. dev_err(&adapter->pdev->dev,
  1549. "Firmware(%s) load error (signature did not match)\n",
  1550. fw_file);
  1551. status = -1;
  1552. goto fw_exit;
  1553. }
  1554. dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
  1555. p += sizeof(struct flash_file_hdr);
  1556. while (p < (fw->data + fw->size)) {
  1557. fsec = (struct flash_section_info *)p;
  1558. if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
  1559. entry_found = true;
  1560. break;
  1561. }
  1562. p += 32;
  1563. }
  1564. if (!entry_found) {
  1565. status = -1;
  1566. dev_err(&adapter->pdev->dev,
  1567. "Flash cookie not found in firmware image\n");
  1568. goto fw_exit;
  1569. }
  1570. flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
  1571. flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
  1572. &flash_cmd.dma);
  1573. if (!flash_cmd.va) {
  1574. status = -ENOMEM;
  1575. dev_err(&adapter->pdev->dev,
  1576. "Memory allocation failure while flashing\n");
  1577. goto fw_exit;
  1578. }
  1579. for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
  1580. flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
  1581. status = be_flash_image(adapter, fw, &flash_cmd,
  1582. flash_type);
  1583. if (status)
  1584. break;
  1585. }
  1586. pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
  1587. flash_cmd.dma);
  1588. if (status) {
  1589. dev_err(&adapter->pdev->dev, "Firmware load error\n");
  1590. goto fw_exit;
  1591. }
  1592. dev_info(&adapter->pdev->dev, "Firmware flashed succesfully\n");
  1593. fw_exit:
  1594. release_firmware(fw);
  1595. return status;
  1596. }
  1597. static struct net_device_ops be_netdev_ops = {
  1598. .ndo_open = be_open,
  1599. .ndo_stop = be_close,
  1600. .ndo_start_xmit = be_xmit,
  1601. .ndo_get_stats = be_get_stats,
  1602. .ndo_set_rx_mode = be_set_multicast_list,
  1603. .ndo_set_mac_address = be_mac_addr_set,
  1604. .ndo_change_mtu = be_change_mtu,
  1605. .ndo_validate_addr = eth_validate_addr,
  1606. .ndo_vlan_rx_register = be_vlan_register,
  1607. .ndo_vlan_rx_add_vid = be_vlan_add_vid,
  1608. .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
  1609. };
  1610. static void be_netdev_init(struct net_device *netdev)
  1611. {
  1612. struct be_adapter *adapter = netdev_priv(netdev);
  1613. netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
  1614. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
  1615. NETIF_F_GRO;
  1616. netdev->flags |= IFF_MULTICAST;
  1617. adapter->rx_csum = true;
  1618. /* Default settings for Rx and Tx flow control */
  1619. adapter->rx_fc = true;
  1620. adapter->tx_fc = true;
  1621. netif_set_gso_max_size(netdev, 65535);
  1622. BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
  1623. SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
  1624. netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
  1625. BE_NAPI_WEIGHT);
  1626. netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
  1627. BE_NAPI_WEIGHT);
  1628. netif_carrier_off(netdev);
  1629. netif_stop_queue(netdev);
  1630. }
  1631. static void be_unmap_pci_bars(struct be_adapter *adapter)
  1632. {
  1633. if (adapter->csr)
  1634. iounmap(adapter->csr);
  1635. if (adapter->db)
  1636. iounmap(adapter->db);
  1637. if (adapter->pcicfg)
  1638. iounmap(adapter->pcicfg);
  1639. }
  1640. static int be_map_pci_bars(struct be_adapter *adapter)
  1641. {
  1642. u8 __iomem *addr;
  1643. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
  1644. pci_resource_len(adapter->pdev, 2));
  1645. if (addr == NULL)
  1646. return -ENOMEM;
  1647. adapter->csr = addr;
  1648. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
  1649. 128 * 1024);
  1650. if (addr == NULL)
  1651. goto pci_map_err;
  1652. adapter->db = addr;
  1653. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
  1654. pci_resource_len(adapter->pdev, 1));
  1655. if (addr == NULL)
  1656. goto pci_map_err;
  1657. adapter->pcicfg = addr;
  1658. return 0;
  1659. pci_map_err:
  1660. be_unmap_pci_bars(adapter);
  1661. return -ENOMEM;
  1662. }
  1663. static void be_ctrl_cleanup(struct be_adapter *adapter)
  1664. {
  1665. struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
  1666. be_unmap_pci_bars(adapter);
  1667. if (mem->va)
  1668. pci_free_consistent(adapter->pdev, mem->size,
  1669. mem->va, mem->dma);
  1670. mem = &adapter->mc_cmd_mem;
  1671. if (mem->va)
  1672. pci_free_consistent(adapter->pdev, mem->size,
  1673. mem->va, mem->dma);
  1674. }
  1675. static int be_ctrl_init(struct be_adapter *adapter)
  1676. {
  1677. struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
  1678. struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
  1679. struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
  1680. int status;
  1681. status = be_map_pci_bars(adapter);
  1682. if (status)
  1683. goto done;
  1684. mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
  1685. mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
  1686. mbox_mem_alloc->size, &mbox_mem_alloc->dma);
  1687. if (!mbox_mem_alloc->va) {
  1688. status = -ENOMEM;
  1689. goto unmap_pci_bars;
  1690. }
  1691. mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
  1692. mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
  1693. mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
  1694. memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
  1695. mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
  1696. mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
  1697. &mc_cmd_mem->dma);
  1698. if (mc_cmd_mem->va == NULL) {
  1699. status = -ENOMEM;
  1700. goto free_mbox;
  1701. }
  1702. memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
  1703. spin_lock_init(&adapter->mbox_lock);
  1704. spin_lock_init(&adapter->mcc_lock);
  1705. spin_lock_init(&adapter->mcc_cq_lock);
  1706. return 0;
  1707. free_mbox:
  1708. pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
  1709. mbox_mem_alloc->va, mbox_mem_alloc->dma);
  1710. unmap_pci_bars:
  1711. be_unmap_pci_bars(adapter);
  1712. done:
  1713. return status;
  1714. }
  1715. static void be_stats_cleanup(struct be_adapter *adapter)
  1716. {
  1717. struct be_stats_obj *stats = &adapter->stats;
  1718. struct be_dma_mem *cmd = &stats->cmd;
  1719. if (cmd->va)
  1720. pci_free_consistent(adapter->pdev, cmd->size,
  1721. cmd->va, cmd->dma);
  1722. }
  1723. static int be_stats_init(struct be_adapter *adapter)
  1724. {
  1725. struct be_stats_obj *stats = &adapter->stats;
  1726. struct be_dma_mem *cmd = &stats->cmd;
  1727. cmd->size = sizeof(struct be_cmd_req_get_stats);
  1728. cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
  1729. if (cmd->va == NULL)
  1730. return -1;
  1731. return 0;
  1732. }
  1733. static void __devexit be_remove(struct pci_dev *pdev)
  1734. {
  1735. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1736. if (!adapter)
  1737. return;
  1738. unregister_netdev(adapter->netdev);
  1739. be_clear(adapter);
  1740. be_stats_cleanup(adapter);
  1741. be_ctrl_cleanup(adapter);
  1742. if (adapter->msix_enabled) {
  1743. pci_disable_msix(adapter->pdev);
  1744. adapter->msix_enabled = false;
  1745. }
  1746. pci_set_drvdata(pdev, NULL);
  1747. pci_release_regions(pdev);
  1748. pci_disable_device(pdev);
  1749. free_netdev(adapter->netdev);
  1750. }
  1751. static int be_hw_up(struct be_adapter *adapter)
  1752. {
  1753. int status;
  1754. status = be_cmd_POST(adapter);
  1755. if (status)
  1756. return status;
  1757. status = be_cmd_reset_function(adapter);
  1758. if (status)
  1759. return status;
  1760. status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
  1761. if (status)
  1762. return status;
  1763. status = be_cmd_query_fw_cfg(adapter,
  1764. &adapter->port_num, &adapter->cap);
  1765. return status;
  1766. }
  1767. static int __devinit be_probe(struct pci_dev *pdev,
  1768. const struct pci_device_id *pdev_id)
  1769. {
  1770. int status = 0;
  1771. struct be_adapter *adapter;
  1772. struct net_device *netdev;
  1773. u8 mac[ETH_ALEN];
  1774. status = pci_enable_device(pdev);
  1775. if (status)
  1776. goto do_none;
  1777. status = pci_request_regions(pdev, DRV_NAME);
  1778. if (status)
  1779. goto disable_dev;
  1780. pci_set_master(pdev);
  1781. netdev = alloc_etherdev(sizeof(struct be_adapter));
  1782. if (netdev == NULL) {
  1783. status = -ENOMEM;
  1784. goto rel_reg;
  1785. }
  1786. adapter = netdev_priv(netdev);
  1787. adapter->pdev = pdev;
  1788. pci_set_drvdata(pdev, adapter);
  1789. adapter->netdev = netdev;
  1790. be_msix_enable(adapter);
  1791. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  1792. if (!status) {
  1793. netdev->features |= NETIF_F_HIGHDMA;
  1794. } else {
  1795. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1796. if (status) {
  1797. dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
  1798. goto free_netdev;
  1799. }
  1800. }
  1801. status = be_ctrl_init(adapter);
  1802. if (status)
  1803. goto free_netdev;
  1804. status = be_stats_init(adapter);
  1805. if (status)
  1806. goto ctrl_clean;
  1807. status = be_hw_up(adapter);
  1808. if (status)
  1809. goto stats_clean;
  1810. status = be_cmd_mac_addr_query(adapter, mac, MAC_ADDRESS_TYPE_NETWORK,
  1811. true /* permanent */, 0);
  1812. if (status)
  1813. goto stats_clean;
  1814. memcpy(netdev->dev_addr, mac, ETH_ALEN);
  1815. INIT_DELAYED_WORK(&adapter->work, be_worker);
  1816. be_netdev_init(netdev);
  1817. SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
  1818. status = be_setup(adapter);
  1819. if (status)
  1820. goto stats_clean;
  1821. status = register_netdev(netdev);
  1822. if (status != 0)
  1823. goto unsetup;
  1824. dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
  1825. return 0;
  1826. unsetup:
  1827. be_clear(adapter);
  1828. stats_clean:
  1829. be_stats_cleanup(adapter);
  1830. ctrl_clean:
  1831. be_ctrl_cleanup(adapter);
  1832. free_netdev:
  1833. free_netdev(adapter->netdev);
  1834. rel_reg:
  1835. pci_release_regions(pdev);
  1836. disable_dev:
  1837. pci_disable_device(pdev);
  1838. do_none:
  1839. dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
  1840. return status;
  1841. }
  1842. static int be_suspend(struct pci_dev *pdev, pm_message_t state)
  1843. {
  1844. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1845. struct net_device *netdev = adapter->netdev;
  1846. netif_device_detach(netdev);
  1847. if (netif_running(netdev)) {
  1848. rtnl_lock();
  1849. be_close(netdev);
  1850. rtnl_unlock();
  1851. }
  1852. be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
  1853. be_clear(adapter);
  1854. pci_save_state(pdev);
  1855. pci_disable_device(pdev);
  1856. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  1857. return 0;
  1858. }
  1859. static int be_resume(struct pci_dev *pdev)
  1860. {
  1861. int status = 0;
  1862. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1863. struct net_device *netdev = adapter->netdev;
  1864. netif_device_detach(netdev);
  1865. status = pci_enable_device(pdev);
  1866. if (status)
  1867. return status;
  1868. pci_set_power_state(pdev, 0);
  1869. pci_restore_state(pdev);
  1870. be_setup(adapter);
  1871. if (netif_running(netdev)) {
  1872. rtnl_lock();
  1873. be_open(netdev);
  1874. rtnl_unlock();
  1875. }
  1876. netif_device_attach(netdev);
  1877. return 0;
  1878. }
  1879. static struct pci_driver be_driver = {
  1880. .name = DRV_NAME,
  1881. .id_table = be_dev_ids,
  1882. .probe = be_probe,
  1883. .remove = be_remove,
  1884. .suspend = be_suspend,
  1885. .resume = be_resume
  1886. };
  1887. static int __init be_init_module(void)
  1888. {
  1889. if (rx_frag_size != 8192 && rx_frag_size != 4096
  1890. && rx_frag_size != 2048) {
  1891. printk(KERN_WARNING DRV_NAME
  1892. " : Module param rx_frag_size must be 2048/4096/8192."
  1893. " Using 2048\n");
  1894. rx_frag_size = 2048;
  1895. }
  1896. return pci_register_driver(&be_driver);
  1897. }
  1898. module_init(be_init_module);
  1899. static void __exit be_exit_module(void)
  1900. {
  1901. pci_unregister_driver(&be_driver);
  1902. }
  1903. module_exit(be_exit_module);