irq.c 2.8 KB

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  1. /*
  2. * arch/mips/emma2rh/common/irq.c
  3. * This file is common irq dispatcher.
  4. *
  5. * Copyright (C) NEC Electronics Corporation 2005-2006
  6. *
  7. * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
  8. *
  9. * Copyright 2001 MontaVista Software Inc.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. */
  25. #include <linux/init.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/irq.h>
  28. #include <linux/types.h>
  29. #include <asm/system.h>
  30. #include <asm/mipsregs.h>
  31. #include <asm/addrspace.h>
  32. #include <asm/bootinfo.h>
  33. #include <asm/emma2rh/emma2rh.h>
  34. /*
  35. * the first level int-handler will jump here if it is a emma2rh irq
  36. */
  37. void emma2rh_irq_dispatch(void)
  38. {
  39. u32 intStatus;
  40. u32 bitmask;
  41. u32 i;
  42. intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0)
  43. & emma2rh_in32(EMMA2RH_BHIF_INT_EN_0);
  44. #ifdef EMMA2RH_SW_CASCADE
  45. if (intStatus &
  46. (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
  47. u32 swIntStatus;
  48. swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT)
  49. & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
  50. for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
  51. if (swIntStatus & bitmask) {
  52. do_IRQ(EMMA2RH_SW_IRQ_BASE + i);
  53. return;
  54. }
  55. }
  56. }
  57. #endif
  58. for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
  59. if (intStatus & bitmask) {
  60. do_IRQ(EMMA2RH_IRQ_BASE + i);
  61. return;
  62. }
  63. }
  64. intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1)
  65. & emma2rh_in32(EMMA2RH_BHIF_INT_EN_1);
  66. #ifdef EMMA2RH_GPIO_CASCADE
  67. if (intStatus &
  68. (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
  69. u32 gpioIntStatus;
  70. gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST)
  71. & emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
  72. for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
  73. if (gpioIntStatus & bitmask) {
  74. do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i);
  75. return;
  76. }
  77. }
  78. }
  79. #endif
  80. for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
  81. if (intStatus & bitmask) {
  82. do_IRQ(EMMA2RH_IRQ_BASE + i);
  83. return;
  84. }
  85. }
  86. intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2)
  87. & emma2rh_in32(EMMA2RH_BHIF_INT_EN_2);
  88. for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
  89. if (intStatus & bitmask) {
  90. do_IRQ(EMMA2RH_IRQ_BASE + i);
  91. return;
  92. }
  93. }
  94. }