tps65910-regulator.c 33 KB

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  1. /*
  2. * tps65910.c -- TI tps65910
  3. *
  4. * Copyright 2010 Texas Instruments Inc.
  5. *
  6. * Author: Graeme Gregory <gg@slimlogic.co.uk>
  7. * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/err.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/slab.h>
  23. #include <linux/gpio.h>
  24. #include <linux/mfd/tps65910.h>
  25. #include <linux/regulator/of_regulator.h>
  26. #define TPS65910_SUPPLY_STATE_ENABLED 0x1
  27. #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
  28. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
  29. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
  30. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  31. /* supported VIO voltages in millivolts */
  32. static const u16 VIO_VSEL_table[] = {
  33. 1500, 1800, 2500, 3300,
  34. };
  35. /* VSEL tables for TPS65910 specific LDOs and dcdc's */
  36. /* supported VDD3 voltages in millivolts */
  37. static const u16 VDD3_VSEL_table[] = {
  38. 5000,
  39. };
  40. /* supported VDIG1 voltages in millivolts */
  41. static const u16 VDIG1_VSEL_table[] = {
  42. 1200, 1500, 1800, 2700,
  43. };
  44. /* supported VDIG2 voltages in millivolts */
  45. static const u16 VDIG2_VSEL_table[] = {
  46. 1000, 1100, 1200, 1800,
  47. };
  48. /* supported VPLL voltages in millivolts */
  49. static const u16 VPLL_VSEL_table[] = {
  50. 1000, 1100, 1800, 2500,
  51. };
  52. /* supported VDAC voltages in millivolts */
  53. static const u16 VDAC_VSEL_table[] = {
  54. 1800, 2600, 2800, 2850,
  55. };
  56. /* supported VAUX1 voltages in millivolts */
  57. static const u16 VAUX1_VSEL_table[] = {
  58. 1800, 2500, 2800, 2850,
  59. };
  60. /* supported VAUX2 voltages in millivolts */
  61. static const u16 VAUX2_VSEL_table[] = {
  62. 1800, 2800, 2900, 3300,
  63. };
  64. /* supported VAUX33 voltages in millivolts */
  65. static const u16 VAUX33_VSEL_table[] = {
  66. 1800, 2000, 2800, 3300,
  67. };
  68. /* supported VMMC voltages in millivolts */
  69. static const u16 VMMC_VSEL_table[] = {
  70. 1800, 2800, 3000, 3300,
  71. };
  72. struct tps_info {
  73. const char *name;
  74. unsigned min_uV;
  75. unsigned max_uV;
  76. u8 n_voltages;
  77. const u16 *voltage_table;
  78. int enable_time_us;
  79. };
  80. static struct tps_info tps65910_regs[] = {
  81. {
  82. .name = "vrtc",
  83. .enable_time_us = 2200,
  84. },
  85. {
  86. .name = "vio",
  87. .min_uV = 1500000,
  88. .max_uV = 3300000,
  89. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  90. .voltage_table = VIO_VSEL_table,
  91. .enable_time_us = 350,
  92. },
  93. {
  94. .name = "vdd1",
  95. .min_uV = 600000,
  96. .max_uV = 4500000,
  97. .enable_time_us = 350,
  98. },
  99. {
  100. .name = "vdd2",
  101. .min_uV = 600000,
  102. .max_uV = 4500000,
  103. .enable_time_us = 350,
  104. },
  105. {
  106. .name = "vdd3",
  107. .min_uV = 5000000,
  108. .max_uV = 5000000,
  109. .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
  110. .voltage_table = VDD3_VSEL_table,
  111. .enable_time_us = 200,
  112. },
  113. {
  114. .name = "vdig1",
  115. .min_uV = 1200000,
  116. .max_uV = 2700000,
  117. .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
  118. .voltage_table = VDIG1_VSEL_table,
  119. .enable_time_us = 100,
  120. },
  121. {
  122. .name = "vdig2",
  123. .min_uV = 1000000,
  124. .max_uV = 1800000,
  125. .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
  126. .voltage_table = VDIG2_VSEL_table,
  127. .enable_time_us = 100,
  128. },
  129. {
  130. .name = "vpll",
  131. .min_uV = 1000000,
  132. .max_uV = 2500000,
  133. .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
  134. .voltage_table = VPLL_VSEL_table,
  135. .enable_time_us = 100,
  136. },
  137. {
  138. .name = "vdac",
  139. .min_uV = 1800000,
  140. .max_uV = 2850000,
  141. .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
  142. .voltage_table = VDAC_VSEL_table,
  143. .enable_time_us = 100,
  144. },
  145. {
  146. .name = "vaux1",
  147. .min_uV = 1800000,
  148. .max_uV = 2850000,
  149. .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
  150. .voltage_table = VAUX1_VSEL_table,
  151. .enable_time_us = 100,
  152. },
  153. {
  154. .name = "vaux2",
  155. .min_uV = 1800000,
  156. .max_uV = 3300000,
  157. .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
  158. .voltage_table = VAUX2_VSEL_table,
  159. .enable_time_us = 100,
  160. },
  161. {
  162. .name = "vaux33",
  163. .min_uV = 1800000,
  164. .max_uV = 3300000,
  165. .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
  166. .voltage_table = VAUX33_VSEL_table,
  167. .enable_time_us = 100,
  168. },
  169. {
  170. .name = "vmmc",
  171. .min_uV = 1800000,
  172. .max_uV = 3300000,
  173. .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
  174. .voltage_table = VMMC_VSEL_table,
  175. .enable_time_us = 100,
  176. },
  177. };
  178. static struct tps_info tps65911_regs[] = {
  179. {
  180. .name = "vrtc",
  181. .enable_time_us = 2200,
  182. },
  183. {
  184. .name = "vio",
  185. .min_uV = 1500000,
  186. .max_uV = 3300000,
  187. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  188. .voltage_table = VIO_VSEL_table,
  189. .enable_time_us = 350,
  190. },
  191. {
  192. .name = "vdd1",
  193. .min_uV = 600000,
  194. .max_uV = 4500000,
  195. .n_voltages = 73,
  196. .enable_time_us = 350,
  197. },
  198. {
  199. .name = "vdd2",
  200. .min_uV = 600000,
  201. .max_uV = 4500000,
  202. .n_voltages = 73,
  203. .enable_time_us = 350,
  204. },
  205. {
  206. .name = "vddctrl",
  207. .min_uV = 600000,
  208. .max_uV = 1400000,
  209. .n_voltages = 65,
  210. .enable_time_us = 900,
  211. },
  212. {
  213. .name = "ldo1",
  214. .min_uV = 1000000,
  215. .max_uV = 3300000,
  216. .n_voltages = 47,
  217. .enable_time_us = 420,
  218. },
  219. {
  220. .name = "ldo2",
  221. .min_uV = 1000000,
  222. .max_uV = 3300000,
  223. .n_voltages = 47,
  224. .enable_time_us = 420,
  225. },
  226. {
  227. .name = "ldo3",
  228. .min_uV = 1000000,
  229. .max_uV = 3300000,
  230. .n_voltages = 24,
  231. .enable_time_us = 230,
  232. },
  233. {
  234. .name = "ldo4",
  235. .min_uV = 1000000,
  236. .max_uV = 3300000,
  237. .n_voltages = 47,
  238. .enable_time_us = 230,
  239. },
  240. {
  241. .name = "ldo5",
  242. .min_uV = 1000000,
  243. .max_uV = 3300000,
  244. .n_voltages = 24,
  245. .enable_time_us = 230,
  246. },
  247. {
  248. .name = "ldo6",
  249. .min_uV = 1000000,
  250. .max_uV = 3300000,
  251. .n_voltages = 24,
  252. .enable_time_us = 230,
  253. },
  254. {
  255. .name = "ldo7",
  256. .min_uV = 1000000,
  257. .max_uV = 3300000,
  258. .n_voltages = 24,
  259. .enable_time_us = 230,
  260. },
  261. {
  262. .name = "ldo8",
  263. .min_uV = 1000000,
  264. .max_uV = 3300000,
  265. .n_voltages = 24,
  266. .enable_time_us = 230,
  267. },
  268. };
  269. #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
  270. static unsigned int tps65910_ext_sleep_control[] = {
  271. 0,
  272. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  273. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  274. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  275. EXT_CONTROL_REG_BITS(VDD3, 1, 3),
  276. EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
  277. EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
  278. EXT_CONTROL_REG_BITS(VPLL, 0, 6),
  279. EXT_CONTROL_REG_BITS(VDAC, 0, 7),
  280. EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
  281. EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
  282. EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
  283. EXT_CONTROL_REG_BITS(VMMC, 0, 0),
  284. };
  285. static unsigned int tps65911_ext_sleep_control[] = {
  286. 0,
  287. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  288. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  289. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  290. EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
  291. EXT_CONTROL_REG_BITS(LDO1, 0, 1),
  292. EXT_CONTROL_REG_BITS(LDO2, 0, 2),
  293. EXT_CONTROL_REG_BITS(LDO3, 0, 7),
  294. EXT_CONTROL_REG_BITS(LDO4, 0, 6),
  295. EXT_CONTROL_REG_BITS(LDO5, 0, 3),
  296. EXT_CONTROL_REG_BITS(LDO6, 0, 0),
  297. EXT_CONTROL_REG_BITS(LDO7, 0, 5),
  298. EXT_CONTROL_REG_BITS(LDO8, 0, 4),
  299. };
  300. struct tps65910_reg {
  301. struct regulator_desc *desc;
  302. struct tps65910 *mfd;
  303. struct regulator_dev **rdev;
  304. struct tps_info **info;
  305. struct mutex mutex;
  306. int num_regulators;
  307. int mode;
  308. int (*get_ctrl_reg)(int);
  309. unsigned int *ext_sleep_control;
  310. unsigned int board_ext_control[TPS65910_NUM_REGS];
  311. };
  312. static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
  313. {
  314. unsigned int val;
  315. int err;
  316. err = tps65910_reg_read(pmic->mfd, reg, &val);
  317. if (err)
  318. return err;
  319. return val;
  320. }
  321. static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
  322. u8 set_mask, u8 clear_mask)
  323. {
  324. int err, data;
  325. mutex_lock(&pmic->mutex);
  326. data = tps65910_read(pmic, reg);
  327. if (data < 0) {
  328. dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
  329. err = data;
  330. goto out;
  331. }
  332. data &= ~clear_mask;
  333. data |= set_mask;
  334. err = tps65910_reg_write(pmic->mfd, reg, data);
  335. if (err)
  336. dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
  337. out:
  338. mutex_unlock(&pmic->mutex);
  339. return err;
  340. }
  341. static int tps65910_reg_read_locked(struct tps65910_reg *pmic, u8 reg)
  342. {
  343. int data;
  344. mutex_lock(&pmic->mutex);
  345. data = tps65910_read(pmic, reg);
  346. if (data < 0)
  347. dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
  348. mutex_unlock(&pmic->mutex);
  349. return data;
  350. }
  351. static int tps65910_reg_write_locked(struct tps65910_reg *pmic, u8 reg, u8 val)
  352. {
  353. int err;
  354. mutex_lock(&pmic->mutex);
  355. err = tps65910_reg_write(pmic->mfd, reg, val);
  356. if (err < 0)
  357. dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
  358. mutex_unlock(&pmic->mutex);
  359. return err;
  360. }
  361. static int tps65910_get_ctrl_register(int id)
  362. {
  363. switch (id) {
  364. case TPS65910_REG_VRTC:
  365. return TPS65910_VRTC;
  366. case TPS65910_REG_VIO:
  367. return TPS65910_VIO;
  368. case TPS65910_REG_VDD1:
  369. return TPS65910_VDD1;
  370. case TPS65910_REG_VDD2:
  371. return TPS65910_VDD2;
  372. case TPS65910_REG_VDD3:
  373. return TPS65910_VDD3;
  374. case TPS65910_REG_VDIG1:
  375. return TPS65910_VDIG1;
  376. case TPS65910_REG_VDIG2:
  377. return TPS65910_VDIG2;
  378. case TPS65910_REG_VPLL:
  379. return TPS65910_VPLL;
  380. case TPS65910_REG_VDAC:
  381. return TPS65910_VDAC;
  382. case TPS65910_REG_VAUX1:
  383. return TPS65910_VAUX1;
  384. case TPS65910_REG_VAUX2:
  385. return TPS65910_VAUX2;
  386. case TPS65910_REG_VAUX33:
  387. return TPS65910_VAUX33;
  388. case TPS65910_REG_VMMC:
  389. return TPS65910_VMMC;
  390. default:
  391. return -EINVAL;
  392. }
  393. }
  394. static int tps65911_get_ctrl_register(int id)
  395. {
  396. switch (id) {
  397. case TPS65910_REG_VRTC:
  398. return TPS65910_VRTC;
  399. case TPS65910_REG_VIO:
  400. return TPS65910_VIO;
  401. case TPS65910_REG_VDD1:
  402. return TPS65910_VDD1;
  403. case TPS65910_REG_VDD2:
  404. return TPS65910_VDD2;
  405. case TPS65911_REG_VDDCTRL:
  406. return TPS65911_VDDCTRL;
  407. case TPS65911_REG_LDO1:
  408. return TPS65911_LDO1;
  409. case TPS65911_REG_LDO2:
  410. return TPS65911_LDO2;
  411. case TPS65911_REG_LDO3:
  412. return TPS65911_LDO3;
  413. case TPS65911_REG_LDO4:
  414. return TPS65911_LDO4;
  415. case TPS65911_REG_LDO5:
  416. return TPS65911_LDO5;
  417. case TPS65911_REG_LDO6:
  418. return TPS65911_LDO6;
  419. case TPS65911_REG_LDO7:
  420. return TPS65911_LDO7;
  421. case TPS65911_REG_LDO8:
  422. return TPS65911_LDO8;
  423. default:
  424. return -EINVAL;
  425. }
  426. }
  427. static int tps65910_enable_time(struct regulator_dev *dev)
  428. {
  429. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  430. int id = rdev_get_id(dev);
  431. return pmic->info[id]->enable_time_us;
  432. }
  433. static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
  434. {
  435. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  436. struct tps65910 *mfd = pmic->mfd;
  437. int reg, value, id = rdev_get_id(dev);
  438. reg = pmic->get_ctrl_reg(id);
  439. if (reg < 0)
  440. return reg;
  441. switch (mode) {
  442. case REGULATOR_MODE_NORMAL:
  443. return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT,
  444. LDO_ST_MODE_BIT);
  445. case REGULATOR_MODE_IDLE:
  446. value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
  447. return tps65910_reg_set_bits(mfd, reg, value);
  448. case REGULATOR_MODE_STANDBY:
  449. return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
  450. }
  451. return -EINVAL;
  452. }
  453. static unsigned int tps65910_get_mode(struct regulator_dev *dev)
  454. {
  455. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  456. int reg, value, id = rdev_get_id(dev);
  457. reg = pmic->get_ctrl_reg(id);
  458. if (reg < 0)
  459. return reg;
  460. value = tps65910_reg_read_locked(pmic, reg);
  461. if (value < 0)
  462. return value;
  463. if (!(value & LDO_ST_ON_BIT))
  464. return REGULATOR_MODE_STANDBY;
  465. else if (value & LDO_ST_MODE_BIT)
  466. return REGULATOR_MODE_IDLE;
  467. else
  468. return REGULATOR_MODE_NORMAL;
  469. }
  470. static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
  471. {
  472. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  473. int id = rdev_get_id(dev);
  474. int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
  475. switch (id) {
  476. case TPS65910_REG_VDD1:
  477. opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_OP);
  478. mult = tps65910_reg_read_locked(pmic, TPS65910_VDD1);
  479. mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
  480. srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_SR);
  481. sr = opvsel & VDD1_OP_CMD_MASK;
  482. opvsel &= VDD1_OP_SEL_MASK;
  483. srvsel &= VDD1_SR_SEL_MASK;
  484. vselmax = 75;
  485. break;
  486. case TPS65910_REG_VDD2:
  487. opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_OP);
  488. mult = tps65910_reg_read_locked(pmic, TPS65910_VDD2);
  489. mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
  490. srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_SR);
  491. sr = opvsel & VDD2_OP_CMD_MASK;
  492. opvsel &= VDD2_OP_SEL_MASK;
  493. srvsel &= VDD2_SR_SEL_MASK;
  494. vselmax = 75;
  495. break;
  496. case TPS65911_REG_VDDCTRL:
  497. opvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_OP);
  498. srvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_SR);
  499. sr = opvsel & VDDCTRL_OP_CMD_MASK;
  500. opvsel &= VDDCTRL_OP_SEL_MASK;
  501. srvsel &= VDDCTRL_SR_SEL_MASK;
  502. vselmax = 64;
  503. break;
  504. }
  505. /* multiplier 0 == 1 but 2,3 normal */
  506. if (!mult)
  507. mult=1;
  508. if (sr) {
  509. /* normalise to valid range */
  510. if (srvsel < 3)
  511. srvsel = 3;
  512. if (srvsel > vselmax)
  513. srvsel = vselmax;
  514. return srvsel - 3;
  515. } else {
  516. /* normalise to valid range*/
  517. if (opvsel < 3)
  518. opvsel = 3;
  519. if (opvsel > vselmax)
  520. opvsel = vselmax;
  521. return opvsel - 3;
  522. }
  523. return -EINVAL;
  524. }
  525. static int tps65910_get_voltage_sel(struct regulator_dev *dev)
  526. {
  527. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  528. int reg, value, id = rdev_get_id(dev);
  529. reg = pmic->get_ctrl_reg(id);
  530. if (reg < 0)
  531. return reg;
  532. value = tps65910_reg_read_locked(pmic, reg);
  533. if (value < 0)
  534. return value;
  535. switch (id) {
  536. case TPS65910_REG_VIO:
  537. case TPS65910_REG_VDIG1:
  538. case TPS65910_REG_VDIG2:
  539. case TPS65910_REG_VPLL:
  540. case TPS65910_REG_VDAC:
  541. case TPS65910_REG_VAUX1:
  542. case TPS65910_REG_VAUX2:
  543. case TPS65910_REG_VAUX33:
  544. case TPS65910_REG_VMMC:
  545. value &= LDO_SEL_MASK;
  546. value >>= LDO_SEL_SHIFT;
  547. break;
  548. default:
  549. return -EINVAL;
  550. }
  551. return value;
  552. }
  553. static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
  554. {
  555. return 5 * 1000 * 1000;
  556. }
  557. static int tps65911_get_voltage_sel(struct regulator_dev *dev)
  558. {
  559. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  560. int id = rdev_get_id(dev);
  561. u8 value, reg;
  562. reg = pmic->get_ctrl_reg(id);
  563. value = tps65910_reg_read_locked(pmic, reg);
  564. switch (id) {
  565. case TPS65911_REG_LDO1:
  566. case TPS65911_REG_LDO2:
  567. case TPS65911_REG_LDO4:
  568. value &= LDO1_SEL_MASK;
  569. value >>= LDO_SEL_SHIFT;
  570. break;
  571. case TPS65911_REG_LDO3:
  572. case TPS65911_REG_LDO5:
  573. case TPS65911_REG_LDO6:
  574. case TPS65911_REG_LDO7:
  575. case TPS65911_REG_LDO8:
  576. value &= LDO3_SEL_MASK;
  577. value >>= LDO_SEL_SHIFT;
  578. break;
  579. case TPS65910_REG_VIO:
  580. value &= LDO_SEL_MASK;
  581. value >>= LDO_SEL_SHIFT;
  582. break;
  583. default:
  584. return -EINVAL;
  585. }
  586. return value;
  587. }
  588. static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
  589. unsigned selector)
  590. {
  591. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  592. int id = rdev_get_id(dev), vsel;
  593. int dcdc_mult = 0;
  594. switch (id) {
  595. case TPS65910_REG_VDD1:
  596. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  597. if (dcdc_mult == 1)
  598. dcdc_mult--;
  599. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  600. tps65910_modify_bits(pmic, TPS65910_VDD1,
  601. (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
  602. VDD1_VGAIN_SEL_MASK);
  603. tps65910_reg_write_locked(pmic, TPS65910_VDD1_OP, vsel);
  604. break;
  605. case TPS65910_REG_VDD2:
  606. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  607. if (dcdc_mult == 1)
  608. dcdc_mult--;
  609. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  610. tps65910_modify_bits(pmic, TPS65910_VDD2,
  611. (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
  612. VDD1_VGAIN_SEL_MASK);
  613. tps65910_reg_write_locked(pmic, TPS65910_VDD2_OP, vsel);
  614. break;
  615. case TPS65911_REG_VDDCTRL:
  616. vsel = selector + 3;
  617. tps65910_reg_write_locked(pmic, TPS65911_VDDCTRL_OP, vsel);
  618. }
  619. return 0;
  620. }
  621. static int tps65910_set_voltage_sel(struct regulator_dev *dev,
  622. unsigned selector)
  623. {
  624. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  625. int reg, id = rdev_get_id(dev);
  626. reg = pmic->get_ctrl_reg(id);
  627. if (reg < 0)
  628. return reg;
  629. switch (id) {
  630. case TPS65910_REG_VIO:
  631. case TPS65910_REG_VDIG1:
  632. case TPS65910_REG_VDIG2:
  633. case TPS65910_REG_VPLL:
  634. case TPS65910_REG_VDAC:
  635. case TPS65910_REG_VAUX1:
  636. case TPS65910_REG_VAUX2:
  637. case TPS65910_REG_VAUX33:
  638. case TPS65910_REG_VMMC:
  639. return tps65910_modify_bits(pmic, reg,
  640. (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
  641. }
  642. return -EINVAL;
  643. }
  644. static int tps65911_set_voltage_sel(struct regulator_dev *dev,
  645. unsigned selector)
  646. {
  647. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  648. int reg, id = rdev_get_id(dev);
  649. reg = pmic->get_ctrl_reg(id);
  650. if (reg < 0)
  651. return reg;
  652. switch (id) {
  653. case TPS65911_REG_LDO1:
  654. case TPS65911_REG_LDO2:
  655. case TPS65911_REG_LDO4:
  656. return tps65910_modify_bits(pmic, reg,
  657. (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK);
  658. case TPS65911_REG_LDO3:
  659. case TPS65911_REG_LDO5:
  660. case TPS65911_REG_LDO6:
  661. case TPS65911_REG_LDO7:
  662. case TPS65911_REG_LDO8:
  663. return tps65910_modify_bits(pmic, reg,
  664. (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK);
  665. case TPS65910_REG_VIO:
  666. return tps65910_modify_bits(pmic, reg,
  667. (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
  668. }
  669. return -EINVAL;
  670. }
  671. static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
  672. unsigned selector)
  673. {
  674. int volt, mult = 1, id = rdev_get_id(dev);
  675. switch (id) {
  676. case TPS65910_REG_VDD1:
  677. case TPS65910_REG_VDD2:
  678. mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  679. volt = VDD1_2_MIN_VOLT +
  680. (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
  681. break;
  682. case TPS65911_REG_VDDCTRL:
  683. volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
  684. break;
  685. default:
  686. BUG();
  687. return -EINVAL;
  688. }
  689. return volt * 100 * mult;
  690. }
  691. static int tps65910_list_voltage(struct regulator_dev *dev,
  692. unsigned selector)
  693. {
  694. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  695. int id = rdev_get_id(dev), voltage;
  696. if (id < TPS65910_REG_VIO || id > TPS65910_REG_VMMC)
  697. return -EINVAL;
  698. if (selector >= pmic->info[id]->n_voltages)
  699. return -EINVAL;
  700. else
  701. voltage = pmic->info[id]->voltage_table[selector] * 1000;
  702. return voltage;
  703. }
  704. static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
  705. {
  706. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  707. int step_mv = 0, id = rdev_get_id(dev);
  708. switch(id) {
  709. case TPS65911_REG_LDO1:
  710. case TPS65911_REG_LDO2:
  711. case TPS65911_REG_LDO4:
  712. /* The first 5 values of the selector correspond to 1V */
  713. if (selector < 5)
  714. selector = 0;
  715. else
  716. selector -= 4;
  717. step_mv = 50;
  718. break;
  719. case TPS65911_REG_LDO3:
  720. case TPS65911_REG_LDO5:
  721. case TPS65911_REG_LDO6:
  722. case TPS65911_REG_LDO7:
  723. case TPS65911_REG_LDO8:
  724. /* The first 3 values of the selector correspond to 1V */
  725. if (selector < 3)
  726. selector = 0;
  727. else
  728. selector -= 2;
  729. step_mv = 100;
  730. break;
  731. case TPS65910_REG_VIO:
  732. return pmic->info[id]->voltage_table[selector] * 1000;
  733. default:
  734. return -EINVAL;
  735. }
  736. return (LDO_MIN_VOLT + selector * step_mv) * 1000;
  737. }
  738. /* Regulator ops (except VRTC) */
  739. static struct regulator_ops tps65910_ops_dcdc = {
  740. .is_enabled = regulator_is_enabled_regmap,
  741. .enable = regulator_enable_regmap,
  742. .disable = regulator_disable_regmap,
  743. .enable_time = tps65910_enable_time,
  744. .set_mode = tps65910_set_mode,
  745. .get_mode = tps65910_get_mode,
  746. .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
  747. .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
  748. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  749. .list_voltage = tps65910_list_voltage_dcdc,
  750. };
  751. static struct regulator_ops tps65910_ops_vdd3 = {
  752. .is_enabled = regulator_is_enabled_regmap,
  753. .enable = regulator_enable_regmap,
  754. .disable = regulator_disable_regmap,
  755. .enable_time = tps65910_enable_time,
  756. .set_mode = tps65910_set_mode,
  757. .get_mode = tps65910_get_mode,
  758. .get_voltage = tps65910_get_voltage_vdd3,
  759. .list_voltage = tps65910_list_voltage,
  760. };
  761. static struct regulator_ops tps65910_ops = {
  762. .is_enabled = regulator_is_enabled_regmap,
  763. .enable = regulator_enable_regmap,
  764. .disable = regulator_disable_regmap,
  765. .enable_time = tps65910_enable_time,
  766. .set_mode = tps65910_set_mode,
  767. .get_mode = tps65910_get_mode,
  768. .get_voltage_sel = tps65910_get_voltage_sel,
  769. .set_voltage_sel = tps65910_set_voltage_sel,
  770. .list_voltage = tps65910_list_voltage,
  771. };
  772. static struct regulator_ops tps65911_ops = {
  773. .is_enabled = regulator_is_enabled_regmap,
  774. .enable = regulator_enable_regmap,
  775. .disable = regulator_disable_regmap,
  776. .enable_time = tps65910_enable_time,
  777. .set_mode = tps65910_set_mode,
  778. .get_mode = tps65910_get_mode,
  779. .get_voltage_sel = tps65911_get_voltage_sel,
  780. .set_voltage_sel = tps65911_set_voltage_sel,
  781. .list_voltage = tps65911_list_voltage,
  782. };
  783. static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
  784. int id, int ext_sleep_config)
  785. {
  786. struct tps65910 *mfd = pmic->mfd;
  787. u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
  788. u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
  789. int ret;
  790. /*
  791. * Regulator can not be control from multiple external input EN1, EN2
  792. * and EN3 together.
  793. */
  794. if (ext_sleep_config & EXT_SLEEP_CONTROL) {
  795. int en_count;
  796. en_count = ((ext_sleep_config &
  797. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
  798. en_count += ((ext_sleep_config &
  799. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
  800. en_count += ((ext_sleep_config &
  801. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
  802. en_count += ((ext_sleep_config &
  803. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
  804. if (en_count > 1) {
  805. dev_err(mfd->dev,
  806. "External sleep control flag is not proper\n");
  807. return -EINVAL;
  808. }
  809. }
  810. pmic->board_ext_control[id] = ext_sleep_config;
  811. /* External EN1 control */
  812. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
  813. ret = tps65910_reg_set_bits(mfd,
  814. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  815. else
  816. ret = tps65910_reg_clear_bits(mfd,
  817. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  818. if (ret < 0) {
  819. dev_err(mfd->dev,
  820. "Error in configuring external control EN1\n");
  821. return ret;
  822. }
  823. /* External EN2 control */
  824. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
  825. ret = tps65910_reg_set_bits(mfd,
  826. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  827. else
  828. ret = tps65910_reg_clear_bits(mfd,
  829. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  830. if (ret < 0) {
  831. dev_err(mfd->dev,
  832. "Error in configuring external control EN2\n");
  833. return ret;
  834. }
  835. /* External EN3 control for TPS65910 LDO only */
  836. if ((tps65910_chip_id(mfd) == TPS65910) &&
  837. (id >= TPS65910_REG_VDIG1)) {
  838. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
  839. ret = tps65910_reg_set_bits(mfd,
  840. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  841. else
  842. ret = tps65910_reg_clear_bits(mfd,
  843. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  844. if (ret < 0) {
  845. dev_err(mfd->dev,
  846. "Error in configuring external control EN3\n");
  847. return ret;
  848. }
  849. }
  850. /* Return if no external control is selected */
  851. if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
  852. /* Clear all sleep controls */
  853. ret = tps65910_reg_clear_bits(mfd,
  854. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  855. if (!ret)
  856. ret = tps65910_reg_clear_bits(mfd,
  857. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  858. if (ret < 0)
  859. dev_err(mfd->dev,
  860. "Error in configuring SLEEP register\n");
  861. return ret;
  862. }
  863. /*
  864. * For regulator that has separate operational and sleep register make
  865. * sure that operational is used and clear sleep register to turn
  866. * regulator off when external control is inactive
  867. */
  868. if ((id == TPS65910_REG_VDD1) ||
  869. (id == TPS65910_REG_VDD2) ||
  870. ((id == TPS65911_REG_VDDCTRL) &&
  871. (tps65910_chip_id(mfd) == TPS65911))) {
  872. int op_reg_add = pmic->get_ctrl_reg(id) + 1;
  873. int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
  874. int opvsel = tps65910_reg_read_locked(pmic, op_reg_add);
  875. int srvsel = tps65910_reg_read_locked(pmic, sr_reg_add);
  876. if (opvsel & VDD1_OP_CMD_MASK) {
  877. u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
  878. ret = tps65910_reg_write_locked(pmic, op_reg_add,
  879. reg_val);
  880. if (ret < 0) {
  881. dev_err(mfd->dev,
  882. "Error in configuring op register\n");
  883. return ret;
  884. }
  885. }
  886. ret = tps65910_reg_write_locked(pmic, sr_reg_add, 0);
  887. if (ret < 0) {
  888. dev_err(mfd->dev, "Error in settting sr register\n");
  889. return ret;
  890. }
  891. }
  892. ret = tps65910_reg_clear_bits(mfd,
  893. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  894. if (!ret) {
  895. if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  896. ret = tps65910_reg_set_bits(mfd,
  897. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  898. else
  899. ret = tps65910_reg_clear_bits(mfd,
  900. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  901. }
  902. if (ret < 0)
  903. dev_err(mfd->dev,
  904. "Error in configuring SLEEP register\n");
  905. return ret;
  906. }
  907. #ifdef CONFIG_OF
  908. static struct of_regulator_match tps65910_matches[] = {
  909. { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
  910. { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
  911. { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
  912. { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
  913. { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
  914. { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
  915. { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
  916. { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
  917. { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
  918. { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
  919. { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
  920. { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
  921. { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
  922. };
  923. static struct of_regulator_match tps65911_matches[] = {
  924. { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
  925. { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
  926. { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
  927. { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
  928. { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
  929. { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
  930. { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
  931. { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
  932. { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
  933. { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
  934. { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
  935. { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
  936. { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
  937. };
  938. static struct tps65910_board *tps65910_parse_dt_reg_data(
  939. struct platform_device *pdev,
  940. struct of_regulator_match **tps65910_reg_matches)
  941. {
  942. struct tps65910_board *pmic_plat_data;
  943. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  944. struct device_node *np = pdev->dev.parent->of_node;
  945. struct device_node *regulators;
  946. struct of_regulator_match *matches;
  947. unsigned int prop;
  948. int idx = 0, ret, count;
  949. pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
  950. GFP_KERNEL);
  951. if (!pmic_plat_data) {
  952. dev_err(&pdev->dev, "Failure to alloc pdata for regulators.\n");
  953. return NULL;
  954. }
  955. regulators = of_find_node_by_name(np, "regulators");
  956. if (!regulators) {
  957. dev_err(&pdev->dev, "regulator node not found\n");
  958. return NULL;
  959. }
  960. switch (tps65910_chip_id(tps65910)) {
  961. case TPS65910:
  962. count = ARRAY_SIZE(tps65910_matches);
  963. matches = tps65910_matches;
  964. break;
  965. case TPS65911:
  966. count = ARRAY_SIZE(tps65911_matches);
  967. matches = tps65911_matches;
  968. break;
  969. default:
  970. dev_err(&pdev->dev, "Invalid tps chip version\n");
  971. return NULL;
  972. }
  973. ret = of_regulator_match(pdev->dev.parent, regulators, matches, count);
  974. if (ret < 0) {
  975. dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
  976. ret);
  977. return NULL;
  978. }
  979. *tps65910_reg_matches = matches;
  980. for (idx = 0; idx < count; idx++) {
  981. if (!matches[idx].init_data || !matches[idx].of_node)
  982. continue;
  983. pmic_plat_data->tps65910_pmic_init_data[idx] =
  984. matches[idx].init_data;
  985. ret = of_property_read_u32(matches[idx].of_node,
  986. "ti,regulator-ext-sleep-control", &prop);
  987. if (!ret)
  988. pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
  989. }
  990. return pmic_plat_data;
  991. }
  992. #else
  993. static inline struct tps65910_board *tps65910_parse_dt_reg_data(
  994. struct platform_device *pdev,
  995. struct of_regulator_match **tps65910_reg_matches)
  996. {
  997. *tps65910_reg_matches = NULL;
  998. return NULL;
  999. }
  1000. #endif
  1001. static __devinit int tps65910_probe(struct platform_device *pdev)
  1002. {
  1003. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  1004. struct regulator_config config = { };
  1005. struct tps_info *info;
  1006. struct regulator_init_data *reg_data;
  1007. struct regulator_dev *rdev;
  1008. struct tps65910_reg *pmic;
  1009. struct tps65910_board *pmic_plat_data;
  1010. struct of_regulator_match *tps65910_reg_matches = NULL;
  1011. int i, err;
  1012. pmic_plat_data = dev_get_platdata(tps65910->dev);
  1013. if (!pmic_plat_data && tps65910->dev->of_node)
  1014. pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
  1015. &tps65910_reg_matches);
  1016. if (!pmic_plat_data) {
  1017. dev_err(&pdev->dev, "Platform data not found\n");
  1018. return -EINVAL;
  1019. }
  1020. pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
  1021. if (!pmic) {
  1022. dev_err(&pdev->dev, "Memory allocation failed for pmic\n");
  1023. return -ENOMEM;
  1024. }
  1025. mutex_init(&pmic->mutex);
  1026. pmic->mfd = tps65910;
  1027. platform_set_drvdata(pdev, pmic);
  1028. /* Give control of all register to control port */
  1029. tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
  1030. DEVCTRL_SR_CTL_I2C_SEL_MASK);
  1031. switch(tps65910_chip_id(tps65910)) {
  1032. case TPS65910:
  1033. pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
  1034. pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
  1035. pmic->ext_sleep_control = tps65910_ext_sleep_control;
  1036. info = tps65910_regs;
  1037. break;
  1038. case TPS65911:
  1039. pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
  1040. pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
  1041. pmic->ext_sleep_control = tps65911_ext_sleep_control;
  1042. info = tps65911_regs;
  1043. break;
  1044. default:
  1045. dev_err(&pdev->dev, "Invalid tps chip version\n");
  1046. return -ENODEV;
  1047. }
  1048. pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  1049. sizeof(struct regulator_desc), GFP_KERNEL);
  1050. if (!pmic->desc) {
  1051. dev_err(&pdev->dev, "Memory alloc fails for desc\n");
  1052. return -ENOMEM;
  1053. }
  1054. pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  1055. sizeof(struct tps_info *), GFP_KERNEL);
  1056. if (!pmic->info) {
  1057. dev_err(&pdev->dev, "Memory alloc fails for info\n");
  1058. return -ENOMEM;
  1059. }
  1060. pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  1061. sizeof(struct regulator_dev *), GFP_KERNEL);
  1062. if (!pmic->rdev) {
  1063. dev_err(&pdev->dev, "Memory alloc fails for rdev\n");
  1064. return -ENOMEM;
  1065. }
  1066. for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
  1067. i++, info++) {
  1068. reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
  1069. /* Regulator API handles empty constraints but not NULL
  1070. * constraints */
  1071. if (!reg_data)
  1072. continue;
  1073. /* Register the regulators */
  1074. pmic->info[i] = info;
  1075. pmic->desc[i].name = info->name;
  1076. pmic->desc[i].id = i;
  1077. pmic->desc[i].n_voltages = info->n_voltages;
  1078. if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
  1079. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1080. pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
  1081. VDD1_2_NUM_VOLT_COARSE;
  1082. pmic->desc[i].ramp_delay = 12500;
  1083. } else if (i == TPS65910_REG_VDD3) {
  1084. if (tps65910_chip_id(tps65910) == TPS65910) {
  1085. pmic->desc[i].ops = &tps65910_ops_vdd3;
  1086. } else {
  1087. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1088. pmic->desc[i].ramp_delay = 5000;
  1089. }
  1090. } else {
  1091. if (tps65910_chip_id(tps65910) == TPS65910)
  1092. pmic->desc[i].ops = &tps65910_ops;
  1093. else
  1094. pmic->desc[i].ops = &tps65911_ops;
  1095. }
  1096. err = tps65910_set_ext_sleep_config(pmic, i,
  1097. pmic_plat_data->regulator_ext_sleep_control[i]);
  1098. /*
  1099. * Failing on regulator for configuring externally control
  1100. * is not a serious issue, just throw warning.
  1101. */
  1102. if (err < 0)
  1103. dev_warn(tps65910->dev,
  1104. "Failed to initialise ext control config\n");
  1105. pmic->desc[i].type = REGULATOR_VOLTAGE;
  1106. pmic->desc[i].owner = THIS_MODULE;
  1107. pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
  1108. pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
  1109. config.dev = tps65910->dev;
  1110. config.init_data = reg_data;
  1111. config.driver_data = pmic;
  1112. config.regmap = tps65910->regmap;
  1113. if (tps65910_reg_matches)
  1114. config.of_node = tps65910_reg_matches[i].of_node;
  1115. rdev = regulator_register(&pmic->desc[i], &config);
  1116. if (IS_ERR(rdev)) {
  1117. dev_err(tps65910->dev,
  1118. "failed to register %s regulator\n",
  1119. pdev->name);
  1120. err = PTR_ERR(rdev);
  1121. goto err_unregister_regulator;
  1122. }
  1123. /* Save regulator for cleanup */
  1124. pmic->rdev[i] = rdev;
  1125. }
  1126. return 0;
  1127. err_unregister_regulator:
  1128. while (--i >= 0)
  1129. regulator_unregister(pmic->rdev[i]);
  1130. return err;
  1131. }
  1132. static int __devexit tps65910_remove(struct platform_device *pdev)
  1133. {
  1134. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1135. int i;
  1136. for (i = 0; i < pmic->num_regulators; i++)
  1137. regulator_unregister(pmic->rdev[i]);
  1138. return 0;
  1139. }
  1140. static void tps65910_shutdown(struct platform_device *pdev)
  1141. {
  1142. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1143. int i;
  1144. /*
  1145. * Before bootloader jumps to kernel, it makes sure that required
  1146. * external control signals are in desired state so that given rails
  1147. * can be configure accordingly.
  1148. * If rails are configured to be controlled from external control
  1149. * then before shutting down/rebooting the system, the external
  1150. * control configuration need to be remove from the rails so that
  1151. * its output will be available as per register programming even
  1152. * if external controls are removed. This is require when the POR
  1153. * value of the control signals are not in active state and before
  1154. * bootloader initializes it, the system requires the rail output
  1155. * to be active for booting.
  1156. */
  1157. for (i = 0; i < pmic->num_regulators; i++) {
  1158. int err;
  1159. if (!pmic->rdev[i])
  1160. continue;
  1161. err = tps65910_set_ext_sleep_config(pmic, i, 0);
  1162. if (err < 0)
  1163. dev_err(&pdev->dev,
  1164. "Error in clearing external control\n");
  1165. }
  1166. }
  1167. static struct platform_driver tps65910_driver = {
  1168. .driver = {
  1169. .name = "tps65910-pmic",
  1170. .owner = THIS_MODULE,
  1171. },
  1172. .probe = tps65910_probe,
  1173. .remove = __devexit_p(tps65910_remove),
  1174. .shutdown = tps65910_shutdown,
  1175. };
  1176. static int __init tps65910_init(void)
  1177. {
  1178. return platform_driver_register(&tps65910_driver);
  1179. }
  1180. subsys_initcall(tps65910_init);
  1181. static void __exit tps65910_cleanup(void)
  1182. {
  1183. platform_driver_unregister(&tps65910_driver);
  1184. }
  1185. module_exit(tps65910_cleanup);
  1186. MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
  1187. MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
  1188. MODULE_LICENSE("GPL v2");
  1189. MODULE_ALIAS("platform:tps65910-pmic");