ice1712.c 82 KB

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  1. /*
  2. * ALSA driver for ICEnsemble ICE1712 (Envy24)
  3. *
  4. * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. /*
  22. NOTES:
  23. - spdif nonaudio consumer mode does not work (at least with my
  24. Sony STR-DB830)
  25. */
  26. /*
  27. * Changes:
  28. *
  29. * 2002.09.09 Takashi Iwai <tiwai@suse.de>
  30. * split the code to several files. each low-level routine
  31. * is stored in the local file and called from registration
  32. * function from card_info struct.
  33. *
  34. * 2002.11.26 James Stafford <jstafford@ampltd.com>
  35. * Added support for VT1724 (Envy24HT)
  36. * I have left out support for 176.4 and 192 KHz for the moment.
  37. * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
  38. *
  39. * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
  40. * Split vt1724 part to an independent driver.
  41. * The GPIO is accessed through the callback functions now.
  42. *
  43. * 2004.03.31 Doug McLain <nostar@comcast.net>
  44. * Added support for Event Electronics EZ8 card to hoontech.c.
  45. */
  46. #include <sound/driver.h>
  47. #include <asm/io.h>
  48. #include <linux/delay.h>
  49. #include <linux/interrupt.h>
  50. #include <linux/init.h>
  51. #include <linux/pci.h>
  52. #include <linux/slab.h>
  53. #include <linux/moduleparam.h>
  54. #include <linux/mutex.h>
  55. #include <sound/core.h>
  56. #include <sound/cs8427.h>
  57. #include <sound/info.h>
  58. #include <sound/mpu401.h>
  59. #include <sound/initval.h>
  60. #include <sound/asoundef.h>
  61. #include "ice1712.h"
  62. /* lowlevel routines */
  63. #include "delta.h"
  64. #include "ews.h"
  65. #include "hoontech.h"
  66. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  67. MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
  68. MODULE_LICENSE("GPL");
  69. MODULE_SUPPORTED_DEVICE("{"
  70. HOONTECH_DEVICE_DESC
  71. DELTA_DEVICE_DESC
  72. EWS_DEVICE_DESC
  73. "{ICEnsemble,Generic ICE1712},"
  74. "{ICEnsemble,Generic Envy24}}");
  75. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  76. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  77. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
  78. static char *model[SNDRV_CARDS];
  79. static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
  80. static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */
  81. static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
  82. module_param_array(index, int, NULL, 0444);
  83. MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
  84. module_param_array(id, charp, NULL, 0444);
  85. MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
  86. module_param_array(enable, bool, NULL, 0444);
  87. MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
  88. module_param_array(omni, bool, NULL, 0444);
  89. MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
  90. module_param_array(cs8427_timeout, int, NULL, 0444);
  91. MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
  92. module_param_array(model, charp, NULL, 0444);
  93. MODULE_PARM_DESC(model, "Use the given board model.");
  94. module_param_array(dxr_enable, int, NULL, 0444);
  95. MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
  96. static struct pci_device_id snd_ice1712_ids[] = {
  97. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_ICE_1712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICE1712 */
  98. { 0, }
  99. };
  100. MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
  101. static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
  102. static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
  103. static int PRO_RATE_LOCKED;
  104. static int PRO_RATE_RESET = 1;
  105. static unsigned int PRO_RATE_DEFAULT = 44100;
  106. /*
  107. * Basic I/O
  108. */
  109. /* check whether the clock mode is spdif-in */
  110. static inline int is_spdif_master(struct snd_ice1712 *ice)
  111. {
  112. return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
  113. }
  114. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  115. {
  116. return is_spdif_master(ice) || PRO_RATE_LOCKED;
  117. }
  118. static inline void snd_ice1712_ds_write(struct snd_ice1712 * ice, u8 channel, u8 addr, u32 data)
  119. {
  120. outb((channel << 4) | addr, ICEDS(ice, INDEX));
  121. outl(data, ICEDS(ice, DATA));
  122. }
  123. static inline u32 snd_ice1712_ds_read(struct snd_ice1712 * ice, u8 channel, u8 addr)
  124. {
  125. outb((channel << 4) | addr, ICEDS(ice, INDEX));
  126. return inl(ICEDS(ice, DATA));
  127. }
  128. static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
  129. unsigned short reg,
  130. unsigned short val)
  131. {
  132. struct snd_ice1712 *ice = ac97->private_data;
  133. int tm;
  134. unsigned char old_cmd = 0;
  135. for (tm = 0; tm < 0x10000; tm++) {
  136. old_cmd = inb(ICEREG(ice, AC97_CMD));
  137. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  138. continue;
  139. if (!(old_cmd & ICE1712_AC97_READY))
  140. continue;
  141. break;
  142. }
  143. outb(reg, ICEREG(ice, AC97_INDEX));
  144. outw(val, ICEREG(ice, AC97_DATA));
  145. old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
  146. outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
  147. for (tm = 0; tm < 0x10000; tm++)
  148. if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
  149. break;
  150. }
  151. static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
  152. unsigned short reg)
  153. {
  154. struct snd_ice1712 *ice = ac97->private_data;
  155. int tm;
  156. unsigned char old_cmd = 0;
  157. for (tm = 0; tm < 0x10000; tm++) {
  158. old_cmd = inb(ICEREG(ice, AC97_CMD));
  159. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  160. continue;
  161. if (!(old_cmd & ICE1712_AC97_READY))
  162. continue;
  163. break;
  164. }
  165. outb(reg, ICEREG(ice, AC97_INDEX));
  166. outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
  167. for (tm = 0; tm < 0x10000; tm++)
  168. if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
  169. break;
  170. if (tm >= 0x10000) /* timeout */
  171. return ~0;
  172. return inw(ICEREG(ice, AC97_DATA));
  173. }
  174. /*
  175. * pro ac97 section
  176. */
  177. static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
  178. unsigned short reg,
  179. unsigned short val)
  180. {
  181. struct snd_ice1712 *ice = ac97->private_data;
  182. int tm;
  183. unsigned char old_cmd = 0;
  184. for (tm = 0; tm < 0x10000; tm++) {
  185. old_cmd = inb(ICEMT(ice, AC97_CMD));
  186. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  187. continue;
  188. if (!(old_cmd & ICE1712_AC97_READY))
  189. continue;
  190. break;
  191. }
  192. outb(reg, ICEMT(ice, AC97_INDEX));
  193. outw(val, ICEMT(ice, AC97_DATA));
  194. old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
  195. outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
  196. for (tm = 0; tm < 0x10000; tm++)
  197. if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
  198. break;
  199. }
  200. static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
  201. unsigned short reg)
  202. {
  203. struct snd_ice1712 *ice = ac97->private_data;
  204. int tm;
  205. unsigned char old_cmd = 0;
  206. for (tm = 0; tm < 0x10000; tm++) {
  207. old_cmd = inb(ICEMT(ice, AC97_CMD));
  208. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  209. continue;
  210. if (!(old_cmd & ICE1712_AC97_READY))
  211. continue;
  212. break;
  213. }
  214. outb(reg, ICEMT(ice, AC97_INDEX));
  215. outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
  216. for (tm = 0; tm < 0x10000; tm++)
  217. if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
  218. break;
  219. if (tm >= 0x10000) /* timeout */
  220. return ~0;
  221. return inw(ICEMT(ice, AC97_DATA));
  222. }
  223. /*
  224. * consumer ac97 digital mix
  225. */
  226. static int snd_ice1712_digmix_route_ac97_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  227. {
  228. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  229. uinfo->count = 1;
  230. uinfo->value.integer.min = 0;
  231. uinfo->value.integer.max = 1;
  232. return 0;
  233. }
  234. static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  235. {
  236. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  237. ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
  238. return 0;
  239. }
  240. static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  241. {
  242. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  243. unsigned char val, nval;
  244. spin_lock_irq(&ice->reg_lock);
  245. val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
  246. nval = val & ~ICE1712_ROUTE_AC97;
  247. if (ucontrol->value.integer.value[0]) nval |= ICE1712_ROUTE_AC97;
  248. outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
  249. spin_unlock_irq(&ice->reg_lock);
  250. return val != nval;
  251. }
  252. static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = {
  253. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  254. .name = "Digital Mixer To AC97",
  255. .info = snd_ice1712_digmix_route_ac97_info,
  256. .get = snd_ice1712_digmix_route_ac97_get,
  257. .put = snd_ice1712_digmix_route_ac97_put,
  258. };
  259. /*
  260. * gpio operations
  261. */
  262. static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  263. {
  264. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
  265. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  266. }
  267. static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  268. {
  269. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
  270. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  271. }
  272. static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
  273. {
  274. return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  275. }
  276. static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
  277. {
  278. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
  279. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  280. }
  281. /*
  282. *
  283. * CS8427 interface
  284. *
  285. */
  286. /*
  287. * change the input clock selection
  288. * spdif_clock = 1 - IEC958 input, 0 - Envy24
  289. */
  290. static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
  291. {
  292. unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
  293. unsigned char val, nval;
  294. int res = 0;
  295. snd_i2c_lock(ice->i2c);
  296. if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
  297. snd_i2c_unlock(ice->i2c);
  298. return -EIO;
  299. }
  300. if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
  301. snd_i2c_unlock(ice->i2c);
  302. return -EIO;
  303. }
  304. nval = val & 0xf0;
  305. if (spdif_clock)
  306. nval |= 0x01;
  307. else
  308. nval |= 0x04;
  309. if (val != nval) {
  310. reg[1] = nval;
  311. if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
  312. res = -EIO;
  313. } else {
  314. res++;
  315. }
  316. }
  317. snd_i2c_unlock(ice->i2c);
  318. return res;
  319. }
  320. /*
  321. * spdif callbacks
  322. */
  323. static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  324. {
  325. snd_cs8427_iec958_active(ice->cs8427, 1);
  326. }
  327. static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  328. {
  329. snd_cs8427_iec958_active(ice->cs8427, 0);
  330. }
  331. static void setup_cs8427(struct snd_ice1712 *ice, int rate)
  332. {
  333. snd_cs8427_iec958_pcm(ice->cs8427, rate);
  334. }
  335. /*
  336. * create and initialize callbacks for cs8427 interface
  337. */
  338. int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
  339. {
  340. int err;
  341. if ((err = snd_cs8427_create(ice->i2c, addr,
  342. (ice->cs8427_timeout * HZ) / 1000,
  343. &ice->cs8427)) < 0) {
  344. snd_printk(KERN_ERR "CS8427 initialization failed\n");
  345. return err;
  346. }
  347. ice->spdif.ops.open = open_cs8427;
  348. ice->spdif.ops.close = close_cs8427;
  349. ice->spdif.ops.setup_rate = setup_cs8427;
  350. return 0;
  351. }
  352. static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
  353. {
  354. /* change CS8427 clock source too */
  355. if (ice->cs8427)
  356. snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
  357. /* notify ak4524 chip as well */
  358. if (spdif_is_master) {
  359. unsigned int i;
  360. for (i = 0; i < ice->akm_codecs; i++) {
  361. if (ice->akm[i].ops.set_rate_val)
  362. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  363. }
  364. }
  365. }
  366. /*
  367. * Interrupt handler
  368. */
  369. static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  370. {
  371. struct snd_ice1712 *ice = dev_id;
  372. unsigned char status;
  373. int handled = 0;
  374. while (1) {
  375. status = inb(ICEREG(ice, IRQSTAT));
  376. if (status == 0)
  377. break;
  378. handled = 1;
  379. if (status & ICE1712_IRQ_MPU1) {
  380. if (ice->rmidi[0])
  381. snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
  382. outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
  383. status &= ~ICE1712_IRQ_MPU1;
  384. }
  385. if (status & ICE1712_IRQ_TIMER)
  386. outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
  387. if (status & ICE1712_IRQ_MPU2) {
  388. if (ice->rmidi[1])
  389. snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data, regs);
  390. outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
  391. status &= ~ICE1712_IRQ_MPU2;
  392. }
  393. if (status & ICE1712_IRQ_PROPCM) {
  394. unsigned char mtstat = inb(ICEMT(ice, IRQ));
  395. if (mtstat & ICE1712_MULTI_PBKSTATUS) {
  396. if (ice->playback_pro_substream)
  397. snd_pcm_period_elapsed(ice->playback_pro_substream);
  398. outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
  399. }
  400. if (mtstat & ICE1712_MULTI_CAPSTATUS) {
  401. if (ice->capture_pro_substream)
  402. snd_pcm_period_elapsed(ice->capture_pro_substream);
  403. outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
  404. }
  405. }
  406. if (status & ICE1712_IRQ_FM)
  407. outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
  408. if (status & ICE1712_IRQ_PBKDS) {
  409. u32 idx;
  410. u16 pbkstatus;
  411. struct snd_pcm_substream *substream;
  412. pbkstatus = inw(ICEDS(ice, INTSTAT));
  413. //printk("pbkstatus = 0x%x\n", pbkstatus);
  414. for (idx = 0; idx < 6; idx++) {
  415. if ((pbkstatus & (3 << (idx * 2))) == 0)
  416. continue;
  417. if ((substream = ice->playback_con_substream_ds[idx]) != NULL)
  418. snd_pcm_period_elapsed(substream);
  419. outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
  420. }
  421. outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
  422. }
  423. if (status & ICE1712_IRQ_CONCAP) {
  424. if (ice->capture_con_substream)
  425. snd_pcm_period_elapsed(ice->capture_con_substream);
  426. outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
  427. }
  428. if (status & ICE1712_IRQ_CONPBK) {
  429. if (ice->playback_con_substream)
  430. snd_pcm_period_elapsed(ice->playback_con_substream);
  431. outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
  432. }
  433. }
  434. return IRQ_RETVAL(handled);
  435. }
  436. /*
  437. * PCM part - misc
  438. */
  439. static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
  440. struct snd_pcm_hw_params *hw_params)
  441. {
  442. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  443. }
  444. static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
  445. {
  446. return snd_pcm_lib_free_pages(substream);
  447. }
  448. /*
  449. * PCM part - consumer I/O
  450. */
  451. static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
  452. int cmd)
  453. {
  454. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  455. int result = 0;
  456. u32 tmp;
  457. spin_lock(&ice->reg_lock);
  458. tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
  459. if (cmd == SNDRV_PCM_TRIGGER_START) {
  460. tmp |= 1;
  461. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  462. tmp &= ~1;
  463. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
  464. tmp |= 2;
  465. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
  466. tmp &= ~2;
  467. } else {
  468. result = -EINVAL;
  469. }
  470. snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
  471. spin_unlock(&ice->reg_lock);
  472. return result;
  473. }
  474. static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
  475. int cmd)
  476. {
  477. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  478. int result = 0;
  479. u32 tmp;
  480. spin_lock(&ice->reg_lock);
  481. tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
  482. if (cmd == SNDRV_PCM_TRIGGER_START) {
  483. tmp |= 1;
  484. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  485. tmp &= ~1;
  486. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
  487. tmp |= 2;
  488. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
  489. tmp &= ~2;
  490. } else {
  491. result = -EINVAL;
  492. }
  493. snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
  494. spin_unlock(&ice->reg_lock);
  495. return result;
  496. }
  497. static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
  498. int cmd)
  499. {
  500. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  501. int result = 0;
  502. u8 tmp;
  503. spin_lock(&ice->reg_lock);
  504. tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
  505. if (cmd == SNDRV_PCM_TRIGGER_START) {
  506. tmp |= 1;
  507. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  508. tmp &= ~1;
  509. } else {
  510. result = -EINVAL;
  511. }
  512. snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
  513. spin_unlock(&ice->reg_lock);
  514. return result;
  515. }
  516. static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
  517. {
  518. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  519. struct snd_pcm_runtime *runtime = substream->runtime;
  520. u32 period_size, buf_size, rate, tmp;
  521. period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  522. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  523. tmp = 0x0000;
  524. if (snd_pcm_format_width(runtime->format) == 16)
  525. tmp |= 0x10;
  526. if (runtime->channels == 2)
  527. tmp |= 0x08;
  528. rate = (runtime->rate * 8192) / 375;
  529. if (rate > 0x000fffff)
  530. rate = 0x000fffff;
  531. spin_lock_irq(&ice->reg_lock);
  532. outb(0, ice->ddma_port + 15);
  533. outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
  534. outl(runtime->dma_addr, ice->ddma_port + 0);
  535. outw(buf_size, ice->ddma_port + 4);
  536. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
  537. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
  538. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
  539. snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
  540. snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
  541. snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
  542. snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
  543. snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
  544. spin_unlock_irq(&ice->reg_lock);
  545. return 0;
  546. }
  547. static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
  548. {
  549. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  550. struct snd_pcm_runtime *runtime = substream->runtime;
  551. u32 period_size, buf_size, rate, tmp, chn;
  552. period_size = snd_pcm_lib_period_bytes(substream) - 1;
  553. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  554. tmp = 0x0064;
  555. if (snd_pcm_format_width(runtime->format) == 16)
  556. tmp &= ~0x04;
  557. if (runtime->channels == 2)
  558. tmp |= 0x08;
  559. rate = (runtime->rate * 8192) / 375;
  560. if (rate > 0x000fffff)
  561. rate = 0x000fffff;
  562. ice->playback_con_active_buf[substream->number] = 0;
  563. ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
  564. chn = substream->number * 2;
  565. spin_lock_irq(&ice->reg_lock);
  566. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
  567. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
  568. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
  569. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
  570. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
  571. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
  572. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
  573. if (runtime->channels == 2) {
  574. snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
  575. snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
  576. }
  577. spin_unlock_irq(&ice->reg_lock);
  578. return 0;
  579. }
  580. static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
  581. {
  582. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  583. struct snd_pcm_runtime *runtime = substream->runtime;
  584. u32 period_size, buf_size;
  585. u8 tmp;
  586. period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  587. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  588. tmp = 0x06;
  589. if (snd_pcm_format_width(runtime->format) == 16)
  590. tmp &= ~0x04;
  591. if (runtime->channels == 2)
  592. tmp &= ~0x02;
  593. spin_lock_irq(&ice->reg_lock);
  594. outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
  595. outw(buf_size, ICEREG(ice, CONCAP_COUNT));
  596. snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
  597. snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
  598. snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
  599. spin_unlock_irq(&ice->reg_lock);
  600. snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
  601. return 0;
  602. }
  603. static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
  604. {
  605. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  606. struct snd_pcm_runtime *runtime = substream->runtime;
  607. size_t ptr;
  608. if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
  609. return 0;
  610. ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
  611. if (ptr == runtime->buffer_size)
  612. ptr = 0;
  613. return bytes_to_frames(substream->runtime, ptr);
  614. }
  615. static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
  616. {
  617. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  618. u8 addr;
  619. size_t ptr;
  620. if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
  621. return 0;
  622. if (ice->playback_con_active_buf[substream->number])
  623. addr = ICE1712_DSC_ADDR1;
  624. else
  625. addr = ICE1712_DSC_ADDR0;
  626. ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
  627. ice->playback_con_virt_addr[substream->number];
  628. if (ptr == substream->runtime->buffer_size)
  629. ptr = 0;
  630. return bytes_to_frames(substream->runtime, ptr);
  631. }
  632. static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
  633. {
  634. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  635. size_t ptr;
  636. if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
  637. return 0;
  638. ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
  639. if (ptr == substream->runtime->buffer_size)
  640. ptr = 0;
  641. return bytes_to_frames(substream->runtime, ptr);
  642. }
  643. static struct snd_pcm_hardware snd_ice1712_playback =
  644. {
  645. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  646. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  647. SNDRV_PCM_INFO_MMAP_VALID |
  648. SNDRV_PCM_INFO_PAUSE),
  649. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  650. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  651. .rate_min = 4000,
  652. .rate_max = 48000,
  653. .channels_min = 1,
  654. .channels_max = 2,
  655. .buffer_bytes_max = (64*1024),
  656. .period_bytes_min = 64,
  657. .period_bytes_max = (64*1024),
  658. .periods_min = 1,
  659. .periods_max = 1024,
  660. .fifo_size = 0,
  661. };
  662. static struct snd_pcm_hardware snd_ice1712_playback_ds =
  663. {
  664. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  665. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  666. SNDRV_PCM_INFO_MMAP_VALID |
  667. SNDRV_PCM_INFO_PAUSE),
  668. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  669. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  670. .rate_min = 4000,
  671. .rate_max = 48000,
  672. .channels_min = 1,
  673. .channels_max = 2,
  674. .buffer_bytes_max = (128*1024),
  675. .period_bytes_min = 64,
  676. .period_bytes_max = (128*1024),
  677. .periods_min = 2,
  678. .periods_max = 2,
  679. .fifo_size = 0,
  680. };
  681. static struct snd_pcm_hardware snd_ice1712_capture =
  682. {
  683. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  684. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  685. SNDRV_PCM_INFO_MMAP_VALID),
  686. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  687. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  688. .rate_min = 4000,
  689. .rate_max = 48000,
  690. .channels_min = 1,
  691. .channels_max = 2,
  692. .buffer_bytes_max = (64*1024),
  693. .period_bytes_min = 64,
  694. .period_bytes_max = (64*1024),
  695. .periods_min = 1,
  696. .periods_max = 1024,
  697. .fifo_size = 0,
  698. };
  699. static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
  700. {
  701. struct snd_pcm_runtime *runtime = substream->runtime;
  702. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  703. ice->playback_con_substream = substream;
  704. runtime->hw = snd_ice1712_playback;
  705. return 0;
  706. }
  707. static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
  708. {
  709. struct snd_pcm_runtime *runtime = substream->runtime;
  710. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  711. u32 tmp;
  712. ice->playback_con_substream_ds[substream->number] = substream;
  713. runtime->hw = snd_ice1712_playback_ds;
  714. spin_lock_irq(&ice->reg_lock);
  715. tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
  716. outw(tmp, ICEDS(ice, INTMASK));
  717. spin_unlock_irq(&ice->reg_lock);
  718. return 0;
  719. }
  720. static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
  721. {
  722. struct snd_pcm_runtime *runtime = substream->runtime;
  723. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  724. ice->capture_con_substream = substream;
  725. runtime->hw = snd_ice1712_capture;
  726. runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
  727. if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
  728. runtime->hw.rate_min = 48000;
  729. return 0;
  730. }
  731. static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
  732. {
  733. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  734. ice->playback_con_substream = NULL;
  735. return 0;
  736. }
  737. static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
  738. {
  739. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  740. u32 tmp;
  741. spin_lock_irq(&ice->reg_lock);
  742. tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
  743. outw(tmp, ICEDS(ice, INTMASK));
  744. spin_unlock_irq(&ice->reg_lock);
  745. ice->playback_con_substream_ds[substream->number] = NULL;
  746. return 0;
  747. }
  748. static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
  749. {
  750. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  751. ice->capture_con_substream = NULL;
  752. return 0;
  753. }
  754. static struct snd_pcm_ops snd_ice1712_playback_ops = {
  755. .open = snd_ice1712_playback_open,
  756. .close = snd_ice1712_playback_close,
  757. .ioctl = snd_pcm_lib_ioctl,
  758. .hw_params = snd_ice1712_hw_params,
  759. .hw_free = snd_ice1712_hw_free,
  760. .prepare = snd_ice1712_playback_prepare,
  761. .trigger = snd_ice1712_playback_trigger,
  762. .pointer = snd_ice1712_playback_pointer,
  763. };
  764. static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
  765. .open = snd_ice1712_playback_ds_open,
  766. .close = snd_ice1712_playback_ds_close,
  767. .ioctl = snd_pcm_lib_ioctl,
  768. .hw_params = snd_ice1712_hw_params,
  769. .hw_free = snd_ice1712_hw_free,
  770. .prepare = snd_ice1712_playback_ds_prepare,
  771. .trigger = snd_ice1712_playback_ds_trigger,
  772. .pointer = snd_ice1712_playback_ds_pointer,
  773. };
  774. static struct snd_pcm_ops snd_ice1712_capture_ops = {
  775. .open = snd_ice1712_capture_open,
  776. .close = snd_ice1712_capture_close,
  777. .ioctl = snd_pcm_lib_ioctl,
  778. .hw_params = snd_ice1712_hw_params,
  779. .hw_free = snd_ice1712_hw_free,
  780. .prepare = snd_ice1712_capture_prepare,
  781. .trigger = snd_ice1712_capture_trigger,
  782. .pointer = snd_ice1712_capture_pointer,
  783. };
  784. static int __devinit snd_ice1712_pcm(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
  785. {
  786. struct snd_pcm *pcm;
  787. int err;
  788. if (rpcm)
  789. *rpcm = NULL;
  790. err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
  791. if (err < 0)
  792. return err;
  793. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
  794. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
  795. pcm->private_data = ice;
  796. pcm->info_flags = 0;
  797. strcpy(pcm->name, "ICE1712 consumer");
  798. ice->pcm = pcm;
  799. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  800. snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
  801. if (rpcm)
  802. *rpcm = pcm;
  803. printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
  804. return 0;
  805. }
  806. static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
  807. {
  808. struct snd_pcm *pcm;
  809. int err;
  810. if (rpcm)
  811. *rpcm = NULL;
  812. err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
  813. if (err < 0)
  814. return err;
  815. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
  816. pcm->private_data = ice;
  817. pcm->info_flags = 0;
  818. strcpy(pcm->name, "ICE1712 consumer (DS)");
  819. ice->pcm_ds = pcm;
  820. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  821. snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
  822. if (rpcm)
  823. *rpcm = pcm;
  824. return 0;
  825. }
  826. /*
  827. * PCM code - professional part (multitrack)
  828. */
  829. static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  830. 32000, 44100, 48000, 64000, 88200, 96000 };
  831. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  832. .count = ARRAY_SIZE(rates),
  833. .list = rates,
  834. .mask = 0,
  835. };
  836. static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
  837. int cmd)
  838. {
  839. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  840. switch (cmd) {
  841. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  842. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  843. {
  844. unsigned int what;
  845. unsigned int old;
  846. if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
  847. return -EINVAL;
  848. what = ICE1712_PLAYBACK_PAUSE;
  849. snd_pcm_trigger_done(substream, substream);
  850. spin_lock(&ice->reg_lock);
  851. old = inl(ICEMT(ice, PLAYBACK_CONTROL));
  852. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  853. old |= what;
  854. else
  855. old &= ~what;
  856. outl(old, ICEMT(ice, PLAYBACK_CONTROL));
  857. spin_unlock(&ice->reg_lock);
  858. break;
  859. }
  860. case SNDRV_PCM_TRIGGER_START:
  861. case SNDRV_PCM_TRIGGER_STOP:
  862. {
  863. unsigned int what = 0;
  864. unsigned int old;
  865. struct list_head *pos;
  866. struct snd_pcm_substream *s;
  867. snd_pcm_group_for_each(pos, substream) {
  868. s = snd_pcm_group_substream_entry(pos);
  869. if (s == ice->playback_pro_substream) {
  870. what |= ICE1712_PLAYBACK_START;
  871. snd_pcm_trigger_done(s, substream);
  872. } else if (s == ice->capture_pro_substream) {
  873. what |= ICE1712_CAPTURE_START_SHADOW;
  874. snd_pcm_trigger_done(s, substream);
  875. }
  876. }
  877. spin_lock(&ice->reg_lock);
  878. old = inl(ICEMT(ice, PLAYBACK_CONTROL));
  879. if (cmd == SNDRV_PCM_TRIGGER_START)
  880. old |= what;
  881. else
  882. old &= ~what;
  883. outl(old, ICEMT(ice, PLAYBACK_CONTROL));
  884. spin_unlock(&ice->reg_lock);
  885. break;
  886. }
  887. default:
  888. return -EINVAL;
  889. }
  890. return 0;
  891. }
  892. /*
  893. */
  894. static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
  895. {
  896. unsigned long flags;
  897. unsigned char val, old;
  898. unsigned int i;
  899. switch (rate) {
  900. case 8000: val = 6; break;
  901. case 9600: val = 3; break;
  902. case 11025: val = 10; break;
  903. case 12000: val = 2; break;
  904. case 16000: val = 5; break;
  905. case 22050: val = 9; break;
  906. case 24000: val = 1; break;
  907. case 32000: val = 4; break;
  908. case 44100: val = 8; break;
  909. case 48000: val = 0; break;
  910. case 64000: val = 15; break;
  911. case 88200: val = 11; break;
  912. case 96000: val = 7; break;
  913. default:
  914. snd_BUG();
  915. val = 0;
  916. rate = 48000;
  917. break;
  918. }
  919. spin_lock_irqsave(&ice->reg_lock, flags);
  920. if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
  921. ICE1712_PLAYBACK_PAUSE|
  922. ICE1712_PLAYBACK_START)) {
  923. __out:
  924. spin_unlock_irqrestore(&ice->reg_lock, flags);
  925. return;
  926. }
  927. if (!force && is_pro_rate_locked(ice))
  928. goto __out;
  929. old = inb(ICEMT(ice, RATE));
  930. if (!force && old == val)
  931. goto __out;
  932. outb(val, ICEMT(ice, RATE));
  933. spin_unlock_irqrestore(&ice->reg_lock, flags);
  934. if (ice->gpio.set_pro_rate)
  935. ice->gpio.set_pro_rate(ice, rate);
  936. for (i = 0; i < ice->akm_codecs; i++) {
  937. if (ice->akm[i].ops.set_rate_val)
  938. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  939. }
  940. if (ice->spdif.ops.setup_rate)
  941. ice->spdif.ops.setup_rate(ice, rate);
  942. }
  943. static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
  944. {
  945. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  946. ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
  947. spin_lock_irq(&ice->reg_lock);
  948. outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
  949. outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
  950. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
  951. spin_unlock_irq(&ice->reg_lock);
  952. return 0;
  953. }
  954. static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
  955. struct snd_pcm_hw_params *hw_params)
  956. {
  957. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  958. snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
  959. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  960. }
  961. static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
  962. {
  963. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  964. ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
  965. spin_lock_irq(&ice->reg_lock);
  966. outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
  967. outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
  968. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
  969. spin_unlock_irq(&ice->reg_lock);
  970. return 0;
  971. }
  972. static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
  973. struct snd_pcm_hw_params *hw_params)
  974. {
  975. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  976. snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
  977. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  978. }
  979. static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
  980. {
  981. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  982. size_t ptr;
  983. if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
  984. return 0;
  985. ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
  986. if (ptr == substream->runtime->buffer_size)
  987. ptr = 0;
  988. return bytes_to_frames(substream->runtime, ptr);
  989. }
  990. static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
  991. {
  992. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  993. size_t ptr;
  994. if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
  995. return 0;
  996. ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
  997. if (ptr == substream->runtime->buffer_size)
  998. ptr = 0;
  999. return bytes_to_frames(substream->runtime, ptr);
  1000. }
  1001. static struct snd_pcm_hardware snd_ice1712_playback_pro =
  1002. {
  1003. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  1004. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  1005. SNDRV_PCM_INFO_MMAP_VALID |
  1006. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  1007. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  1008. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
  1009. .rate_min = 4000,
  1010. .rate_max = 96000,
  1011. .channels_min = 10,
  1012. .channels_max = 10,
  1013. .buffer_bytes_max = (256*1024),
  1014. .period_bytes_min = 10 * 4 * 2,
  1015. .period_bytes_max = 131040,
  1016. .periods_min = 1,
  1017. .periods_max = 1024,
  1018. .fifo_size = 0,
  1019. };
  1020. static struct snd_pcm_hardware snd_ice1712_capture_pro =
  1021. {
  1022. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  1023. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  1024. SNDRV_PCM_INFO_MMAP_VALID |
  1025. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  1026. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  1027. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
  1028. .rate_min = 4000,
  1029. .rate_max = 96000,
  1030. .channels_min = 12,
  1031. .channels_max = 12,
  1032. .buffer_bytes_max = (256*1024),
  1033. .period_bytes_min = 12 * 4 * 2,
  1034. .period_bytes_max = 131040,
  1035. .periods_min = 1,
  1036. .periods_max = 1024,
  1037. .fifo_size = 0,
  1038. };
  1039. static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
  1040. {
  1041. struct snd_pcm_runtime *runtime = substream->runtime;
  1042. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1043. ice->playback_pro_substream = substream;
  1044. runtime->hw = snd_ice1712_playback_pro;
  1045. snd_pcm_set_sync(substream);
  1046. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1047. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  1048. if (ice->spdif.ops.open)
  1049. ice->spdif.ops.open(ice, substream);
  1050. return 0;
  1051. }
  1052. static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
  1053. {
  1054. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1055. struct snd_pcm_runtime *runtime = substream->runtime;
  1056. ice->capture_pro_substream = substream;
  1057. runtime->hw = snd_ice1712_capture_pro;
  1058. snd_pcm_set_sync(substream);
  1059. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1060. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  1061. return 0;
  1062. }
  1063. static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
  1064. {
  1065. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1066. if (PRO_RATE_RESET)
  1067. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1068. ice->playback_pro_substream = NULL;
  1069. if (ice->spdif.ops.close)
  1070. ice->spdif.ops.close(ice, substream);
  1071. return 0;
  1072. }
  1073. static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
  1074. {
  1075. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1076. if (PRO_RATE_RESET)
  1077. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1078. ice->capture_pro_substream = NULL;
  1079. return 0;
  1080. }
  1081. static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
  1082. .open = snd_ice1712_playback_pro_open,
  1083. .close = snd_ice1712_playback_pro_close,
  1084. .ioctl = snd_pcm_lib_ioctl,
  1085. .hw_params = snd_ice1712_playback_pro_hw_params,
  1086. .hw_free = snd_ice1712_hw_free,
  1087. .prepare = snd_ice1712_playback_pro_prepare,
  1088. .trigger = snd_ice1712_pro_trigger,
  1089. .pointer = snd_ice1712_playback_pro_pointer,
  1090. };
  1091. static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
  1092. .open = snd_ice1712_capture_pro_open,
  1093. .close = snd_ice1712_capture_pro_close,
  1094. .ioctl = snd_pcm_lib_ioctl,
  1095. .hw_params = snd_ice1712_capture_pro_hw_params,
  1096. .hw_free = snd_ice1712_hw_free,
  1097. .prepare = snd_ice1712_capture_pro_prepare,
  1098. .trigger = snd_ice1712_pro_trigger,
  1099. .pointer = snd_ice1712_capture_pro_pointer,
  1100. };
  1101. static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
  1102. {
  1103. struct snd_pcm *pcm;
  1104. int err;
  1105. if (rpcm)
  1106. *rpcm = NULL;
  1107. err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
  1108. if (err < 0)
  1109. return err;
  1110. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
  1111. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
  1112. pcm->private_data = ice;
  1113. pcm->info_flags = 0;
  1114. strcpy(pcm->name, "ICE1712 multi");
  1115. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1116. snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
  1117. ice->pcm_pro = pcm;
  1118. if (rpcm)
  1119. *rpcm = pcm;
  1120. if (ice->cs8427) {
  1121. /* assign channels to iec958 */
  1122. err = snd_cs8427_iec958_build(ice->cs8427,
  1123. pcm->streams[0].substream,
  1124. pcm->streams[1].substream);
  1125. if (err < 0)
  1126. return err;
  1127. }
  1128. if ((err = snd_ice1712_build_pro_mixer(ice)) < 0)
  1129. return err;
  1130. return 0;
  1131. }
  1132. /*
  1133. * Mixer section
  1134. */
  1135. static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
  1136. {
  1137. unsigned int vol = ice->pro_volumes[index];
  1138. unsigned short val = 0;
  1139. val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
  1140. val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
  1141. outb(index, ICEMT(ice, MONITOR_INDEX));
  1142. outw(val, ICEMT(ice, MONITOR_VOLUME));
  1143. }
  1144. static int snd_ice1712_pro_mixer_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1145. {
  1146. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1147. uinfo->count = 2;
  1148. uinfo->value.integer.min = 0;
  1149. uinfo->value.integer.max = 1;
  1150. return 0;
  1151. }
  1152. static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1153. {
  1154. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1155. int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
  1156. spin_lock_irq(&ice->reg_lock);
  1157. ucontrol->value.integer.value[0] = !((ice->pro_volumes[index] >> 15) & 1);
  1158. ucontrol->value.integer.value[1] = !((ice->pro_volumes[index] >> 31) & 1);
  1159. spin_unlock_irq(&ice->reg_lock);
  1160. return 0;
  1161. }
  1162. static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1163. {
  1164. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1165. int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
  1166. unsigned int nval, change;
  1167. nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
  1168. (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
  1169. spin_lock_irq(&ice->reg_lock);
  1170. nval |= ice->pro_volumes[index] & ~0x80008000;
  1171. change = nval != ice->pro_volumes[index];
  1172. ice->pro_volumes[index] = nval;
  1173. snd_ice1712_update_volume(ice, index);
  1174. spin_unlock_irq(&ice->reg_lock);
  1175. return change;
  1176. }
  1177. static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1178. {
  1179. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1180. uinfo->count = 2;
  1181. uinfo->value.integer.min = 0;
  1182. uinfo->value.integer.max = 96;
  1183. return 0;
  1184. }
  1185. static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1186. {
  1187. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1188. int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
  1189. spin_lock_irq(&ice->reg_lock);
  1190. ucontrol->value.integer.value[0] = (ice->pro_volumes[index] >> 0) & 127;
  1191. ucontrol->value.integer.value[1] = (ice->pro_volumes[index] >> 16) & 127;
  1192. spin_unlock_irq(&ice->reg_lock);
  1193. return 0;
  1194. }
  1195. static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1196. {
  1197. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1198. int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
  1199. unsigned int nval, change;
  1200. nval = (ucontrol->value.integer.value[0] & 127) |
  1201. ((ucontrol->value.integer.value[1] & 127) << 16);
  1202. spin_lock_irq(&ice->reg_lock);
  1203. nval |= ice->pro_volumes[index] & ~0x007f007f;
  1204. change = nval != ice->pro_volumes[index];
  1205. ice->pro_volumes[index] = nval;
  1206. snd_ice1712_update_volume(ice, index);
  1207. spin_unlock_irq(&ice->reg_lock);
  1208. return change;
  1209. }
  1210. static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = {
  1211. {
  1212. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1213. .name = "Multi Playback Switch",
  1214. .info = snd_ice1712_pro_mixer_switch_info,
  1215. .get = snd_ice1712_pro_mixer_switch_get,
  1216. .put = snd_ice1712_pro_mixer_switch_put,
  1217. .private_value = 0,
  1218. .count = 10,
  1219. },
  1220. {
  1221. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1222. .name = "Multi Playback Volume",
  1223. .info = snd_ice1712_pro_mixer_volume_info,
  1224. .get = snd_ice1712_pro_mixer_volume_get,
  1225. .put = snd_ice1712_pro_mixer_volume_put,
  1226. .private_value = 0,
  1227. .count = 10,
  1228. },
  1229. };
  1230. static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = {
  1231. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1232. .name = "H/W Multi Capture Switch",
  1233. .info = snd_ice1712_pro_mixer_switch_info,
  1234. .get = snd_ice1712_pro_mixer_switch_get,
  1235. .put = snd_ice1712_pro_mixer_switch_put,
  1236. .private_value = 10,
  1237. };
  1238. static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = {
  1239. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1240. .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,SWITCH),
  1241. .info = snd_ice1712_pro_mixer_switch_info,
  1242. .get = snd_ice1712_pro_mixer_switch_get,
  1243. .put = snd_ice1712_pro_mixer_switch_put,
  1244. .private_value = 18,
  1245. .count = 2,
  1246. };
  1247. static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = {
  1248. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1249. .name = "H/W Multi Capture Volume",
  1250. .info = snd_ice1712_pro_mixer_volume_info,
  1251. .get = snd_ice1712_pro_mixer_volume_get,
  1252. .put = snd_ice1712_pro_mixer_volume_put,
  1253. .private_value = 10,
  1254. };
  1255. static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = {
  1256. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1257. .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,VOLUME),
  1258. .info = snd_ice1712_pro_mixer_volume_info,
  1259. .get = snd_ice1712_pro_mixer_volume_get,
  1260. .put = snd_ice1712_pro_mixer_volume_put,
  1261. .private_value = 18,
  1262. .count = 2,
  1263. };
  1264. static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
  1265. {
  1266. struct snd_card *card = ice->card;
  1267. unsigned int idx;
  1268. int err;
  1269. /* multi-channel mixer */
  1270. for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
  1271. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
  1272. if (err < 0)
  1273. return err;
  1274. }
  1275. if (ice->num_total_adcs > 0) {
  1276. struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
  1277. tmp.count = ice->num_total_adcs;
  1278. err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
  1279. if (err < 0)
  1280. return err;
  1281. }
  1282. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
  1283. if (err < 0)
  1284. return err;
  1285. if (ice->num_total_adcs > 0) {
  1286. struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
  1287. tmp.count = ice->num_total_adcs;
  1288. err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
  1289. if (err < 0)
  1290. return err;
  1291. }
  1292. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
  1293. if (err < 0)
  1294. return err;
  1295. /* initialize volumes */
  1296. for (idx = 0; idx < 10; idx++) {
  1297. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1298. snd_ice1712_update_volume(ice, idx);
  1299. }
  1300. for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
  1301. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1302. snd_ice1712_update_volume(ice, idx);
  1303. }
  1304. for (idx = 18; idx < 20; idx++) {
  1305. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1306. snd_ice1712_update_volume(ice, idx);
  1307. }
  1308. return 0;
  1309. }
  1310. static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
  1311. {
  1312. struct snd_ice1712 *ice = ac97->private_data;
  1313. ice->ac97 = NULL;
  1314. }
  1315. static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 * ice)
  1316. {
  1317. int err, bus_num = 0;
  1318. struct snd_ac97_template ac97;
  1319. struct snd_ac97_bus *pbus;
  1320. static struct snd_ac97_bus_ops con_ops = {
  1321. .write = snd_ice1712_ac97_write,
  1322. .read = snd_ice1712_ac97_read,
  1323. };
  1324. static struct snd_ac97_bus_ops pro_ops = {
  1325. .write = snd_ice1712_pro_ac97_write,
  1326. .read = snd_ice1712_pro_ac97_read,
  1327. };
  1328. if (ice_has_con_ac97(ice)) {
  1329. if ((err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus)) < 0)
  1330. return err;
  1331. memset(&ac97, 0, sizeof(ac97));
  1332. ac97.private_data = ice;
  1333. ac97.private_free = snd_ice1712_mixer_free_ac97;
  1334. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1335. printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
  1336. else {
  1337. if ((err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice))) < 0)
  1338. return err;
  1339. return 0;
  1340. }
  1341. }
  1342. if (! (ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
  1343. if ((err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus)) < 0)
  1344. return err;
  1345. memset(&ac97, 0, sizeof(ac97));
  1346. ac97.private_data = ice;
  1347. ac97.private_free = snd_ice1712_mixer_free_ac97;
  1348. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1349. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1350. else
  1351. return 0;
  1352. }
  1353. /* I2S mixer only */
  1354. strcat(ice->card->mixername, "ICE1712 - multitrack");
  1355. return 0;
  1356. }
  1357. /*
  1358. *
  1359. */
  1360. static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
  1361. {
  1362. return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
  1363. }
  1364. static void snd_ice1712_proc_read(struct snd_info_entry *entry,
  1365. struct snd_info_buffer *buffer)
  1366. {
  1367. struct snd_ice1712 *ice = entry->private_data;
  1368. unsigned int idx;
  1369. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1370. snd_iprintf(buffer, "EEPROM:\n");
  1371. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1372. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1373. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1374. snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
  1375. snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
  1376. snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
  1377. snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
  1378. snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
  1379. snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
  1380. snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
  1381. snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
  1382. snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
  1383. snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
  1384. snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
  1385. for (idx = 0; idx < 4; idx++)
  1386. snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
  1387. for (idx = 0; idx < 4; idx++)
  1388. snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
  1389. for (idx = 0x1c; idx < ice->eeprom.size; idx++)
  1390. snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
  1391. snd_iprintf(buffer, "\nRegisters:\n");
  1392. snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
  1393. snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
  1394. snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
  1395. snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
  1396. snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
  1397. snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
  1398. snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
  1399. }
  1400. static void __devinit snd_ice1712_proc_init(struct snd_ice1712 * ice)
  1401. {
  1402. struct snd_info_entry *entry;
  1403. if (! snd_card_proc_new(ice->card, "ice1712", &entry))
  1404. snd_info_set_text_ops(entry, ice, 1024, snd_ice1712_proc_read);
  1405. }
  1406. /*
  1407. *
  1408. */
  1409. static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
  1410. struct snd_ctl_elem_info *uinfo)
  1411. {
  1412. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1413. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1414. return 0;
  1415. }
  1416. static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
  1417. struct snd_ctl_elem_value *ucontrol)
  1418. {
  1419. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1420. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1421. return 0;
  1422. }
  1423. static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = {
  1424. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1425. .name = "ICE1712 EEPROM",
  1426. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1427. .info = snd_ice1712_eeprom_info,
  1428. .get = snd_ice1712_eeprom_get
  1429. };
  1430. /*
  1431. */
  1432. static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
  1433. struct snd_ctl_elem_info *uinfo)
  1434. {
  1435. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1436. uinfo->count = 1;
  1437. return 0;
  1438. }
  1439. static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
  1440. struct snd_ctl_elem_value *ucontrol)
  1441. {
  1442. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1443. if (ice->spdif.ops.default_get)
  1444. ice->spdif.ops.default_get(ice, ucontrol);
  1445. return 0;
  1446. }
  1447. static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
  1448. struct snd_ctl_elem_value *ucontrol)
  1449. {
  1450. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1451. if (ice->spdif.ops.default_put)
  1452. return ice->spdif.ops.default_put(ice, ucontrol);
  1453. return 0;
  1454. }
  1455. static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata =
  1456. {
  1457. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1458. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1459. .info = snd_ice1712_spdif_info,
  1460. .get = snd_ice1712_spdif_default_get,
  1461. .put = snd_ice1712_spdif_default_put
  1462. };
  1463. static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1464. struct snd_ctl_elem_value *ucontrol)
  1465. {
  1466. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1467. if (ice->spdif.ops.default_get) {
  1468. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1469. IEC958_AES0_PROFESSIONAL |
  1470. IEC958_AES0_CON_NOT_COPYRIGHT |
  1471. IEC958_AES0_CON_EMPHASIS;
  1472. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1473. IEC958_AES1_CON_CATEGORY;
  1474. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1475. } else {
  1476. ucontrol->value.iec958.status[0] = 0xff;
  1477. ucontrol->value.iec958.status[1] = 0xff;
  1478. ucontrol->value.iec958.status[2] = 0xff;
  1479. ucontrol->value.iec958.status[3] = 0xff;
  1480. ucontrol->value.iec958.status[4] = 0xff;
  1481. }
  1482. return 0;
  1483. }
  1484. static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1485. struct snd_ctl_elem_value *ucontrol)
  1486. {
  1487. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1488. if (ice->spdif.ops.default_get) {
  1489. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1490. IEC958_AES0_PROFESSIONAL |
  1491. IEC958_AES0_PRO_FS |
  1492. IEC958_AES0_PRO_EMPHASIS;
  1493. ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
  1494. } else {
  1495. ucontrol->value.iec958.status[0] = 0xff;
  1496. ucontrol->value.iec958.status[1] = 0xff;
  1497. ucontrol->value.iec958.status[2] = 0xff;
  1498. ucontrol->value.iec958.status[3] = 0xff;
  1499. ucontrol->value.iec958.status[4] = 0xff;
  1500. }
  1501. return 0;
  1502. }
  1503. static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata =
  1504. {
  1505. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1506. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1507. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1508. .info = snd_ice1712_spdif_info,
  1509. .get = snd_ice1712_spdif_maskc_get,
  1510. };
  1511. static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata =
  1512. {
  1513. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1514. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1515. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
  1516. .info = snd_ice1712_spdif_info,
  1517. .get = snd_ice1712_spdif_maskp_get,
  1518. };
  1519. static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
  1520. struct snd_ctl_elem_value *ucontrol)
  1521. {
  1522. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1523. if (ice->spdif.ops.stream_get)
  1524. ice->spdif.ops.stream_get(ice, ucontrol);
  1525. return 0;
  1526. }
  1527. static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
  1528. struct snd_ctl_elem_value *ucontrol)
  1529. {
  1530. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1531. if (ice->spdif.ops.stream_put)
  1532. return ice->spdif.ops.stream_put(ice, ucontrol);
  1533. return 0;
  1534. }
  1535. static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata =
  1536. {
  1537. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1538. SNDRV_CTL_ELEM_ACCESS_INACTIVE),
  1539. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1540. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
  1541. .info = snd_ice1712_spdif_info,
  1542. .get = snd_ice1712_spdif_stream_get,
  1543. .put = snd_ice1712_spdif_stream_put
  1544. };
  1545. int snd_ice1712_gpio_info(struct snd_kcontrol *kcontrol,
  1546. struct snd_ctl_elem_info *uinfo)
  1547. {
  1548. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1549. uinfo->count = 1;
  1550. uinfo->value.integer.min = 0;
  1551. uinfo->value.integer.max = 1;
  1552. return 0;
  1553. }
  1554. int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
  1555. struct snd_ctl_elem_value *ucontrol)
  1556. {
  1557. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1558. unsigned char mask = kcontrol->private_value & 0xff;
  1559. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1560. snd_ice1712_save_gpio_status(ice);
  1561. ucontrol->value.integer.value[0] =
  1562. (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
  1563. snd_ice1712_restore_gpio_status(ice);
  1564. return 0;
  1565. }
  1566. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1567. struct snd_ctl_elem_value *ucontrol)
  1568. {
  1569. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1570. unsigned char mask = kcontrol->private_value & 0xff;
  1571. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1572. unsigned int val, nval;
  1573. if (kcontrol->private_value & (1 << 31))
  1574. return -EPERM;
  1575. nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
  1576. snd_ice1712_save_gpio_status(ice);
  1577. val = snd_ice1712_gpio_read(ice);
  1578. nval |= val & ~mask;
  1579. if (val != nval)
  1580. snd_ice1712_gpio_write(ice, nval);
  1581. snd_ice1712_restore_gpio_status(ice);
  1582. return val != nval;
  1583. }
  1584. /*
  1585. * rate
  1586. */
  1587. static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1588. struct snd_ctl_elem_info *uinfo)
  1589. {
  1590. static char *texts[] = {
  1591. "8000", /* 0: 6 */
  1592. "9600", /* 1: 3 */
  1593. "11025", /* 2: 10 */
  1594. "12000", /* 3: 2 */
  1595. "16000", /* 4: 5 */
  1596. "22050", /* 5: 9 */
  1597. "24000", /* 6: 1 */
  1598. "32000", /* 7: 4 */
  1599. "44100", /* 8: 8 */
  1600. "48000", /* 9: 0 */
  1601. "64000", /* 10: 15 */
  1602. "88200", /* 11: 11 */
  1603. "96000", /* 12: 7 */
  1604. "IEC958 Input", /* 13: -- */
  1605. };
  1606. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1607. uinfo->count = 1;
  1608. uinfo->value.enumerated.items = 14;
  1609. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1610. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1611. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1612. return 0;
  1613. }
  1614. static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1615. struct snd_ctl_elem_value *ucontrol)
  1616. {
  1617. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1618. static unsigned char xlate[16] = {
  1619. 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
  1620. };
  1621. unsigned char val;
  1622. spin_lock_irq(&ice->reg_lock);
  1623. if (is_spdif_master(ice)) {
  1624. ucontrol->value.enumerated.item[0] = 13;
  1625. } else {
  1626. val = xlate[inb(ICEMT(ice, RATE)) & 15];
  1627. if (val == 255) {
  1628. snd_BUG();
  1629. val = 0;
  1630. }
  1631. ucontrol->value.enumerated.item[0] = val;
  1632. }
  1633. spin_unlock_irq(&ice->reg_lock);
  1634. return 0;
  1635. }
  1636. static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1637. struct snd_ctl_elem_value *ucontrol)
  1638. {
  1639. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1640. static unsigned int xrate[13] = {
  1641. 8000, 9600, 11025, 12000, 1600, 22050, 24000,
  1642. 32000, 44100, 48000, 64000, 88200, 96000
  1643. };
  1644. unsigned char oval;
  1645. int change = 0;
  1646. spin_lock_irq(&ice->reg_lock);
  1647. oval = inb(ICEMT(ice, RATE));
  1648. if (ucontrol->value.enumerated.item[0] == 13) {
  1649. outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
  1650. } else {
  1651. PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
  1652. spin_unlock_irq(&ice->reg_lock);
  1653. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
  1654. spin_lock_irq(&ice->reg_lock);
  1655. }
  1656. change = inb(ICEMT(ice, RATE)) != oval;
  1657. spin_unlock_irq(&ice->reg_lock);
  1658. if ((oval & ICE1712_SPDIF_MASTER) !=
  1659. (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
  1660. snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
  1661. return change;
  1662. }
  1663. static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = {
  1664. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1665. .name = "Multi Track Internal Clock",
  1666. .info = snd_ice1712_pro_internal_clock_info,
  1667. .get = snd_ice1712_pro_internal_clock_get,
  1668. .put = snd_ice1712_pro_internal_clock_put
  1669. };
  1670. static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
  1671. struct snd_ctl_elem_info *uinfo)
  1672. {
  1673. static char *texts[] = {
  1674. "8000", /* 0: 6 */
  1675. "9600", /* 1: 3 */
  1676. "11025", /* 2: 10 */
  1677. "12000", /* 3: 2 */
  1678. "16000", /* 4: 5 */
  1679. "22050", /* 5: 9 */
  1680. "24000", /* 6: 1 */
  1681. "32000", /* 7: 4 */
  1682. "44100", /* 8: 8 */
  1683. "48000", /* 9: 0 */
  1684. "64000", /* 10: 15 */
  1685. "88200", /* 11: 11 */
  1686. "96000", /* 12: 7 */
  1687. // "IEC958 Input", /* 13: -- */
  1688. };
  1689. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1690. uinfo->count = 1;
  1691. uinfo->value.enumerated.items = 13;
  1692. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1693. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1694. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1695. return 0;
  1696. }
  1697. static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
  1698. struct snd_ctl_elem_value *ucontrol)
  1699. {
  1700. int val;
  1701. static unsigned int xrate[13] = {
  1702. 8000, 9600, 11025, 12000, 1600, 22050, 24000,
  1703. 32000, 44100, 48000, 64000, 88200, 96000
  1704. };
  1705. for (val = 0; val < 13; val++) {
  1706. if (xrate[val] == PRO_RATE_DEFAULT)
  1707. break;
  1708. }
  1709. ucontrol->value.enumerated.item[0] = val;
  1710. return 0;
  1711. }
  1712. static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
  1713. struct snd_ctl_elem_value *ucontrol)
  1714. {
  1715. static unsigned int xrate[13] = {
  1716. 8000, 9600, 11025, 12000, 1600, 22050, 24000,
  1717. 32000, 44100, 48000, 64000, 88200, 96000
  1718. };
  1719. unsigned char oval;
  1720. int change = 0;
  1721. oval = PRO_RATE_DEFAULT;
  1722. PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
  1723. change = PRO_RATE_DEFAULT != oval;
  1724. return change;
  1725. }
  1726. static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = {
  1727. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1728. .name = "Multi Track Internal Clock Default",
  1729. .info = snd_ice1712_pro_internal_clock_default_info,
  1730. .get = snd_ice1712_pro_internal_clock_default_get,
  1731. .put = snd_ice1712_pro_internal_clock_default_put
  1732. };
  1733. static int snd_ice1712_pro_rate_locking_info(struct snd_kcontrol *kcontrol,
  1734. struct snd_ctl_elem_info *uinfo)
  1735. {
  1736. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1737. uinfo->count = 1;
  1738. uinfo->value.integer.min = 0;
  1739. uinfo->value.integer.max = 1;
  1740. return 0;
  1741. }
  1742. static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1743. struct snd_ctl_elem_value *ucontrol)
  1744. {
  1745. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1746. return 0;
  1747. }
  1748. static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1749. struct snd_ctl_elem_value *ucontrol)
  1750. {
  1751. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1752. int change = 0, nval;
  1753. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1754. spin_lock_irq(&ice->reg_lock);
  1755. change = PRO_RATE_LOCKED != nval;
  1756. PRO_RATE_LOCKED = nval;
  1757. spin_unlock_irq(&ice->reg_lock);
  1758. return change;
  1759. }
  1760. static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = {
  1761. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1762. .name = "Multi Track Rate Locking",
  1763. .info = snd_ice1712_pro_rate_locking_info,
  1764. .get = snd_ice1712_pro_rate_locking_get,
  1765. .put = snd_ice1712_pro_rate_locking_put
  1766. };
  1767. static int snd_ice1712_pro_rate_reset_info(struct snd_kcontrol *kcontrol,
  1768. struct snd_ctl_elem_info *uinfo)
  1769. {
  1770. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1771. uinfo->count = 1;
  1772. uinfo->value.integer.min = 0;
  1773. uinfo->value.integer.max = 1;
  1774. return 0;
  1775. }
  1776. static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1777. struct snd_ctl_elem_value *ucontrol)
  1778. {
  1779. ucontrol->value.integer.value[0] = PRO_RATE_RESET;
  1780. return 0;
  1781. }
  1782. static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1783. struct snd_ctl_elem_value *ucontrol)
  1784. {
  1785. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1786. int change = 0, nval;
  1787. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1788. spin_lock_irq(&ice->reg_lock);
  1789. change = PRO_RATE_RESET != nval;
  1790. PRO_RATE_RESET = nval;
  1791. spin_unlock_irq(&ice->reg_lock);
  1792. return change;
  1793. }
  1794. static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = {
  1795. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1796. .name = "Multi Track Rate Reset",
  1797. .info = snd_ice1712_pro_rate_reset_info,
  1798. .get = snd_ice1712_pro_rate_reset_get,
  1799. .put = snd_ice1712_pro_rate_reset_put
  1800. };
  1801. /*
  1802. * routing
  1803. */
  1804. static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
  1805. struct snd_ctl_elem_info *uinfo)
  1806. {
  1807. static char *texts[] = {
  1808. "PCM Out", /* 0 */
  1809. "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
  1810. "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
  1811. "IEC958 In L", "IEC958 In R", /* 9-10 */
  1812. "Digital Mixer", /* 11 - optional */
  1813. };
  1814. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1815. uinfo->count = 1;
  1816. uinfo->value.enumerated.items =
  1817. snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
  1818. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1819. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1820. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1821. return 0;
  1822. }
  1823. static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1824. struct snd_ctl_elem_value *ucontrol)
  1825. {
  1826. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1827. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1828. unsigned int val, cval;
  1829. spin_lock_irq(&ice->reg_lock);
  1830. val = inw(ICEMT(ice, ROUTE_PSDOUT03));
  1831. cval = inl(ICEMT(ice, ROUTE_CAPTURE));
  1832. spin_unlock_irq(&ice->reg_lock);
  1833. val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
  1834. val &= 3;
  1835. cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
  1836. if (val == 1 && idx < 2)
  1837. ucontrol->value.enumerated.item[0] = 11;
  1838. else if (val == 2)
  1839. ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
  1840. else if (val == 3)
  1841. ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
  1842. else
  1843. ucontrol->value.enumerated.item[0] = 0;
  1844. return 0;
  1845. }
  1846. static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1847. struct snd_ctl_elem_value *ucontrol)
  1848. {
  1849. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1850. int change, shift;
  1851. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1852. unsigned int val, old_val, nval;
  1853. /* update PSDOUT */
  1854. if (ucontrol->value.enumerated.item[0] >= 11)
  1855. nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
  1856. else if (ucontrol->value.enumerated.item[0] >= 9)
  1857. nval = 3; /* spdif in */
  1858. else if (ucontrol->value.enumerated.item[0] >= 1)
  1859. nval = 2; /* analog in */
  1860. else
  1861. nval = 0; /* pcm */
  1862. shift = ((idx % 2) * 8) + ((idx / 2) * 2);
  1863. spin_lock_irq(&ice->reg_lock);
  1864. val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
  1865. val &= ~(0x03 << shift);
  1866. val |= nval << shift;
  1867. change = val != old_val;
  1868. if (change)
  1869. outw(val, ICEMT(ice, ROUTE_PSDOUT03));
  1870. spin_unlock_irq(&ice->reg_lock);
  1871. if (nval < 2) /* dig mixer of pcm */
  1872. return change;
  1873. /* update CAPTURE */
  1874. spin_lock_irq(&ice->reg_lock);
  1875. val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
  1876. shift = ((idx / 2) * 8) + ((idx % 2) * 4);
  1877. if (nval == 2) { /* analog in */
  1878. nval = ucontrol->value.enumerated.item[0] - 1;
  1879. val &= ~(0x07 << shift);
  1880. val |= nval << shift;
  1881. } else { /* spdif in */
  1882. nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
  1883. val &= ~(0x08 << shift);
  1884. val |= nval << shift;
  1885. }
  1886. if (val != old_val) {
  1887. change = 1;
  1888. outl(val, ICEMT(ice, ROUTE_CAPTURE));
  1889. }
  1890. spin_unlock_irq(&ice->reg_lock);
  1891. return change;
  1892. }
  1893. static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1894. struct snd_ctl_elem_value *ucontrol)
  1895. {
  1896. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1897. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1898. unsigned int val, cval;
  1899. val = inw(ICEMT(ice, ROUTE_SPDOUT));
  1900. cval = (val >> (idx * 4 + 8)) & 0x0f;
  1901. val = (val >> (idx * 2)) & 0x03;
  1902. if (val == 1)
  1903. ucontrol->value.enumerated.item[0] = 11;
  1904. else if (val == 2)
  1905. ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
  1906. else if (val == 3)
  1907. ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
  1908. else
  1909. ucontrol->value.enumerated.item[0] = 0;
  1910. return 0;
  1911. }
  1912. static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1913. struct snd_ctl_elem_value *ucontrol)
  1914. {
  1915. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1916. int change, shift;
  1917. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1918. unsigned int val, old_val, nval;
  1919. /* update SPDOUT */
  1920. spin_lock_irq(&ice->reg_lock);
  1921. val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
  1922. if (ucontrol->value.enumerated.item[0] >= 11)
  1923. nval = 1;
  1924. else if (ucontrol->value.enumerated.item[0] >= 9)
  1925. nval = 3;
  1926. else if (ucontrol->value.enumerated.item[0] >= 1)
  1927. nval = 2;
  1928. else
  1929. nval = 0;
  1930. shift = idx * 2;
  1931. val &= ~(0x03 << shift);
  1932. val |= nval << shift;
  1933. shift = idx * 4 + 8;
  1934. if (nval == 2) {
  1935. nval = ucontrol->value.enumerated.item[0] - 1;
  1936. val &= ~(0x07 << shift);
  1937. val |= nval << shift;
  1938. } else if (nval == 3) {
  1939. nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
  1940. val &= ~(0x08 << shift);
  1941. val |= nval << shift;
  1942. }
  1943. change = val != old_val;
  1944. if (change)
  1945. outw(val, ICEMT(ice, ROUTE_SPDOUT));
  1946. spin_unlock_irq(&ice->reg_lock);
  1947. return change;
  1948. }
  1949. static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = {
  1950. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1951. .name = "H/W Playback Route",
  1952. .info = snd_ice1712_pro_route_info,
  1953. .get = snd_ice1712_pro_route_analog_get,
  1954. .put = snd_ice1712_pro_route_analog_put,
  1955. };
  1956. static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = {
  1957. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1958. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
  1959. .info = snd_ice1712_pro_route_info,
  1960. .get = snd_ice1712_pro_route_spdif_get,
  1961. .put = snd_ice1712_pro_route_spdif_put,
  1962. .count = 2,
  1963. };
  1964. static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
  1965. struct snd_ctl_elem_info *uinfo)
  1966. {
  1967. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1968. uinfo->count = 1;
  1969. uinfo->value.integer.min = 0;
  1970. uinfo->value.integer.max = 255;
  1971. return 0;
  1972. }
  1973. static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
  1974. struct snd_ctl_elem_value *ucontrol)
  1975. {
  1976. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1977. ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
  1978. return 0;
  1979. }
  1980. static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
  1981. struct snd_ctl_elem_value *ucontrol)
  1982. {
  1983. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1984. int change;
  1985. spin_lock_irq(&ice->reg_lock);
  1986. change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
  1987. outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
  1988. spin_unlock_irq(&ice->reg_lock);
  1989. return change;
  1990. }
  1991. static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = {
  1992. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1993. .name = "Multi Track Volume Rate",
  1994. .info = snd_ice1712_pro_volume_rate_info,
  1995. .get = snd_ice1712_pro_volume_rate_get,
  1996. .put = snd_ice1712_pro_volume_rate_put
  1997. };
  1998. static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
  1999. struct snd_ctl_elem_info *uinfo)
  2000. {
  2001. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  2002. uinfo->count = 22;
  2003. uinfo->value.integer.min = 0;
  2004. uinfo->value.integer.max = 255;
  2005. return 0;
  2006. }
  2007. static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
  2008. struct snd_ctl_elem_value *ucontrol)
  2009. {
  2010. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  2011. int idx;
  2012. spin_lock_irq(&ice->reg_lock);
  2013. for (idx = 0; idx < 22; idx++) {
  2014. outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
  2015. ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
  2016. }
  2017. spin_unlock_irq(&ice->reg_lock);
  2018. return 0;
  2019. }
  2020. static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = {
  2021. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2022. .name = "Multi Track Peak",
  2023. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  2024. .info = snd_ice1712_pro_peak_info,
  2025. .get = snd_ice1712_pro_peak_get
  2026. };
  2027. /*
  2028. *
  2029. */
  2030. /*
  2031. * list of available boards
  2032. */
  2033. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  2034. snd_ice1712_hoontech_cards,
  2035. snd_ice1712_delta_cards,
  2036. snd_ice1712_ews_cards,
  2037. NULL,
  2038. };
  2039. static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice,
  2040. unsigned char dev,
  2041. unsigned char addr)
  2042. {
  2043. long t = 0x10000;
  2044. outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
  2045. outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
  2046. while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
  2047. return inb(ICEREG(ice, I2C_DATA));
  2048. }
  2049. static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
  2050. const char *modelname)
  2051. {
  2052. int dev = 0xa0; /* EEPROM device address */
  2053. unsigned int i, size;
  2054. struct snd_ice1712_card_info **tbl, *c;
  2055. if (! modelname || ! *modelname) {
  2056. ice->eeprom.subvendor = 0;
  2057. if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
  2058. ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
  2059. (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
  2060. (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
  2061. (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
  2062. if (ice->eeprom.subvendor == 0 ||
  2063. ice->eeprom.subvendor == (unsigned int)-1) {
  2064. /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
  2065. u16 vendor, device;
  2066. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
  2067. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  2068. ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
  2069. if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
  2070. printk(KERN_ERR "ice1712: No valid ID is found\n");
  2071. return -ENXIO;
  2072. }
  2073. }
  2074. }
  2075. for (tbl = card_tables; *tbl; tbl++) {
  2076. for (c = *tbl; c->subvendor; c++) {
  2077. if (modelname && c->model && ! strcmp(modelname, c->model)) {
  2078. printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
  2079. ice->eeprom.subvendor = c->subvendor;
  2080. } else if (c->subvendor != ice->eeprom.subvendor)
  2081. continue;
  2082. if (! c->eeprom_size || ! c->eeprom_data)
  2083. goto found;
  2084. /* if the EEPROM is given by the driver, use it */
  2085. snd_printdd("using the defined eeprom..\n");
  2086. ice->eeprom.version = 1;
  2087. ice->eeprom.size = c->eeprom_size + 6;
  2088. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  2089. goto read_skipped;
  2090. }
  2091. }
  2092. printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
  2093. ice->eeprom.subvendor);
  2094. found:
  2095. ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
  2096. if (ice->eeprom.size < 6)
  2097. ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
  2098. else if (ice->eeprom.size > 32) {
  2099. snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
  2100. return -EIO;
  2101. }
  2102. ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
  2103. if (ice->eeprom.version != 1) {
  2104. snd_printk(KERN_ERR "invalid EEPROM version %i\n",
  2105. ice->eeprom.version);
  2106. /* return -EIO; */
  2107. }
  2108. size = ice->eeprom.size - 6;
  2109. for (i = 0; i < size; i++)
  2110. ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
  2111. read_skipped:
  2112. ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
  2113. ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
  2114. ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
  2115. return 0;
  2116. }
  2117. static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice)
  2118. {
  2119. outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
  2120. udelay(200);
  2121. outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
  2122. udelay(200);
  2123. if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE && !ice->dxr_enable) {
  2124. /* Limit active ADCs and DACs to 6; */
  2125. /* Note: DXR extension not supported */
  2126. pci_write_config_byte(ice->pci, 0x60, 0x0a);
  2127. } else {
  2128. pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
  2129. }
  2130. pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
  2131. pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
  2132. pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
  2133. if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
  2134. ice->gpio.write_mask = ice->eeprom.gpiomask;
  2135. ice->gpio.direction = ice->eeprom.gpiodir;
  2136. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
  2137. ice->eeprom.gpiomask);
  2138. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
  2139. ice->eeprom.gpiodir);
  2140. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
  2141. ice->eeprom.gpiostate);
  2142. } else {
  2143. ice->gpio.write_mask = 0xc0;
  2144. ice->gpio.direction = 0xff;
  2145. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
  2146. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
  2147. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
  2148. ICE1712_STDSP24_CLOCK_BIT);
  2149. }
  2150. snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
  2151. if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
  2152. outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
  2153. udelay(100);
  2154. outb(0, ICEREG(ice, AC97_CMD));
  2155. udelay(200);
  2156. snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
  2157. }
  2158. snd_ice1712_set_pro_rate(ice, 48000, 1);
  2159. return 0;
  2160. }
  2161. int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
  2162. {
  2163. int err;
  2164. struct snd_kcontrol *kctl;
  2165. snd_assert(ice->pcm_pro != NULL, return -EIO);
  2166. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
  2167. if (err < 0)
  2168. return err;
  2169. kctl->id.device = ice->pcm_pro->device;
  2170. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
  2171. if (err < 0)
  2172. return err;
  2173. kctl->id.device = ice->pcm_pro->device;
  2174. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
  2175. if (err < 0)
  2176. return err;
  2177. kctl->id.device = ice->pcm_pro->device;
  2178. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
  2179. if (err < 0)
  2180. return err;
  2181. kctl->id.device = ice->pcm_pro->device;
  2182. ice->spdif.stream_ctl = kctl;
  2183. return 0;
  2184. }
  2185. static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice)
  2186. {
  2187. int err;
  2188. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
  2189. if (err < 0)
  2190. return err;
  2191. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
  2192. if (err < 0)
  2193. return err;
  2194. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
  2195. if (err < 0)
  2196. return err;
  2197. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
  2198. if (err < 0)
  2199. return err;
  2200. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
  2201. if (err < 0)
  2202. return err;
  2203. if (ice->num_total_dacs > 0) {
  2204. struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
  2205. tmp.count = ice->num_total_dacs;
  2206. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  2207. if (err < 0)
  2208. return err;
  2209. }
  2210. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
  2211. if (err < 0)
  2212. return err;
  2213. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
  2214. if (err < 0)
  2215. return err;
  2216. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
  2217. if (err < 0)
  2218. return err;
  2219. return 0;
  2220. }
  2221. static int snd_ice1712_free(struct snd_ice1712 *ice)
  2222. {
  2223. if (! ice->port)
  2224. goto __hw_end;
  2225. /* mask all interrupts */
  2226. outb(0xc0, ICEMT(ice, IRQ));
  2227. outb(0xff, ICEREG(ice, IRQMASK));
  2228. /* --- */
  2229. __hw_end:
  2230. if (ice->irq >= 0) {
  2231. synchronize_irq(ice->irq);
  2232. free_irq(ice->irq, ice);
  2233. }
  2234. if (ice->port)
  2235. pci_release_regions(ice->pci);
  2236. snd_ice1712_akm4xxx_free(ice);
  2237. pci_disable_device(ice->pci);
  2238. kfree(ice);
  2239. return 0;
  2240. }
  2241. static int snd_ice1712_dev_free(struct snd_device *device)
  2242. {
  2243. struct snd_ice1712 *ice = device->device_data;
  2244. return snd_ice1712_free(ice);
  2245. }
  2246. static int __devinit snd_ice1712_create(struct snd_card *card,
  2247. struct pci_dev *pci,
  2248. const char *modelname,
  2249. int omni,
  2250. int cs8427_timeout,
  2251. int dxr_enable,
  2252. struct snd_ice1712 ** r_ice1712)
  2253. {
  2254. struct snd_ice1712 *ice;
  2255. int err;
  2256. static struct snd_device_ops ops = {
  2257. .dev_free = snd_ice1712_dev_free,
  2258. };
  2259. *r_ice1712 = NULL;
  2260. /* enable PCI device */
  2261. if ((err = pci_enable_device(pci)) < 0)
  2262. return err;
  2263. /* check, if we can restrict PCI DMA transfers to 28 bits */
  2264. if (pci_set_dma_mask(pci, 0x0fffffff) < 0 ||
  2265. pci_set_consistent_dma_mask(pci, 0x0fffffff) < 0) {
  2266. snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
  2267. pci_disable_device(pci);
  2268. return -ENXIO;
  2269. }
  2270. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  2271. if (ice == NULL) {
  2272. pci_disable_device(pci);
  2273. return -ENOMEM;
  2274. }
  2275. ice->omni = omni ? 1 : 0;
  2276. if (cs8427_timeout < 1)
  2277. cs8427_timeout = 1;
  2278. else if (cs8427_timeout > 1000)
  2279. cs8427_timeout = 1000;
  2280. ice->cs8427_timeout = cs8427_timeout;
  2281. ice->dxr_enable = dxr_enable;
  2282. spin_lock_init(&ice->reg_lock);
  2283. mutex_init(&ice->gpio_mutex);
  2284. mutex_init(&ice->i2c_mutex);
  2285. mutex_init(&ice->open_mutex);
  2286. ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
  2287. ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
  2288. ice->gpio.set_data = snd_ice1712_set_gpio_data;
  2289. ice->gpio.get_data = snd_ice1712_get_gpio_data;
  2290. ice->spdif.cs8403_bits =
  2291. ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
  2292. 0x10 | /* no emphasis */
  2293. 0x20); /* PCM encoder/decoder */
  2294. ice->card = card;
  2295. ice->pci = pci;
  2296. ice->irq = -1;
  2297. pci_set_master(pci);
  2298. pci_write_config_word(ice->pci, 0x40, 0x807f);
  2299. pci_write_config_word(ice->pci, 0x42, 0x0006);
  2300. snd_ice1712_proc_init(ice);
  2301. synchronize_irq(pci->irq);
  2302. if ((err = pci_request_regions(pci, "ICE1712")) < 0) {
  2303. kfree(ice);
  2304. pci_disable_device(pci);
  2305. return err;
  2306. }
  2307. ice->port = pci_resource_start(pci, 0);
  2308. ice->ddma_port = pci_resource_start(pci, 1);
  2309. ice->dmapath_port = pci_resource_start(pci, 2);
  2310. ice->profi_port = pci_resource_start(pci, 3);
  2311. if (request_irq(pci->irq, snd_ice1712_interrupt, SA_INTERRUPT|SA_SHIRQ,
  2312. "ICE1712", ice)) {
  2313. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2314. snd_ice1712_free(ice);
  2315. return -EIO;
  2316. }
  2317. ice->irq = pci->irq;
  2318. if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
  2319. snd_ice1712_free(ice);
  2320. return -EIO;
  2321. }
  2322. if (snd_ice1712_chip_init(ice) < 0) {
  2323. snd_ice1712_free(ice);
  2324. return -EIO;
  2325. }
  2326. /* unmask used interrupts */
  2327. outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
  2328. ICE1712_IRQ_MPU2 : 0) |
  2329. ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
  2330. ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
  2331. ICEREG(ice, IRQMASK));
  2332. outb(0x00, ICEMT(ice, IRQ));
  2333. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
  2334. snd_ice1712_free(ice);
  2335. return err;
  2336. }
  2337. snd_card_set_dev(card, &pci->dev);
  2338. *r_ice1712 = ice;
  2339. return 0;
  2340. }
  2341. /*
  2342. *
  2343. * Registration
  2344. *
  2345. */
  2346. static struct snd_ice1712_card_info no_matched __devinitdata;
  2347. static int __devinit snd_ice1712_probe(struct pci_dev *pci,
  2348. const struct pci_device_id *pci_id)
  2349. {
  2350. static int dev;
  2351. struct snd_card *card;
  2352. struct snd_ice1712 *ice;
  2353. int pcm_dev = 0, err;
  2354. struct snd_ice1712_card_info **tbl, *c;
  2355. if (dev >= SNDRV_CARDS)
  2356. return -ENODEV;
  2357. if (!enable[dev]) {
  2358. dev++;
  2359. return -ENOENT;
  2360. }
  2361. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  2362. if (card == NULL)
  2363. return -ENOMEM;
  2364. strcpy(card->driver, "ICE1712");
  2365. strcpy(card->shortname, "ICEnsemble ICE1712");
  2366. if ((err = snd_ice1712_create(card, pci, model[dev], omni[dev],
  2367. cs8427_timeout[dev], dxr_enable[dev],
  2368. &ice)) < 0) {
  2369. snd_card_free(card);
  2370. return err;
  2371. }
  2372. for (tbl = card_tables; *tbl; tbl++) {
  2373. for (c = *tbl; c->subvendor; c++) {
  2374. if (c->subvendor == ice->eeprom.subvendor) {
  2375. strcpy(card->shortname, c->name);
  2376. if (c->driver) /* specific driver? */
  2377. strcpy(card->driver, c->driver);
  2378. if (c->chip_init) {
  2379. if ((err = c->chip_init(ice)) < 0) {
  2380. snd_card_free(card);
  2381. return err;
  2382. }
  2383. }
  2384. goto __found;
  2385. }
  2386. }
  2387. }
  2388. c = &no_matched;
  2389. __found:
  2390. if ((err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL)) < 0) {
  2391. snd_card_free(card);
  2392. return err;
  2393. }
  2394. if (ice_has_con_ac97(ice))
  2395. if ((err = snd_ice1712_pcm(ice, pcm_dev++, NULL)) < 0) {
  2396. snd_card_free(card);
  2397. return err;
  2398. }
  2399. if ((err = snd_ice1712_ac97_mixer(ice)) < 0) {
  2400. snd_card_free(card);
  2401. return err;
  2402. }
  2403. if ((err = snd_ice1712_build_controls(ice)) < 0) {
  2404. snd_card_free(card);
  2405. return err;
  2406. }
  2407. if (c->build_controls) {
  2408. if ((err = c->build_controls(ice)) < 0) {
  2409. snd_card_free(card);
  2410. return err;
  2411. }
  2412. }
  2413. if (ice_has_con_ac97(ice))
  2414. if ((err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL)) < 0) {
  2415. snd_card_free(card);
  2416. return err;
  2417. }
  2418. if (! c->no_mpu401) {
  2419. if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
  2420. ICEREG(ice, MPU1_CTRL), 1,
  2421. ice->irq, 0,
  2422. &ice->rmidi[0])) < 0) {
  2423. snd_card_free(card);
  2424. return err;
  2425. }
  2426. if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401)
  2427. if ((err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
  2428. ICEREG(ice, MPU2_CTRL), 1,
  2429. ice->irq, 0,
  2430. &ice->rmidi[1])) < 0) {
  2431. snd_card_free(card);
  2432. return err;
  2433. }
  2434. }
  2435. snd_ice1712_set_input_clock_source(ice, 0);
  2436. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2437. card->shortname, ice->port, ice->irq);
  2438. if ((err = snd_card_register(card)) < 0) {
  2439. snd_card_free(card);
  2440. return err;
  2441. }
  2442. pci_set_drvdata(pci, card);
  2443. dev++;
  2444. return 0;
  2445. }
  2446. static void __devexit snd_ice1712_remove(struct pci_dev *pci)
  2447. {
  2448. snd_card_free(pci_get_drvdata(pci));
  2449. pci_set_drvdata(pci, NULL);
  2450. }
  2451. static struct pci_driver driver = {
  2452. .name = "ICE1712",
  2453. .id_table = snd_ice1712_ids,
  2454. .probe = snd_ice1712_probe,
  2455. .remove = __devexit_p(snd_ice1712_remove),
  2456. };
  2457. static int __init alsa_card_ice1712_init(void)
  2458. {
  2459. return pci_register_driver(&driver);
  2460. }
  2461. static void __exit alsa_card_ice1712_exit(void)
  2462. {
  2463. pci_unregister_driver(&driver);
  2464. }
  2465. module_init(alsa_card_ice1712_init)
  2466. module_exit(alsa_card_ice1712_exit)