cm_bf561.c 11 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf533/boards/cm_bf561.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
  5. *
  6. * Created: 2006
  7. * Description: Board description file
  8. *
  9. * Modified:
  10. * Copyright 2004-2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #include <linux/device.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/mtd/mtd.h>
  32. #include <linux/mtd/partitions.h>
  33. #include <linux/spi/spi.h>
  34. #include <linux/spi/flash.h>
  35. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  36. #include <linux/usb/isp1362.h>
  37. #endif
  38. #include <linux/ata_platform.h>
  39. #include <linux/irq.h>
  40. #include <asm/dma.h>
  41. #include <asm/bfin5xx_spi.h>
  42. #include <asm/portmux.h>
  43. #include <asm/dpmc.h>
  44. /*
  45. * Name the Board for the /proc/cpuinfo
  46. */
  47. const char bfin_board_name[] = "Bluetechnix CM BF561";
  48. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  49. /* all SPI peripherals info goes here */
  50. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  51. static struct mtd_partition bfin_spi_flash_partitions[] = {
  52. {
  53. .name = "bootloader(spi)",
  54. .size = 0x00020000,
  55. .offset = 0,
  56. .mask_flags = MTD_CAP_ROM
  57. }, {
  58. .name = "linux kernel(spi)",
  59. .size = 0xe0000,
  60. .offset = 0x20000
  61. }, {
  62. .name = "file system(spi)",
  63. .size = 0x700000,
  64. .offset = 0x00100000,
  65. }
  66. };
  67. static struct flash_platform_data bfin_spi_flash_data = {
  68. .name = "m25p80",
  69. .parts = bfin_spi_flash_partitions,
  70. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  71. .type = "m25p64",
  72. };
  73. /* SPI flash chip (m25p64) */
  74. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  75. .enable_dma = 0, /* use dma transfer with this chip*/
  76. .bits_per_word = 8,
  77. };
  78. #endif
  79. #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  80. /* SPI ADC chip */
  81. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  82. .enable_dma = 1, /* use dma transfer with this chip*/
  83. .bits_per_word = 16,
  84. };
  85. #endif
  86. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  87. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  88. .enable_dma = 0,
  89. .bits_per_word = 16,
  90. };
  91. #endif
  92. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  93. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  94. .enable_dma = 0,
  95. .bits_per_word = 8,
  96. };
  97. #endif
  98. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  99. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  100. {
  101. /* the modalias must be the same as spi device driver name */
  102. .modalias = "m25p80", /* Name of spi_driver for this device */
  103. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  104. .bus_num = 0, /* Framework bus number */
  105. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  106. .platform_data = &bfin_spi_flash_data,
  107. .controller_data = &spi_flash_chip_info,
  108. .mode = SPI_MODE_3,
  109. },
  110. #endif
  111. #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  112. {
  113. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  114. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  115. .bus_num = 0, /* Framework bus number */
  116. .chip_select = 1, /* Framework chip select. */
  117. .platform_data = NULL, /* No spi_driver specific config */
  118. .controller_data = &spi_adc_chip_info,
  119. },
  120. #endif
  121. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  122. {
  123. .modalias = "ad1836-spi",
  124. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  125. .bus_num = 0,
  126. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  127. .controller_data = &ad1836_spi_chip_info,
  128. },
  129. #endif
  130. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  131. {
  132. .modalias = "mmc_spi",
  133. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  134. .bus_num = 0,
  135. .chip_select = 5,
  136. .controller_data = &mmc_spi_chip_info,
  137. .mode = SPI_MODE_3,
  138. },
  139. #endif
  140. };
  141. /* SPI (0) */
  142. static struct resource bfin_spi0_resource[] = {
  143. [0] = {
  144. .start = SPI0_REGBASE,
  145. .end = SPI0_REGBASE + 0xFF,
  146. .flags = IORESOURCE_MEM,
  147. },
  148. [1] = {
  149. .start = CH_SPI,
  150. .end = CH_SPI,
  151. .flags = IORESOURCE_DMA,
  152. },
  153. [2] = {
  154. .start = IRQ_SPI,
  155. .end = IRQ_SPI,
  156. .flags = IORESOURCE_IRQ,
  157. },
  158. };
  159. /* SPI controller data */
  160. static struct bfin5xx_spi_master bfin_spi0_info = {
  161. .num_chipselect = 8,
  162. .enable_dma = 1, /* master has the ability to do dma transfer */
  163. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  164. };
  165. static struct platform_device bfin_spi0_device = {
  166. .name = "bfin-spi",
  167. .id = 0, /* Bus number */
  168. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  169. .resource = bfin_spi0_resource,
  170. .dev = {
  171. .platform_data = &bfin_spi0_info, /* Passed to driver */
  172. },
  173. };
  174. #endif /* spi master and devices */
  175. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  176. static struct platform_device hitachi_fb_device = {
  177. .name = "hitachi-tx09",
  178. };
  179. #endif
  180. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  181. #include <linux/smc91x.h>
  182. static struct smc91x_platdata smc91x_info = {
  183. .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT,
  184. .leda = RPC_LED_100_10,
  185. .ledb = RPC_LED_TX_RX,
  186. };
  187. static struct resource smc91x_resources[] = {
  188. {
  189. .name = "smc91x-regs",
  190. .start = 0x28000300,
  191. .end = 0x28000300 + 16,
  192. .flags = IORESOURCE_MEM,
  193. }, {
  194. .start = IRQ_PF0,
  195. .end = IRQ_PF0,
  196. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  197. },
  198. };
  199. static struct platform_device smc91x_device = {
  200. .name = "smc91x",
  201. .id = 0,
  202. .num_resources = ARRAY_SIZE(smc91x_resources),
  203. .resource = smc91x_resources,
  204. .dev = {
  205. .platform_data = &smc91x_info,
  206. },
  207. };
  208. #endif
  209. static struct resource bfin_gpios_resources = {
  210. .start = 0,
  211. .end = MAX_BLACKFIN_GPIOS - 1,
  212. .flags = IORESOURCE_IRQ,
  213. };
  214. static struct platform_device bfin_gpios_device = {
  215. .name = "simple-gpio",
  216. .id = -1,
  217. .num_resources = 1,
  218. .resource = &bfin_gpios_resources,
  219. };
  220. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  221. static struct resource isp1362_hcd_resources[] = {
  222. {
  223. .start = 0x24008000,
  224. .end = 0x24008000,
  225. .flags = IORESOURCE_MEM,
  226. }, {
  227. .start = 0x24008004,
  228. .end = 0x24008004,
  229. .flags = IORESOURCE_MEM,
  230. }, {
  231. .start = IRQ_PF47,
  232. .end = IRQ_PF47,
  233. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  234. },
  235. };
  236. static struct isp1362_platform_data isp1362_priv = {
  237. .sel15Kres = 1,
  238. .clknotstop = 0,
  239. .oc_enable = 0,
  240. .int_act_high = 0,
  241. .int_edge_triggered = 0,
  242. .remote_wakeup_connected = 0,
  243. .no_power_switching = 1,
  244. .power_switching_mode = 0,
  245. };
  246. static struct platform_device isp1362_hcd_device = {
  247. .name = "isp1362-hcd",
  248. .id = 0,
  249. .dev = {
  250. .platform_data = &isp1362_priv,
  251. },
  252. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  253. .resource = isp1362_hcd_resources,
  254. };
  255. #endif
  256. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  257. static struct resource bfin_uart_resources[] = {
  258. {
  259. .start = 0xFFC00400,
  260. .end = 0xFFC004FF,
  261. .flags = IORESOURCE_MEM,
  262. },
  263. };
  264. static struct platform_device bfin_uart_device = {
  265. .name = "bfin-uart",
  266. .id = 1,
  267. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  268. .resource = bfin_uart_resources,
  269. };
  270. #endif
  271. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  272. #ifdef CONFIG_BFIN_SIR0
  273. static struct resource bfin_sir0_resources[] = {
  274. {
  275. .start = 0xFFC00400,
  276. .end = 0xFFC004FF,
  277. .flags = IORESOURCE_MEM,
  278. },
  279. {
  280. .start = IRQ_UART0_RX,
  281. .end = IRQ_UART0_RX+1,
  282. .flags = IORESOURCE_IRQ,
  283. },
  284. {
  285. .start = CH_UART0_RX,
  286. .end = CH_UART0_RX+1,
  287. .flags = IORESOURCE_DMA,
  288. },
  289. };
  290. static struct platform_device bfin_sir0_device = {
  291. .name = "bfin_sir",
  292. .id = 0,
  293. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  294. .resource = bfin_sir0_resources,
  295. };
  296. #endif
  297. #endif
  298. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  299. #define PATA_INT IRQ_PF46
  300. static struct pata_platform_info bfin_pata_platform_data = {
  301. .ioport_shift = 2,
  302. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  303. };
  304. static struct resource bfin_pata_resources[] = {
  305. {
  306. .start = 0x2400C000,
  307. .end = 0x2400C001F,
  308. .flags = IORESOURCE_MEM,
  309. },
  310. {
  311. .start = 0x2400D018,
  312. .end = 0x2400D01B,
  313. .flags = IORESOURCE_MEM,
  314. },
  315. {
  316. .start = PATA_INT,
  317. .end = PATA_INT,
  318. .flags = IORESOURCE_IRQ,
  319. },
  320. };
  321. static struct platform_device bfin_pata_device = {
  322. .name = "pata_platform",
  323. .id = -1,
  324. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  325. .resource = bfin_pata_resources,
  326. .dev = {
  327. .platform_data = &bfin_pata_platform_data,
  328. }
  329. };
  330. #endif
  331. static const unsigned int cclk_vlev_datasheet[] =
  332. {
  333. VRPAIR(VLEV_085, 250000000),
  334. VRPAIR(VLEV_090, 300000000),
  335. VRPAIR(VLEV_095, 313000000),
  336. VRPAIR(VLEV_100, 350000000),
  337. VRPAIR(VLEV_105, 400000000),
  338. VRPAIR(VLEV_110, 444000000),
  339. VRPAIR(VLEV_115, 450000000),
  340. VRPAIR(VLEV_120, 475000000),
  341. VRPAIR(VLEV_125, 500000000),
  342. VRPAIR(VLEV_130, 600000000),
  343. };
  344. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  345. .tuple_tab = cclk_vlev_datasheet,
  346. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  347. .vr_settling_time = 25 /* us */,
  348. };
  349. static struct platform_device bfin_dpmc = {
  350. .name = "bfin dpmc",
  351. .dev = {
  352. .platform_data = &bfin_dmpc_vreg_data,
  353. },
  354. };
  355. static struct platform_device *cm_bf561_devices[] __initdata = {
  356. &bfin_dpmc,
  357. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  358. &hitachi_fb_device,
  359. #endif
  360. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  361. &bfin_uart_device,
  362. #endif
  363. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  364. #ifdef CONFIG_BFIN_SIR0
  365. &bfin_sir0_device,
  366. #endif
  367. #endif
  368. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  369. &isp1362_hcd_device,
  370. #endif
  371. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  372. &smc91x_device,
  373. #endif
  374. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  375. &bfin_spi0_device,
  376. #endif
  377. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  378. &bfin_pata_device,
  379. #endif
  380. &bfin_gpios_device,
  381. };
  382. static int __init cm_bf561_init(void)
  383. {
  384. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  385. platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
  386. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  387. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  388. #endif
  389. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  390. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  391. #endif
  392. return 0;
  393. }
  394. arch_initcall(cm_bf561_init);