x86.c 56 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * derived from drivers/kvm/kvm_main.c
  5. *
  6. * Copyright (C) 2006 Qumranet, Inc.
  7. *
  8. * Authors:
  9. * Avi Kivity <avi@qumranet.com>
  10. * Yaniv Kamay <yaniv@qumranet.com>
  11. *
  12. * This work is licensed under the terms of the GNU GPL, version 2. See
  13. * the COPYING file in the top-level directory.
  14. *
  15. */
  16. #include "kvm.h"
  17. #include "x86.h"
  18. #include "x86_emulate.h"
  19. #include "segment_descriptor.h"
  20. #include "irq.h"
  21. #include <linux/kvm.h>
  22. #include <linux/fs.h>
  23. #include <linux/vmalloc.h>
  24. #include <linux/module.h>
  25. #include <asm/uaccess.h>
  26. #include <asm/msr.h>
  27. #define MAX_IO_MSRS 256
  28. #define CR0_RESERVED_BITS \
  29. (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  30. | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  31. | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  32. #define CR4_RESERVED_BITS \
  33. (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  34. | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
  35. | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
  36. | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  37. #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  38. #define EFER_RESERVED_BITS 0xfffffffffffff2fe
  39. #define STAT_OFFSET(x) offsetof(struct kvm_vcpu, stat.x)
  40. struct kvm_x86_ops *kvm_x86_ops;
  41. struct kvm_stats_debugfs_item debugfs_entries[] = {
  42. { "pf_fixed", STAT_OFFSET(pf_fixed) },
  43. { "pf_guest", STAT_OFFSET(pf_guest) },
  44. { "tlb_flush", STAT_OFFSET(tlb_flush) },
  45. { "invlpg", STAT_OFFSET(invlpg) },
  46. { "exits", STAT_OFFSET(exits) },
  47. { "io_exits", STAT_OFFSET(io_exits) },
  48. { "mmio_exits", STAT_OFFSET(mmio_exits) },
  49. { "signal_exits", STAT_OFFSET(signal_exits) },
  50. { "irq_window", STAT_OFFSET(irq_window_exits) },
  51. { "halt_exits", STAT_OFFSET(halt_exits) },
  52. { "halt_wakeup", STAT_OFFSET(halt_wakeup) },
  53. { "request_irq", STAT_OFFSET(request_irq_exits) },
  54. { "irq_exits", STAT_OFFSET(irq_exits) },
  55. { "light_exits", STAT_OFFSET(light_exits) },
  56. { "efer_reload", STAT_OFFSET(efer_reload) },
  57. { NULL }
  58. };
  59. unsigned long segment_base(u16 selector)
  60. {
  61. struct descriptor_table gdt;
  62. struct segment_descriptor *d;
  63. unsigned long table_base;
  64. unsigned long v;
  65. if (selector == 0)
  66. return 0;
  67. asm("sgdt %0" : "=m"(gdt));
  68. table_base = gdt.base;
  69. if (selector & 4) { /* from ldt */
  70. u16 ldt_selector;
  71. asm("sldt %0" : "=g"(ldt_selector));
  72. table_base = segment_base(ldt_selector);
  73. }
  74. d = (struct segment_descriptor *)(table_base + (selector & ~7));
  75. v = d->base_low | ((unsigned long)d->base_mid << 16) |
  76. ((unsigned long)d->base_high << 24);
  77. #ifdef CONFIG_X86_64
  78. if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
  79. v |= ((unsigned long) \
  80. ((struct segment_descriptor_64 *)d)->base_higher) << 32;
  81. #endif
  82. return v;
  83. }
  84. EXPORT_SYMBOL_GPL(segment_base);
  85. u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
  86. {
  87. if (irqchip_in_kernel(vcpu->kvm))
  88. return vcpu->apic_base;
  89. else
  90. return vcpu->apic_base;
  91. }
  92. EXPORT_SYMBOL_GPL(kvm_get_apic_base);
  93. void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
  94. {
  95. /* TODO: reserve bits check */
  96. if (irqchip_in_kernel(vcpu->kvm))
  97. kvm_lapic_set_base(vcpu, data);
  98. else
  99. vcpu->apic_base = data;
  100. }
  101. EXPORT_SYMBOL_GPL(kvm_set_apic_base);
  102. static void inject_gp(struct kvm_vcpu *vcpu)
  103. {
  104. kvm_x86_ops->inject_gp(vcpu, 0);
  105. }
  106. /*
  107. * Load the pae pdptrs. Return true is they are all valid.
  108. */
  109. int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
  110. {
  111. gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
  112. unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
  113. int i;
  114. int ret;
  115. u64 pdpte[ARRAY_SIZE(vcpu->pdptrs)];
  116. mutex_lock(&vcpu->kvm->lock);
  117. ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
  118. offset * sizeof(u64), sizeof(pdpte));
  119. if (ret < 0) {
  120. ret = 0;
  121. goto out;
  122. }
  123. for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
  124. if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
  125. ret = 0;
  126. goto out;
  127. }
  128. }
  129. ret = 1;
  130. memcpy(vcpu->pdptrs, pdpte, sizeof(vcpu->pdptrs));
  131. out:
  132. mutex_unlock(&vcpu->kvm->lock);
  133. return ret;
  134. }
  135. void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
  136. {
  137. if (cr0 & CR0_RESERVED_BITS) {
  138. printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
  139. cr0, vcpu->cr0);
  140. inject_gp(vcpu);
  141. return;
  142. }
  143. if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
  144. printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
  145. inject_gp(vcpu);
  146. return;
  147. }
  148. if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
  149. printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
  150. "and a clear PE flag\n");
  151. inject_gp(vcpu);
  152. return;
  153. }
  154. if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
  155. #ifdef CONFIG_X86_64
  156. if ((vcpu->shadow_efer & EFER_LME)) {
  157. int cs_db, cs_l;
  158. if (!is_pae(vcpu)) {
  159. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  160. "in long mode while PAE is disabled\n");
  161. inject_gp(vcpu);
  162. return;
  163. }
  164. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  165. if (cs_l) {
  166. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  167. "in long mode while CS.L == 1\n");
  168. inject_gp(vcpu);
  169. return;
  170. }
  171. } else
  172. #endif
  173. if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->cr3)) {
  174. printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
  175. "reserved bits\n");
  176. inject_gp(vcpu);
  177. return;
  178. }
  179. }
  180. kvm_x86_ops->set_cr0(vcpu, cr0);
  181. vcpu->cr0 = cr0;
  182. mutex_lock(&vcpu->kvm->lock);
  183. kvm_mmu_reset_context(vcpu);
  184. mutex_unlock(&vcpu->kvm->lock);
  185. return;
  186. }
  187. EXPORT_SYMBOL_GPL(set_cr0);
  188. void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
  189. {
  190. set_cr0(vcpu, (vcpu->cr0 & ~0x0ful) | (msw & 0x0f));
  191. }
  192. EXPORT_SYMBOL_GPL(lmsw);
  193. void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
  194. {
  195. if (cr4 & CR4_RESERVED_BITS) {
  196. printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
  197. inject_gp(vcpu);
  198. return;
  199. }
  200. if (is_long_mode(vcpu)) {
  201. if (!(cr4 & X86_CR4_PAE)) {
  202. printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
  203. "in long mode\n");
  204. inject_gp(vcpu);
  205. return;
  206. }
  207. } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
  208. && !load_pdptrs(vcpu, vcpu->cr3)) {
  209. printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
  210. inject_gp(vcpu);
  211. return;
  212. }
  213. if (cr4 & X86_CR4_VMXE) {
  214. printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
  215. inject_gp(vcpu);
  216. return;
  217. }
  218. kvm_x86_ops->set_cr4(vcpu, cr4);
  219. vcpu->cr4 = cr4;
  220. mutex_lock(&vcpu->kvm->lock);
  221. kvm_mmu_reset_context(vcpu);
  222. mutex_unlock(&vcpu->kvm->lock);
  223. }
  224. EXPORT_SYMBOL_GPL(set_cr4);
  225. void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
  226. {
  227. if (is_long_mode(vcpu)) {
  228. if (cr3 & CR3_L_MODE_RESERVED_BITS) {
  229. printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
  230. inject_gp(vcpu);
  231. return;
  232. }
  233. } else {
  234. if (is_pae(vcpu)) {
  235. if (cr3 & CR3_PAE_RESERVED_BITS) {
  236. printk(KERN_DEBUG
  237. "set_cr3: #GP, reserved bits\n");
  238. inject_gp(vcpu);
  239. return;
  240. }
  241. if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
  242. printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
  243. "reserved bits\n");
  244. inject_gp(vcpu);
  245. return;
  246. }
  247. }
  248. /*
  249. * We don't check reserved bits in nonpae mode, because
  250. * this isn't enforced, and VMware depends on this.
  251. */
  252. }
  253. mutex_lock(&vcpu->kvm->lock);
  254. /*
  255. * Does the new cr3 value map to physical memory? (Note, we
  256. * catch an invalid cr3 even in real-mode, because it would
  257. * cause trouble later on when we turn on paging anyway.)
  258. *
  259. * A real CPU would silently accept an invalid cr3 and would
  260. * attempt to use it - with largely undefined (and often hard
  261. * to debug) behavior on the guest side.
  262. */
  263. if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
  264. inject_gp(vcpu);
  265. else {
  266. vcpu->cr3 = cr3;
  267. vcpu->mmu.new_cr3(vcpu);
  268. }
  269. mutex_unlock(&vcpu->kvm->lock);
  270. }
  271. EXPORT_SYMBOL_GPL(set_cr3);
  272. void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
  273. {
  274. if (cr8 & CR8_RESERVED_BITS) {
  275. printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
  276. inject_gp(vcpu);
  277. return;
  278. }
  279. if (irqchip_in_kernel(vcpu->kvm))
  280. kvm_lapic_set_tpr(vcpu, cr8);
  281. else
  282. vcpu->cr8 = cr8;
  283. }
  284. EXPORT_SYMBOL_GPL(set_cr8);
  285. unsigned long get_cr8(struct kvm_vcpu *vcpu)
  286. {
  287. if (irqchip_in_kernel(vcpu->kvm))
  288. return kvm_lapic_get_cr8(vcpu);
  289. else
  290. return vcpu->cr8;
  291. }
  292. EXPORT_SYMBOL_GPL(get_cr8);
  293. /*
  294. * List of msr numbers which we expose to userspace through KVM_GET_MSRS
  295. * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
  296. *
  297. * This list is modified at module load time to reflect the
  298. * capabilities of the host cpu.
  299. */
  300. static u32 msrs_to_save[] = {
  301. MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
  302. MSR_K6_STAR,
  303. #ifdef CONFIG_X86_64
  304. MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
  305. #endif
  306. MSR_IA32_TIME_STAMP_COUNTER,
  307. };
  308. static unsigned num_msrs_to_save;
  309. static u32 emulated_msrs[] = {
  310. MSR_IA32_MISC_ENABLE,
  311. };
  312. #ifdef CONFIG_X86_64
  313. static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
  314. {
  315. if (efer & EFER_RESERVED_BITS) {
  316. printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
  317. efer);
  318. inject_gp(vcpu);
  319. return;
  320. }
  321. if (is_paging(vcpu)
  322. && (vcpu->shadow_efer & EFER_LME) != (efer & EFER_LME)) {
  323. printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
  324. inject_gp(vcpu);
  325. return;
  326. }
  327. kvm_x86_ops->set_efer(vcpu, efer);
  328. efer &= ~EFER_LMA;
  329. efer |= vcpu->shadow_efer & EFER_LMA;
  330. vcpu->shadow_efer = efer;
  331. }
  332. #endif
  333. /*
  334. * Writes msr value into into the appropriate "register".
  335. * Returns 0 on success, non-0 otherwise.
  336. * Assumes vcpu_load() was already called.
  337. */
  338. int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
  339. {
  340. return kvm_x86_ops->set_msr(vcpu, msr_index, data);
  341. }
  342. /*
  343. * Adapt set_msr() to msr_io()'s calling convention
  344. */
  345. static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
  346. {
  347. return kvm_set_msr(vcpu, index, *data);
  348. }
  349. int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
  350. {
  351. switch (msr) {
  352. #ifdef CONFIG_X86_64
  353. case MSR_EFER:
  354. set_efer(vcpu, data);
  355. break;
  356. #endif
  357. case MSR_IA32_MC0_STATUS:
  358. pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
  359. __FUNCTION__, data);
  360. break;
  361. case MSR_IA32_MCG_STATUS:
  362. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
  363. __FUNCTION__, data);
  364. break;
  365. case MSR_IA32_UCODE_REV:
  366. case MSR_IA32_UCODE_WRITE:
  367. case 0x200 ... 0x2ff: /* MTRRs */
  368. break;
  369. case MSR_IA32_APICBASE:
  370. kvm_set_apic_base(vcpu, data);
  371. break;
  372. case MSR_IA32_MISC_ENABLE:
  373. vcpu->ia32_misc_enable_msr = data;
  374. break;
  375. default:
  376. pr_unimpl(vcpu, "unhandled wrmsr: 0x%x\n", msr);
  377. return 1;
  378. }
  379. return 0;
  380. }
  381. EXPORT_SYMBOL_GPL(kvm_set_msr_common);
  382. /*
  383. * Reads an msr value (of 'msr_index') into 'pdata'.
  384. * Returns 0 on success, non-0 otherwise.
  385. * Assumes vcpu_load() was already called.
  386. */
  387. int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
  388. {
  389. return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
  390. }
  391. int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  392. {
  393. u64 data;
  394. switch (msr) {
  395. case 0xc0010010: /* SYSCFG */
  396. case 0xc0010015: /* HWCR */
  397. case MSR_IA32_PLATFORM_ID:
  398. case MSR_IA32_P5_MC_ADDR:
  399. case MSR_IA32_P5_MC_TYPE:
  400. case MSR_IA32_MC0_CTL:
  401. case MSR_IA32_MCG_STATUS:
  402. case MSR_IA32_MCG_CAP:
  403. case MSR_IA32_MC0_MISC:
  404. case MSR_IA32_MC0_MISC+4:
  405. case MSR_IA32_MC0_MISC+8:
  406. case MSR_IA32_MC0_MISC+12:
  407. case MSR_IA32_MC0_MISC+16:
  408. case MSR_IA32_UCODE_REV:
  409. case MSR_IA32_PERF_STATUS:
  410. case MSR_IA32_EBL_CR_POWERON:
  411. /* MTRR registers */
  412. case 0xfe:
  413. case 0x200 ... 0x2ff:
  414. data = 0;
  415. break;
  416. case 0xcd: /* fsb frequency */
  417. data = 3;
  418. break;
  419. case MSR_IA32_APICBASE:
  420. data = kvm_get_apic_base(vcpu);
  421. break;
  422. case MSR_IA32_MISC_ENABLE:
  423. data = vcpu->ia32_misc_enable_msr;
  424. break;
  425. #ifdef CONFIG_X86_64
  426. case MSR_EFER:
  427. data = vcpu->shadow_efer;
  428. break;
  429. #endif
  430. default:
  431. pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
  432. return 1;
  433. }
  434. *pdata = data;
  435. return 0;
  436. }
  437. EXPORT_SYMBOL_GPL(kvm_get_msr_common);
  438. /*
  439. * Read or write a bunch of msrs. All parameters are kernel addresses.
  440. *
  441. * @return number of msrs set successfully.
  442. */
  443. static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
  444. struct kvm_msr_entry *entries,
  445. int (*do_msr)(struct kvm_vcpu *vcpu,
  446. unsigned index, u64 *data))
  447. {
  448. int i;
  449. vcpu_load(vcpu);
  450. for (i = 0; i < msrs->nmsrs; ++i)
  451. if (do_msr(vcpu, entries[i].index, &entries[i].data))
  452. break;
  453. vcpu_put(vcpu);
  454. return i;
  455. }
  456. /*
  457. * Read or write a bunch of msrs. Parameters are user addresses.
  458. *
  459. * @return number of msrs set successfully.
  460. */
  461. static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
  462. int (*do_msr)(struct kvm_vcpu *vcpu,
  463. unsigned index, u64 *data),
  464. int writeback)
  465. {
  466. struct kvm_msrs msrs;
  467. struct kvm_msr_entry *entries;
  468. int r, n;
  469. unsigned size;
  470. r = -EFAULT;
  471. if (copy_from_user(&msrs, user_msrs, sizeof msrs))
  472. goto out;
  473. r = -E2BIG;
  474. if (msrs.nmsrs >= MAX_IO_MSRS)
  475. goto out;
  476. r = -ENOMEM;
  477. size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
  478. entries = vmalloc(size);
  479. if (!entries)
  480. goto out;
  481. r = -EFAULT;
  482. if (copy_from_user(entries, user_msrs->entries, size))
  483. goto out_free;
  484. r = n = __msr_io(vcpu, &msrs, entries, do_msr);
  485. if (r < 0)
  486. goto out_free;
  487. r = -EFAULT;
  488. if (writeback && copy_to_user(user_msrs->entries, entries, size))
  489. goto out_free;
  490. r = n;
  491. out_free:
  492. vfree(entries);
  493. out:
  494. return r;
  495. }
  496. /*
  497. * Make sure that a cpu that is being hot-unplugged does not have any vcpus
  498. * cached on it.
  499. */
  500. void decache_vcpus_on_cpu(int cpu)
  501. {
  502. struct kvm *vm;
  503. struct kvm_vcpu *vcpu;
  504. int i;
  505. spin_lock(&kvm_lock);
  506. list_for_each_entry(vm, &vm_list, vm_list)
  507. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  508. vcpu = vm->vcpus[i];
  509. if (!vcpu)
  510. continue;
  511. /*
  512. * If the vcpu is locked, then it is running on some
  513. * other cpu and therefore it is not cached on the
  514. * cpu in question.
  515. *
  516. * If it's not locked, check the last cpu it executed
  517. * on.
  518. */
  519. if (mutex_trylock(&vcpu->mutex)) {
  520. if (vcpu->cpu == cpu) {
  521. kvm_x86_ops->vcpu_decache(vcpu);
  522. vcpu->cpu = -1;
  523. }
  524. mutex_unlock(&vcpu->mutex);
  525. }
  526. }
  527. spin_unlock(&kvm_lock);
  528. }
  529. int kvm_dev_ioctl_check_extension(long ext)
  530. {
  531. int r;
  532. switch (ext) {
  533. case KVM_CAP_IRQCHIP:
  534. case KVM_CAP_HLT:
  535. case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
  536. case KVM_CAP_USER_MEMORY:
  537. case KVM_CAP_SET_TSS_ADDR:
  538. r = 1;
  539. break;
  540. default:
  541. r = 0;
  542. break;
  543. }
  544. return r;
  545. }
  546. long kvm_arch_dev_ioctl(struct file *filp,
  547. unsigned int ioctl, unsigned long arg)
  548. {
  549. void __user *argp = (void __user *)arg;
  550. long r;
  551. switch (ioctl) {
  552. case KVM_GET_MSR_INDEX_LIST: {
  553. struct kvm_msr_list __user *user_msr_list = argp;
  554. struct kvm_msr_list msr_list;
  555. unsigned n;
  556. r = -EFAULT;
  557. if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
  558. goto out;
  559. n = msr_list.nmsrs;
  560. msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
  561. if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
  562. goto out;
  563. r = -E2BIG;
  564. if (n < num_msrs_to_save)
  565. goto out;
  566. r = -EFAULT;
  567. if (copy_to_user(user_msr_list->indices, &msrs_to_save,
  568. num_msrs_to_save * sizeof(u32)))
  569. goto out;
  570. if (copy_to_user(user_msr_list->indices
  571. + num_msrs_to_save * sizeof(u32),
  572. &emulated_msrs,
  573. ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
  574. goto out;
  575. r = 0;
  576. break;
  577. }
  578. default:
  579. r = -EINVAL;
  580. }
  581. out:
  582. return r;
  583. }
  584. void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  585. {
  586. kvm_x86_ops->vcpu_load(vcpu, cpu);
  587. }
  588. void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
  589. {
  590. kvm_x86_ops->vcpu_put(vcpu);
  591. }
  592. static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
  593. {
  594. u64 efer;
  595. int i;
  596. struct kvm_cpuid_entry *e, *entry;
  597. rdmsrl(MSR_EFER, efer);
  598. entry = NULL;
  599. for (i = 0; i < vcpu->cpuid_nent; ++i) {
  600. e = &vcpu->cpuid_entries[i];
  601. if (e->function == 0x80000001) {
  602. entry = e;
  603. break;
  604. }
  605. }
  606. if (entry && (entry->edx & (1 << 20)) && !(efer & EFER_NX)) {
  607. entry->edx &= ~(1 << 20);
  608. printk(KERN_INFO "kvm: guest NX capability removed\n");
  609. }
  610. }
  611. static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
  612. struct kvm_cpuid *cpuid,
  613. struct kvm_cpuid_entry __user *entries)
  614. {
  615. int r;
  616. r = -E2BIG;
  617. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  618. goto out;
  619. r = -EFAULT;
  620. if (copy_from_user(&vcpu->cpuid_entries, entries,
  621. cpuid->nent * sizeof(struct kvm_cpuid_entry)))
  622. goto out;
  623. vcpu->cpuid_nent = cpuid->nent;
  624. cpuid_fix_nx_cap(vcpu);
  625. return 0;
  626. out:
  627. return r;
  628. }
  629. static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
  630. struct kvm_lapic_state *s)
  631. {
  632. vcpu_load(vcpu);
  633. memcpy(s->regs, vcpu->apic->regs, sizeof *s);
  634. vcpu_put(vcpu);
  635. return 0;
  636. }
  637. static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
  638. struct kvm_lapic_state *s)
  639. {
  640. vcpu_load(vcpu);
  641. memcpy(vcpu->apic->regs, s->regs, sizeof *s);
  642. kvm_apic_post_state_restore(vcpu);
  643. vcpu_put(vcpu);
  644. return 0;
  645. }
  646. long kvm_arch_vcpu_ioctl(struct file *filp,
  647. unsigned int ioctl, unsigned long arg)
  648. {
  649. struct kvm_vcpu *vcpu = filp->private_data;
  650. void __user *argp = (void __user *)arg;
  651. int r;
  652. switch (ioctl) {
  653. case KVM_GET_LAPIC: {
  654. struct kvm_lapic_state lapic;
  655. memset(&lapic, 0, sizeof lapic);
  656. r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
  657. if (r)
  658. goto out;
  659. r = -EFAULT;
  660. if (copy_to_user(argp, &lapic, sizeof lapic))
  661. goto out;
  662. r = 0;
  663. break;
  664. }
  665. case KVM_SET_LAPIC: {
  666. struct kvm_lapic_state lapic;
  667. r = -EFAULT;
  668. if (copy_from_user(&lapic, argp, sizeof lapic))
  669. goto out;
  670. r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
  671. if (r)
  672. goto out;
  673. r = 0;
  674. break;
  675. }
  676. case KVM_SET_CPUID: {
  677. struct kvm_cpuid __user *cpuid_arg = argp;
  678. struct kvm_cpuid cpuid;
  679. r = -EFAULT;
  680. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  681. goto out;
  682. r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
  683. if (r)
  684. goto out;
  685. break;
  686. }
  687. case KVM_GET_MSRS:
  688. r = msr_io(vcpu, argp, kvm_get_msr, 1);
  689. break;
  690. case KVM_SET_MSRS:
  691. r = msr_io(vcpu, argp, do_set_msr, 0);
  692. break;
  693. default:
  694. r = -EINVAL;
  695. }
  696. out:
  697. return r;
  698. }
  699. static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
  700. {
  701. int ret;
  702. if (addr > (unsigned int)(-3 * PAGE_SIZE))
  703. return -1;
  704. ret = kvm_x86_ops->set_tss_addr(kvm, addr);
  705. return ret;
  706. }
  707. static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
  708. u32 kvm_nr_mmu_pages)
  709. {
  710. if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
  711. return -EINVAL;
  712. mutex_lock(&kvm->lock);
  713. kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
  714. kvm->n_requested_mmu_pages = kvm_nr_mmu_pages;
  715. mutex_unlock(&kvm->lock);
  716. return 0;
  717. }
  718. static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
  719. {
  720. return kvm->n_alloc_mmu_pages;
  721. }
  722. /*
  723. * Set a new alias region. Aliases map a portion of physical memory into
  724. * another portion. This is useful for memory windows, for example the PC
  725. * VGA region.
  726. */
  727. static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
  728. struct kvm_memory_alias *alias)
  729. {
  730. int r, n;
  731. struct kvm_mem_alias *p;
  732. r = -EINVAL;
  733. /* General sanity checks */
  734. if (alias->memory_size & (PAGE_SIZE - 1))
  735. goto out;
  736. if (alias->guest_phys_addr & (PAGE_SIZE - 1))
  737. goto out;
  738. if (alias->slot >= KVM_ALIAS_SLOTS)
  739. goto out;
  740. if (alias->guest_phys_addr + alias->memory_size
  741. < alias->guest_phys_addr)
  742. goto out;
  743. if (alias->target_phys_addr + alias->memory_size
  744. < alias->target_phys_addr)
  745. goto out;
  746. mutex_lock(&kvm->lock);
  747. p = &kvm->aliases[alias->slot];
  748. p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
  749. p->npages = alias->memory_size >> PAGE_SHIFT;
  750. p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
  751. for (n = KVM_ALIAS_SLOTS; n > 0; --n)
  752. if (kvm->aliases[n - 1].npages)
  753. break;
  754. kvm->naliases = n;
  755. kvm_mmu_zap_all(kvm);
  756. mutex_unlock(&kvm->lock);
  757. return 0;
  758. out:
  759. return r;
  760. }
  761. static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  762. {
  763. int r;
  764. r = 0;
  765. switch (chip->chip_id) {
  766. case KVM_IRQCHIP_PIC_MASTER:
  767. memcpy(&chip->chip.pic,
  768. &pic_irqchip(kvm)->pics[0],
  769. sizeof(struct kvm_pic_state));
  770. break;
  771. case KVM_IRQCHIP_PIC_SLAVE:
  772. memcpy(&chip->chip.pic,
  773. &pic_irqchip(kvm)->pics[1],
  774. sizeof(struct kvm_pic_state));
  775. break;
  776. case KVM_IRQCHIP_IOAPIC:
  777. memcpy(&chip->chip.ioapic,
  778. ioapic_irqchip(kvm),
  779. sizeof(struct kvm_ioapic_state));
  780. break;
  781. default:
  782. r = -EINVAL;
  783. break;
  784. }
  785. return r;
  786. }
  787. static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  788. {
  789. int r;
  790. r = 0;
  791. switch (chip->chip_id) {
  792. case KVM_IRQCHIP_PIC_MASTER:
  793. memcpy(&pic_irqchip(kvm)->pics[0],
  794. &chip->chip.pic,
  795. sizeof(struct kvm_pic_state));
  796. break;
  797. case KVM_IRQCHIP_PIC_SLAVE:
  798. memcpy(&pic_irqchip(kvm)->pics[1],
  799. &chip->chip.pic,
  800. sizeof(struct kvm_pic_state));
  801. break;
  802. case KVM_IRQCHIP_IOAPIC:
  803. memcpy(ioapic_irqchip(kvm),
  804. &chip->chip.ioapic,
  805. sizeof(struct kvm_ioapic_state));
  806. break;
  807. default:
  808. r = -EINVAL;
  809. break;
  810. }
  811. kvm_pic_update_irq(pic_irqchip(kvm));
  812. return r;
  813. }
  814. long kvm_arch_vm_ioctl(struct file *filp,
  815. unsigned int ioctl, unsigned long arg)
  816. {
  817. struct kvm *kvm = filp->private_data;
  818. void __user *argp = (void __user *)arg;
  819. int r = -EINVAL;
  820. switch (ioctl) {
  821. case KVM_SET_TSS_ADDR:
  822. r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
  823. if (r < 0)
  824. goto out;
  825. break;
  826. case KVM_SET_MEMORY_REGION: {
  827. struct kvm_memory_region kvm_mem;
  828. struct kvm_userspace_memory_region kvm_userspace_mem;
  829. r = -EFAULT;
  830. if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
  831. goto out;
  832. kvm_userspace_mem.slot = kvm_mem.slot;
  833. kvm_userspace_mem.flags = kvm_mem.flags;
  834. kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
  835. kvm_userspace_mem.memory_size = kvm_mem.memory_size;
  836. r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
  837. if (r)
  838. goto out;
  839. break;
  840. }
  841. case KVM_SET_NR_MMU_PAGES:
  842. r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
  843. if (r)
  844. goto out;
  845. break;
  846. case KVM_GET_NR_MMU_PAGES:
  847. r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
  848. break;
  849. case KVM_SET_MEMORY_ALIAS: {
  850. struct kvm_memory_alias alias;
  851. r = -EFAULT;
  852. if (copy_from_user(&alias, argp, sizeof alias))
  853. goto out;
  854. r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
  855. if (r)
  856. goto out;
  857. break;
  858. }
  859. case KVM_CREATE_IRQCHIP:
  860. r = -ENOMEM;
  861. kvm->vpic = kvm_create_pic(kvm);
  862. if (kvm->vpic) {
  863. r = kvm_ioapic_init(kvm);
  864. if (r) {
  865. kfree(kvm->vpic);
  866. kvm->vpic = NULL;
  867. goto out;
  868. }
  869. } else
  870. goto out;
  871. break;
  872. case KVM_IRQ_LINE: {
  873. struct kvm_irq_level irq_event;
  874. r = -EFAULT;
  875. if (copy_from_user(&irq_event, argp, sizeof irq_event))
  876. goto out;
  877. if (irqchip_in_kernel(kvm)) {
  878. mutex_lock(&kvm->lock);
  879. if (irq_event.irq < 16)
  880. kvm_pic_set_irq(pic_irqchip(kvm),
  881. irq_event.irq,
  882. irq_event.level);
  883. kvm_ioapic_set_irq(kvm->vioapic,
  884. irq_event.irq,
  885. irq_event.level);
  886. mutex_unlock(&kvm->lock);
  887. r = 0;
  888. }
  889. break;
  890. }
  891. case KVM_GET_IRQCHIP: {
  892. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  893. struct kvm_irqchip chip;
  894. r = -EFAULT;
  895. if (copy_from_user(&chip, argp, sizeof chip))
  896. goto out;
  897. r = -ENXIO;
  898. if (!irqchip_in_kernel(kvm))
  899. goto out;
  900. r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
  901. if (r)
  902. goto out;
  903. r = -EFAULT;
  904. if (copy_to_user(argp, &chip, sizeof chip))
  905. goto out;
  906. r = 0;
  907. break;
  908. }
  909. case KVM_SET_IRQCHIP: {
  910. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  911. struct kvm_irqchip chip;
  912. r = -EFAULT;
  913. if (copy_from_user(&chip, argp, sizeof chip))
  914. goto out;
  915. r = -ENXIO;
  916. if (!irqchip_in_kernel(kvm))
  917. goto out;
  918. r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
  919. if (r)
  920. goto out;
  921. r = 0;
  922. break;
  923. }
  924. default:
  925. ;
  926. }
  927. out:
  928. return r;
  929. }
  930. static __init void kvm_init_msr_list(void)
  931. {
  932. u32 dummy[2];
  933. unsigned i, j;
  934. for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
  935. if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
  936. continue;
  937. if (j < i)
  938. msrs_to_save[j] = msrs_to_save[i];
  939. j++;
  940. }
  941. num_msrs_to_save = j;
  942. }
  943. /*
  944. * Only apic need an MMIO device hook, so shortcut now..
  945. */
  946. static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
  947. gpa_t addr)
  948. {
  949. struct kvm_io_device *dev;
  950. if (vcpu->apic) {
  951. dev = &vcpu->apic->dev;
  952. if (dev->in_range(dev, addr))
  953. return dev;
  954. }
  955. return NULL;
  956. }
  957. static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
  958. gpa_t addr)
  959. {
  960. struct kvm_io_device *dev;
  961. dev = vcpu_find_pervcpu_dev(vcpu, addr);
  962. if (dev == NULL)
  963. dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
  964. return dev;
  965. }
  966. int emulator_read_std(unsigned long addr,
  967. void *val,
  968. unsigned int bytes,
  969. struct kvm_vcpu *vcpu)
  970. {
  971. void *data = val;
  972. while (bytes) {
  973. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
  974. unsigned offset = addr & (PAGE_SIZE-1);
  975. unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
  976. int ret;
  977. if (gpa == UNMAPPED_GVA)
  978. return X86EMUL_PROPAGATE_FAULT;
  979. ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
  980. if (ret < 0)
  981. return X86EMUL_UNHANDLEABLE;
  982. bytes -= tocopy;
  983. data += tocopy;
  984. addr += tocopy;
  985. }
  986. return X86EMUL_CONTINUE;
  987. }
  988. EXPORT_SYMBOL_GPL(emulator_read_std);
  989. static int emulator_write_std(unsigned long addr,
  990. const void *val,
  991. unsigned int bytes,
  992. struct kvm_vcpu *vcpu)
  993. {
  994. pr_unimpl(vcpu, "emulator_write_std: addr %lx n %d\n", addr, bytes);
  995. return X86EMUL_UNHANDLEABLE;
  996. }
  997. static int emulator_read_emulated(unsigned long addr,
  998. void *val,
  999. unsigned int bytes,
  1000. struct kvm_vcpu *vcpu)
  1001. {
  1002. struct kvm_io_device *mmio_dev;
  1003. gpa_t gpa;
  1004. if (vcpu->mmio_read_completed) {
  1005. memcpy(val, vcpu->mmio_data, bytes);
  1006. vcpu->mmio_read_completed = 0;
  1007. return X86EMUL_CONTINUE;
  1008. }
  1009. gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
  1010. /* For APIC access vmexit */
  1011. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1012. goto mmio;
  1013. if (emulator_read_std(addr, val, bytes, vcpu)
  1014. == X86EMUL_CONTINUE)
  1015. return X86EMUL_CONTINUE;
  1016. if (gpa == UNMAPPED_GVA)
  1017. return X86EMUL_PROPAGATE_FAULT;
  1018. mmio:
  1019. /*
  1020. * Is this MMIO handled locally?
  1021. */
  1022. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1023. if (mmio_dev) {
  1024. kvm_iodevice_read(mmio_dev, gpa, bytes, val);
  1025. return X86EMUL_CONTINUE;
  1026. }
  1027. vcpu->mmio_needed = 1;
  1028. vcpu->mmio_phys_addr = gpa;
  1029. vcpu->mmio_size = bytes;
  1030. vcpu->mmio_is_write = 0;
  1031. return X86EMUL_UNHANDLEABLE;
  1032. }
  1033. static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
  1034. const void *val, int bytes)
  1035. {
  1036. int ret;
  1037. ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
  1038. if (ret < 0)
  1039. return 0;
  1040. kvm_mmu_pte_write(vcpu, gpa, val, bytes);
  1041. return 1;
  1042. }
  1043. static int emulator_write_emulated_onepage(unsigned long addr,
  1044. const void *val,
  1045. unsigned int bytes,
  1046. struct kvm_vcpu *vcpu)
  1047. {
  1048. struct kvm_io_device *mmio_dev;
  1049. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
  1050. if (gpa == UNMAPPED_GVA) {
  1051. kvm_x86_ops->inject_page_fault(vcpu, addr, 2);
  1052. return X86EMUL_PROPAGATE_FAULT;
  1053. }
  1054. /* For APIC access vmexit */
  1055. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1056. goto mmio;
  1057. if (emulator_write_phys(vcpu, gpa, val, bytes))
  1058. return X86EMUL_CONTINUE;
  1059. mmio:
  1060. /*
  1061. * Is this MMIO handled locally?
  1062. */
  1063. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1064. if (mmio_dev) {
  1065. kvm_iodevice_write(mmio_dev, gpa, bytes, val);
  1066. return X86EMUL_CONTINUE;
  1067. }
  1068. vcpu->mmio_needed = 1;
  1069. vcpu->mmio_phys_addr = gpa;
  1070. vcpu->mmio_size = bytes;
  1071. vcpu->mmio_is_write = 1;
  1072. memcpy(vcpu->mmio_data, val, bytes);
  1073. return X86EMUL_CONTINUE;
  1074. }
  1075. int emulator_write_emulated(unsigned long addr,
  1076. const void *val,
  1077. unsigned int bytes,
  1078. struct kvm_vcpu *vcpu)
  1079. {
  1080. /* Crossing a page boundary? */
  1081. if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
  1082. int rc, now;
  1083. now = -addr & ~PAGE_MASK;
  1084. rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
  1085. if (rc != X86EMUL_CONTINUE)
  1086. return rc;
  1087. addr += now;
  1088. val += now;
  1089. bytes -= now;
  1090. }
  1091. return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
  1092. }
  1093. EXPORT_SYMBOL_GPL(emulator_write_emulated);
  1094. static int emulator_cmpxchg_emulated(unsigned long addr,
  1095. const void *old,
  1096. const void *new,
  1097. unsigned int bytes,
  1098. struct kvm_vcpu *vcpu)
  1099. {
  1100. static int reported;
  1101. if (!reported) {
  1102. reported = 1;
  1103. printk(KERN_WARNING "kvm: emulating exchange as write\n");
  1104. }
  1105. return emulator_write_emulated(addr, new, bytes, vcpu);
  1106. }
  1107. static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
  1108. {
  1109. return kvm_x86_ops->get_segment_base(vcpu, seg);
  1110. }
  1111. int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
  1112. {
  1113. return X86EMUL_CONTINUE;
  1114. }
  1115. int emulate_clts(struct kvm_vcpu *vcpu)
  1116. {
  1117. kvm_x86_ops->set_cr0(vcpu, vcpu->cr0 & ~X86_CR0_TS);
  1118. return X86EMUL_CONTINUE;
  1119. }
  1120. int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
  1121. {
  1122. struct kvm_vcpu *vcpu = ctxt->vcpu;
  1123. switch (dr) {
  1124. case 0 ... 3:
  1125. *dest = kvm_x86_ops->get_dr(vcpu, dr);
  1126. return X86EMUL_CONTINUE;
  1127. default:
  1128. pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
  1129. return X86EMUL_UNHANDLEABLE;
  1130. }
  1131. }
  1132. int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
  1133. {
  1134. unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
  1135. int exception;
  1136. kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
  1137. if (exception) {
  1138. /* FIXME: better handling */
  1139. return X86EMUL_UNHANDLEABLE;
  1140. }
  1141. return X86EMUL_CONTINUE;
  1142. }
  1143. void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
  1144. {
  1145. static int reported;
  1146. u8 opcodes[4];
  1147. unsigned long rip = vcpu->rip;
  1148. unsigned long rip_linear;
  1149. rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
  1150. if (reported)
  1151. return;
  1152. emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
  1153. printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
  1154. context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
  1155. reported = 1;
  1156. }
  1157. EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
  1158. struct x86_emulate_ops emulate_ops = {
  1159. .read_std = emulator_read_std,
  1160. .write_std = emulator_write_std,
  1161. .read_emulated = emulator_read_emulated,
  1162. .write_emulated = emulator_write_emulated,
  1163. .cmpxchg_emulated = emulator_cmpxchg_emulated,
  1164. };
  1165. int emulate_instruction(struct kvm_vcpu *vcpu,
  1166. struct kvm_run *run,
  1167. unsigned long cr2,
  1168. u16 error_code,
  1169. int no_decode)
  1170. {
  1171. int r;
  1172. vcpu->mmio_fault_cr2 = cr2;
  1173. kvm_x86_ops->cache_regs(vcpu);
  1174. vcpu->mmio_is_write = 0;
  1175. vcpu->pio.string = 0;
  1176. if (!no_decode) {
  1177. int cs_db, cs_l;
  1178. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  1179. vcpu->emulate_ctxt.vcpu = vcpu;
  1180. vcpu->emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
  1181. vcpu->emulate_ctxt.cr2 = cr2;
  1182. vcpu->emulate_ctxt.mode =
  1183. (vcpu->emulate_ctxt.eflags & X86_EFLAGS_VM)
  1184. ? X86EMUL_MODE_REAL : cs_l
  1185. ? X86EMUL_MODE_PROT64 : cs_db
  1186. ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
  1187. if (vcpu->emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
  1188. vcpu->emulate_ctxt.cs_base = 0;
  1189. vcpu->emulate_ctxt.ds_base = 0;
  1190. vcpu->emulate_ctxt.es_base = 0;
  1191. vcpu->emulate_ctxt.ss_base = 0;
  1192. } else {
  1193. vcpu->emulate_ctxt.cs_base =
  1194. get_segment_base(vcpu, VCPU_SREG_CS);
  1195. vcpu->emulate_ctxt.ds_base =
  1196. get_segment_base(vcpu, VCPU_SREG_DS);
  1197. vcpu->emulate_ctxt.es_base =
  1198. get_segment_base(vcpu, VCPU_SREG_ES);
  1199. vcpu->emulate_ctxt.ss_base =
  1200. get_segment_base(vcpu, VCPU_SREG_SS);
  1201. }
  1202. vcpu->emulate_ctxt.gs_base =
  1203. get_segment_base(vcpu, VCPU_SREG_GS);
  1204. vcpu->emulate_ctxt.fs_base =
  1205. get_segment_base(vcpu, VCPU_SREG_FS);
  1206. r = x86_decode_insn(&vcpu->emulate_ctxt, &emulate_ops);
  1207. if (r) {
  1208. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1209. return EMULATE_DONE;
  1210. return EMULATE_FAIL;
  1211. }
  1212. }
  1213. r = x86_emulate_insn(&vcpu->emulate_ctxt, &emulate_ops);
  1214. if (vcpu->pio.string)
  1215. return EMULATE_DO_MMIO;
  1216. if ((r || vcpu->mmio_is_write) && run) {
  1217. run->exit_reason = KVM_EXIT_MMIO;
  1218. run->mmio.phys_addr = vcpu->mmio_phys_addr;
  1219. memcpy(run->mmio.data, vcpu->mmio_data, 8);
  1220. run->mmio.len = vcpu->mmio_size;
  1221. run->mmio.is_write = vcpu->mmio_is_write;
  1222. }
  1223. if (r) {
  1224. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1225. return EMULATE_DONE;
  1226. if (!vcpu->mmio_needed) {
  1227. kvm_report_emulation_failure(vcpu, "mmio");
  1228. return EMULATE_FAIL;
  1229. }
  1230. return EMULATE_DO_MMIO;
  1231. }
  1232. kvm_x86_ops->decache_regs(vcpu);
  1233. kvm_x86_ops->set_rflags(vcpu, vcpu->emulate_ctxt.eflags);
  1234. if (vcpu->mmio_is_write) {
  1235. vcpu->mmio_needed = 0;
  1236. return EMULATE_DO_MMIO;
  1237. }
  1238. return EMULATE_DONE;
  1239. }
  1240. EXPORT_SYMBOL_GPL(emulate_instruction);
  1241. static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
  1242. {
  1243. int i;
  1244. for (i = 0; i < ARRAY_SIZE(vcpu->pio.guest_pages); ++i)
  1245. if (vcpu->pio.guest_pages[i]) {
  1246. kvm_release_page(vcpu->pio.guest_pages[i]);
  1247. vcpu->pio.guest_pages[i] = NULL;
  1248. }
  1249. }
  1250. static int pio_copy_data(struct kvm_vcpu *vcpu)
  1251. {
  1252. void *p = vcpu->pio_data;
  1253. void *q;
  1254. unsigned bytes;
  1255. int nr_pages = vcpu->pio.guest_pages[1] ? 2 : 1;
  1256. q = vmap(vcpu->pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
  1257. PAGE_KERNEL);
  1258. if (!q) {
  1259. free_pio_guest_pages(vcpu);
  1260. return -ENOMEM;
  1261. }
  1262. q += vcpu->pio.guest_page_offset;
  1263. bytes = vcpu->pio.size * vcpu->pio.cur_count;
  1264. if (vcpu->pio.in)
  1265. memcpy(q, p, bytes);
  1266. else
  1267. memcpy(p, q, bytes);
  1268. q -= vcpu->pio.guest_page_offset;
  1269. vunmap(q);
  1270. free_pio_guest_pages(vcpu);
  1271. return 0;
  1272. }
  1273. int complete_pio(struct kvm_vcpu *vcpu)
  1274. {
  1275. struct kvm_pio_request *io = &vcpu->pio;
  1276. long delta;
  1277. int r;
  1278. kvm_x86_ops->cache_regs(vcpu);
  1279. if (!io->string) {
  1280. if (io->in)
  1281. memcpy(&vcpu->regs[VCPU_REGS_RAX], vcpu->pio_data,
  1282. io->size);
  1283. } else {
  1284. if (io->in) {
  1285. r = pio_copy_data(vcpu);
  1286. if (r) {
  1287. kvm_x86_ops->cache_regs(vcpu);
  1288. return r;
  1289. }
  1290. }
  1291. delta = 1;
  1292. if (io->rep) {
  1293. delta *= io->cur_count;
  1294. /*
  1295. * The size of the register should really depend on
  1296. * current address size.
  1297. */
  1298. vcpu->regs[VCPU_REGS_RCX] -= delta;
  1299. }
  1300. if (io->down)
  1301. delta = -delta;
  1302. delta *= io->size;
  1303. if (io->in)
  1304. vcpu->regs[VCPU_REGS_RDI] += delta;
  1305. else
  1306. vcpu->regs[VCPU_REGS_RSI] += delta;
  1307. }
  1308. kvm_x86_ops->decache_regs(vcpu);
  1309. io->count -= io->cur_count;
  1310. io->cur_count = 0;
  1311. return 0;
  1312. }
  1313. static void kernel_pio(struct kvm_io_device *pio_dev,
  1314. struct kvm_vcpu *vcpu,
  1315. void *pd)
  1316. {
  1317. /* TODO: String I/O for in kernel device */
  1318. mutex_lock(&vcpu->kvm->lock);
  1319. if (vcpu->pio.in)
  1320. kvm_iodevice_read(pio_dev, vcpu->pio.port,
  1321. vcpu->pio.size,
  1322. pd);
  1323. else
  1324. kvm_iodevice_write(pio_dev, vcpu->pio.port,
  1325. vcpu->pio.size,
  1326. pd);
  1327. mutex_unlock(&vcpu->kvm->lock);
  1328. }
  1329. static void pio_string_write(struct kvm_io_device *pio_dev,
  1330. struct kvm_vcpu *vcpu)
  1331. {
  1332. struct kvm_pio_request *io = &vcpu->pio;
  1333. void *pd = vcpu->pio_data;
  1334. int i;
  1335. mutex_lock(&vcpu->kvm->lock);
  1336. for (i = 0; i < io->cur_count; i++) {
  1337. kvm_iodevice_write(pio_dev, io->port,
  1338. io->size,
  1339. pd);
  1340. pd += io->size;
  1341. }
  1342. mutex_unlock(&vcpu->kvm->lock);
  1343. }
  1344. static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
  1345. gpa_t addr)
  1346. {
  1347. return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
  1348. }
  1349. int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1350. int size, unsigned port)
  1351. {
  1352. struct kvm_io_device *pio_dev;
  1353. vcpu->run->exit_reason = KVM_EXIT_IO;
  1354. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1355. vcpu->run->io.size = vcpu->pio.size = size;
  1356. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1357. vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = 1;
  1358. vcpu->run->io.port = vcpu->pio.port = port;
  1359. vcpu->pio.in = in;
  1360. vcpu->pio.string = 0;
  1361. vcpu->pio.down = 0;
  1362. vcpu->pio.guest_page_offset = 0;
  1363. vcpu->pio.rep = 0;
  1364. kvm_x86_ops->cache_regs(vcpu);
  1365. memcpy(vcpu->pio_data, &vcpu->regs[VCPU_REGS_RAX], 4);
  1366. kvm_x86_ops->decache_regs(vcpu);
  1367. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1368. pio_dev = vcpu_find_pio_dev(vcpu, port);
  1369. if (pio_dev) {
  1370. kernel_pio(pio_dev, vcpu, vcpu->pio_data);
  1371. complete_pio(vcpu);
  1372. return 1;
  1373. }
  1374. return 0;
  1375. }
  1376. EXPORT_SYMBOL_GPL(kvm_emulate_pio);
  1377. int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1378. int size, unsigned long count, int down,
  1379. gva_t address, int rep, unsigned port)
  1380. {
  1381. unsigned now, in_page;
  1382. int i, ret = 0;
  1383. int nr_pages = 1;
  1384. struct page *page;
  1385. struct kvm_io_device *pio_dev;
  1386. vcpu->run->exit_reason = KVM_EXIT_IO;
  1387. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1388. vcpu->run->io.size = vcpu->pio.size = size;
  1389. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1390. vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = count;
  1391. vcpu->run->io.port = vcpu->pio.port = port;
  1392. vcpu->pio.in = in;
  1393. vcpu->pio.string = 1;
  1394. vcpu->pio.down = down;
  1395. vcpu->pio.guest_page_offset = offset_in_page(address);
  1396. vcpu->pio.rep = rep;
  1397. if (!count) {
  1398. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1399. return 1;
  1400. }
  1401. if (!down)
  1402. in_page = PAGE_SIZE - offset_in_page(address);
  1403. else
  1404. in_page = offset_in_page(address) + size;
  1405. now = min(count, (unsigned long)in_page / size);
  1406. if (!now) {
  1407. /*
  1408. * String I/O straddles page boundary. Pin two guest pages
  1409. * so that we satisfy atomicity constraints. Do just one
  1410. * transaction to avoid complexity.
  1411. */
  1412. nr_pages = 2;
  1413. now = 1;
  1414. }
  1415. if (down) {
  1416. /*
  1417. * String I/O in reverse. Yuck. Kill the guest, fix later.
  1418. */
  1419. pr_unimpl(vcpu, "guest string pio down\n");
  1420. inject_gp(vcpu);
  1421. return 1;
  1422. }
  1423. vcpu->run->io.count = now;
  1424. vcpu->pio.cur_count = now;
  1425. if (vcpu->pio.cur_count == vcpu->pio.count)
  1426. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1427. for (i = 0; i < nr_pages; ++i) {
  1428. mutex_lock(&vcpu->kvm->lock);
  1429. page = gva_to_page(vcpu, address + i * PAGE_SIZE);
  1430. vcpu->pio.guest_pages[i] = page;
  1431. mutex_unlock(&vcpu->kvm->lock);
  1432. if (!page) {
  1433. inject_gp(vcpu);
  1434. free_pio_guest_pages(vcpu);
  1435. return 1;
  1436. }
  1437. }
  1438. pio_dev = vcpu_find_pio_dev(vcpu, port);
  1439. if (!vcpu->pio.in) {
  1440. /* string PIO write */
  1441. ret = pio_copy_data(vcpu);
  1442. if (ret >= 0 && pio_dev) {
  1443. pio_string_write(pio_dev, vcpu);
  1444. complete_pio(vcpu);
  1445. if (vcpu->pio.count == 0)
  1446. ret = 1;
  1447. }
  1448. } else if (pio_dev)
  1449. pr_unimpl(vcpu, "no string pio read support yet, "
  1450. "port %x size %d count %ld\n",
  1451. port, size, count);
  1452. return ret;
  1453. }
  1454. EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
  1455. int kvm_arch_init(void *opaque)
  1456. {
  1457. struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
  1458. kvm_init_msr_list();
  1459. if (kvm_x86_ops) {
  1460. printk(KERN_ERR "kvm: already loaded the other module\n");
  1461. return -EEXIST;
  1462. }
  1463. if (!ops->cpu_has_kvm_support()) {
  1464. printk(KERN_ERR "kvm: no hardware support\n");
  1465. return -EOPNOTSUPP;
  1466. }
  1467. if (ops->disabled_by_bios()) {
  1468. printk(KERN_ERR "kvm: disabled by bios\n");
  1469. return -EOPNOTSUPP;
  1470. }
  1471. kvm_x86_ops = ops;
  1472. return 0;
  1473. }
  1474. void kvm_arch_exit(void)
  1475. {
  1476. kvm_x86_ops = NULL;
  1477. }
  1478. int kvm_emulate_halt(struct kvm_vcpu *vcpu)
  1479. {
  1480. ++vcpu->stat.halt_exits;
  1481. if (irqchip_in_kernel(vcpu->kvm)) {
  1482. vcpu->mp_state = VCPU_MP_STATE_HALTED;
  1483. kvm_vcpu_block(vcpu);
  1484. if (vcpu->mp_state != VCPU_MP_STATE_RUNNABLE)
  1485. return -EINTR;
  1486. return 1;
  1487. } else {
  1488. vcpu->run->exit_reason = KVM_EXIT_HLT;
  1489. return 0;
  1490. }
  1491. }
  1492. EXPORT_SYMBOL_GPL(kvm_emulate_halt);
  1493. int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
  1494. {
  1495. unsigned long nr, a0, a1, a2, a3, ret;
  1496. kvm_x86_ops->cache_regs(vcpu);
  1497. nr = vcpu->regs[VCPU_REGS_RAX];
  1498. a0 = vcpu->regs[VCPU_REGS_RBX];
  1499. a1 = vcpu->regs[VCPU_REGS_RCX];
  1500. a2 = vcpu->regs[VCPU_REGS_RDX];
  1501. a3 = vcpu->regs[VCPU_REGS_RSI];
  1502. if (!is_long_mode(vcpu)) {
  1503. nr &= 0xFFFFFFFF;
  1504. a0 &= 0xFFFFFFFF;
  1505. a1 &= 0xFFFFFFFF;
  1506. a2 &= 0xFFFFFFFF;
  1507. a3 &= 0xFFFFFFFF;
  1508. }
  1509. switch (nr) {
  1510. default:
  1511. ret = -KVM_ENOSYS;
  1512. break;
  1513. }
  1514. vcpu->regs[VCPU_REGS_RAX] = ret;
  1515. kvm_x86_ops->decache_regs(vcpu);
  1516. return 0;
  1517. }
  1518. EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
  1519. int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
  1520. {
  1521. char instruction[3];
  1522. int ret = 0;
  1523. mutex_lock(&vcpu->kvm->lock);
  1524. /*
  1525. * Blow out the MMU to ensure that no other VCPU has an active mapping
  1526. * to ensure that the updated hypercall appears atomically across all
  1527. * VCPUs.
  1528. */
  1529. kvm_mmu_zap_all(vcpu->kvm);
  1530. kvm_x86_ops->cache_regs(vcpu);
  1531. kvm_x86_ops->patch_hypercall(vcpu, instruction);
  1532. if (emulator_write_emulated(vcpu->rip, instruction, 3, vcpu)
  1533. != X86EMUL_CONTINUE)
  1534. ret = -EFAULT;
  1535. mutex_unlock(&vcpu->kvm->lock);
  1536. return ret;
  1537. }
  1538. static u64 mk_cr_64(u64 curr_cr, u32 new_val)
  1539. {
  1540. return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
  1541. }
  1542. void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  1543. {
  1544. struct descriptor_table dt = { limit, base };
  1545. kvm_x86_ops->set_gdt(vcpu, &dt);
  1546. }
  1547. void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  1548. {
  1549. struct descriptor_table dt = { limit, base };
  1550. kvm_x86_ops->set_idt(vcpu, &dt);
  1551. }
  1552. void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
  1553. unsigned long *rflags)
  1554. {
  1555. lmsw(vcpu, msw);
  1556. *rflags = kvm_x86_ops->get_rflags(vcpu);
  1557. }
  1558. unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
  1559. {
  1560. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  1561. switch (cr) {
  1562. case 0:
  1563. return vcpu->cr0;
  1564. case 2:
  1565. return vcpu->cr2;
  1566. case 3:
  1567. return vcpu->cr3;
  1568. case 4:
  1569. return vcpu->cr4;
  1570. default:
  1571. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
  1572. return 0;
  1573. }
  1574. }
  1575. void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
  1576. unsigned long *rflags)
  1577. {
  1578. switch (cr) {
  1579. case 0:
  1580. set_cr0(vcpu, mk_cr_64(vcpu->cr0, val));
  1581. *rflags = kvm_x86_ops->get_rflags(vcpu);
  1582. break;
  1583. case 2:
  1584. vcpu->cr2 = val;
  1585. break;
  1586. case 3:
  1587. set_cr3(vcpu, val);
  1588. break;
  1589. case 4:
  1590. set_cr4(vcpu, mk_cr_64(vcpu->cr4, val));
  1591. break;
  1592. default:
  1593. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
  1594. }
  1595. }
  1596. void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
  1597. {
  1598. int i;
  1599. u32 function;
  1600. struct kvm_cpuid_entry *e, *best;
  1601. kvm_x86_ops->cache_regs(vcpu);
  1602. function = vcpu->regs[VCPU_REGS_RAX];
  1603. vcpu->regs[VCPU_REGS_RAX] = 0;
  1604. vcpu->regs[VCPU_REGS_RBX] = 0;
  1605. vcpu->regs[VCPU_REGS_RCX] = 0;
  1606. vcpu->regs[VCPU_REGS_RDX] = 0;
  1607. best = NULL;
  1608. for (i = 0; i < vcpu->cpuid_nent; ++i) {
  1609. e = &vcpu->cpuid_entries[i];
  1610. if (e->function == function) {
  1611. best = e;
  1612. break;
  1613. }
  1614. /*
  1615. * Both basic or both extended?
  1616. */
  1617. if (((e->function ^ function) & 0x80000000) == 0)
  1618. if (!best || e->function > best->function)
  1619. best = e;
  1620. }
  1621. if (best) {
  1622. vcpu->regs[VCPU_REGS_RAX] = best->eax;
  1623. vcpu->regs[VCPU_REGS_RBX] = best->ebx;
  1624. vcpu->regs[VCPU_REGS_RCX] = best->ecx;
  1625. vcpu->regs[VCPU_REGS_RDX] = best->edx;
  1626. }
  1627. kvm_x86_ops->decache_regs(vcpu);
  1628. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1629. }
  1630. EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
  1631. /*
  1632. * Check if userspace requested an interrupt window, and that the
  1633. * interrupt window is open.
  1634. *
  1635. * No need to exit to userspace if we already have an interrupt queued.
  1636. */
  1637. static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
  1638. struct kvm_run *kvm_run)
  1639. {
  1640. return (!vcpu->irq_summary &&
  1641. kvm_run->request_interrupt_window &&
  1642. vcpu->interrupt_window_open &&
  1643. (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
  1644. }
  1645. static void post_kvm_run_save(struct kvm_vcpu *vcpu,
  1646. struct kvm_run *kvm_run)
  1647. {
  1648. kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
  1649. kvm_run->cr8 = get_cr8(vcpu);
  1650. kvm_run->apic_base = kvm_get_apic_base(vcpu);
  1651. if (irqchip_in_kernel(vcpu->kvm))
  1652. kvm_run->ready_for_interrupt_injection = 1;
  1653. else
  1654. kvm_run->ready_for_interrupt_injection =
  1655. (vcpu->interrupt_window_open &&
  1656. vcpu->irq_summary == 0);
  1657. }
  1658. static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  1659. {
  1660. int r;
  1661. if (unlikely(vcpu->mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
  1662. pr_debug("vcpu %d received sipi with vector # %x\n",
  1663. vcpu->vcpu_id, vcpu->sipi_vector);
  1664. kvm_lapic_reset(vcpu);
  1665. r = kvm_x86_ops->vcpu_reset(vcpu);
  1666. if (r)
  1667. return r;
  1668. vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
  1669. }
  1670. preempted:
  1671. if (vcpu->guest_debug.enabled)
  1672. kvm_x86_ops->guest_debug_pre(vcpu);
  1673. again:
  1674. r = kvm_mmu_reload(vcpu);
  1675. if (unlikely(r))
  1676. goto out;
  1677. kvm_inject_pending_timer_irqs(vcpu);
  1678. preempt_disable();
  1679. kvm_x86_ops->prepare_guest_switch(vcpu);
  1680. kvm_load_guest_fpu(vcpu);
  1681. local_irq_disable();
  1682. if (signal_pending(current)) {
  1683. local_irq_enable();
  1684. preempt_enable();
  1685. r = -EINTR;
  1686. kvm_run->exit_reason = KVM_EXIT_INTR;
  1687. ++vcpu->stat.signal_exits;
  1688. goto out;
  1689. }
  1690. if (irqchip_in_kernel(vcpu->kvm))
  1691. kvm_x86_ops->inject_pending_irq(vcpu);
  1692. else if (!vcpu->mmio_read_completed)
  1693. kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
  1694. vcpu->guest_mode = 1;
  1695. kvm_guest_enter();
  1696. if (vcpu->requests)
  1697. if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
  1698. kvm_x86_ops->tlb_flush(vcpu);
  1699. kvm_x86_ops->run(vcpu, kvm_run);
  1700. vcpu->guest_mode = 0;
  1701. local_irq_enable();
  1702. ++vcpu->stat.exits;
  1703. /*
  1704. * We must have an instruction between local_irq_enable() and
  1705. * kvm_guest_exit(), so the timer interrupt isn't delayed by
  1706. * the interrupt shadow. The stat.exits increment will do nicely.
  1707. * But we need to prevent reordering, hence this barrier():
  1708. */
  1709. barrier();
  1710. kvm_guest_exit();
  1711. preempt_enable();
  1712. /*
  1713. * Profile KVM exit RIPs:
  1714. */
  1715. if (unlikely(prof_on == KVM_PROFILING)) {
  1716. kvm_x86_ops->cache_regs(vcpu);
  1717. profile_hit(KVM_PROFILING, (void *)vcpu->rip);
  1718. }
  1719. r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
  1720. if (r > 0) {
  1721. if (dm_request_for_irq_injection(vcpu, kvm_run)) {
  1722. r = -EINTR;
  1723. kvm_run->exit_reason = KVM_EXIT_INTR;
  1724. ++vcpu->stat.request_irq_exits;
  1725. goto out;
  1726. }
  1727. if (!need_resched()) {
  1728. ++vcpu->stat.light_exits;
  1729. goto again;
  1730. }
  1731. }
  1732. out:
  1733. if (r > 0) {
  1734. kvm_resched(vcpu);
  1735. goto preempted;
  1736. }
  1737. post_kvm_run_save(vcpu, kvm_run);
  1738. return r;
  1739. }
  1740. int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  1741. {
  1742. int r;
  1743. sigset_t sigsaved;
  1744. vcpu_load(vcpu);
  1745. if (unlikely(vcpu->mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
  1746. kvm_vcpu_block(vcpu);
  1747. vcpu_put(vcpu);
  1748. return -EAGAIN;
  1749. }
  1750. if (vcpu->sigset_active)
  1751. sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
  1752. /* re-sync apic's tpr */
  1753. if (!irqchip_in_kernel(vcpu->kvm))
  1754. set_cr8(vcpu, kvm_run->cr8);
  1755. if (vcpu->pio.cur_count) {
  1756. r = complete_pio(vcpu);
  1757. if (r)
  1758. goto out;
  1759. }
  1760. #if CONFIG_HAS_IOMEM
  1761. if (vcpu->mmio_needed) {
  1762. memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
  1763. vcpu->mmio_read_completed = 1;
  1764. vcpu->mmio_needed = 0;
  1765. r = emulate_instruction(vcpu, kvm_run,
  1766. vcpu->mmio_fault_cr2, 0, 1);
  1767. if (r == EMULATE_DO_MMIO) {
  1768. /*
  1769. * Read-modify-write. Back to userspace.
  1770. */
  1771. r = 0;
  1772. goto out;
  1773. }
  1774. }
  1775. #endif
  1776. if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
  1777. kvm_x86_ops->cache_regs(vcpu);
  1778. vcpu->regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
  1779. kvm_x86_ops->decache_regs(vcpu);
  1780. }
  1781. r = __vcpu_run(vcpu, kvm_run);
  1782. out:
  1783. if (vcpu->sigset_active)
  1784. sigprocmask(SIG_SETMASK, &sigsaved, NULL);
  1785. vcpu_put(vcpu);
  1786. return r;
  1787. }
  1788. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  1789. {
  1790. vcpu_load(vcpu);
  1791. kvm_x86_ops->cache_regs(vcpu);
  1792. regs->rax = vcpu->regs[VCPU_REGS_RAX];
  1793. regs->rbx = vcpu->regs[VCPU_REGS_RBX];
  1794. regs->rcx = vcpu->regs[VCPU_REGS_RCX];
  1795. regs->rdx = vcpu->regs[VCPU_REGS_RDX];
  1796. regs->rsi = vcpu->regs[VCPU_REGS_RSI];
  1797. regs->rdi = vcpu->regs[VCPU_REGS_RDI];
  1798. regs->rsp = vcpu->regs[VCPU_REGS_RSP];
  1799. regs->rbp = vcpu->regs[VCPU_REGS_RBP];
  1800. #ifdef CONFIG_X86_64
  1801. regs->r8 = vcpu->regs[VCPU_REGS_R8];
  1802. regs->r9 = vcpu->regs[VCPU_REGS_R9];
  1803. regs->r10 = vcpu->regs[VCPU_REGS_R10];
  1804. regs->r11 = vcpu->regs[VCPU_REGS_R11];
  1805. regs->r12 = vcpu->regs[VCPU_REGS_R12];
  1806. regs->r13 = vcpu->regs[VCPU_REGS_R13];
  1807. regs->r14 = vcpu->regs[VCPU_REGS_R14];
  1808. regs->r15 = vcpu->regs[VCPU_REGS_R15];
  1809. #endif
  1810. regs->rip = vcpu->rip;
  1811. regs->rflags = kvm_x86_ops->get_rflags(vcpu);
  1812. /*
  1813. * Don't leak debug flags in case they were set for guest debugging
  1814. */
  1815. if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
  1816. regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
  1817. vcpu_put(vcpu);
  1818. return 0;
  1819. }
  1820. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  1821. {
  1822. vcpu_load(vcpu);
  1823. vcpu->regs[VCPU_REGS_RAX] = regs->rax;
  1824. vcpu->regs[VCPU_REGS_RBX] = regs->rbx;
  1825. vcpu->regs[VCPU_REGS_RCX] = regs->rcx;
  1826. vcpu->regs[VCPU_REGS_RDX] = regs->rdx;
  1827. vcpu->regs[VCPU_REGS_RSI] = regs->rsi;
  1828. vcpu->regs[VCPU_REGS_RDI] = regs->rdi;
  1829. vcpu->regs[VCPU_REGS_RSP] = regs->rsp;
  1830. vcpu->regs[VCPU_REGS_RBP] = regs->rbp;
  1831. #ifdef CONFIG_X86_64
  1832. vcpu->regs[VCPU_REGS_R8] = regs->r8;
  1833. vcpu->regs[VCPU_REGS_R9] = regs->r9;
  1834. vcpu->regs[VCPU_REGS_R10] = regs->r10;
  1835. vcpu->regs[VCPU_REGS_R11] = regs->r11;
  1836. vcpu->regs[VCPU_REGS_R12] = regs->r12;
  1837. vcpu->regs[VCPU_REGS_R13] = regs->r13;
  1838. vcpu->regs[VCPU_REGS_R14] = regs->r14;
  1839. vcpu->regs[VCPU_REGS_R15] = regs->r15;
  1840. #endif
  1841. vcpu->rip = regs->rip;
  1842. kvm_x86_ops->set_rflags(vcpu, regs->rflags);
  1843. kvm_x86_ops->decache_regs(vcpu);
  1844. vcpu_put(vcpu);
  1845. return 0;
  1846. }
  1847. static void get_segment(struct kvm_vcpu *vcpu,
  1848. struct kvm_segment *var, int seg)
  1849. {
  1850. return kvm_x86_ops->get_segment(vcpu, var, seg);
  1851. }
  1852. void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
  1853. {
  1854. struct kvm_segment cs;
  1855. get_segment(vcpu, &cs, VCPU_SREG_CS);
  1856. *db = cs.db;
  1857. *l = cs.l;
  1858. }
  1859. EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
  1860. int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
  1861. struct kvm_sregs *sregs)
  1862. {
  1863. struct descriptor_table dt;
  1864. int pending_vec;
  1865. vcpu_load(vcpu);
  1866. get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  1867. get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  1868. get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  1869. get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  1870. get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  1871. get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  1872. get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  1873. get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  1874. kvm_x86_ops->get_idt(vcpu, &dt);
  1875. sregs->idt.limit = dt.limit;
  1876. sregs->idt.base = dt.base;
  1877. kvm_x86_ops->get_gdt(vcpu, &dt);
  1878. sregs->gdt.limit = dt.limit;
  1879. sregs->gdt.base = dt.base;
  1880. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  1881. sregs->cr0 = vcpu->cr0;
  1882. sregs->cr2 = vcpu->cr2;
  1883. sregs->cr3 = vcpu->cr3;
  1884. sregs->cr4 = vcpu->cr4;
  1885. sregs->cr8 = get_cr8(vcpu);
  1886. sregs->efer = vcpu->shadow_efer;
  1887. sregs->apic_base = kvm_get_apic_base(vcpu);
  1888. if (irqchip_in_kernel(vcpu->kvm)) {
  1889. memset(sregs->interrupt_bitmap, 0,
  1890. sizeof sregs->interrupt_bitmap);
  1891. pending_vec = kvm_x86_ops->get_irq(vcpu);
  1892. if (pending_vec >= 0)
  1893. set_bit(pending_vec,
  1894. (unsigned long *)sregs->interrupt_bitmap);
  1895. } else
  1896. memcpy(sregs->interrupt_bitmap, vcpu->irq_pending,
  1897. sizeof sregs->interrupt_bitmap);
  1898. vcpu_put(vcpu);
  1899. return 0;
  1900. }
  1901. static void set_segment(struct kvm_vcpu *vcpu,
  1902. struct kvm_segment *var, int seg)
  1903. {
  1904. return kvm_x86_ops->set_segment(vcpu, var, seg);
  1905. }
  1906. int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
  1907. struct kvm_sregs *sregs)
  1908. {
  1909. int mmu_reset_needed = 0;
  1910. int i, pending_vec, max_bits;
  1911. struct descriptor_table dt;
  1912. vcpu_load(vcpu);
  1913. dt.limit = sregs->idt.limit;
  1914. dt.base = sregs->idt.base;
  1915. kvm_x86_ops->set_idt(vcpu, &dt);
  1916. dt.limit = sregs->gdt.limit;
  1917. dt.base = sregs->gdt.base;
  1918. kvm_x86_ops->set_gdt(vcpu, &dt);
  1919. vcpu->cr2 = sregs->cr2;
  1920. mmu_reset_needed |= vcpu->cr3 != sregs->cr3;
  1921. vcpu->cr3 = sregs->cr3;
  1922. set_cr8(vcpu, sregs->cr8);
  1923. mmu_reset_needed |= vcpu->shadow_efer != sregs->efer;
  1924. #ifdef CONFIG_X86_64
  1925. kvm_x86_ops->set_efer(vcpu, sregs->efer);
  1926. #endif
  1927. kvm_set_apic_base(vcpu, sregs->apic_base);
  1928. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  1929. mmu_reset_needed |= vcpu->cr0 != sregs->cr0;
  1930. vcpu->cr0 = sregs->cr0;
  1931. kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
  1932. mmu_reset_needed |= vcpu->cr4 != sregs->cr4;
  1933. kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
  1934. if (!is_long_mode(vcpu) && is_pae(vcpu))
  1935. load_pdptrs(vcpu, vcpu->cr3);
  1936. if (mmu_reset_needed)
  1937. kvm_mmu_reset_context(vcpu);
  1938. if (!irqchip_in_kernel(vcpu->kvm)) {
  1939. memcpy(vcpu->irq_pending, sregs->interrupt_bitmap,
  1940. sizeof vcpu->irq_pending);
  1941. vcpu->irq_summary = 0;
  1942. for (i = 0; i < ARRAY_SIZE(vcpu->irq_pending); ++i)
  1943. if (vcpu->irq_pending[i])
  1944. __set_bit(i, &vcpu->irq_summary);
  1945. } else {
  1946. max_bits = (sizeof sregs->interrupt_bitmap) << 3;
  1947. pending_vec = find_first_bit(
  1948. (const unsigned long *)sregs->interrupt_bitmap,
  1949. max_bits);
  1950. /* Only pending external irq is handled here */
  1951. if (pending_vec < max_bits) {
  1952. kvm_x86_ops->set_irq(vcpu, pending_vec);
  1953. pr_debug("Set back pending irq %d\n",
  1954. pending_vec);
  1955. }
  1956. }
  1957. set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  1958. set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  1959. set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  1960. set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  1961. set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  1962. set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  1963. set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  1964. set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  1965. vcpu_put(vcpu);
  1966. return 0;
  1967. }
  1968. int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
  1969. struct kvm_debug_guest *dbg)
  1970. {
  1971. int r;
  1972. vcpu_load(vcpu);
  1973. r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
  1974. vcpu_put(vcpu);
  1975. return r;
  1976. }
  1977. /*
  1978. * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
  1979. * we have asm/x86/processor.h
  1980. */
  1981. struct fxsave {
  1982. u16 cwd;
  1983. u16 swd;
  1984. u16 twd;
  1985. u16 fop;
  1986. u64 rip;
  1987. u64 rdp;
  1988. u32 mxcsr;
  1989. u32 mxcsr_mask;
  1990. u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
  1991. #ifdef CONFIG_X86_64
  1992. u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
  1993. #else
  1994. u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
  1995. #endif
  1996. };
  1997. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  1998. {
  1999. struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
  2000. vcpu_load(vcpu);
  2001. memcpy(fpu->fpr, fxsave->st_space, 128);
  2002. fpu->fcw = fxsave->cwd;
  2003. fpu->fsw = fxsave->swd;
  2004. fpu->ftwx = fxsave->twd;
  2005. fpu->last_opcode = fxsave->fop;
  2006. fpu->last_ip = fxsave->rip;
  2007. fpu->last_dp = fxsave->rdp;
  2008. memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
  2009. vcpu_put(vcpu);
  2010. return 0;
  2011. }
  2012. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  2013. {
  2014. struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
  2015. vcpu_load(vcpu);
  2016. memcpy(fxsave->st_space, fpu->fpr, 128);
  2017. fxsave->cwd = fpu->fcw;
  2018. fxsave->swd = fpu->fsw;
  2019. fxsave->twd = fpu->ftwx;
  2020. fxsave->fop = fpu->last_opcode;
  2021. fxsave->rip = fpu->last_ip;
  2022. fxsave->rdp = fpu->last_dp;
  2023. memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
  2024. vcpu_put(vcpu);
  2025. return 0;
  2026. }
  2027. void fx_init(struct kvm_vcpu *vcpu)
  2028. {
  2029. unsigned after_mxcsr_mask;
  2030. /* Initialize guest FPU by resetting ours and saving into guest's */
  2031. preempt_disable();
  2032. fx_save(&vcpu->host_fx_image);
  2033. fpu_init();
  2034. fx_save(&vcpu->guest_fx_image);
  2035. fx_restore(&vcpu->host_fx_image);
  2036. preempt_enable();
  2037. vcpu->cr0 |= X86_CR0_ET;
  2038. after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
  2039. vcpu->guest_fx_image.mxcsr = 0x1f80;
  2040. memset((void *)&vcpu->guest_fx_image + after_mxcsr_mask,
  2041. 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
  2042. }
  2043. EXPORT_SYMBOL_GPL(fx_init);
  2044. void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
  2045. {
  2046. if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
  2047. return;
  2048. vcpu->guest_fpu_loaded = 1;
  2049. fx_save(&vcpu->host_fx_image);
  2050. fx_restore(&vcpu->guest_fx_image);
  2051. }
  2052. EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
  2053. void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
  2054. {
  2055. if (!vcpu->guest_fpu_loaded)
  2056. return;
  2057. vcpu->guest_fpu_loaded = 0;
  2058. fx_save(&vcpu->guest_fx_image);
  2059. fx_restore(&vcpu->host_fx_image);
  2060. }
  2061. EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
  2062. void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
  2063. {
  2064. kvm_x86_ops->vcpu_free(vcpu);
  2065. }
  2066. struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
  2067. unsigned int id)
  2068. {
  2069. int r;
  2070. struct kvm_vcpu *vcpu = kvm_x86_ops->vcpu_create(kvm, id);
  2071. if (IS_ERR(vcpu)) {
  2072. r = -ENOMEM;
  2073. goto fail;
  2074. }
  2075. /* We do fxsave: this must be aligned. */
  2076. BUG_ON((unsigned long)&vcpu->host_fx_image & 0xF);
  2077. vcpu_load(vcpu);
  2078. r = kvm_arch_vcpu_reset(vcpu);
  2079. if (r == 0)
  2080. r = kvm_mmu_setup(vcpu);
  2081. vcpu_put(vcpu);
  2082. if (r < 0)
  2083. goto free_vcpu;
  2084. return vcpu;
  2085. free_vcpu:
  2086. kvm_x86_ops->vcpu_free(vcpu);
  2087. fail:
  2088. return ERR_PTR(r);
  2089. }
  2090. void kvm_arch_vcpu_destory(struct kvm_vcpu *vcpu)
  2091. {
  2092. vcpu_load(vcpu);
  2093. kvm_mmu_unload(vcpu);
  2094. vcpu_put(vcpu);
  2095. kvm_x86_ops->vcpu_free(vcpu);
  2096. }
  2097. int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
  2098. {
  2099. return kvm_x86_ops->vcpu_reset(vcpu);
  2100. }
  2101. void kvm_arch_hardware_enable(void *garbage)
  2102. {
  2103. kvm_x86_ops->hardware_enable(garbage);
  2104. }
  2105. void kvm_arch_hardware_disable(void *garbage)
  2106. {
  2107. kvm_x86_ops->hardware_disable(garbage);
  2108. }
  2109. int kvm_arch_hardware_setup(void)
  2110. {
  2111. return kvm_x86_ops->hardware_setup();
  2112. }
  2113. void kvm_arch_hardware_unsetup(void)
  2114. {
  2115. kvm_x86_ops->hardware_unsetup();
  2116. }
  2117. void kvm_arch_check_processor_compat(void *rtn)
  2118. {
  2119. kvm_x86_ops->check_processor_compatibility(rtn);
  2120. }
  2121. int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
  2122. {
  2123. struct page *page;
  2124. struct kvm *kvm;
  2125. int r;
  2126. BUG_ON(vcpu->kvm == NULL);
  2127. kvm = vcpu->kvm;
  2128. vcpu->mmu.root_hpa = INVALID_PAGE;
  2129. if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
  2130. vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
  2131. else
  2132. vcpu->mp_state = VCPU_MP_STATE_UNINITIALIZED;
  2133. page = alloc_page(GFP_KERNEL | __GFP_ZERO);
  2134. if (!page) {
  2135. r = -ENOMEM;
  2136. goto fail;
  2137. }
  2138. vcpu->pio_data = page_address(page);
  2139. r = kvm_mmu_create(vcpu);
  2140. if (r < 0)
  2141. goto fail_free_pio_data;
  2142. if (irqchip_in_kernel(kvm)) {
  2143. r = kvm_create_lapic(vcpu);
  2144. if (r < 0)
  2145. goto fail_mmu_destroy;
  2146. }
  2147. return 0;
  2148. fail_mmu_destroy:
  2149. kvm_mmu_destroy(vcpu);
  2150. fail_free_pio_data:
  2151. free_page((unsigned long)vcpu->pio_data);
  2152. fail:
  2153. return r;
  2154. }
  2155. void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
  2156. {
  2157. kvm_free_lapic(vcpu);
  2158. kvm_mmu_destroy(vcpu);
  2159. free_page((unsigned long)vcpu->pio_data);
  2160. }