omap_hwmod.c 59 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2010 Nokia Corporation
  5. *
  6. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  7. *
  8. * Created in collaboration with (alphabetical order): Thara Gopinath,
  9. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  10. * Sawant, Santosh Shilimkar, Richard Woodruff
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * Introduction
  17. * ------------
  18. * One way to view an OMAP SoC is as a collection of largely unrelated
  19. * IP blocks connected by interconnects. The IP blocks include
  20. * devices such as ARM processors, audio serial interfaces, UARTs,
  21. * etc. Some of these devices, like the DSP, are created by TI;
  22. * others, like the SGX, largely originate from external vendors. In
  23. * TI's documentation, on-chip devices are referred to as "OMAP
  24. * modules." Some of these IP blocks are identical across several
  25. * OMAP versions. Others are revised frequently.
  26. *
  27. * These OMAP modules are tied together by various interconnects.
  28. * Most of the address and data flow between modules is via OCP-based
  29. * interconnects such as the L3 and L4 buses; but there are other
  30. * interconnects that distribute the hardware clock tree, handle idle
  31. * and reset signaling, supply power, and connect the modules to
  32. * various pads or balls on the OMAP package.
  33. *
  34. * OMAP hwmod provides a consistent way to describe the on-chip
  35. * hardware blocks and their integration into the rest of the chip.
  36. * This description can be automatically generated from the TI
  37. * hardware database. OMAP hwmod provides a standard, consistent API
  38. * to reset, enable, idle, and disable these hardware blocks. And
  39. * hwmod provides a way for other core code, such as the Linux device
  40. * code or the OMAP power management and address space mapping code,
  41. * to query the hardware database.
  42. *
  43. * Using hwmod
  44. * -----------
  45. * Drivers won't call hwmod functions directly. That is done by the
  46. * omap_device code, and in rare occasions, by custom integration code
  47. * in arch/arm/ *omap*. The omap_device code includes functions to
  48. * build a struct platform_device using omap_hwmod data, and that is
  49. * currently how hwmod data is communicated to drivers and to the
  50. * Linux driver model. Most drivers will call omap_hwmod functions only
  51. * indirectly, via pm_runtime*() functions.
  52. *
  53. * From a layering perspective, here is where the OMAP hwmod code
  54. * fits into the kernel software stack:
  55. *
  56. * +-------------------------------+
  57. * | Device driver code |
  58. * | (e.g., drivers/) |
  59. * +-------------------------------+
  60. * | Linux driver model |
  61. * | (platform_device / |
  62. * | platform_driver data/code) |
  63. * +-------------------------------+
  64. * | OMAP core-driver integration |
  65. * |(arch/arm/mach-omap2/devices.c)|
  66. * +-------------------------------+
  67. * | omap_device code |
  68. * | (../plat-omap/omap_device.c) |
  69. * +-------------------------------+
  70. * ----> | omap_hwmod code/data | <-----
  71. * | (../mach-omap2/omap_hwmod*) |
  72. * +-------------------------------+
  73. * | OMAP clock/PRCM/register fns |
  74. * | (__raw_{read,write}l, clk*) |
  75. * +-------------------------------+
  76. *
  77. * Device drivers should not contain any OMAP-specific code or data in
  78. * them. They should only contain code to operate the IP block that
  79. * the driver is responsible for. This is because these IP blocks can
  80. * also appear in other SoCs, either from TI (such as DaVinci) or from
  81. * other manufacturers; and drivers should be reusable across other
  82. * platforms.
  83. *
  84. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  85. * devices upon boot. The goal here is for the kernel to be
  86. * completely self-reliant and independent from bootloaders. This is
  87. * to ensure a repeatable configuration, both to ensure consistent
  88. * runtime behavior, and to make it easier for others to reproduce
  89. * bugs.
  90. *
  91. * OMAP module activity states
  92. * ---------------------------
  93. * The hwmod code considers modules to be in one of several activity
  94. * states. IP blocks start out in an UNKNOWN state, then once they
  95. * are registered via the hwmod code, proceed to the REGISTERED state.
  96. * Once their clock names are resolved to clock pointers, the module
  97. * enters the CLKS_INITED state; and finally, once the module has been
  98. * reset and the integration registers programmed, the INITIALIZED state
  99. * is entered. The hwmod code will then place the module into either
  100. * the IDLE state to save power, or in the case of a critical system
  101. * module, the ENABLED state.
  102. *
  103. * OMAP core integration code can then call omap_hwmod*() functions
  104. * directly to move the module between the IDLE, ENABLED, and DISABLED
  105. * states, as needed. This is done during both the PM idle loop, and
  106. * in the OMAP core integration code's implementation of the PM runtime
  107. * functions.
  108. *
  109. * References
  110. * ----------
  111. * This is a partial list.
  112. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  113. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  114. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  115. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  116. * - Open Core Protocol Specification 2.2
  117. *
  118. * To do:
  119. * - pin mux handling
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <plat/common.h>
  139. #include <plat/cpu.h>
  140. #include "clockdomain.h"
  141. #include "powerdomain.h"
  142. #include <plat/clock.h>
  143. #include <plat/omap_hwmod.h>
  144. #include <plat/prcm.h>
  145. #include "cm2xxx_3xxx.h"
  146. #include "cm44xx.h"
  147. #include "prm2xxx_3xxx.h"
  148. #include "prm44xx.h"
  149. /* Maximum microseconds to wait for OMAP module to softreset */
  150. #define MAX_MODULE_SOFTRESET_WAIT 10000
  151. /* Name of the OMAP hwmod for the MPU */
  152. #define MPU_INITIATOR_NAME "mpu"
  153. /* omap_hwmod_list contains all registered struct omap_hwmods */
  154. static LIST_HEAD(omap_hwmod_list);
  155. static DEFINE_MUTEX(omap_hwmod_mutex);
  156. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  157. static struct omap_hwmod *mpu_oh;
  158. /* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
  159. static u8 inited;
  160. /* Private functions */
  161. /**
  162. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  163. * @oh: struct omap_hwmod *
  164. *
  165. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  166. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  167. * OCP_SYSCONFIG register or 0 upon success.
  168. */
  169. static int _update_sysc_cache(struct omap_hwmod *oh)
  170. {
  171. if (!oh->class->sysc) {
  172. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  173. return -EINVAL;
  174. }
  175. /* XXX ensure module interface clock is up */
  176. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  177. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  178. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  179. return 0;
  180. }
  181. /**
  182. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  183. * @v: OCP_SYSCONFIG value to write
  184. * @oh: struct omap_hwmod *
  185. *
  186. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  187. * one. No return value.
  188. */
  189. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  190. {
  191. if (!oh->class->sysc) {
  192. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  193. return;
  194. }
  195. /* XXX ensure module interface clock is up */
  196. /* Module might have lost context, always update cache and register */
  197. oh->_sysc_cache = v;
  198. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  199. }
  200. /**
  201. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  202. * @oh: struct omap_hwmod *
  203. * @standbymode: MIDLEMODE field bits
  204. * @v: pointer to register contents to modify
  205. *
  206. * Update the master standby mode bits in @v to be @standbymode for
  207. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  208. * upon error or 0 upon success.
  209. */
  210. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  211. u32 *v)
  212. {
  213. u32 mstandby_mask;
  214. u8 mstandby_shift;
  215. if (!oh->class->sysc ||
  216. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  217. return -EINVAL;
  218. if (!oh->class->sysc->sysc_fields) {
  219. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  220. return -EINVAL;
  221. }
  222. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  223. mstandby_mask = (0x3 << mstandby_shift);
  224. *v &= ~mstandby_mask;
  225. *v |= __ffs(standbymode) << mstandby_shift;
  226. return 0;
  227. }
  228. /**
  229. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  230. * @oh: struct omap_hwmod *
  231. * @idlemode: SIDLEMODE field bits
  232. * @v: pointer to register contents to modify
  233. *
  234. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  235. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  236. * or 0 upon success.
  237. */
  238. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  239. {
  240. u32 sidle_mask;
  241. u8 sidle_shift;
  242. if (!oh->class->sysc ||
  243. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  244. return -EINVAL;
  245. if (!oh->class->sysc->sysc_fields) {
  246. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  247. return -EINVAL;
  248. }
  249. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  250. sidle_mask = (0x3 << sidle_shift);
  251. *v &= ~sidle_mask;
  252. *v |= __ffs(idlemode) << sidle_shift;
  253. return 0;
  254. }
  255. /**
  256. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  257. * @oh: struct omap_hwmod *
  258. * @clockact: CLOCKACTIVITY field bits
  259. * @v: pointer to register contents to modify
  260. *
  261. * Update the clockactivity mode bits in @v to be @clockact for the
  262. * @oh hwmod. Used for additional powersaving on some modules. Does
  263. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  264. * success.
  265. */
  266. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  267. {
  268. u32 clkact_mask;
  269. u8 clkact_shift;
  270. if (!oh->class->sysc ||
  271. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  272. return -EINVAL;
  273. if (!oh->class->sysc->sysc_fields) {
  274. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  275. return -EINVAL;
  276. }
  277. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  278. clkact_mask = (0x3 << clkact_shift);
  279. *v &= ~clkact_mask;
  280. *v |= clockact << clkact_shift;
  281. return 0;
  282. }
  283. /**
  284. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  285. * @oh: struct omap_hwmod *
  286. * @v: pointer to register contents to modify
  287. *
  288. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  289. * error or 0 upon success.
  290. */
  291. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  292. {
  293. u32 softrst_mask;
  294. if (!oh->class->sysc ||
  295. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  296. return -EINVAL;
  297. if (!oh->class->sysc->sysc_fields) {
  298. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  299. return -EINVAL;
  300. }
  301. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  302. *v |= softrst_mask;
  303. return 0;
  304. }
  305. /**
  306. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  307. * @oh: struct omap_hwmod *
  308. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  309. * @v: pointer to register contents to modify
  310. *
  311. * Update the module autoidle bit in @v to be @autoidle for the @oh
  312. * hwmod. The autoidle bit controls whether the module can gate
  313. * internal clocks automatically when it isn't doing anything; the
  314. * exact function of this bit varies on a per-module basis. This
  315. * function does not write to the hardware. Returns -EINVAL upon
  316. * error or 0 upon success.
  317. */
  318. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  319. u32 *v)
  320. {
  321. u32 autoidle_mask;
  322. u8 autoidle_shift;
  323. if (!oh->class->sysc ||
  324. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  325. return -EINVAL;
  326. if (!oh->class->sysc->sysc_fields) {
  327. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  328. return -EINVAL;
  329. }
  330. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  331. autoidle_mask = (0x3 << autoidle_shift);
  332. *v &= ~autoidle_mask;
  333. *v |= autoidle << autoidle_shift;
  334. return 0;
  335. }
  336. /**
  337. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  338. * @oh: struct omap_hwmod *
  339. *
  340. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  341. * upon error or 0 upon success.
  342. */
  343. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  344. {
  345. u32 wakeup_mask;
  346. if (!oh->class->sysc ||
  347. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  348. return -EINVAL;
  349. if (!oh->class->sysc->sysc_fields) {
  350. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  351. return -EINVAL;
  352. }
  353. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  354. *v |= wakeup_mask;
  355. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  356. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  357. return 0;
  358. }
  359. /**
  360. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  361. * @oh: struct omap_hwmod *
  362. *
  363. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  364. * upon error or 0 upon success.
  365. */
  366. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  367. {
  368. u32 wakeup_mask;
  369. if (!oh->class->sysc ||
  370. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  371. return -EINVAL;
  372. if (!oh->class->sysc->sysc_fields) {
  373. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  374. return -EINVAL;
  375. }
  376. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  377. *v &= ~wakeup_mask;
  378. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  379. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  380. return 0;
  381. }
  382. /**
  383. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  384. * @oh: struct omap_hwmod *
  385. *
  386. * Prevent the hardware module @oh from entering idle while the
  387. * hardare module initiator @init_oh is active. Useful when a module
  388. * will be accessed by a particular initiator (e.g., if a module will
  389. * be accessed by the IVA, there should be a sleepdep between the IVA
  390. * initiator and the module). Only applies to modules in smart-idle
  391. * mode. Returns -EINVAL upon error or passes along
  392. * clkdm_add_sleepdep() value upon success.
  393. */
  394. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  395. {
  396. if (!oh->_clk)
  397. return -EINVAL;
  398. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  399. }
  400. /**
  401. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  402. * @oh: struct omap_hwmod *
  403. *
  404. * Allow the hardware module @oh to enter idle while the hardare
  405. * module initiator @init_oh is active. Useful when a module will not
  406. * be accessed by a particular initiator (e.g., if a module will not
  407. * be accessed by the IVA, there should be no sleepdep between the IVA
  408. * initiator and the module). Only applies to modules in smart-idle
  409. * mode. Returns -EINVAL upon error or passes along
  410. * clkdm_del_sleepdep() value upon success.
  411. */
  412. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  413. {
  414. if (!oh->_clk)
  415. return -EINVAL;
  416. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  417. }
  418. /**
  419. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  420. * @oh: struct omap_hwmod *
  421. *
  422. * Called from _init_clocks(). Populates the @oh _clk (main
  423. * functional clock pointer) if a main_clk is present. Returns 0 on
  424. * success or -EINVAL on error.
  425. */
  426. static int _init_main_clk(struct omap_hwmod *oh)
  427. {
  428. int ret = 0;
  429. if (!oh->main_clk)
  430. return 0;
  431. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  432. if (!oh->_clk) {
  433. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  434. oh->name, oh->main_clk);
  435. return -EINVAL;
  436. }
  437. if (!oh->_clk->clkdm)
  438. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  439. oh->main_clk, oh->_clk->name);
  440. return ret;
  441. }
  442. /**
  443. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  444. * @oh: struct omap_hwmod *
  445. *
  446. * Called from _init_clocks(). Populates the @oh OCP slave interface
  447. * clock pointers. Returns 0 on success or -EINVAL on error.
  448. */
  449. static int _init_interface_clks(struct omap_hwmod *oh)
  450. {
  451. struct clk *c;
  452. int i;
  453. int ret = 0;
  454. if (oh->slaves_cnt == 0)
  455. return 0;
  456. for (i = 0; i < oh->slaves_cnt; i++) {
  457. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  458. if (!os->clk)
  459. continue;
  460. c = omap_clk_get_by_name(os->clk);
  461. if (!c) {
  462. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  463. oh->name, os->clk);
  464. ret = -EINVAL;
  465. }
  466. os->_clk = c;
  467. }
  468. return ret;
  469. }
  470. /**
  471. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  472. * @oh: struct omap_hwmod *
  473. *
  474. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  475. * clock pointers. Returns 0 on success or -EINVAL on error.
  476. */
  477. static int _init_opt_clks(struct omap_hwmod *oh)
  478. {
  479. struct omap_hwmod_opt_clk *oc;
  480. struct clk *c;
  481. int i;
  482. int ret = 0;
  483. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  484. c = omap_clk_get_by_name(oc->clk);
  485. if (!c) {
  486. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  487. oh->name, oc->clk);
  488. ret = -EINVAL;
  489. }
  490. oc->_clk = c;
  491. }
  492. return ret;
  493. }
  494. /**
  495. * _enable_clocks - enable hwmod main clock and interface clocks
  496. * @oh: struct omap_hwmod *
  497. *
  498. * Enables all clocks necessary for register reads and writes to succeed
  499. * on the hwmod @oh. Returns 0.
  500. */
  501. static int _enable_clocks(struct omap_hwmod *oh)
  502. {
  503. int i;
  504. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  505. if (oh->_clk)
  506. clk_enable(oh->_clk);
  507. if (oh->slaves_cnt > 0) {
  508. for (i = 0; i < oh->slaves_cnt; i++) {
  509. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  510. struct clk *c = os->_clk;
  511. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  512. clk_enable(c);
  513. }
  514. }
  515. /* The opt clocks are controlled by the device driver. */
  516. return 0;
  517. }
  518. /**
  519. * _disable_clocks - disable hwmod main clock and interface clocks
  520. * @oh: struct omap_hwmod *
  521. *
  522. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  523. */
  524. static int _disable_clocks(struct omap_hwmod *oh)
  525. {
  526. int i;
  527. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  528. if (oh->_clk)
  529. clk_disable(oh->_clk);
  530. if (oh->slaves_cnt > 0) {
  531. for (i = 0; i < oh->slaves_cnt; i++) {
  532. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  533. struct clk *c = os->_clk;
  534. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  535. clk_disable(c);
  536. }
  537. }
  538. /* The opt clocks are controlled by the device driver. */
  539. return 0;
  540. }
  541. static void _enable_optional_clocks(struct omap_hwmod *oh)
  542. {
  543. struct omap_hwmod_opt_clk *oc;
  544. int i;
  545. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  546. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  547. if (oc->_clk) {
  548. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  549. oc->_clk->name);
  550. clk_enable(oc->_clk);
  551. }
  552. }
  553. static void _disable_optional_clocks(struct omap_hwmod *oh)
  554. {
  555. struct omap_hwmod_opt_clk *oc;
  556. int i;
  557. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  558. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  559. if (oc->_clk) {
  560. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  561. oc->_clk->name);
  562. clk_disable(oc->_clk);
  563. }
  564. }
  565. /**
  566. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  567. * @oh: struct omap_hwmod *
  568. *
  569. * Returns the array index of the OCP slave port that the MPU
  570. * addresses the device on, or -EINVAL upon error or not found.
  571. */
  572. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  573. {
  574. int i;
  575. int found = 0;
  576. if (!oh || oh->slaves_cnt == 0)
  577. return -EINVAL;
  578. for (i = 0; i < oh->slaves_cnt; i++) {
  579. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  580. if (os->user & OCP_USER_MPU) {
  581. found = 1;
  582. break;
  583. }
  584. }
  585. if (found)
  586. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  587. oh->name, i);
  588. else
  589. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  590. oh->name);
  591. return (found) ? i : -EINVAL;
  592. }
  593. /**
  594. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  595. * @oh: struct omap_hwmod *
  596. *
  597. * Return the virtual address of the base of the register target of
  598. * device @oh, or NULL on error.
  599. */
  600. static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  601. {
  602. struct omap_hwmod_ocp_if *os;
  603. struct omap_hwmod_addr_space *mem;
  604. int i;
  605. int found = 0;
  606. void __iomem *va_start;
  607. if (!oh || oh->slaves_cnt == 0)
  608. return NULL;
  609. os = oh->slaves[index];
  610. for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
  611. if (mem->flags & ADDR_TYPE_RT) {
  612. found = 1;
  613. break;
  614. }
  615. }
  616. if (found) {
  617. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  618. if (!va_start) {
  619. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  620. return NULL;
  621. }
  622. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  623. oh->name, va_start);
  624. } else {
  625. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  626. oh->name);
  627. }
  628. return (found) ? va_start : NULL;
  629. }
  630. /**
  631. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  632. * @oh: struct omap_hwmod *
  633. *
  634. * If module is marked as SWSUP_SIDLE, force the module out of slave
  635. * idle; otherwise, configure it for smart-idle. If module is marked
  636. * as SWSUP_MSUSPEND, force the module out of master standby;
  637. * otherwise, configure it for smart-standby. No return value.
  638. */
  639. static void _enable_sysc(struct omap_hwmod *oh)
  640. {
  641. u8 idlemode, sf;
  642. u32 v;
  643. if (!oh->class->sysc)
  644. return;
  645. v = oh->_sysc_cache;
  646. sf = oh->class->sysc->sysc_flags;
  647. if (sf & SYSC_HAS_SIDLEMODE) {
  648. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  649. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  650. _set_slave_idlemode(oh, idlemode, &v);
  651. }
  652. if (sf & SYSC_HAS_MIDLEMODE) {
  653. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  654. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  655. _set_master_standbymode(oh, idlemode, &v);
  656. }
  657. /*
  658. * XXX The clock framework should handle this, by
  659. * calling into this code. But this must wait until the
  660. * clock structures are tagged with omap_hwmod entries
  661. */
  662. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  663. (sf & SYSC_HAS_CLOCKACTIVITY))
  664. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  665. /* If slave is in SMARTIDLE, also enable wakeup */
  666. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  667. _enable_wakeup(oh, &v);
  668. _write_sysconfig(v, oh);
  669. /*
  670. * Set the autoidle bit only after setting the smartidle bit
  671. * Setting this will not have any impact on the other modules.
  672. */
  673. if (sf & SYSC_HAS_AUTOIDLE) {
  674. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  675. 0 : 1;
  676. _set_module_autoidle(oh, idlemode, &v);
  677. _write_sysconfig(v, oh);
  678. }
  679. }
  680. /**
  681. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  682. * @oh: struct omap_hwmod *
  683. *
  684. * If module is marked as SWSUP_SIDLE, force the module into slave
  685. * idle; otherwise, configure it for smart-idle. If module is marked
  686. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  687. * configure it for smart-standby. No return value.
  688. */
  689. static void _idle_sysc(struct omap_hwmod *oh)
  690. {
  691. u8 idlemode, sf;
  692. u32 v;
  693. if (!oh->class->sysc)
  694. return;
  695. v = oh->_sysc_cache;
  696. sf = oh->class->sysc->sysc_flags;
  697. if (sf & SYSC_HAS_SIDLEMODE) {
  698. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  699. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  700. _set_slave_idlemode(oh, idlemode, &v);
  701. }
  702. if (sf & SYSC_HAS_MIDLEMODE) {
  703. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  704. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  705. _set_master_standbymode(oh, idlemode, &v);
  706. }
  707. _write_sysconfig(v, oh);
  708. }
  709. /**
  710. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  711. * @oh: struct omap_hwmod *
  712. *
  713. * Force the module into slave idle and master suspend. No return
  714. * value.
  715. */
  716. static void _shutdown_sysc(struct omap_hwmod *oh)
  717. {
  718. u32 v;
  719. u8 sf;
  720. if (!oh->class->sysc)
  721. return;
  722. v = oh->_sysc_cache;
  723. sf = oh->class->sysc->sysc_flags;
  724. if (sf & SYSC_HAS_SIDLEMODE)
  725. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  726. if (sf & SYSC_HAS_MIDLEMODE)
  727. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  728. if (sf & SYSC_HAS_AUTOIDLE)
  729. _set_module_autoidle(oh, 1, &v);
  730. _write_sysconfig(v, oh);
  731. }
  732. /**
  733. * _lookup - find an omap_hwmod by name
  734. * @name: find an omap_hwmod by name
  735. *
  736. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  737. * Caller must hold omap_hwmod_mutex.
  738. */
  739. static struct omap_hwmod *_lookup(const char *name)
  740. {
  741. struct omap_hwmod *oh, *temp_oh;
  742. oh = NULL;
  743. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  744. if (!strcmp(name, temp_oh->name)) {
  745. oh = temp_oh;
  746. break;
  747. }
  748. }
  749. return oh;
  750. }
  751. /**
  752. * _init_clocks - clk_get() all clocks associated with this hwmod
  753. * @oh: struct omap_hwmod *
  754. * @data: not used; pass NULL
  755. *
  756. * Called by omap_hwmod_late_init() (after omap2_clk_init()).
  757. * Resolves all clock names embedded in the hwmod. Returns -EINVAL if
  758. * the omap_hwmod has not yet been registered or if the clocks have
  759. * already been initialized, 0 on success, or a non-zero error on
  760. * failure.
  761. */
  762. static int _init_clocks(struct omap_hwmod *oh, void *data)
  763. {
  764. int ret = 0;
  765. if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
  766. return -EINVAL;
  767. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  768. ret |= _init_main_clk(oh);
  769. ret |= _init_interface_clks(oh);
  770. ret |= _init_opt_clks(oh);
  771. if (!ret)
  772. oh->_state = _HWMOD_STATE_CLKS_INITED;
  773. return 0;
  774. }
  775. /**
  776. * _wait_target_ready - wait for a module to leave slave idle
  777. * @oh: struct omap_hwmod *
  778. *
  779. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  780. * does not have an IDLEST bit or if the module successfully leaves
  781. * slave idle; otherwise, pass along the return value of the
  782. * appropriate *_cm_wait_module_ready() function.
  783. */
  784. static int _wait_target_ready(struct omap_hwmod *oh)
  785. {
  786. struct omap_hwmod_ocp_if *os;
  787. int ret;
  788. if (!oh)
  789. return -EINVAL;
  790. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  791. return 0;
  792. os = oh->slaves[oh->_mpu_port_index];
  793. if (oh->flags & HWMOD_NO_IDLEST)
  794. return 0;
  795. /* XXX check module SIDLEMODE */
  796. /* XXX check clock enable states */
  797. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  798. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  799. oh->prcm.omap2.idlest_reg_id,
  800. oh->prcm.omap2.idlest_idle_bit);
  801. } else if (cpu_is_omap44xx()) {
  802. ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
  803. } else {
  804. BUG();
  805. };
  806. return ret;
  807. }
  808. /**
  809. * _lookup_hardreset - return the register bit shift for this hwmod/reset line
  810. * @oh: struct omap_hwmod *
  811. * @name: name of the reset line in the context of this hwmod
  812. *
  813. * Return the bit position of the reset line that match the
  814. * input name. Return -ENOENT if not found.
  815. */
  816. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
  817. {
  818. int i;
  819. for (i = 0; i < oh->rst_lines_cnt; i++) {
  820. const char *rst_line = oh->rst_lines[i].name;
  821. if (!strcmp(rst_line, name)) {
  822. u8 shift = oh->rst_lines[i].rst_shift;
  823. pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
  824. oh->name, rst_line, shift);
  825. return shift;
  826. }
  827. }
  828. return -ENOENT;
  829. }
  830. /**
  831. * _assert_hardreset - assert the HW reset line of submodules
  832. * contained in the hwmod module.
  833. * @oh: struct omap_hwmod *
  834. * @name: name of the reset line to lookup and assert
  835. *
  836. * Some IP like dsp, ipu or iva contain processor that require
  837. * an HW reset line to be assert / deassert in order to enable fully
  838. * the IP.
  839. */
  840. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  841. {
  842. u8 shift;
  843. if (!oh)
  844. return -EINVAL;
  845. shift = _lookup_hardreset(oh, name);
  846. if (IS_ERR_VALUE(shift))
  847. return shift;
  848. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  849. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  850. shift);
  851. else if (cpu_is_omap44xx())
  852. return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
  853. shift);
  854. else
  855. return -EINVAL;
  856. }
  857. /**
  858. * _deassert_hardreset - deassert the HW reset line of submodules contained
  859. * in the hwmod module.
  860. * @oh: struct omap_hwmod *
  861. * @name: name of the reset line to look up and deassert
  862. *
  863. * Some IP like dsp, ipu or iva contain processor that require
  864. * an HW reset line to be assert / deassert in order to enable fully
  865. * the IP.
  866. */
  867. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  868. {
  869. u8 shift;
  870. int r;
  871. if (!oh)
  872. return -EINVAL;
  873. shift = _lookup_hardreset(oh, name);
  874. if (IS_ERR_VALUE(shift))
  875. return shift;
  876. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  877. r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  878. shift);
  879. else if (cpu_is_omap44xx())
  880. r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
  881. shift);
  882. else
  883. return -EINVAL;
  884. if (r == -EBUSY)
  885. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  886. return r;
  887. }
  888. /**
  889. * _read_hardreset - read the HW reset line state of submodules
  890. * contained in the hwmod module
  891. * @oh: struct omap_hwmod *
  892. * @name: name of the reset line to look up and read
  893. *
  894. * Return the state of the reset line.
  895. */
  896. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  897. {
  898. u8 shift;
  899. if (!oh)
  900. return -EINVAL;
  901. shift = _lookup_hardreset(oh, name);
  902. if (IS_ERR_VALUE(shift))
  903. return shift;
  904. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  905. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  906. shift);
  907. } else if (cpu_is_omap44xx()) {
  908. return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
  909. shift);
  910. } else {
  911. return -EINVAL;
  912. }
  913. }
  914. /**
  915. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  916. * @oh: struct omap_hwmod *
  917. *
  918. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  919. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  920. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  921. * the module did not reset in time, or 0 upon success.
  922. *
  923. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  924. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  925. * use the SYSCONFIG softreset bit to provide the status.
  926. *
  927. * Note that some IP like McBSP do have reset control but don't have
  928. * reset status.
  929. */
  930. static int _ocp_softreset(struct omap_hwmod *oh)
  931. {
  932. u32 v;
  933. int c = 0;
  934. int ret = 0;
  935. if (!oh->class->sysc ||
  936. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  937. return -EINVAL;
  938. /* clocks must be on for this operation */
  939. if (oh->_state != _HWMOD_STATE_ENABLED) {
  940. pr_warning("omap_hwmod: %s: reset can only be entered from "
  941. "enabled state\n", oh->name);
  942. return -EINVAL;
  943. }
  944. /* For some modules, all optionnal clocks need to be enabled as well */
  945. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  946. _enable_optional_clocks(oh);
  947. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  948. v = oh->_sysc_cache;
  949. ret = _set_softreset(oh, &v);
  950. if (ret)
  951. goto dis_opt_clks;
  952. _write_sysconfig(v, oh);
  953. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  954. omap_test_timeout((omap_hwmod_read(oh,
  955. oh->class->sysc->syss_offs)
  956. & SYSS_RESETDONE_MASK),
  957. MAX_MODULE_SOFTRESET_WAIT, c);
  958. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  959. omap_test_timeout(!(omap_hwmod_read(oh,
  960. oh->class->sysc->sysc_offs)
  961. & SYSC_TYPE2_SOFTRESET_MASK),
  962. MAX_MODULE_SOFTRESET_WAIT, c);
  963. if (c == MAX_MODULE_SOFTRESET_WAIT)
  964. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  965. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  966. else
  967. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  968. /*
  969. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  970. * _wait_target_ready() or _reset()
  971. */
  972. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  973. dis_opt_clks:
  974. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  975. _disable_optional_clocks(oh);
  976. return ret;
  977. }
  978. /**
  979. * _reset - reset an omap_hwmod
  980. * @oh: struct omap_hwmod *
  981. *
  982. * Resets an omap_hwmod @oh. The default software reset mechanism for
  983. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  984. * bit. However, some hwmods cannot be reset via this method: some
  985. * are not targets and therefore have no OCP header registers to
  986. * access; others (like the IVA) have idiosyncratic reset sequences.
  987. * So for these relatively rare cases, custom reset code can be
  988. * supplied in the struct omap_hwmod_class .reset function pointer.
  989. * Passes along the return value from either _reset() or the custom
  990. * reset function - these must return -EINVAL if the hwmod cannot be
  991. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  992. * the module did not reset in time, or 0 upon success.
  993. */
  994. static int _reset(struct omap_hwmod *oh)
  995. {
  996. int ret;
  997. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  998. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  999. return ret;
  1000. }
  1001. /**
  1002. * _enable - enable an omap_hwmod
  1003. * @oh: struct omap_hwmod *
  1004. *
  1005. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1006. * register target. Returns -EINVAL if the hwmod is in the wrong
  1007. * state or passes along the return value of _wait_target_ready().
  1008. */
  1009. static int _enable(struct omap_hwmod *oh)
  1010. {
  1011. int r;
  1012. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1013. oh->_state != _HWMOD_STATE_IDLE &&
  1014. oh->_state != _HWMOD_STATE_DISABLED) {
  1015. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  1016. "from initialized, idle, or disabled state\n", oh->name);
  1017. return -EINVAL;
  1018. }
  1019. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1020. /*
  1021. * If an IP contains only one HW reset line, then de-assert it in order
  1022. * to allow to enable the clocks. Otherwise the PRCM will return
  1023. * Intransition status, and the init will failed.
  1024. */
  1025. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1026. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1027. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1028. /* XXX mux balls */
  1029. _add_initiator_dep(oh, mpu_oh);
  1030. _enable_clocks(oh);
  1031. r = _wait_target_ready(oh);
  1032. if (!r) {
  1033. oh->_state = _HWMOD_STATE_ENABLED;
  1034. /* Access the sysconfig only if the target is ready */
  1035. if (oh->class->sysc) {
  1036. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1037. _update_sysc_cache(oh);
  1038. _enable_sysc(oh);
  1039. }
  1040. } else {
  1041. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1042. oh->name, r);
  1043. }
  1044. return r;
  1045. }
  1046. /**
  1047. * _idle - idle an omap_hwmod
  1048. * @oh: struct omap_hwmod *
  1049. *
  1050. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1051. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1052. * state or returns 0.
  1053. */
  1054. static int _idle(struct omap_hwmod *oh)
  1055. {
  1056. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1057. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1058. "enabled state\n", oh->name);
  1059. return -EINVAL;
  1060. }
  1061. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1062. if (oh->class->sysc)
  1063. _idle_sysc(oh);
  1064. _del_initiator_dep(oh, mpu_oh);
  1065. _disable_clocks(oh);
  1066. oh->_state = _HWMOD_STATE_IDLE;
  1067. return 0;
  1068. }
  1069. /**
  1070. * _shutdown - shutdown an omap_hwmod
  1071. * @oh: struct omap_hwmod *
  1072. *
  1073. * Shut down an omap_hwmod @oh. This should be called when the driver
  1074. * used for the hwmod is removed or unloaded or if the driver is not
  1075. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1076. * state or returns 0.
  1077. */
  1078. static int _shutdown(struct omap_hwmod *oh)
  1079. {
  1080. int ret;
  1081. u8 prev_state;
  1082. if (oh->_state != _HWMOD_STATE_IDLE &&
  1083. oh->_state != _HWMOD_STATE_ENABLED) {
  1084. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1085. "from idle, or enabled state\n", oh->name);
  1086. return -EINVAL;
  1087. }
  1088. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1089. if (oh->class->pre_shutdown) {
  1090. prev_state = oh->_state;
  1091. if (oh->_state == _HWMOD_STATE_IDLE)
  1092. _enable(oh);
  1093. ret = oh->class->pre_shutdown(oh);
  1094. if (ret) {
  1095. if (prev_state == _HWMOD_STATE_IDLE)
  1096. _idle(oh);
  1097. return ret;
  1098. }
  1099. }
  1100. if (oh->class->sysc)
  1101. _shutdown_sysc(oh);
  1102. /*
  1103. * If an IP contains only one HW reset line, then assert it
  1104. * before disabling the clocks and shutting down the IP.
  1105. */
  1106. if (oh->rst_lines_cnt == 1)
  1107. _assert_hardreset(oh, oh->rst_lines[0].name);
  1108. /* clocks and deps are already disabled in idle */
  1109. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1110. _del_initiator_dep(oh, mpu_oh);
  1111. /* XXX what about the other system initiators here? dma, dsp */
  1112. _disable_clocks(oh);
  1113. }
  1114. /* XXX Should this code also force-disable the optional clocks? */
  1115. /* XXX mux any associated balls to safe mode */
  1116. oh->_state = _HWMOD_STATE_DISABLED;
  1117. return 0;
  1118. }
  1119. /**
  1120. * _setup - do initial configuration of omap_hwmod
  1121. * @oh: struct omap_hwmod *
  1122. *
  1123. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1124. * OCP_SYSCONFIG register. Returns -EINVAL if the hwmod is in the
  1125. * wrong state or returns 0.
  1126. */
  1127. static int _setup(struct omap_hwmod *oh, void *data)
  1128. {
  1129. int i, r;
  1130. u8 postsetup_state;
  1131. /* Set iclk autoidle mode */
  1132. if (oh->slaves_cnt > 0) {
  1133. for (i = 0; i < oh->slaves_cnt; i++) {
  1134. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1135. struct clk *c = os->_clk;
  1136. if (!c)
  1137. continue;
  1138. if (os->flags & OCPIF_SWSUP_IDLE) {
  1139. /* XXX omap_iclk_deny_idle(c); */
  1140. } else {
  1141. /* XXX omap_iclk_allow_idle(c); */
  1142. clk_enable(c);
  1143. }
  1144. }
  1145. }
  1146. oh->_state = _HWMOD_STATE_INITIALIZED;
  1147. /*
  1148. * In the case of hwmod with hardreset that should not be
  1149. * de-assert at boot time, we have to keep the module
  1150. * initialized, because we cannot enable it properly with the
  1151. * reset asserted. Exit without warning because that behavior is
  1152. * expected.
  1153. */
  1154. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1155. return 0;
  1156. r = _enable(oh);
  1157. if (r) {
  1158. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1159. oh->name, oh->_state);
  1160. return 0;
  1161. }
  1162. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1163. _reset(oh);
  1164. /*
  1165. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1166. * The _enable() function should be split to
  1167. * avoid the rewrite of the OCP_SYSCONFIG register.
  1168. */
  1169. if (oh->class->sysc) {
  1170. _update_sysc_cache(oh);
  1171. _enable_sysc(oh);
  1172. }
  1173. }
  1174. postsetup_state = oh->_postsetup_state;
  1175. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1176. postsetup_state = _HWMOD_STATE_ENABLED;
  1177. /*
  1178. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1179. * it should be set by the core code as a runtime flag during startup
  1180. */
  1181. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1182. (postsetup_state == _HWMOD_STATE_IDLE))
  1183. postsetup_state = _HWMOD_STATE_ENABLED;
  1184. if (postsetup_state == _HWMOD_STATE_IDLE)
  1185. _idle(oh);
  1186. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1187. _shutdown(oh);
  1188. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1189. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1190. oh->name, postsetup_state);
  1191. return 0;
  1192. }
  1193. /**
  1194. * _register - register a struct omap_hwmod
  1195. * @oh: struct omap_hwmod *
  1196. *
  1197. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1198. * already has been registered by the same name; -EINVAL if the
  1199. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1200. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1201. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1202. * success.
  1203. *
  1204. * XXX The data should be copied into bootmem, so the original data
  1205. * should be marked __initdata and freed after init. This would allow
  1206. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1207. * that the copy process would be relatively complex due to the large number
  1208. * of substructures.
  1209. */
  1210. static int __init _register(struct omap_hwmod *oh)
  1211. {
  1212. int ret, ms_id;
  1213. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1214. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1215. return -EINVAL;
  1216. mutex_lock(&omap_hwmod_mutex);
  1217. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1218. if (_lookup(oh->name)) {
  1219. ret = -EEXIST;
  1220. goto ohr_unlock;
  1221. }
  1222. ms_id = _find_mpu_port_index(oh);
  1223. if (!IS_ERR_VALUE(ms_id)) {
  1224. oh->_mpu_port_index = ms_id;
  1225. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1226. } else {
  1227. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1228. }
  1229. list_add_tail(&oh->node, &omap_hwmod_list);
  1230. spin_lock_init(&oh->_lock);
  1231. oh->_state = _HWMOD_STATE_REGISTERED;
  1232. ret = 0;
  1233. ohr_unlock:
  1234. mutex_unlock(&omap_hwmod_mutex);
  1235. return ret;
  1236. }
  1237. /* Public functions */
  1238. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1239. {
  1240. if (oh->flags & HWMOD_16BIT_REG)
  1241. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1242. else
  1243. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1244. }
  1245. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1246. {
  1247. if (oh->flags & HWMOD_16BIT_REG)
  1248. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1249. else
  1250. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1251. }
  1252. /**
  1253. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1254. * @oh: struct omap_hwmod *
  1255. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1256. *
  1257. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1258. * local copy. Intended to be used by drivers that have some erratum
  1259. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1260. * -EINVAL if @oh is null, or passes along the return value from
  1261. * _set_slave_idlemode().
  1262. *
  1263. * XXX Does this function have any current users? If not, we should
  1264. * remove it; it is better to let the rest of the hwmod code handle this.
  1265. * Any users of this function should be scrutinized carefully.
  1266. */
  1267. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1268. {
  1269. u32 v;
  1270. int retval = 0;
  1271. if (!oh)
  1272. return -EINVAL;
  1273. v = oh->_sysc_cache;
  1274. retval = _set_slave_idlemode(oh, idlemode, &v);
  1275. if (!retval)
  1276. _write_sysconfig(v, oh);
  1277. return retval;
  1278. }
  1279. /**
  1280. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1281. * @name: name of the omap_hwmod to look up
  1282. *
  1283. * Given a @name of an omap_hwmod, return a pointer to the registered
  1284. * struct omap_hwmod *, or NULL upon error.
  1285. */
  1286. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1287. {
  1288. struct omap_hwmod *oh;
  1289. if (!name)
  1290. return NULL;
  1291. mutex_lock(&omap_hwmod_mutex);
  1292. oh = _lookup(name);
  1293. mutex_unlock(&omap_hwmod_mutex);
  1294. return oh;
  1295. }
  1296. /**
  1297. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1298. * @fn: pointer to a callback function
  1299. * @data: void * data to pass to callback function
  1300. *
  1301. * Call @fn for each registered omap_hwmod, passing @data to each
  1302. * function. @fn must return 0 for success or any other value for
  1303. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1304. * will stop and the non-zero return value will be passed to the
  1305. * caller of omap_hwmod_for_each(). @fn is called with
  1306. * omap_hwmod_for_each() held.
  1307. */
  1308. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1309. void *data)
  1310. {
  1311. struct omap_hwmod *temp_oh;
  1312. int ret;
  1313. if (!fn)
  1314. return -EINVAL;
  1315. mutex_lock(&omap_hwmod_mutex);
  1316. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1317. ret = (*fn)(temp_oh, data);
  1318. if (ret)
  1319. break;
  1320. }
  1321. mutex_unlock(&omap_hwmod_mutex);
  1322. return ret;
  1323. }
  1324. /**
  1325. * omap_hwmod_init - init omap_hwmod code and register hwmods
  1326. * @ohs: pointer to an array of omap_hwmods to register
  1327. *
  1328. * Intended to be called early in boot before the clock framework is
  1329. * initialized. If @ohs is not null, will register all omap_hwmods
  1330. * listed in @ohs that are valid for this chip. Returns -EINVAL if
  1331. * omap_hwmod_init() has already been called or 0 otherwise.
  1332. */
  1333. int __init omap_hwmod_init(struct omap_hwmod **ohs)
  1334. {
  1335. struct omap_hwmod *oh;
  1336. int r;
  1337. if (inited)
  1338. return -EINVAL;
  1339. inited = 1;
  1340. if (!ohs)
  1341. return 0;
  1342. oh = *ohs;
  1343. while (oh) {
  1344. if (omap_chip_is(oh->omap_chip)) {
  1345. r = _register(oh);
  1346. WARN(r, "omap_hwmod: %s: _register returned "
  1347. "%d\n", oh->name, r);
  1348. }
  1349. oh = *++ohs;
  1350. }
  1351. return 0;
  1352. }
  1353. /**
  1354. * omap_hwmod_late_init - do some post-clock framework initialization
  1355. *
  1356. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1357. * to struct clk pointers for each registered omap_hwmod. Also calls
  1358. * _setup() on each hwmod. Returns 0.
  1359. */
  1360. int omap_hwmod_late_init(void)
  1361. {
  1362. int r;
  1363. /* XXX check return value */
  1364. r = omap_hwmod_for_each(_init_clocks, NULL);
  1365. WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
  1366. mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
  1367. WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
  1368. MPU_INITIATOR_NAME);
  1369. omap_hwmod_for_each(_setup, NULL);
  1370. return 0;
  1371. }
  1372. /**
  1373. * omap_hwmod_enable - enable an omap_hwmod
  1374. * @oh: struct omap_hwmod *
  1375. *
  1376. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1377. * Returns -EINVAL on error or passes along the return value from _enable().
  1378. */
  1379. int omap_hwmod_enable(struct omap_hwmod *oh)
  1380. {
  1381. int r;
  1382. unsigned long flags;
  1383. if (!oh)
  1384. return -EINVAL;
  1385. spin_lock_irqsave(&oh->_lock, flags);
  1386. r = _enable(oh);
  1387. spin_unlock_irqrestore(&oh->_lock, flags);
  1388. return r;
  1389. }
  1390. /**
  1391. * omap_hwmod_idle - idle an omap_hwmod
  1392. * @oh: struct omap_hwmod *
  1393. *
  1394. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1395. * Returns -EINVAL on error or passes along the return value from _idle().
  1396. */
  1397. int omap_hwmod_idle(struct omap_hwmod *oh)
  1398. {
  1399. unsigned long flags;
  1400. if (!oh)
  1401. return -EINVAL;
  1402. spin_lock_irqsave(&oh->_lock, flags);
  1403. _idle(oh);
  1404. spin_unlock_irqrestore(&oh->_lock, flags);
  1405. return 0;
  1406. }
  1407. /**
  1408. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1409. * @oh: struct omap_hwmod *
  1410. *
  1411. * Shutdown an omap_hwmod @oh. Intended to be called by
  1412. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1413. * the return value from _shutdown().
  1414. */
  1415. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1416. {
  1417. unsigned long flags;
  1418. if (!oh)
  1419. return -EINVAL;
  1420. spin_lock_irqsave(&oh->_lock, flags);
  1421. _shutdown(oh);
  1422. spin_unlock_irqrestore(&oh->_lock, flags);
  1423. return 0;
  1424. }
  1425. /**
  1426. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1427. * @oh: struct omap_hwmod *oh
  1428. *
  1429. * Intended to be called by the omap_device code.
  1430. */
  1431. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1432. {
  1433. unsigned long flags;
  1434. spin_lock_irqsave(&oh->_lock, flags);
  1435. _enable_clocks(oh);
  1436. spin_unlock_irqrestore(&oh->_lock, flags);
  1437. return 0;
  1438. }
  1439. /**
  1440. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1441. * @oh: struct omap_hwmod *oh
  1442. *
  1443. * Intended to be called by the omap_device code.
  1444. */
  1445. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1446. {
  1447. unsigned long flags;
  1448. spin_lock_irqsave(&oh->_lock, flags);
  1449. _disable_clocks(oh);
  1450. spin_unlock_irqrestore(&oh->_lock, flags);
  1451. return 0;
  1452. }
  1453. /**
  1454. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1455. * @oh: struct omap_hwmod *oh
  1456. *
  1457. * Intended to be called by drivers and core code when all posted
  1458. * writes to a device must complete before continuing further
  1459. * execution (for example, after clearing some device IRQSTATUS
  1460. * register bits)
  1461. *
  1462. * XXX what about targets with multiple OCP threads?
  1463. */
  1464. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1465. {
  1466. BUG_ON(!oh);
  1467. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1468. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1469. "device configuration\n", oh->name);
  1470. return;
  1471. }
  1472. /*
  1473. * Forces posted writes to complete on the OCP thread handling
  1474. * register writes
  1475. */
  1476. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  1477. }
  1478. /**
  1479. * omap_hwmod_reset - reset the hwmod
  1480. * @oh: struct omap_hwmod *
  1481. *
  1482. * Under some conditions, a driver may wish to reset the entire device.
  1483. * Called from omap_device code. Returns -EINVAL on error or passes along
  1484. * the return value from _reset().
  1485. */
  1486. int omap_hwmod_reset(struct omap_hwmod *oh)
  1487. {
  1488. int r;
  1489. unsigned long flags;
  1490. if (!oh)
  1491. return -EINVAL;
  1492. spin_lock_irqsave(&oh->_lock, flags);
  1493. r = _reset(oh);
  1494. spin_unlock_irqrestore(&oh->_lock, flags);
  1495. return r;
  1496. }
  1497. /**
  1498. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1499. * @oh: struct omap_hwmod *
  1500. * @res: pointer to the first element of an array of struct resource to fill
  1501. *
  1502. * Count the number of struct resource array elements necessary to
  1503. * contain omap_hwmod @oh resources. Intended to be called by code
  1504. * that registers omap_devices. Intended to be used to determine the
  1505. * size of a dynamically-allocated struct resource array, before
  1506. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1507. * resource array elements needed.
  1508. *
  1509. * XXX This code is not optimized. It could attempt to merge adjacent
  1510. * resource IDs.
  1511. *
  1512. */
  1513. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1514. {
  1515. int ret, i;
  1516. ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
  1517. for (i = 0; i < oh->slaves_cnt; i++)
  1518. ret += oh->slaves[i]->addr_cnt;
  1519. return ret;
  1520. }
  1521. /**
  1522. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1523. * @oh: struct omap_hwmod *
  1524. * @res: pointer to the first element of an array of struct resource to fill
  1525. *
  1526. * Fill the struct resource array @res with resource data from the
  1527. * omap_hwmod @oh. Intended to be called by code that registers
  1528. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1529. * number of array elements filled.
  1530. */
  1531. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1532. {
  1533. int i, j;
  1534. int r = 0;
  1535. /* For each IRQ, DMA, memory area, fill in array.*/
  1536. for (i = 0; i < oh->mpu_irqs_cnt; i++) {
  1537. (res + r)->name = (oh->mpu_irqs + i)->name;
  1538. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1539. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1540. (res + r)->flags = IORESOURCE_IRQ;
  1541. r++;
  1542. }
  1543. for (i = 0; i < oh->sdma_reqs_cnt; i++) {
  1544. (res + r)->name = (oh->sdma_reqs + i)->name;
  1545. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1546. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1547. (res + r)->flags = IORESOURCE_DMA;
  1548. r++;
  1549. }
  1550. for (i = 0; i < oh->slaves_cnt; i++) {
  1551. struct omap_hwmod_ocp_if *os;
  1552. os = oh->slaves[i];
  1553. for (j = 0; j < os->addr_cnt; j++) {
  1554. (res + r)->start = (os->addr + j)->pa_start;
  1555. (res + r)->end = (os->addr + j)->pa_end;
  1556. (res + r)->flags = IORESOURCE_MEM;
  1557. r++;
  1558. }
  1559. }
  1560. return r;
  1561. }
  1562. /**
  1563. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1564. * @oh: struct omap_hwmod *
  1565. *
  1566. * Return the powerdomain pointer associated with the OMAP module
  1567. * @oh's main clock. If @oh does not have a main clk, return the
  1568. * powerdomain associated with the interface clock associated with the
  1569. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1570. * instead?) Returns NULL on error, or a struct powerdomain * on
  1571. * success.
  1572. */
  1573. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1574. {
  1575. struct clk *c;
  1576. if (!oh)
  1577. return NULL;
  1578. if (oh->_clk) {
  1579. c = oh->_clk;
  1580. } else {
  1581. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1582. return NULL;
  1583. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1584. }
  1585. if (!c->clkdm)
  1586. return NULL;
  1587. return c->clkdm->pwrdm.ptr;
  1588. }
  1589. /**
  1590. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1591. * @oh: struct omap_hwmod *
  1592. *
  1593. * Returns the virtual address corresponding to the beginning of the
  1594. * module's register target, in the address range that is intended to
  1595. * be used by the MPU. Returns the virtual address upon success or NULL
  1596. * upon error.
  1597. */
  1598. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  1599. {
  1600. if (!oh)
  1601. return NULL;
  1602. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1603. return NULL;
  1604. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  1605. return NULL;
  1606. return oh->_mpu_rt_va;
  1607. }
  1608. /**
  1609. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  1610. * @oh: struct omap_hwmod *
  1611. * @init_oh: struct omap_hwmod * (initiator)
  1612. *
  1613. * Add a sleep dependency between the initiator @init_oh and @oh.
  1614. * Intended to be called by DSP/Bridge code via platform_data for the
  1615. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1616. * code needs to add/del initiator dependencies dynamically
  1617. * before/after accessing a device. Returns the return value from
  1618. * _add_initiator_dep().
  1619. *
  1620. * XXX Keep a usecount in the clockdomain code
  1621. */
  1622. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  1623. struct omap_hwmod *init_oh)
  1624. {
  1625. return _add_initiator_dep(oh, init_oh);
  1626. }
  1627. /*
  1628. * XXX what about functions for drivers to save/restore ocp_sysconfig
  1629. * for context save/restore operations?
  1630. */
  1631. /**
  1632. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  1633. * @oh: struct omap_hwmod *
  1634. * @init_oh: struct omap_hwmod * (initiator)
  1635. *
  1636. * Remove a sleep dependency between the initiator @init_oh and @oh.
  1637. * Intended to be called by DSP/Bridge code via platform_data for the
  1638. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1639. * code needs to add/del initiator dependencies dynamically
  1640. * before/after accessing a device. Returns the return value from
  1641. * _del_initiator_dep().
  1642. *
  1643. * XXX Keep a usecount in the clockdomain code
  1644. */
  1645. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  1646. struct omap_hwmod *init_oh)
  1647. {
  1648. return _del_initiator_dep(oh, init_oh);
  1649. }
  1650. /**
  1651. * omap_hwmod_enable_wakeup - allow device to wake up the system
  1652. * @oh: struct omap_hwmod *
  1653. *
  1654. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  1655. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  1656. * registers to cause the PRCM to receive wakeup events from the
  1657. * module. Does not set any wakeup routing registers beyond this
  1658. * point - if the module is to wake up any other module or subsystem,
  1659. * that must be set separately. Called by omap_device code. Returns
  1660. * -EINVAL on error or 0 upon success.
  1661. */
  1662. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  1663. {
  1664. unsigned long flags;
  1665. u32 v;
  1666. if (!oh->class->sysc ||
  1667. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1668. return -EINVAL;
  1669. spin_lock_irqsave(&oh->_lock, flags);
  1670. v = oh->_sysc_cache;
  1671. _enable_wakeup(oh, &v);
  1672. _write_sysconfig(v, oh);
  1673. spin_unlock_irqrestore(&oh->_lock, flags);
  1674. return 0;
  1675. }
  1676. /**
  1677. * omap_hwmod_disable_wakeup - prevent device from waking the system
  1678. * @oh: struct omap_hwmod *
  1679. *
  1680. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  1681. * from sending wakeups to the PRCM. Eventually this should clear
  1682. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  1683. * from the module. Does not set any wakeup routing registers beyond
  1684. * this point - if the module is to wake up any other module or
  1685. * subsystem, that must be set separately. Called by omap_device
  1686. * code. Returns -EINVAL on error or 0 upon success.
  1687. */
  1688. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  1689. {
  1690. unsigned long flags;
  1691. u32 v;
  1692. if (!oh->class->sysc ||
  1693. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1694. return -EINVAL;
  1695. spin_lock_irqsave(&oh->_lock, flags);
  1696. v = oh->_sysc_cache;
  1697. _disable_wakeup(oh, &v);
  1698. _write_sysconfig(v, oh);
  1699. spin_unlock_irqrestore(&oh->_lock, flags);
  1700. return 0;
  1701. }
  1702. /**
  1703. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  1704. * contained in the hwmod module.
  1705. * @oh: struct omap_hwmod *
  1706. * @name: name of the reset line to lookup and assert
  1707. *
  1708. * Some IP like dsp, ipu or iva contain processor that require
  1709. * an HW reset line to be assert / deassert in order to enable fully
  1710. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1711. * yet supported on this OMAP; otherwise, passes along the return value
  1712. * from _assert_hardreset().
  1713. */
  1714. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  1715. {
  1716. int ret;
  1717. unsigned long flags;
  1718. if (!oh)
  1719. return -EINVAL;
  1720. spin_lock_irqsave(&oh->_lock, flags);
  1721. ret = _assert_hardreset(oh, name);
  1722. spin_unlock_irqrestore(&oh->_lock, flags);
  1723. return ret;
  1724. }
  1725. /**
  1726. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  1727. * contained in the hwmod module.
  1728. * @oh: struct omap_hwmod *
  1729. * @name: name of the reset line to look up and deassert
  1730. *
  1731. * Some IP like dsp, ipu or iva contain processor that require
  1732. * an HW reset line to be assert / deassert in order to enable fully
  1733. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1734. * yet supported on this OMAP; otherwise, passes along the return value
  1735. * from _deassert_hardreset().
  1736. */
  1737. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1738. {
  1739. int ret;
  1740. unsigned long flags;
  1741. if (!oh)
  1742. return -EINVAL;
  1743. spin_lock_irqsave(&oh->_lock, flags);
  1744. ret = _deassert_hardreset(oh, name);
  1745. spin_unlock_irqrestore(&oh->_lock, flags);
  1746. return ret;
  1747. }
  1748. /**
  1749. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  1750. * contained in the hwmod module
  1751. * @oh: struct omap_hwmod *
  1752. * @name: name of the reset line to look up and read
  1753. *
  1754. * Return the current state of the hwmod @oh's reset line named @name:
  1755. * returns -EINVAL upon parameter error or if this operation
  1756. * is unsupported on the current OMAP; otherwise, passes along the return
  1757. * value from _read_hardreset().
  1758. */
  1759. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  1760. {
  1761. int ret;
  1762. unsigned long flags;
  1763. if (!oh)
  1764. return -EINVAL;
  1765. spin_lock_irqsave(&oh->_lock, flags);
  1766. ret = _read_hardreset(oh, name);
  1767. spin_unlock_irqrestore(&oh->_lock, flags);
  1768. return ret;
  1769. }
  1770. /**
  1771. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  1772. * @classname: struct omap_hwmod_class name to search for
  1773. * @fn: callback function pointer to call for each hwmod in class @classname
  1774. * @user: arbitrary context data to pass to the callback function
  1775. *
  1776. * For each omap_hwmod of class @classname, call @fn. Takes
  1777. * omap_hwmod_mutex to prevent the hwmod list from changing during the
  1778. * iteration. If the callback function returns something other than
  1779. * zero, the iterator is terminated, and the callback function's return
  1780. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  1781. * if @classname or @fn are NULL, or passes back the error code from @fn.
  1782. */
  1783. int omap_hwmod_for_each_by_class(const char *classname,
  1784. int (*fn)(struct omap_hwmod *oh,
  1785. void *user),
  1786. void *user)
  1787. {
  1788. struct omap_hwmod *temp_oh;
  1789. int ret = 0;
  1790. if (!classname || !fn)
  1791. return -EINVAL;
  1792. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  1793. __func__, classname);
  1794. mutex_lock(&omap_hwmod_mutex);
  1795. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1796. if (!strcmp(temp_oh->class->name, classname)) {
  1797. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  1798. __func__, temp_oh->name);
  1799. ret = (*fn)(temp_oh, user);
  1800. if (ret)
  1801. break;
  1802. }
  1803. }
  1804. mutex_unlock(&omap_hwmod_mutex);
  1805. if (ret)
  1806. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  1807. __func__, ret);
  1808. return ret;
  1809. }
  1810. /**
  1811. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  1812. * @oh: struct omap_hwmod *
  1813. * @state: state that _setup() should leave the hwmod in
  1814. *
  1815. * Sets the hwmod state that @oh will enter at the end of _setup() (called by
  1816. * omap_hwmod_late_init()). Only valid to call between calls to
  1817. * omap_hwmod_init() and omap_hwmod_late_init(). Returns 0 upon success or
  1818. * -EINVAL if there is a problem with the arguments or if the hwmod is
  1819. * in the wrong state.
  1820. */
  1821. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  1822. {
  1823. int ret;
  1824. unsigned long flags;
  1825. if (!oh)
  1826. return -EINVAL;
  1827. if (state != _HWMOD_STATE_DISABLED &&
  1828. state != _HWMOD_STATE_ENABLED &&
  1829. state != _HWMOD_STATE_IDLE)
  1830. return -EINVAL;
  1831. spin_lock_irqsave(&oh->_lock, flags);
  1832. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  1833. ret = -EINVAL;
  1834. goto ohsps_unlock;
  1835. }
  1836. oh->_postsetup_state = state;
  1837. ret = 0;
  1838. ohsps_unlock:
  1839. spin_unlock_irqrestore(&oh->_lock, flags);
  1840. return ret;
  1841. }