events.c 31 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <asm/desc.h>
  32. #include <asm/ptrace.h>
  33. #include <asm/irq.h>
  34. #include <asm/idle.h>
  35. #include <asm/io_apic.h>
  36. #include <asm/sync_bitops.h>
  37. #include <asm/xen/hypercall.h>
  38. #include <asm/xen/hypervisor.h>
  39. #include <xen/xen.h>
  40. #include <xen/hvm.h>
  41. #include <xen/xen-ops.h>
  42. #include <xen/events.h>
  43. #include <xen/interface/xen.h>
  44. #include <xen/interface/event_channel.h>
  45. #include <xen/interface/hvm/hvm_op.h>
  46. #include <xen/interface/hvm/params.h>
  47. /*
  48. * This lock protects updates to the following mapping and reference-count
  49. * arrays. The lock does not need to be acquired to read the mapping tables.
  50. */
  51. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  52. /* IRQ <-> VIRQ mapping. */
  53. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  54. /* IRQ <-> IPI mapping */
  55. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  56. /* Interrupt types. */
  57. enum xen_irq_type {
  58. IRQT_UNBOUND = 0,
  59. IRQT_PIRQ,
  60. IRQT_VIRQ,
  61. IRQT_IPI,
  62. IRQT_EVTCHN
  63. };
  64. /*
  65. * Packed IRQ information:
  66. * type - enum xen_irq_type
  67. * event channel - irq->event channel mapping
  68. * cpu - cpu this event channel is bound to
  69. * index - type-specific information:
  70. * PIRQ - vector, with MSB being "needs EIO"
  71. * VIRQ - virq number
  72. * IPI - IPI vector
  73. * EVTCHN -
  74. */
  75. struct irq_info
  76. {
  77. enum xen_irq_type type; /* type */
  78. unsigned short evtchn; /* event channel */
  79. unsigned short cpu; /* cpu bound */
  80. union {
  81. unsigned short virq;
  82. enum ipi_vector ipi;
  83. struct {
  84. unsigned short pirq;
  85. unsigned short gsi;
  86. unsigned char vector;
  87. unsigned char flags;
  88. } pirq;
  89. } u;
  90. };
  91. #define PIRQ_NEEDS_EOI (1 << 0)
  92. #define PIRQ_SHAREABLE (1 << 1)
  93. static struct irq_info *irq_info;
  94. static int *pirq_to_irq;
  95. static int nr_pirqs;
  96. static int *evtchn_to_irq;
  97. struct cpu_evtchn_s {
  98. unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
  99. };
  100. static __initdata struct cpu_evtchn_s init_evtchn_mask = {
  101. .bits[0 ... (NR_EVENT_CHANNELS/BITS_PER_LONG)-1] = ~0ul,
  102. };
  103. static struct cpu_evtchn_s *cpu_evtchn_mask_p = &init_evtchn_mask;
  104. static inline unsigned long *cpu_evtchn_mask(int cpu)
  105. {
  106. return cpu_evtchn_mask_p[cpu].bits;
  107. }
  108. /* Xen will never allocate port zero for any purpose. */
  109. #define VALID_EVTCHN(chn) ((chn) != 0)
  110. static struct irq_chip xen_dynamic_chip;
  111. static struct irq_chip xen_percpu_chip;
  112. static struct irq_chip xen_pirq_chip;
  113. /* Constructor for packed IRQ information. */
  114. static struct irq_info mk_unbound_info(void)
  115. {
  116. return (struct irq_info) { .type = IRQT_UNBOUND };
  117. }
  118. static struct irq_info mk_evtchn_info(unsigned short evtchn)
  119. {
  120. return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
  121. .cpu = 0 };
  122. }
  123. static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
  124. {
  125. return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
  126. .cpu = 0, .u.ipi = ipi };
  127. }
  128. static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
  129. {
  130. return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
  131. .cpu = 0, .u.virq = virq };
  132. }
  133. static struct irq_info mk_pirq_info(unsigned short evtchn, unsigned short pirq,
  134. unsigned short gsi, unsigned short vector)
  135. {
  136. return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
  137. .cpu = 0,
  138. .u.pirq = { .pirq = pirq, .gsi = gsi, .vector = vector } };
  139. }
  140. /*
  141. * Accessors for packed IRQ information.
  142. */
  143. static struct irq_info *info_for_irq(unsigned irq)
  144. {
  145. return &irq_info[irq];
  146. }
  147. static unsigned int evtchn_from_irq(unsigned irq)
  148. {
  149. return info_for_irq(irq)->evtchn;
  150. }
  151. unsigned irq_from_evtchn(unsigned int evtchn)
  152. {
  153. return evtchn_to_irq[evtchn];
  154. }
  155. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  156. static enum ipi_vector ipi_from_irq(unsigned irq)
  157. {
  158. struct irq_info *info = info_for_irq(irq);
  159. BUG_ON(info == NULL);
  160. BUG_ON(info->type != IRQT_IPI);
  161. return info->u.ipi;
  162. }
  163. static unsigned virq_from_irq(unsigned irq)
  164. {
  165. struct irq_info *info = info_for_irq(irq);
  166. BUG_ON(info == NULL);
  167. BUG_ON(info->type != IRQT_VIRQ);
  168. return info->u.virq;
  169. }
  170. static unsigned pirq_from_irq(unsigned irq)
  171. {
  172. struct irq_info *info = info_for_irq(irq);
  173. BUG_ON(info == NULL);
  174. BUG_ON(info->type != IRQT_PIRQ);
  175. return info->u.pirq.pirq;
  176. }
  177. static unsigned gsi_from_irq(unsigned irq)
  178. {
  179. struct irq_info *info = info_for_irq(irq);
  180. BUG_ON(info == NULL);
  181. BUG_ON(info->type != IRQT_PIRQ);
  182. return info->u.pirq.gsi;
  183. }
  184. static unsigned vector_from_irq(unsigned irq)
  185. {
  186. struct irq_info *info = info_for_irq(irq);
  187. BUG_ON(info == NULL);
  188. BUG_ON(info->type != IRQT_PIRQ);
  189. return info->u.pirq.vector;
  190. }
  191. static enum xen_irq_type type_from_irq(unsigned irq)
  192. {
  193. return info_for_irq(irq)->type;
  194. }
  195. static unsigned cpu_from_irq(unsigned irq)
  196. {
  197. return info_for_irq(irq)->cpu;
  198. }
  199. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  200. {
  201. int irq = evtchn_to_irq[evtchn];
  202. unsigned ret = 0;
  203. if (irq != -1)
  204. ret = cpu_from_irq(irq);
  205. return ret;
  206. }
  207. static bool pirq_needs_eoi(unsigned irq)
  208. {
  209. struct irq_info *info = info_for_irq(irq);
  210. BUG_ON(info->type != IRQT_PIRQ);
  211. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  212. }
  213. static inline unsigned long active_evtchns(unsigned int cpu,
  214. struct shared_info *sh,
  215. unsigned int idx)
  216. {
  217. return (sh->evtchn_pending[idx] &
  218. cpu_evtchn_mask(cpu)[idx] &
  219. ~sh->evtchn_mask[idx]);
  220. }
  221. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  222. {
  223. int irq = evtchn_to_irq[chn];
  224. BUG_ON(irq == -1);
  225. #ifdef CONFIG_SMP
  226. cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
  227. #endif
  228. __clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
  229. __set_bit(chn, cpu_evtchn_mask(cpu));
  230. irq_info[irq].cpu = cpu;
  231. }
  232. static void init_evtchn_cpu_bindings(void)
  233. {
  234. #ifdef CONFIG_SMP
  235. struct irq_desc *desc;
  236. int i;
  237. /* By default all event channels notify CPU#0. */
  238. for_each_irq_desc(i, desc) {
  239. cpumask_copy(desc->affinity, cpumask_of(0));
  240. }
  241. #endif
  242. memset(cpu_evtchn_mask(0), ~0, sizeof(cpu_evtchn_mask(0)));
  243. }
  244. static inline void clear_evtchn(int port)
  245. {
  246. struct shared_info *s = HYPERVISOR_shared_info;
  247. sync_clear_bit(port, &s->evtchn_pending[0]);
  248. }
  249. static inline void set_evtchn(int port)
  250. {
  251. struct shared_info *s = HYPERVISOR_shared_info;
  252. sync_set_bit(port, &s->evtchn_pending[0]);
  253. }
  254. static inline int test_evtchn(int port)
  255. {
  256. struct shared_info *s = HYPERVISOR_shared_info;
  257. return sync_test_bit(port, &s->evtchn_pending[0]);
  258. }
  259. /**
  260. * notify_remote_via_irq - send event to remote end of event channel via irq
  261. * @irq: irq of event channel to send event to
  262. *
  263. * Unlike notify_remote_via_evtchn(), this is safe to use across
  264. * save/restore. Notifications on a broken connection are silently
  265. * dropped.
  266. */
  267. void notify_remote_via_irq(int irq)
  268. {
  269. int evtchn = evtchn_from_irq(irq);
  270. if (VALID_EVTCHN(evtchn))
  271. notify_remote_via_evtchn(evtchn);
  272. }
  273. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  274. static void mask_evtchn(int port)
  275. {
  276. struct shared_info *s = HYPERVISOR_shared_info;
  277. sync_set_bit(port, &s->evtchn_mask[0]);
  278. }
  279. static void unmask_evtchn(int port)
  280. {
  281. struct shared_info *s = HYPERVISOR_shared_info;
  282. unsigned int cpu = get_cpu();
  283. BUG_ON(!irqs_disabled());
  284. /* Slow path (hypercall) if this is a non-local port. */
  285. if (unlikely(cpu != cpu_from_evtchn(port))) {
  286. struct evtchn_unmask unmask = { .port = port };
  287. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  288. } else {
  289. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  290. sync_clear_bit(port, &s->evtchn_mask[0]);
  291. /*
  292. * The following is basically the equivalent of
  293. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  294. * the interrupt edge' if the channel is masked.
  295. */
  296. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  297. !sync_test_and_set_bit(port / BITS_PER_LONG,
  298. &vcpu_info->evtchn_pending_sel))
  299. vcpu_info->evtchn_upcall_pending = 1;
  300. }
  301. put_cpu();
  302. }
  303. static int get_nr_hw_irqs(void)
  304. {
  305. int ret = 1;
  306. #ifdef CONFIG_X86_IO_APIC
  307. ret = get_nr_irqs_gsi();
  308. #endif
  309. return ret;
  310. }
  311. /* callers of this function should make sure that PHYSDEVOP_get_nr_pirqs
  312. * succeeded otherwise nr_pirqs won't hold the right value */
  313. static int find_unbound_pirq(void)
  314. {
  315. int i;
  316. for (i = nr_pirqs-1; i >= 0; i--) {
  317. if (pirq_to_irq[i] < 0)
  318. return i;
  319. }
  320. return -1;
  321. }
  322. static int find_unbound_irq(void)
  323. {
  324. struct irq_data *data;
  325. int irq, res;
  326. int start = get_nr_hw_irqs();
  327. if (start == nr_irqs)
  328. goto no_irqs;
  329. /* nr_irqs is a magic value. Must not use it.*/
  330. for (irq = nr_irqs-1; irq > start; irq--) {
  331. data = irq_get_irq_data(irq);
  332. /* only 0->15 have init'd desc; handle irq > 16 */
  333. if (!data)
  334. break;
  335. if (data->chip == &no_irq_chip)
  336. break;
  337. if (data->chip != &xen_dynamic_chip)
  338. continue;
  339. if (irq_info[irq].type == IRQT_UNBOUND)
  340. return irq;
  341. }
  342. if (irq == start)
  343. goto no_irqs;
  344. res = irq_alloc_desc_at(irq, 0);
  345. if (WARN_ON(res != irq))
  346. return -1;
  347. return irq;
  348. no_irqs:
  349. panic("No available IRQ to bind to: increase nr_irqs!\n");
  350. }
  351. static bool identity_mapped_irq(unsigned irq)
  352. {
  353. /* identity map all the hardware irqs */
  354. return irq < get_nr_hw_irqs();
  355. }
  356. static void pirq_unmask_notify(int irq)
  357. {
  358. struct physdev_eoi eoi = { .irq = pirq_from_irq(irq) };
  359. if (unlikely(pirq_needs_eoi(irq))) {
  360. int rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  361. WARN_ON(rc);
  362. }
  363. }
  364. static void pirq_query_unmask(int irq)
  365. {
  366. struct physdev_irq_status_query irq_status;
  367. struct irq_info *info = info_for_irq(irq);
  368. BUG_ON(info->type != IRQT_PIRQ);
  369. irq_status.irq = pirq_from_irq(irq);
  370. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  371. irq_status.flags = 0;
  372. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  373. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  374. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  375. }
  376. static bool probing_irq(int irq)
  377. {
  378. struct irq_desc *desc = irq_to_desc(irq);
  379. return desc && desc->action == NULL;
  380. }
  381. static unsigned int startup_pirq(unsigned int irq)
  382. {
  383. struct evtchn_bind_pirq bind_pirq;
  384. struct irq_info *info = info_for_irq(irq);
  385. int evtchn = evtchn_from_irq(irq);
  386. int rc;
  387. BUG_ON(info->type != IRQT_PIRQ);
  388. if (VALID_EVTCHN(evtchn))
  389. goto out;
  390. bind_pirq.pirq = pirq_from_irq(irq);
  391. /* NB. We are happy to share unless we are probing. */
  392. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  393. BIND_PIRQ__WILL_SHARE : 0;
  394. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  395. if (rc != 0) {
  396. if (!probing_irq(irq))
  397. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  398. irq);
  399. return 0;
  400. }
  401. evtchn = bind_pirq.port;
  402. pirq_query_unmask(irq);
  403. evtchn_to_irq[evtchn] = irq;
  404. bind_evtchn_to_cpu(evtchn, 0);
  405. info->evtchn = evtchn;
  406. out:
  407. unmask_evtchn(evtchn);
  408. pirq_unmask_notify(irq);
  409. return 0;
  410. }
  411. static void shutdown_pirq(unsigned int irq)
  412. {
  413. struct evtchn_close close;
  414. struct irq_info *info = info_for_irq(irq);
  415. int evtchn = evtchn_from_irq(irq);
  416. BUG_ON(info->type != IRQT_PIRQ);
  417. if (!VALID_EVTCHN(evtchn))
  418. return;
  419. mask_evtchn(evtchn);
  420. close.port = evtchn;
  421. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  422. BUG();
  423. bind_evtchn_to_cpu(evtchn, 0);
  424. evtchn_to_irq[evtchn] = -1;
  425. info->evtchn = 0;
  426. }
  427. static void enable_pirq(unsigned int irq)
  428. {
  429. startup_pirq(irq);
  430. }
  431. static void disable_pirq(unsigned int irq)
  432. {
  433. }
  434. static void ack_pirq(unsigned int irq)
  435. {
  436. int evtchn = evtchn_from_irq(irq);
  437. move_native_irq(irq);
  438. if (VALID_EVTCHN(evtchn)) {
  439. mask_evtchn(evtchn);
  440. clear_evtchn(evtchn);
  441. }
  442. }
  443. static void end_pirq(unsigned int irq)
  444. {
  445. int evtchn = evtchn_from_irq(irq);
  446. struct irq_desc *desc = irq_to_desc(irq);
  447. if (WARN_ON(!desc))
  448. return;
  449. if ((desc->status & (IRQ_DISABLED|IRQ_PENDING)) ==
  450. (IRQ_DISABLED|IRQ_PENDING)) {
  451. shutdown_pirq(irq);
  452. } else if (VALID_EVTCHN(evtchn)) {
  453. unmask_evtchn(evtchn);
  454. pirq_unmask_notify(irq);
  455. }
  456. }
  457. static int find_irq_by_gsi(unsigned gsi)
  458. {
  459. int irq;
  460. for (irq = 0; irq < nr_irqs; irq++) {
  461. struct irq_info *info = info_for_irq(irq);
  462. if (info == NULL || info->type != IRQT_PIRQ)
  463. continue;
  464. if (gsi_from_irq(irq) == gsi)
  465. return irq;
  466. }
  467. return -1;
  468. }
  469. int xen_allocate_pirq(unsigned gsi, int shareable, char *name)
  470. {
  471. return xen_map_pirq_gsi(gsi, gsi, shareable, name);
  472. }
  473. /* xen_map_pirq_gsi might allocate irqs from the top down, as a
  474. * consequence don't assume that the irq number returned has a low value
  475. * or can be used as a pirq number unless you know otherwise.
  476. *
  477. * One notable exception is when xen_map_pirq_gsi is called passing an
  478. * hardware gsi as argument, in that case the irq number returned
  479. * matches the gsi number passed as second argument.
  480. *
  481. * Note: We don't assign an event channel until the irq actually started
  482. * up. Return an existing irq if we've already got one for the gsi.
  483. */
  484. int xen_map_pirq_gsi(unsigned pirq, unsigned gsi, int shareable, char *name)
  485. {
  486. int irq = 0;
  487. struct physdev_irq irq_op;
  488. spin_lock(&irq_mapping_update_lock);
  489. if ((pirq > nr_pirqs) || (gsi > nr_irqs)) {
  490. printk(KERN_WARNING "xen_map_pirq_gsi: %s %s is incorrect!\n",
  491. pirq > nr_pirqs ? "nr_pirqs" :"",
  492. gsi > nr_irqs ? "nr_irqs" : "");
  493. goto out;
  494. }
  495. irq = find_irq_by_gsi(gsi);
  496. if (irq != -1) {
  497. printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
  498. irq, gsi);
  499. goto out; /* XXX need refcount? */
  500. }
  501. /* If we are a PV guest, we don't have GSIs (no ACPI passed). Therefore
  502. * we are using the !xen_initial_domain() to drop in the function.*/
  503. if (identity_mapped_irq(gsi) || !xen_initial_domain()) {
  504. irq = gsi;
  505. irq_alloc_desc_at(irq, 0);
  506. } else
  507. irq = find_unbound_irq();
  508. set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
  509. handle_level_irq, name);
  510. irq_op.irq = irq;
  511. irq_op.vector = 0;
  512. /* Only the privileged domain can do this. For non-priv, the pcifront
  513. * driver provides a PCI bus that does the call to do exactly
  514. * this in the priv domain. */
  515. if (xen_initial_domain() &&
  516. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  517. irq_free_desc(irq);
  518. irq = -ENOSPC;
  519. goto out;
  520. }
  521. irq_info[irq] = mk_pirq_info(0, pirq, gsi, irq_op.vector);
  522. irq_info[irq].u.pirq.flags |= shareable ? PIRQ_SHAREABLE : 0;
  523. pirq_to_irq[pirq] = irq;
  524. out:
  525. spin_unlock(&irq_mapping_update_lock);
  526. return irq;
  527. }
  528. int xen_destroy_irq(int irq)
  529. {
  530. struct irq_desc *desc;
  531. int rc = -ENOENT;
  532. spin_lock(&irq_mapping_update_lock);
  533. desc = irq_to_desc(irq);
  534. if (!desc)
  535. goto out;
  536. irq_info[irq] = mk_unbound_info();
  537. irq_free_desc(irq);
  538. out:
  539. spin_unlock(&irq_mapping_update_lock);
  540. return rc;
  541. }
  542. int xen_vector_from_irq(unsigned irq)
  543. {
  544. return vector_from_irq(irq);
  545. }
  546. int xen_gsi_from_irq(unsigned irq)
  547. {
  548. return gsi_from_irq(irq);
  549. }
  550. int bind_evtchn_to_irq(unsigned int evtchn)
  551. {
  552. int irq;
  553. spin_lock(&irq_mapping_update_lock);
  554. irq = evtchn_to_irq[evtchn];
  555. if (irq == -1) {
  556. irq = find_unbound_irq();
  557. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  558. handle_edge_irq, "event");
  559. evtchn_to_irq[evtchn] = irq;
  560. irq_info[irq] = mk_evtchn_info(evtchn);
  561. }
  562. spin_unlock(&irq_mapping_update_lock);
  563. return irq;
  564. }
  565. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  566. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  567. {
  568. struct evtchn_bind_ipi bind_ipi;
  569. int evtchn, irq;
  570. spin_lock(&irq_mapping_update_lock);
  571. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  572. if (irq == -1) {
  573. irq = find_unbound_irq();
  574. if (irq < 0)
  575. goto out;
  576. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  577. handle_percpu_irq, "ipi");
  578. bind_ipi.vcpu = cpu;
  579. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  580. &bind_ipi) != 0)
  581. BUG();
  582. evtchn = bind_ipi.port;
  583. evtchn_to_irq[evtchn] = irq;
  584. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  585. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  586. bind_evtchn_to_cpu(evtchn, cpu);
  587. }
  588. out:
  589. spin_unlock(&irq_mapping_update_lock);
  590. return irq;
  591. }
  592. static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  593. {
  594. struct evtchn_bind_virq bind_virq;
  595. int evtchn, irq;
  596. spin_lock(&irq_mapping_update_lock);
  597. irq = per_cpu(virq_to_irq, cpu)[virq];
  598. if (irq == -1) {
  599. bind_virq.virq = virq;
  600. bind_virq.vcpu = cpu;
  601. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  602. &bind_virq) != 0)
  603. BUG();
  604. evtchn = bind_virq.port;
  605. irq = find_unbound_irq();
  606. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  607. handle_percpu_irq, "virq");
  608. evtchn_to_irq[evtchn] = irq;
  609. irq_info[irq] = mk_virq_info(evtchn, virq);
  610. per_cpu(virq_to_irq, cpu)[virq] = irq;
  611. bind_evtchn_to_cpu(evtchn, cpu);
  612. }
  613. spin_unlock(&irq_mapping_update_lock);
  614. return irq;
  615. }
  616. static void unbind_from_irq(unsigned int irq)
  617. {
  618. struct evtchn_close close;
  619. int evtchn = evtchn_from_irq(irq);
  620. spin_lock(&irq_mapping_update_lock);
  621. if (VALID_EVTCHN(evtchn)) {
  622. close.port = evtchn;
  623. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  624. BUG();
  625. switch (type_from_irq(irq)) {
  626. case IRQT_VIRQ:
  627. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  628. [virq_from_irq(irq)] = -1;
  629. break;
  630. case IRQT_IPI:
  631. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  632. [ipi_from_irq(irq)] = -1;
  633. break;
  634. default:
  635. break;
  636. }
  637. /* Closed ports are implicitly re-bound to VCPU0. */
  638. bind_evtchn_to_cpu(evtchn, 0);
  639. evtchn_to_irq[evtchn] = -1;
  640. }
  641. if (irq_info[irq].type != IRQT_UNBOUND) {
  642. irq_info[irq] = mk_unbound_info();
  643. irq_free_desc(irq);
  644. }
  645. spin_unlock(&irq_mapping_update_lock);
  646. }
  647. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  648. irq_handler_t handler,
  649. unsigned long irqflags,
  650. const char *devname, void *dev_id)
  651. {
  652. unsigned int irq;
  653. int retval;
  654. irq = bind_evtchn_to_irq(evtchn);
  655. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  656. if (retval != 0) {
  657. unbind_from_irq(irq);
  658. return retval;
  659. }
  660. return irq;
  661. }
  662. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  663. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  664. irq_handler_t handler,
  665. unsigned long irqflags, const char *devname, void *dev_id)
  666. {
  667. unsigned int irq;
  668. int retval;
  669. irq = bind_virq_to_irq(virq, cpu);
  670. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  671. if (retval != 0) {
  672. unbind_from_irq(irq);
  673. return retval;
  674. }
  675. return irq;
  676. }
  677. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  678. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  679. unsigned int cpu,
  680. irq_handler_t handler,
  681. unsigned long irqflags,
  682. const char *devname,
  683. void *dev_id)
  684. {
  685. int irq, retval;
  686. irq = bind_ipi_to_irq(ipi, cpu);
  687. if (irq < 0)
  688. return irq;
  689. irqflags |= IRQF_NO_SUSPEND;
  690. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  691. if (retval != 0) {
  692. unbind_from_irq(irq);
  693. return retval;
  694. }
  695. return irq;
  696. }
  697. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  698. {
  699. free_irq(irq, dev_id);
  700. unbind_from_irq(irq);
  701. }
  702. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  703. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  704. {
  705. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  706. BUG_ON(irq < 0);
  707. notify_remote_via_irq(irq);
  708. }
  709. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  710. {
  711. struct shared_info *sh = HYPERVISOR_shared_info;
  712. int cpu = smp_processor_id();
  713. int i;
  714. unsigned long flags;
  715. static DEFINE_SPINLOCK(debug_lock);
  716. spin_lock_irqsave(&debug_lock, flags);
  717. printk("vcpu %d\n ", cpu);
  718. for_each_online_cpu(i) {
  719. struct vcpu_info *v = per_cpu(xen_vcpu, i);
  720. printk("%d: masked=%d pending=%d event_sel %08lx\n ", i,
  721. (get_irq_regs() && i == cpu) ? xen_irqs_disabled(get_irq_regs()) : v->evtchn_upcall_mask,
  722. v->evtchn_upcall_pending,
  723. v->evtchn_pending_sel);
  724. }
  725. printk("pending:\n ");
  726. for(i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  727. printk("%08lx%s", sh->evtchn_pending[i],
  728. i % 8 == 0 ? "\n " : " ");
  729. printk("\nmasks:\n ");
  730. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  731. printk("%08lx%s", sh->evtchn_mask[i],
  732. i % 8 == 0 ? "\n " : " ");
  733. printk("\nunmasked:\n ");
  734. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  735. printk("%08lx%s", sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  736. i % 8 == 0 ? "\n " : " ");
  737. printk("\npending list:\n");
  738. for(i = 0; i < NR_EVENT_CHANNELS; i++) {
  739. if (sync_test_bit(i, sh->evtchn_pending)) {
  740. printk(" %d: event %d -> irq %d\n",
  741. cpu_from_evtchn(i), i,
  742. evtchn_to_irq[i]);
  743. }
  744. }
  745. spin_unlock_irqrestore(&debug_lock, flags);
  746. return IRQ_HANDLED;
  747. }
  748. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  749. /*
  750. * Search the CPUs pending events bitmasks. For each one found, map
  751. * the event number to an irq, and feed it into do_IRQ() for
  752. * handling.
  753. *
  754. * Xen uses a two-level bitmap to speed searching. The first level is
  755. * a bitset of words which contain pending event bits. The second
  756. * level is a bitset of pending events themselves.
  757. */
  758. static void __xen_evtchn_do_upcall(void)
  759. {
  760. int cpu = get_cpu();
  761. struct shared_info *s = HYPERVISOR_shared_info;
  762. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  763. unsigned count;
  764. do {
  765. unsigned long pending_words;
  766. vcpu_info->evtchn_upcall_pending = 0;
  767. if (__get_cpu_var(xed_nesting_count)++)
  768. goto out;
  769. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  770. /* Clear master flag /before/ clearing selector flag. */
  771. wmb();
  772. #endif
  773. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  774. while (pending_words != 0) {
  775. unsigned long pending_bits;
  776. int word_idx = __ffs(pending_words);
  777. pending_words &= ~(1UL << word_idx);
  778. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  779. int bit_idx = __ffs(pending_bits);
  780. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  781. int irq = evtchn_to_irq[port];
  782. struct irq_desc *desc;
  783. if (irq != -1) {
  784. desc = irq_to_desc(irq);
  785. if (desc)
  786. generic_handle_irq_desc(irq, desc);
  787. }
  788. }
  789. }
  790. BUG_ON(!irqs_disabled());
  791. count = __get_cpu_var(xed_nesting_count);
  792. __get_cpu_var(xed_nesting_count) = 0;
  793. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  794. out:
  795. put_cpu();
  796. }
  797. void xen_evtchn_do_upcall(struct pt_regs *regs)
  798. {
  799. struct pt_regs *old_regs = set_irq_regs(regs);
  800. exit_idle();
  801. irq_enter();
  802. __xen_evtchn_do_upcall();
  803. irq_exit();
  804. set_irq_regs(old_regs);
  805. }
  806. void xen_hvm_evtchn_do_upcall(void)
  807. {
  808. __xen_evtchn_do_upcall();
  809. }
  810. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  811. /* Rebind a new event channel to an existing irq. */
  812. void rebind_evtchn_irq(int evtchn, int irq)
  813. {
  814. struct irq_info *info = info_for_irq(irq);
  815. /* Make sure the irq is masked, since the new event channel
  816. will also be masked. */
  817. disable_irq(irq);
  818. spin_lock(&irq_mapping_update_lock);
  819. /* After resume the irq<->evtchn mappings are all cleared out */
  820. BUG_ON(evtchn_to_irq[evtchn] != -1);
  821. /* Expect irq to have been bound before,
  822. so there should be a proper type */
  823. BUG_ON(info->type == IRQT_UNBOUND);
  824. evtchn_to_irq[evtchn] = irq;
  825. irq_info[irq] = mk_evtchn_info(evtchn);
  826. spin_unlock(&irq_mapping_update_lock);
  827. /* new event channels are always bound to cpu 0 */
  828. irq_set_affinity(irq, cpumask_of(0));
  829. /* Unmask the event channel. */
  830. enable_irq(irq);
  831. }
  832. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  833. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  834. {
  835. struct evtchn_bind_vcpu bind_vcpu;
  836. int evtchn = evtchn_from_irq(irq);
  837. /* events delivered via platform PCI interrupts are always
  838. * routed to vcpu 0 */
  839. if (!VALID_EVTCHN(evtchn) ||
  840. (xen_hvm_domain() && !xen_have_vector_callback))
  841. return -1;
  842. /* Send future instances of this interrupt to other vcpu. */
  843. bind_vcpu.port = evtchn;
  844. bind_vcpu.vcpu = tcpu;
  845. /*
  846. * If this fails, it usually just indicates that we're dealing with a
  847. * virq or IPI channel, which don't actually need to be rebound. Ignore
  848. * it, but don't do the xenlinux-level rebind in that case.
  849. */
  850. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  851. bind_evtchn_to_cpu(evtchn, tcpu);
  852. return 0;
  853. }
  854. static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
  855. {
  856. unsigned tcpu = cpumask_first(dest);
  857. return rebind_irq_to_cpu(irq, tcpu);
  858. }
  859. int resend_irq_on_evtchn(unsigned int irq)
  860. {
  861. int masked, evtchn = evtchn_from_irq(irq);
  862. struct shared_info *s = HYPERVISOR_shared_info;
  863. if (!VALID_EVTCHN(evtchn))
  864. return 1;
  865. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  866. sync_set_bit(evtchn, s->evtchn_pending);
  867. if (!masked)
  868. unmask_evtchn(evtchn);
  869. return 1;
  870. }
  871. static void enable_dynirq(unsigned int irq)
  872. {
  873. int evtchn = evtchn_from_irq(irq);
  874. if (VALID_EVTCHN(evtchn))
  875. unmask_evtchn(evtchn);
  876. }
  877. static void disable_dynirq(unsigned int irq)
  878. {
  879. int evtchn = evtchn_from_irq(irq);
  880. if (VALID_EVTCHN(evtchn))
  881. mask_evtchn(evtchn);
  882. }
  883. static void ack_dynirq(unsigned int irq)
  884. {
  885. int evtchn = evtchn_from_irq(irq);
  886. move_native_irq(irq);
  887. if (VALID_EVTCHN(evtchn))
  888. clear_evtchn(evtchn);
  889. }
  890. static int retrigger_dynirq(unsigned int irq)
  891. {
  892. int evtchn = evtchn_from_irq(irq);
  893. struct shared_info *sh = HYPERVISOR_shared_info;
  894. int ret = 0;
  895. if (VALID_EVTCHN(evtchn)) {
  896. int masked;
  897. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  898. sync_set_bit(evtchn, sh->evtchn_pending);
  899. if (!masked)
  900. unmask_evtchn(evtchn);
  901. ret = 1;
  902. }
  903. return ret;
  904. }
  905. static void restore_cpu_virqs(unsigned int cpu)
  906. {
  907. struct evtchn_bind_virq bind_virq;
  908. int virq, irq, evtchn;
  909. for (virq = 0; virq < NR_VIRQS; virq++) {
  910. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  911. continue;
  912. BUG_ON(virq_from_irq(irq) != virq);
  913. /* Get a new binding from Xen. */
  914. bind_virq.virq = virq;
  915. bind_virq.vcpu = cpu;
  916. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  917. &bind_virq) != 0)
  918. BUG();
  919. evtchn = bind_virq.port;
  920. /* Record the new mapping. */
  921. evtchn_to_irq[evtchn] = irq;
  922. irq_info[irq] = mk_virq_info(evtchn, virq);
  923. bind_evtchn_to_cpu(evtchn, cpu);
  924. /* Ready for use. */
  925. unmask_evtchn(evtchn);
  926. }
  927. }
  928. static void restore_cpu_ipis(unsigned int cpu)
  929. {
  930. struct evtchn_bind_ipi bind_ipi;
  931. int ipi, irq, evtchn;
  932. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  933. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  934. continue;
  935. BUG_ON(ipi_from_irq(irq) != ipi);
  936. /* Get a new binding from Xen. */
  937. bind_ipi.vcpu = cpu;
  938. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  939. &bind_ipi) != 0)
  940. BUG();
  941. evtchn = bind_ipi.port;
  942. /* Record the new mapping. */
  943. evtchn_to_irq[evtchn] = irq;
  944. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  945. bind_evtchn_to_cpu(evtchn, cpu);
  946. /* Ready for use. */
  947. unmask_evtchn(evtchn);
  948. }
  949. }
  950. /* Clear an irq's pending state, in preparation for polling on it */
  951. void xen_clear_irq_pending(int irq)
  952. {
  953. int evtchn = evtchn_from_irq(irq);
  954. if (VALID_EVTCHN(evtchn))
  955. clear_evtchn(evtchn);
  956. }
  957. EXPORT_SYMBOL(xen_clear_irq_pending);
  958. void xen_set_irq_pending(int irq)
  959. {
  960. int evtchn = evtchn_from_irq(irq);
  961. if (VALID_EVTCHN(evtchn))
  962. set_evtchn(evtchn);
  963. }
  964. bool xen_test_irq_pending(int irq)
  965. {
  966. int evtchn = evtchn_from_irq(irq);
  967. bool ret = false;
  968. if (VALID_EVTCHN(evtchn))
  969. ret = test_evtchn(evtchn);
  970. return ret;
  971. }
  972. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  973. * the irq will be disabled so it won't deliver an interrupt. */
  974. void xen_poll_irq_timeout(int irq, u64 timeout)
  975. {
  976. evtchn_port_t evtchn = evtchn_from_irq(irq);
  977. if (VALID_EVTCHN(evtchn)) {
  978. struct sched_poll poll;
  979. poll.nr_ports = 1;
  980. poll.timeout = timeout;
  981. set_xen_guest_handle(poll.ports, &evtchn);
  982. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  983. BUG();
  984. }
  985. }
  986. EXPORT_SYMBOL(xen_poll_irq_timeout);
  987. /* Poll waiting for an irq to become pending. In the usual case, the
  988. * irq will be disabled so it won't deliver an interrupt. */
  989. void xen_poll_irq(int irq)
  990. {
  991. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  992. }
  993. void xen_irq_resume(void)
  994. {
  995. unsigned int cpu, irq, evtchn;
  996. init_evtchn_cpu_bindings();
  997. /* New event-channel space is not 'live' yet. */
  998. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  999. mask_evtchn(evtchn);
  1000. /* No IRQ <-> event-channel mappings. */
  1001. for (irq = 0; irq < nr_irqs; irq++)
  1002. irq_info[irq].evtchn = 0; /* zap event-channel binding */
  1003. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1004. evtchn_to_irq[evtchn] = -1;
  1005. for_each_possible_cpu(cpu) {
  1006. restore_cpu_virqs(cpu);
  1007. restore_cpu_ipis(cpu);
  1008. }
  1009. }
  1010. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1011. .name = "xen-dyn",
  1012. .disable = disable_dynirq,
  1013. .mask = disable_dynirq,
  1014. .unmask = enable_dynirq,
  1015. .ack = ack_dynirq,
  1016. .set_affinity = set_affinity_irq,
  1017. .retrigger = retrigger_dynirq,
  1018. };
  1019. static struct irq_chip xen_pirq_chip __read_mostly = {
  1020. .name = "xen-pirq",
  1021. .startup = startup_pirq,
  1022. .shutdown = shutdown_pirq,
  1023. .enable = enable_pirq,
  1024. .unmask = enable_pirq,
  1025. .disable = disable_pirq,
  1026. .mask = disable_pirq,
  1027. .ack = ack_pirq,
  1028. .end = end_pirq,
  1029. .set_affinity = set_affinity_irq,
  1030. .retrigger = retrigger_dynirq,
  1031. };
  1032. static struct irq_chip xen_percpu_chip __read_mostly = {
  1033. .name = "xen-percpu",
  1034. .disable = disable_dynirq,
  1035. .mask = disable_dynirq,
  1036. .unmask = enable_dynirq,
  1037. .ack = ack_dynirq,
  1038. };
  1039. int xen_set_callback_via(uint64_t via)
  1040. {
  1041. struct xen_hvm_param a;
  1042. a.domid = DOMID_SELF;
  1043. a.index = HVM_PARAM_CALLBACK_IRQ;
  1044. a.value = via;
  1045. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1046. }
  1047. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1048. #ifdef CONFIG_XEN_PVHVM
  1049. /* Vector callbacks are better than PCI interrupts to receive event
  1050. * channel notifications because we can receive vector callbacks on any
  1051. * vcpu and we don't need PCI support or APIC interactions. */
  1052. void xen_callback_vector(void)
  1053. {
  1054. int rc;
  1055. uint64_t callback_via;
  1056. if (xen_have_vector_callback) {
  1057. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1058. rc = xen_set_callback_via(callback_via);
  1059. if (rc) {
  1060. printk(KERN_ERR "Request for Xen HVM callback vector"
  1061. " failed.\n");
  1062. xen_have_vector_callback = 0;
  1063. return;
  1064. }
  1065. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1066. "enabled\n");
  1067. /* in the restore case the vector has already been allocated */
  1068. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1069. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1070. }
  1071. }
  1072. #else
  1073. void xen_callback_vector(void) {}
  1074. #endif
  1075. void __init xen_init_IRQ(void)
  1076. {
  1077. int i, rc;
  1078. struct physdev_nr_pirqs op_nr_pirqs;
  1079. cpu_evtchn_mask_p = kcalloc(nr_cpu_ids, sizeof(struct cpu_evtchn_s),
  1080. GFP_KERNEL);
  1081. irq_info = kcalloc(nr_irqs, sizeof(*irq_info), GFP_KERNEL);
  1082. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_nr_pirqs, &op_nr_pirqs);
  1083. if (rc < 0) {
  1084. nr_pirqs = nr_irqs;
  1085. if (rc != -ENOSYS)
  1086. printk(KERN_WARNING "PHYSDEVOP_get_nr_pirqs returned rc=%d\n", rc);
  1087. } else {
  1088. if (xen_pv_domain() && !xen_initial_domain())
  1089. nr_pirqs = max((int)op_nr_pirqs.nr_pirqs, nr_irqs);
  1090. else
  1091. nr_pirqs = op_nr_pirqs.nr_pirqs;
  1092. }
  1093. pirq_to_irq = kcalloc(nr_pirqs, sizeof(*pirq_to_irq), GFP_KERNEL);
  1094. for (i = 0; i < nr_pirqs; i++)
  1095. pirq_to_irq[i] = -1;
  1096. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1097. GFP_KERNEL);
  1098. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1099. evtchn_to_irq[i] = -1;
  1100. init_evtchn_cpu_bindings();
  1101. /* No event channels are 'live' right now. */
  1102. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1103. mask_evtchn(i);
  1104. if (xen_hvm_domain()) {
  1105. xen_callback_vector();
  1106. native_init_IRQ();
  1107. } else {
  1108. irq_ctx_init(smp_processor_id());
  1109. }
  1110. }