Kconfig 53 KB

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  1. config ARM
  2. bool
  3. default y
  4. select HAVE_AOUT
  5. select HAVE_DMA_API_DEBUG
  6. select HAVE_IDE
  7. select HAVE_MEMBLOCK
  8. select RTC_LIB
  9. select SYS_SUPPORTS_APM_EMULATION
  10. select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
  11. select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12. select HAVE_ARCH_KGDB
  13. select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
  14. select HAVE_KRETPROBES if (HAVE_KPROBES)
  15. select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16. select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17. select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18. select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19. select HAVE_GENERIC_DMA_COHERENT
  20. select HAVE_KERNEL_GZIP
  21. select HAVE_KERNEL_LZO
  22. select HAVE_KERNEL_LZMA
  23. select HAVE_IRQ_WORK
  24. select HAVE_PERF_EVENTS
  25. select PERF_USE_VMALLOC
  26. select HAVE_REGS_AND_STACK_ACCESS_API
  27. select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
  28. select HAVE_C_RECORDMCOUNT
  29. help
  30. The ARM series is a line of low-power-consumption RISC chip designs
  31. licensed by ARM Ltd and targeted at embedded applications and
  32. handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
  33. manufactured, but legacy ARM-based PC hardware remains popular in
  34. Europe. There is an ARM Linux project with a web page at
  35. <http://www.arm.linux.org.uk/>.
  36. config HAVE_PWM
  37. bool
  38. config MIGHT_HAVE_PCI
  39. bool
  40. config SYS_SUPPORTS_APM_EMULATION
  41. bool
  42. config HAVE_SCHED_CLOCK
  43. bool
  44. config GENERIC_GPIO
  45. bool
  46. config ARCH_USES_GETTIMEOFFSET
  47. bool
  48. default n
  49. config GENERIC_CLOCKEVENTS
  50. bool
  51. config GENERIC_CLOCKEVENTS_BROADCAST
  52. bool
  53. depends on GENERIC_CLOCKEVENTS
  54. default y if SMP
  55. config HAVE_TCM
  56. bool
  57. select GENERIC_ALLOCATOR
  58. config HAVE_PROC_CPU
  59. bool
  60. config NO_IOPORT
  61. bool
  62. config EISA
  63. bool
  64. ---help---
  65. The Extended Industry Standard Architecture (EISA) bus was
  66. developed as an open alternative to the IBM MicroChannel bus.
  67. The EISA bus provided some of the features of the IBM MicroChannel
  68. bus while maintaining backward compatibility with cards made for
  69. the older ISA bus. The EISA bus saw limited use between 1988 and
  70. 1995 when it was made obsolete by the PCI bus.
  71. Say Y here if you are building a kernel for an EISA-based machine.
  72. Otherwise, say N.
  73. config SBUS
  74. bool
  75. config MCA
  76. bool
  77. help
  78. MicroChannel Architecture is found in some IBM PS/2 machines and
  79. laptops. It is a bus system similar to PCI or ISA. See
  80. <file:Documentation/mca.txt> (and especially the web page given
  81. there) before attempting to build an MCA bus kernel.
  82. config GENERIC_HARDIRQS
  83. bool
  84. default y
  85. config STACKTRACE_SUPPORT
  86. bool
  87. default y
  88. config HAVE_LATENCYTOP_SUPPORT
  89. bool
  90. depends on !SMP
  91. default y
  92. config LOCKDEP_SUPPORT
  93. bool
  94. default y
  95. config TRACE_IRQFLAGS_SUPPORT
  96. bool
  97. default y
  98. config HARDIRQS_SW_RESEND
  99. bool
  100. default y
  101. config GENERIC_IRQ_PROBE
  102. bool
  103. default y
  104. config GENERIC_LOCKBREAK
  105. bool
  106. default y
  107. depends on SMP && PREEMPT
  108. config RWSEM_GENERIC_SPINLOCK
  109. bool
  110. default y
  111. config RWSEM_XCHGADD_ALGORITHM
  112. bool
  113. config ARCH_HAS_ILOG2_U32
  114. bool
  115. config ARCH_HAS_ILOG2_U64
  116. bool
  117. config ARCH_HAS_CPUFREQ
  118. bool
  119. help
  120. Internal node to signify that the ARCH has CPUFREQ support
  121. and that the relevant menu configurations are displayed for
  122. it.
  123. config ARCH_HAS_CPU_IDLE_WAIT
  124. def_bool y
  125. config GENERIC_HWEIGHT
  126. bool
  127. default y
  128. config GENERIC_CALIBRATE_DELAY
  129. bool
  130. default y
  131. config ARCH_MAY_HAVE_PC_FDC
  132. bool
  133. config ZONE_DMA
  134. bool
  135. config NEED_DMA_MAP_STATE
  136. def_bool y
  137. config GENERIC_ISA_DMA
  138. bool
  139. config FIQ
  140. bool
  141. config ARCH_MTD_XIP
  142. bool
  143. config GENERIC_HARDIRQS_NO__DO_IRQ
  144. def_bool y
  145. config ARM_L1_CACHE_SHIFT_6
  146. bool
  147. help
  148. Setting ARM L1 cache line size to 64 Bytes.
  149. config VECTORS_BASE
  150. hex
  151. default 0xffff0000 if MMU || CPU_HIGH_VECTOR
  152. default DRAM_BASE if REMAP_VECTORS_TO_RAM
  153. default 0x00000000
  154. help
  155. The base address of exception vectors.
  156. source "init/Kconfig"
  157. source "kernel/Kconfig.freezer"
  158. menu "System Type"
  159. config MMU
  160. bool "MMU-based Paged Memory Management Support"
  161. default y
  162. help
  163. Select if you want MMU-based virtualised addressing space
  164. support by paged memory management. If unsure, say 'Y'.
  165. #
  166. # The "ARM system type" choice list is ordered alphabetically by option
  167. # text. Please add new entries in the option alphabetic order.
  168. #
  169. choice
  170. prompt "ARM system type"
  171. default ARCH_VERSATILE
  172. config ARCH_AAEC2000
  173. bool "Agilent AAEC-2000 based"
  174. select CPU_ARM920T
  175. select ARM_AMBA
  176. select HAVE_CLK
  177. select ARCH_USES_GETTIMEOFFSET
  178. help
  179. This enables support for systems based on the Agilent AAEC-2000
  180. config ARCH_INTEGRATOR
  181. bool "ARM Ltd. Integrator family"
  182. select ARM_AMBA
  183. select ARCH_HAS_CPUFREQ
  184. select CLKDEV_LOOKUP
  185. select ICST
  186. select GENERIC_CLOCKEVENTS
  187. select PLAT_VERSATILE
  188. help
  189. Support for ARM's Integrator platform.
  190. config ARCH_REALVIEW
  191. bool "ARM Ltd. RealView family"
  192. select ARM_AMBA
  193. select CLKDEV_LOOKUP
  194. select HAVE_SCHED_CLOCK
  195. select ICST
  196. select GENERIC_CLOCKEVENTS
  197. select ARCH_WANT_OPTIONAL_GPIOLIB
  198. select PLAT_VERSATILE
  199. select ARM_TIMER_SP804
  200. select GPIO_PL061 if GPIOLIB
  201. help
  202. This enables support for ARM Ltd RealView boards.
  203. config ARCH_VERSATILE
  204. bool "ARM Ltd. Versatile family"
  205. select ARM_AMBA
  206. select ARM_VIC
  207. select CLKDEV_LOOKUP
  208. select HAVE_SCHED_CLOCK
  209. select ICST
  210. select GENERIC_CLOCKEVENTS
  211. select ARCH_WANT_OPTIONAL_GPIOLIB
  212. select PLAT_VERSATILE
  213. select ARM_TIMER_SP804
  214. help
  215. This enables support for ARM Ltd Versatile board.
  216. config ARCH_VEXPRESS
  217. bool "ARM Ltd. Versatile Express family"
  218. select ARCH_WANT_OPTIONAL_GPIOLIB
  219. select ARM_AMBA
  220. select ARM_TIMER_SP804
  221. select CLKDEV_LOOKUP
  222. select GENERIC_CLOCKEVENTS
  223. select HAVE_CLK
  224. select HAVE_SCHED_CLOCK
  225. select ICST
  226. select PLAT_VERSATILE
  227. help
  228. This enables support for the ARM Ltd Versatile Express boards.
  229. config ARCH_AT91
  230. bool "Atmel AT91"
  231. select ARCH_REQUIRE_GPIOLIB
  232. select HAVE_CLK
  233. help
  234. This enables support for systems based on the Atmel AT91RM9200,
  235. AT91SAM9 and AT91CAP9 processors.
  236. config ARCH_BCMRING
  237. bool "Broadcom BCMRING"
  238. depends on MMU
  239. select CPU_V6
  240. select ARM_AMBA
  241. select CLKDEV_LOOKUP
  242. select GENERIC_CLOCKEVENTS
  243. select ARCH_WANT_OPTIONAL_GPIOLIB
  244. help
  245. Support for Broadcom's BCMRing platform.
  246. config ARCH_CLPS711X
  247. bool "Cirrus Logic CLPS711x/EP721x-based"
  248. select CPU_ARM720T
  249. select ARCH_USES_GETTIMEOFFSET
  250. help
  251. Support for Cirrus Logic 711x/721x based boards.
  252. config ARCH_CNS3XXX
  253. bool "Cavium Networks CNS3XXX family"
  254. select CPU_V6
  255. select GENERIC_CLOCKEVENTS
  256. select ARM_GIC
  257. select MIGHT_HAVE_PCI
  258. select PCI_DOMAINS if PCI
  259. help
  260. Support for Cavium Networks CNS3XXX platform.
  261. config ARCH_GEMINI
  262. bool "Cortina Systems Gemini"
  263. select CPU_FA526
  264. select ARCH_REQUIRE_GPIOLIB
  265. select ARCH_USES_GETTIMEOFFSET
  266. help
  267. Support for the Cortina Systems Gemini family SoCs
  268. config ARCH_EBSA110
  269. bool "EBSA-110"
  270. select CPU_SA110
  271. select ISA
  272. select NO_IOPORT
  273. select ARCH_USES_GETTIMEOFFSET
  274. help
  275. This is an evaluation board for the StrongARM processor available
  276. from Digital. It has limited hardware on-board, including an
  277. Ethernet interface, two PCMCIA sockets, two serial ports and a
  278. parallel port.
  279. config ARCH_EP93XX
  280. bool "EP93xx-based"
  281. select CPU_ARM920T
  282. select ARM_AMBA
  283. select ARM_VIC
  284. select CLKDEV_LOOKUP
  285. select ARCH_REQUIRE_GPIOLIB
  286. select ARCH_HAS_HOLES_MEMORYMODEL
  287. select ARCH_USES_GETTIMEOFFSET
  288. help
  289. This enables support for the Cirrus EP93xx series of CPUs.
  290. config ARCH_FOOTBRIDGE
  291. bool "FootBridge"
  292. select CPU_SA110
  293. select FOOTBRIDGE
  294. select ARCH_USES_GETTIMEOFFSET
  295. help
  296. Support for systems based on the DC21285 companion chip
  297. ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
  298. config ARCH_MXC
  299. bool "Freescale MXC/iMX-based"
  300. select GENERIC_CLOCKEVENTS
  301. select ARCH_REQUIRE_GPIOLIB
  302. select CLKDEV_LOOKUP
  303. help
  304. Support for Freescale MXC/iMX-based family of processors
  305. config ARCH_MXS
  306. bool "Freescale MXS-based"
  307. select GENERIC_CLOCKEVENTS
  308. select ARCH_REQUIRE_GPIOLIB
  309. select COMMON_CLKDEV
  310. help
  311. Support for Freescale MXS-based family of processors
  312. config ARCH_STMP3XXX
  313. bool "Freescale STMP3xxx"
  314. select CPU_ARM926T
  315. select CLKDEV_LOOKUP
  316. select ARCH_REQUIRE_GPIOLIB
  317. select GENERIC_CLOCKEVENTS
  318. select USB_ARCH_HAS_EHCI
  319. help
  320. Support for systems based on the Freescale 3xxx CPUs.
  321. config ARCH_NETX
  322. bool "Hilscher NetX based"
  323. select CPU_ARM926T
  324. select ARM_VIC
  325. select GENERIC_CLOCKEVENTS
  326. help
  327. This enables support for systems based on the Hilscher NetX Soc
  328. config ARCH_H720X
  329. bool "Hynix HMS720x-based"
  330. select CPU_ARM720T
  331. select ISA_DMA_API
  332. select ARCH_USES_GETTIMEOFFSET
  333. help
  334. This enables support for systems based on the Hynix HMS720x
  335. config ARCH_IOP13XX
  336. bool "IOP13xx-based"
  337. depends on MMU
  338. select CPU_XSC3
  339. select PLAT_IOP
  340. select PCI
  341. select ARCH_SUPPORTS_MSI
  342. select VMSPLIT_1G
  343. help
  344. Support for Intel's IOP13XX (XScale) family of processors.
  345. config ARCH_IOP32X
  346. bool "IOP32x-based"
  347. depends on MMU
  348. select CPU_XSCALE
  349. select PLAT_IOP
  350. select PCI
  351. select ARCH_REQUIRE_GPIOLIB
  352. help
  353. Support for Intel's 80219 and IOP32X (XScale) family of
  354. processors.
  355. config ARCH_IOP33X
  356. bool "IOP33x-based"
  357. depends on MMU
  358. select CPU_XSCALE
  359. select PLAT_IOP
  360. select PCI
  361. select ARCH_REQUIRE_GPIOLIB
  362. help
  363. Support for Intel's IOP33X (XScale) family of processors.
  364. config ARCH_IXP23XX
  365. bool "IXP23XX-based"
  366. depends on MMU
  367. select CPU_XSC3
  368. select PCI
  369. select ARCH_USES_GETTIMEOFFSET
  370. help
  371. Support for Intel's IXP23xx (XScale) family of processors.
  372. config ARCH_IXP2000
  373. bool "IXP2400/2800-based"
  374. depends on MMU
  375. select CPU_XSCALE
  376. select PCI
  377. select ARCH_USES_GETTIMEOFFSET
  378. help
  379. Support for Intel's IXP2400/2800 (XScale) family of processors.
  380. config ARCH_IXP4XX
  381. bool "IXP4xx-based"
  382. depends on MMU
  383. select CPU_XSCALE
  384. select GENERIC_GPIO
  385. select GENERIC_CLOCKEVENTS
  386. select HAVE_SCHED_CLOCK
  387. select MIGHT_HAVE_PCI
  388. select DMABOUNCE if PCI
  389. help
  390. Support for Intel's IXP4XX (XScale) family of processors.
  391. config ARCH_DOVE
  392. bool "Marvell Dove"
  393. select PCI
  394. select ARCH_REQUIRE_GPIOLIB
  395. select GENERIC_CLOCKEVENTS
  396. select PLAT_ORION
  397. help
  398. Support for the Marvell Dove SoC 88AP510
  399. config ARCH_KIRKWOOD
  400. bool "Marvell Kirkwood"
  401. select CPU_FEROCEON
  402. select PCI
  403. select ARCH_REQUIRE_GPIOLIB
  404. select GENERIC_CLOCKEVENTS
  405. select PLAT_ORION
  406. help
  407. Support for the following Marvell Kirkwood series SoCs:
  408. 88F6180, 88F6192 and 88F6281.
  409. config ARCH_LOKI
  410. bool "Marvell Loki (88RC8480)"
  411. select CPU_FEROCEON
  412. select GENERIC_CLOCKEVENTS
  413. select PLAT_ORION
  414. help
  415. Support for the Marvell Loki (88RC8480) SoC.
  416. config ARCH_LPC32XX
  417. bool "NXP LPC32XX"
  418. select CPU_ARM926T
  419. select ARCH_REQUIRE_GPIOLIB
  420. select HAVE_IDE
  421. select ARM_AMBA
  422. select USB_ARCH_HAS_OHCI
  423. select CLKDEV_LOOKUP
  424. select GENERIC_TIME
  425. select GENERIC_CLOCKEVENTS
  426. help
  427. Support for the NXP LPC32XX family of processors
  428. config ARCH_MV78XX0
  429. bool "Marvell MV78xx0"
  430. select CPU_FEROCEON
  431. select PCI
  432. select ARCH_REQUIRE_GPIOLIB
  433. select GENERIC_CLOCKEVENTS
  434. select PLAT_ORION
  435. help
  436. Support for the following Marvell MV78xx0 series SoCs:
  437. MV781x0, MV782x0.
  438. config ARCH_ORION5X
  439. bool "Marvell Orion"
  440. depends on MMU
  441. select CPU_FEROCEON
  442. select PCI
  443. select ARCH_REQUIRE_GPIOLIB
  444. select GENERIC_CLOCKEVENTS
  445. select PLAT_ORION
  446. help
  447. Support for the following Marvell Orion 5x series SoCs:
  448. Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
  449. Orion-2 (5281), Orion-1-90 (6183).
  450. config ARCH_MMP
  451. bool "Marvell PXA168/910/MMP2"
  452. depends on MMU
  453. select ARCH_REQUIRE_GPIOLIB
  454. select CLKDEV_LOOKUP
  455. select GENERIC_CLOCKEVENTS
  456. select HAVE_SCHED_CLOCK
  457. select TICK_ONESHOT
  458. select PLAT_PXA
  459. select SPARSE_IRQ
  460. help
  461. Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
  462. config ARCH_KS8695
  463. bool "Micrel/Kendin KS8695"
  464. select CPU_ARM922T
  465. select ARCH_REQUIRE_GPIOLIB
  466. select ARCH_USES_GETTIMEOFFSET
  467. help
  468. Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
  469. System-on-Chip devices.
  470. config ARCH_NS9XXX
  471. bool "NetSilicon NS9xxx"
  472. select CPU_ARM926T
  473. select GENERIC_GPIO
  474. select GENERIC_CLOCKEVENTS
  475. select HAVE_CLK
  476. help
  477. Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
  478. System.
  479. <http://www.digi.com/products/microprocessors/index.jsp>
  480. config ARCH_W90X900
  481. bool "Nuvoton W90X900 CPU"
  482. select CPU_ARM926T
  483. select ARCH_REQUIRE_GPIOLIB
  484. select CLKDEV_LOOKUP
  485. select GENERIC_CLOCKEVENTS
  486. help
  487. Support for Nuvoton (Winbond logic dept.) ARM9 processor,
  488. At present, the w90x900 has been renamed nuc900, regarding
  489. the ARM series product line, you can login the following
  490. link address to know more.
  491. <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
  492. ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
  493. config ARCH_NUC93X
  494. bool "Nuvoton NUC93X CPU"
  495. select CPU_ARM926T
  496. select CLKDEV_LOOKUP
  497. help
  498. Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
  499. low-power and high performance MPEG-4/JPEG multimedia controller chip.
  500. config ARCH_TEGRA
  501. bool "NVIDIA Tegra"
  502. select CLKDEV_LOOKUP
  503. select GENERIC_TIME
  504. select GENERIC_CLOCKEVENTS
  505. select GENERIC_GPIO
  506. select HAVE_CLK
  507. select HAVE_SCHED_CLOCK
  508. select ARCH_HAS_BARRIERS if CACHE_L2X0
  509. select ARCH_HAS_CPUFREQ
  510. help
  511. This enables support for NVIDIA Tegra based systems (Tegra APX,
  512. Tegra 6xx and Tegra 2 series).
  513. config ARCH_PNX4008
  514. bool "Philips Nexperia PNX4008 Mobile"
  515. select CPU_ARM926T
  516. select CLKDEV_LOOKUP
  517. select ARCH_USES_GETTIMEOFFSET
  518. help
  519. This enables support for Philips PNX4008 mobile platform.
  520. config ARCH_PXA
  521. bool "PXA2xx/PXA3xx-based"
  522. depends on MMU
  523. select ARCH_MTD_XIP
  524. select ARCH_HAS_CPUFREQ
  525. select CLKDEV_LOOKUP
  526. select ARCH_REQUIRE_GPIOLIB
  527. select GENERIC_CLOCKEVENTS
  528. select HAVE_SCHED_CLOCK
  529. select TICK_ONESHOT
  530. select PLAT_PXA
  531. select SPARSE_IRQ
  532. help
  533. Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
  534. config ARCH_MSM
  535. bool "Qualcomm MSM"
  536. select HAVE_CLK
  537. select GENERIC_CLOCKEVENTS
  538. select ARCH_REQUIRE_GPIOLIB
  539. help
  540. Support for Qualcomm MSM/QSD based systems. This runs on the
  541. apps processor of the MSM/QSD and depends on a shared memory
  542. interface to the modem processor which runs the baseband
  543. stack and controls some vital subsystems
  544. (clock and power control, etc).
  545. config ARCH_SHMOBILE
  546. bool "Renesas SH-Mobile / R-Mobile"
  547. select HAVE_CLK
  548. select CLKDEV_LOOKUP
  549. select GENERIC_CLOCKEVENTS
  550. select NO_IOPORT
  551. select SPARSE_IRQ
  552. select MULTI_IRQ_HANDLER
  553. help
  554. Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
  555. config ARCH_RPC
  556. bool "RiscPC"
  557. select ARCH_ACORN
  558. select FIQ
  559. select TIMER_ACORN
  560. select ARCH_MAY_HAVE_PC_FDC
  561. select HAVE_PATA_PLATFORM
  562. select ISA_DMA_API
  563. select NO_IOPORT
  564. select ARCH_SPARSEMEM_ENABLE
  565. select ARCH_USES_GETTIMEOFFSET
  566. help
  567. On the Acorn Risc-PC, Linux can support the internal IDE disk and
  568. CD-ROM interface, serial and parallel port, and the floppy drive.
  569. config ARCH_SA1100
  570. bool "SA1100-based"
  571. select CPU_SA1100
  572. select ISA
  573. select ARCH_SPARSEMEM_ENABLE
  574. select ARCH_MTD_XIP
  575. select ARCH_HAS_CPUFREQ
  576. select CPU_FREQ
  577. select GENERIC_CLOCKEVENTS
  578. select HAVE_CLK
  579. select HAVE_SCHED_CLOCK
  580. select TICK_ONESHOT
  581. select ARCH_REQUIRE_GPIOLIB
  582. help
  583. Support for StrongARM 11x0 based boards.
  584. config ARCH_S3C2410
  585. bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
  586. select GENERIC_GPIO
  587. select ARCH_HAS_CPUFREQ
  588. select HAVE_CLK
  589. select ARCH_USES_GETTIMEOFFSET
  590. select HAVE_S3C2410_I2C if I2C
  591. help
  592. Samsung S3C2410X CPU based systems, such as the Simtec Electronics
  593. BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
  594. the Samsung SMDK2410 development board (and derivatives).
  595. Note, the S3C2416 and the S3C2450 are so close that they even share
  596. the same SoC ID code. This means that there is no seperate machine
  597. directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
  598. config ARCH_S3C64XX
  599. bool "Samsung S3C64XX"
  600. select PLAT_SAMSUNG
  601. select CPU_V6
  602. select ARM_VIC
  603. select HAVE_CLK
  604. select NO_IOPORT
  605. select ARCH_USES_GETTIMEOFFSET
  606. select ARCH_HAS_CPUFREQ
  607. select ARCH_REQUIRE_GPIOLIB
  608. select SAMSUNG_CLKSRC
  609. select SAMSUNG_IRQ_VIC_TIMER
  610. select SAMSUNG_IRQ_UART
  611. select S3C_GPIO_TRACK
  612. select S3C_GPIO_PULL_UPDOWN
  613. select S3C_GPIO_CFG_S3C24XX
  614. select S3C_GPIO_CFG_S3C64XX
  615. select S3C_DEV_NAND
  616. select USB_ARCH_HAS_OHCI
  617. select SAMSUNG_GPIOLIB_4BIT
  618. select HAVE_S3C2410_I2C if I2C
  619. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  620. help
  621. Samsung S3C64XX series based systems
  622. config ARCH_S5P64X0
  623. bool "Samsung S5P6440 S5P6450"
  624. select CPU_V6
  625. select GENERIC_GPIO
  626. select HAVE_CLK
  627. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  628. select ARCH_USES_GETTIMEOFFSET
  629. select HAVE_S3C2410_I2C if I2C
  630. select HAVE_S3C_RTC if RTC_CLASS
  631. help
  632. Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
  633. SMDK6450.
  634. config ARCH_S5P6442
  635. bool "Samsung S5P6442"
  636. select CPU_V6
  637. select GENERIC_GPIO
  638. select HAVE_CLK
  639. select ARCH_USES_GETTIMEOFFSET
  640. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  641. help
  642. Samsung S5P6442 CPU based systems
  643. config ARCH_S5PC100
  644. bool "Samsung S5PC100"
  645. select GENERIC_GPIO
  646. select HAVE_CLK
  647. select CPU_V7
  648. select ARM_L1_CACHE_SHIFT_6
  649. select ARCH_USES_GETTIMEOFFSET
  650. select HAVE_S3C2410_I2C if I2C
  651. select HAVE_S3C_RTC if RTC_CLASS
  652. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  653. help
  654. Samsung S5PC100 series based systems
  655. config ARCH_S5PV210
  656. bool "Samsung S5PV210/S5PC110"
  657. select CPU_V7
  658. select ARCH_SPARSEMEM_ENABLE
  659. select GENERIC_GPIO
  660. select HAVE_CLK
  661. select ARM_L1_CACHE_SHIFT_6
  662. select ARCH_HAS_CPUFREQ
  663. select ARCH_USES_GETTIMEOFFSET
  664. select HAVE_S3C2410_I2C if I2C
  665. select HAVE_S3C_RTC if RTC_CLASS
  666. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  667. help
  668. Samsung S5PV210/S5PC110 series based systems
  669. config ARCH_S5PV310
  670. bool "Samsung S5PV310/S5PC210"
  671. select CPU_V7
  672. select ARCH_SPARSEMEM_ENABLE
  673. select GENERIC_GPIO
  674. select HAVE_CLK
  675. select GENERIC_CLOCKEVENTS
  676. select HAVE_S3C_RTC if RTC_CLASS
  677. select HAVE_S3C2410_I2C if I2C
  678. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  679. help
  680. Samsung S5PV310 series based systems
  681. config ARCH_SHARK
  682. bool "Shark"
  683. select CPU_SA110
  684. select ISA
  685. select ISA_DMA
  686. select ZONE_DMA
  687. select PCI
  688. select ARCH_USES_GETTIMEOFFSET
  689. help
  690. Support for the StrongARM based Digital DNARD machine, also known
  691. as "Shark" (<http://www.shark-linux.de/shark.html>).
  692. config ARCH_TCC_926
  693. bool "Telechips TCC ARM926-based systems"
  694. select CPU_ARM926T
  695. select HAVE_CLK
  696. select CLKDEV_LOOKUP
  697. select GENERIC_CLOCKEVENTS
  698. help
  699. Support for Telechips TCC ARM926-based systems.
  700. config ARCH_LH7A40X
  701. bool "Sharp LH7A40X"
  702. select CPU_ARM922T
  703. select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
  704. select ARCH_USES_GETTIMEOFFSET
  705. help
  706. Say Y here for systems based on one of the Sharp LH7A40X
  707. System on a Chip processors. These CPUs include an ARM922T
  708. core with a wide array of integrated devices for
  709. hand-held and low-power applications.
  710. config ARCH_U300
  711. bool "ST-Ericsson U300 Series"
  712. depends on MMU
  713. select CPU_ARM926T
  714. select HAVE_SCHED_CLOCK
  715. select HAVE_TCM
  716. select ARM_AMBA
  717. select ARM_VIC
  718. select GENERIC_CLOCKEVENTS
  719. select CLKDEV_LOOKUP
  720. select GENERIC_GPIO
  721. help
  722. Support for ST-Ericsson U300 series mobile platforms.
  723. config ARCH_U8500
  724. bool "ST-Ericsson U8500 Series"
  725. select CPU_V7
  726. select ARM_AMBA
  727. select GENERIC_CLOCKEVENTS
  728. select CLKDEV_LOOKUP
  729. select ARCH_REQUIRE_GPIOLIB
  730. select ARCH_HAS_CPUFREQ
  731. help
  732. Support for ST-Ericsson's Ux500 architecture
  733. config ARCH_NOMADIK
  734. bool "STMicroelectronics Nomadik"
  735. select ARM_AMBA
  736. select ARM_VIC
  737. select CPU_ARM926T
  738. select CLKDEV_LOOKUP
  739. select GENERIC_CLOCKEVENTS
  740. select ARCH_REQUIRE_GPIOLIB
  741. help
  742. Support for the Nomadik platform by ST-Ericsson
  743. config ARCH_DAVINCI
  744. bool "TI DaVinci"
  745. select GENERIC_CLOCKEVENTS
  746. select ARCH_REQUIRE_GPIOLIB
  747. select ZONE_DMA
  748. select HAVE_IDE
  749. select CLKDEV_LOOKUP
  750. select GENERIC_ALLOCATOR
  751. select ARCH_HAS_HOLES_MEMORYMODEL
  752. help
  753. Support for TI's DaVinci platform.
  754. config ARCH_OMAP
  755. bool "TI OMAP"
  756. select HAVE_CLK
  757. select ARCH_REQUIRE_GPIOLIB
  758. select ARCH_HAS_CPUFREQ
  759. select GENERIC_CLOCKEVENTS
  760. select HAVE_SCHED_CLOCK
  761. select ARCH_HAS_HOLES_MEMORYMODEL
  762. help
  763. Support for TI's OMAP platform (OMAP1/2/3/4).
  764. config PLAT_SPEAR
  765. bool "ST SPEAr"
  766. select ARM_AMBA
  767. select ARCH_REQUIRE_GPIOLIB
  768. select CLKDEV_LOOKUP
  769. select GENERIC_CLOCKEVENTS
  770. select HAVE_CLK
  771. help
  772. Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
  773. endchoice
  774. #
  775. # This is sorted alphabetically by mach-* pathname. However, plat-*
  776. # Kconfigs may be included either alphabetically (according to the
  777. # plat- suffix) or along side the corresponding mach-* source.
  778. #
  779. source "arch/arm/mach-aaec2000/Kconfig"
  780. source "arch/arm/mach-at91/Kconfig"
  781. source "arch/arm/mach-bcmring/Kconfig"
  782. source "arch/arm/mach-clps711x/Kconfig"
  783. source "arch/arm/mach-cns3xxx/Kconfig"
  784. source "arch/arm/mach-davinci/Kconfig"
  785. source "arch/arm/mach-dove/Kconfig"
  786. source "arch/arm/mach-ep93xx/Kconfig"
  787. source "arch/arm/mach-footbridge/Kconfig"
  788. source "arch/arm/mach-gemini/Kconfig"
  789. source "arch/arm/mach-h720x/Kconfig"
  790. source "arch/arm/mach-integrator/Kconfig"
  791. source "arch/arm/mach-iop32x/Kconfig"
  792. source "arch/arm/mach-iop33x/Kconfig"
  793. source "arch/arm/mach-iop13xx/Kconfig"
  794. source "arch/arm/mach-ixp4xx/Kconfig"
  795. source "arch/arm/mach-ixp2000/Kconfig"
  796. source "arch/arm/mach-ixp23xx/Kconfig"
  797. source "arch/arm/mach-kirkwood/Kconfig"
  798. source "arch/arm/mach-ks8695/Kconfig"
  799. source "arch/arm/mach-lh7a40x/Kconfig"
  800. source "arch/arm/mach-loki/Kconfig"
  801. source "arch/arm/mach-lpc32xx/Kconfig"
  802. source "arch/arm/mach-msm/Kconfig"
  803. source "arch/arm/mach-mv78xx0/Kconfig"
  804. source "arch/arm/plat-mxc/Kconfig"
  805. source "arch/arm/mach-mxs/Kconfig"
  806. source "arch/arm/mach-netx/Kconfig"
  807. source "arch/arm/mach-nomadik/Kconfig"
  808. source "arch/arm/plat-nomadik/Kconfig"
  809. source "arch/arm/mach-ns9xxx/Kconfig"
  810. source "arch/arm/mach-nuc93x/Kconfig"
  811. source "arch/arm/plat-omap/Kconfig"
  812. source "arch/arm/mach-omap1/Kconfig"
  813. source "arch/arm/mach-omap2/Kconfig"
  814. source "arch/arm/mach-orion5x/Kconfig"
  815. source "arch/arm/mach-pxa/Kconfig"
  816. source "arch/arm/plat-pxa/Kconfig"
  817. source "arch/arm/mach-mmp/Kconfig"
  818. source "arch/arm/mach-realview/Kconfig"
  819. source "arch/arm/mach-sa1100/Kconfig"
  820. source "arch/arm/plat-samsung/Kconfig"
  821. source "arch/arm/plat-s3c24xx/Kconfig"
  822. source "arch/arm/plat-s5p/Kconfig"
  823. source "arch/arm/plat-spear/Kconfig"
  824. source "arch/arm/plat-tcc/Kconfig"
  825. if ARCH_S3C2410
  826. source "arch/arm/mach-s3c2400/Kconfig"
  827. source "arch/arm/mach-s3c2410/Kconfig"
  828. source "arch/arm/mach-s3c2412/Kconfig"
  829. source "arch/arm/mach-s3c2416/Kconfig"
  830. source "arch/arm/mach-s3c2440/Kconfig"
  831. source "arch/arm/mach-s3c2443/Kconfig"
  832. endif
  833. if ARCH_S3C64XX
  834. source "arch/arm/mach-s3c64xx/Kconfig"
  835. endif
  836. source "arch/arm/mach-s5p64x0/Kconfig"
  837. source "arch/arm/mach-s5p6442/Kconfig"
  838. source "arch/arm/mach-s5pc100/Kconfig"
  839. source "arch/arm/mach-s5pv210/Kconfig"
  840. source "arch/arm/mach-s5pv310/Kconfig"
  841. source "arch/arm/mach-shmobile/Kconfig"
  842. source "arch/arm/plat-stmp3xxx/Kconfig"
  843. source "arch/arm/mach-tegra/Kconfig"
  844. source "arch/arm/mach-u300/Kconfig"
  845. source "arch/arm/mach-ux500/Kconfig"
  846. source "arch/arm/mach-versatile/Kconfig"
  847. source "arch/arm/mach-vexpress/Kconfig"
  848. source "arch/arm/mach-w90x900/Kconfig"
  849. # Definitions to make life easier
  850. config ARCH_ACORN
  851. bool
  852. config PLAT_IOP
  853. bool
  854. select GENERIC_CLOCKEVENTS
  855. select HAVE_SCHED_CLOCK
  856. config PLAT_ORION
  857. bool
  858. select HAVE_SCHED_CLOCK
  859. config PLAT_PXA
  860. bool
  861. config PLAT_VERSATILE
  862. bool
  863. config ARM_TIMER_SP804
  864. bool
  865. source arch/arm/mm/Kconfig
  866. config IWMMXT
  867. bool "Enable iWMMXt support"
  868. depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
  869. default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
  870. help
  871. Enable support for iWMMXt context switching at run time if
  872. running on a CPU that supports it.
  873. # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
  874. config XSCALE_PMU
  875. bool
  876. depends on CPU_XSCALE && !XSCALE_PMU_TIMER
  877. default y
  878. config CPU_HAS_PMU
  879. depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
  880. (!ARCH_OMAP3 || OMAP3_EMU)
  881. default y
  882. bool
  883. config MULTI_IRQ_HANDLER
  884. bool
  885. help
  886. Allow each machine to specify it's own IRQ handler at run time.
  887. if !MMU
  888. source "arch/arm/Kconfig-nommu"
  889. endif
  890. config ARM_ERRATA_411920
  891. bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
  892. depends on CPU_V6
  893. help
  894. Invalidation of the Instruction Cache operation can
  895. fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
  896. It does not affect the MPCore. This option enables the ARM Ltd.
  897. recommended workaround.
  898. config ARM_ERRATA_430973
  899. bool "ARM errata: Stale prediction on replaced interworking branch"
  900. depends on CPU_V7
  901. help
  902. This option enables the workaround for the 430973 Cortex-A8
  903. (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
  904. interworking branch is replaced with another code sequence at the
  905. same virtual address, whether due to self-modifying code or virtual
  906. to physical address re-mapping, Cortex-A8 does not recover from the
  907. stale interworking branch prediction. This results in Cortex-A8
  908. executing the new code sequence in the incorrect ARM or Thumb state.
  909. The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
  910. and also flushes the branch target cache at every context switch.
  911. Note that setting specific bits in the ACTLR register may not be
  912. available in non-secure mode.
  913. config ARM_ERRATA_458693
  914. bool "ARM errata: Processor deadlock when a false hazard is created"
  915. depends on CPU_V7
  916. help
  917. This option enables the workaround for the 458693 Cortex-A8 (r2p0)
  918. erratum. For very specific sequences of memory operations, it is
  919. possible for a hazard condition intended for a cache line to instead
  920. be incorrectly associated with a different cache line. This false
  921. hazard might then cause a processor deadlock. The workaround enables
  922. the L1 caching of the NEON accesses and disables the PLD instruction
  923. in the ACTLR register. Note that setting specific bits in the ACTLR
  924. register may not be available in non-secure mode.
  925. config ARM_ERRATA_460075
  926. bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
  927. depends on CPU_V7
  928. help
  929. This option enables the workaround for the 460075 Cortex-A8 (r2p0)
  930. erratum. Any asynchronous access to the L2 cache may encounter a
  931. situation in which recent store transactions to the L2 cache are lost
  932. and overwritten with stale memory contents from external memory. The
  933. workaround disables the write-allocate mode for the L2 cache via the
  934. ACTLR register. Note that setting specific bits in the ACTLR register
  935. may not be available in non-secure mode.
  936. config ARM_ERRATA_742230
  937. bool "ARM errata: DMB operation may be faulty"
  938. depends on CPU_V7 && SMP
  939. help
  940. This option enables the workaround for the 742230 Cortex-A9
  941. (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
  942. between two write operations may not ensure the correct visibility
  943. ordering of the two writes. This workaround sets a specific bit in
  944. the diagnostic register of the Cortex-A9 which causes the DMB
  945. instruction to behave as a DSB, ensuring the correct behaviour of
  946. the two writes.
  947. config ARM_ERRATA_742231
  948. bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
  949. depends on CPU_V7 && SMP
  950. help
  951. This option enables the workaround for the 742231 Cortex-A9
  952. (r2p0..r2p2) erratum. Under certain conditions, specific to the
  953. Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
  954. accessing some data located in the same cache line, may get corrupted
  955. data due to bad handling of the address hazard when the line gets
  956. replaced from one of the CPUs at the same time as another CPU is
  957. accessing it. This workaround sets specific bits in the diagnostic
  958. register of the Cortex-A9 which reduces the linefill issuing
  959. capabilities of the processor.
  960. config PL310_ERRATA_588369
  961. bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
  962. depends on CACHE_L2X0 && ARCH_OMAP4
  963. help
  964. The PL310 L2 cache controller implements three types of Clean &
  965. Invalidate maintenance operations: by Physical Address
  966. (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
  967. They are architecturally defined to behave as the execution of a
  968. clean operation followed immediately by an invalidate operation,
  969. both performing to the same memory location. This functionality
  970. is not correctly implemented in PL310 as clean lines are not
  971. invalidated as a result of these operations. Note that this errata
  972. uses Texas Instrument's secure monitor api.
  973. config ARM_ERRATA_720789
  974. bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
  975. depends on CPU_V7 && SMP
  976. help
  977. This option enables the workaround for the 720789 Cortex-A9 (prior to
  978. r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
  979. broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
  980. As a consequence of this erratum, some TLB entries which should be
  981. invalidated are not, resulting in an incoherency in the system page
  982. tables. The workaround changes the TLB flushing routines to invalidate
  983. entries regardless of the ASID.
  984. config ARM_ERRATA_743622
  985. bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
  986. depends on CPU_V7
  987. help
  988. This option enables the workaround for the 743622 Cortex-A9
  989. (r2p0..r2p2) erratum. Under very rare conditions, a faulty
  990. optimisation in the Cortex-A9 Store Buffer may lead to data
  991. corruption. This workaround sets a specific bit in the diagnostic
  992. register of the Cortex-A9 which disables the Store Buffer
  993. optimisation, preventing the defect from occurring. This has no
  994. visible impact on the overall performance or power consumption of the
  995. processor.
  996. endmenu
  997. source "arch/arm/common/Kconfig"
  998. menu "Bus support"
  999. config ARM_AMBA
  1000. bool
  1001. config ISA
  1002. bool
  1003. help
  1004. Find out whether you have ISA slots on your motherboard. ISA is the
  1005. name of a bus system, i.e. the way the CPU talks to the other stuff
  1006. inside your box. Other bus systems are PCI, EISA, MicroChannel
  1007. (MCA) or VESA. ISA is an older system, now being displaced by PCI;
  1008. newer boards don't support it. If you have ISA, say Y, otherwise N.
  1009. # Select ISA DMA controller support
  1010. config ISA_DMA
  1011. bool
  1012. select ISA_DMA_API
  1013. # Select ISA DMA interface
  1014. config ISA_DMA_API
  1015. bool
  1016. config PCI
  1017. bool "PCI support" if MIGHT_HAVE_PCI
  1018. help
  1019. Find out whether you have a PCI motherboard. PCI is the name of a
  1020. bus system, i.e. the way the CPU talks to the other stuff inside
  1021. your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
  1022. VESA. If you have PCI, say Y, otherwise N.
  1023. config PCI_DOMAINS
  1024. bool
  1025. depends on PCI
  1026. config PCI_NANOENGINE
  1027. bool "BSE nanoEngine PCI support"
  1028. depends on SA1100_NANOENGINE
  1029. help
  1030. Enable PCI on the BSE nanoEngine board.
  1031. config PCI_SYSCALL
  1032. def_bool PCI
  1033. # Select the host bridge type
  1034. config PCI_HOST_VIA82C505
  1035. bool
  1036. depends on PCI && ARCH_SHARK
  1037. default y
  1038. config PCI_HOST_ITE8152
  1039. bool
  1040. depends on PCI && MACH_ARMCORE
  1041. default y
  1042. select DMABOUNCE
  1043. source "drivers/pci/Kconfig"
  1044. source "drivers/pcmcia/Kconfig"
  1045. endmenu
  1046. menu "Kernel Features"
  1047. source "kernel/time/Kconfig"
  1048. config SMP
  1049. bool "Symmetric Multi-Processing (EXPERIMENTAL)"
  1050. depends on EXPERIMENTAL
  1051. depends on GENERIC_CLOCKEVENTS
  1052. depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
  1053. MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
  1054. ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
  1055. ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
  1056. select USE_GENERIC_SMP_HELPERS
  1057. select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
  1058. help
  1059. This enables support for systems with more than one CPU. If you have
  1060. a system with only one CPU, like most personal computers, say N. If
  1061. you have a system with more than one CPU, say Y.
  1062. If you say N here, the kernel will run on single and multiprocessor
  1063. machines, but will use only one CPU of a multiprocessor machine. If
  1064. you say Y here, the kernel will run on many, but not all, single
  1065. processor machines. On a single processor machine, the kernel will
  1066. run faster if you say N here.
  1067. See also <file:Documentation/i386/IO-APIC.txt>,
  1068. <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
  1069. <http://tldp.org/HOWTO/SMP-HOWTO.html>.
  1070. If you don't know what to do here, say N.
  1071. config SMP_ON_UP
  1072. bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
  1073. depends on EXPERIMENTAL
  1074. depends on SMP && !XIP
  1075. default y
  1076. help
  1077. SMP kernels contain instructions which fail on non-SMP processors.
  1078. Enabling this option allows the kernel to modify itself to make
  1079. these instructions safe. Disabling it allows about 1K of space
  1080. savings.
  1081. If you don't know what to do here, say Y.
  1082. config HAVE_ARM_SCU
  1083. bool
  1084. depends on SMP
  1085. help
  1086. This option enables support for the ARM system coherency unit
  1087. config HAVE_ARM_TWD
  1088. bool
  1089. depends on SMP
  1090. select TICK_ONESHOT
  1091. help
  1092. This options enables support for the ARM timer and watchdog unit
  1093. choice
  1094. prompt "Memory split"
  1095. default VMSPLIT_3G
  1096. help
  1097. Select the desired split between kernel and user memory.
  1098. If you are not absolutely sure what you are doing, leave this
  1099. option alone!
  1100. config VMSPLIT_3G
  1101. bool "3G/1G user/kernel split"
  1102. config VMSPLIT_2G
  1103. bool "2G/2G user/kernel split"
  1104. config VMSPLIT_1G
  1105. bool "1G/3G user/kernel split"
  1106. endchoice
  1107. config PAGE_OFFSET
  1108. hex
  1109. default 0x40000000 if VMSPLIT_1G
  1110. default 0x80000000 if VMSPLIT_2G
  1111. default 0xC0000000
  1112. config NR_CPUS
  1113. int "Maximum number of CPUs (2-32)"
  1114. range 2 32
  1115. depends on SMP
  1116. default "4"
  1117. config HOTPLUG_CPU
  1118. bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
  1119. depends on SMP && HOTPLUG && EXPERIMENTAL
  1120. depends on !ARCH_MSM
  1121. help
  1122. Say Y here to experiment with turning CPUs off and on. CPUs
  1123. can be controlled through /sys/devices/system/cpu.
  1124. config LOCAL_TIMERS
  1125. bool "Use local timer interrupts"
  1126. depends on SMP
  1127. default y
  1128. select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
  1129. help
  1130. Enable support for local timers on SMP platforms, rather then the
  1131. legacy IPI broadcast method. Local timers allows the system
  1132. accounting to be spread across the timer interval, preventing a
  1133. "thundering herd" at every timer tick.
  1134. source kernel/Kconfig.preempt
  1135. config HZ
  1136. int
  1137. default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
  1138. ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
  1139. default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
  1140. default AT91_TIMER_HZ if ARCH_AT91
  1141. default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
  1142. default 100
  1143. config THUMB2_KERNEL
  1144. bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
  1145. depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
  1146. select AEABI
  1147. select ARM_ASM_UNIFIED
  1148. help
  1149. By enabling this option, the kernel will be compiled in
  1150. Thumb-2 mode. A compiler/assembler that understand the unified
  1151. ARM-Thumb syntax is needed.
  1152. If unsure, say N.
  1153. config ARM_ASM_UNIFIED
  1154. bool
  1155. config AEABI
  1156. bool "Use the ARM EABI to compile the kernel"
  1157. help
  1158. This option allows for the kernel to be compiled using the latest
  1159. ARM ABI (aka EABI). This is only useful if you are using a user
  1160. space environment that is also compiled with EABI.
  1161. Since there are major incompatibilities between the legacy ABI and
  1162. EABI, especially with regard to structure member alignment, this
  1163. option also changes the kernel syscall calling convention to
  1164. disambiguate both ABIs and allow for backward compatibility support
  1165. (selected with CONFIG_OABI_COMPAT).
  1166. To use this you need GCC version 4.0.0 or later.
  1167. config OABI_COMPAT
  1168. bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
  1169. depends on AEABI && EXPERIMENTAL
  1170. default y
  1171. help
  1172. This option preserves the old syscall interface along with the
  1173. new (ARM EABI) one. It also provides a compatibility layer to
  1174. intercept syscalls that have structure arguments which layout
  1175. in memory differs between the legacy ABI and the new ARM EABI
  1176. (only for non "thumb" binaries). This option adds a tiny
  1177. overhead to all syscalls and produces a slightly larger kernel.
  1178. If you know you'll be using only pure EABI user space then you
  1179. can say N here. If this option is not selected and you attempt
  1180. to execute a legacy ABI binary then the result will be
  1181. UNPREDICTABLE (in fact it can be predicted that it won't work
  1182. at all). If in doubt say Y.
  1183. config ARCH_HAS_HOLES_MEMORYMODEL
  1184. bool
  1185. config ARCH_SPARSEMEM_ENABLE
  1186. bool
  1187. config ARCH_SPARSEMEM_DEFAULT
  1188. def_bool ARCH_SPARSEMEM_ENABLE
  1189. config ARCH_SELECT_MEMORY_MODEL
  1190. def_bool ARCH_SPARSEMEM_ENABLE
  1191. config HIGHMEM
  1192. bool "High Memory Support (EXPERIMENTAL)"
  1193. depends on MMU && EXPERIMENTAL
  1194. help
  1195. The address space of ARM processors is only 4 Gigabytes large
  1196. and it has to accommodate user address space, kernel address
  1197. space as well as some memory mapped IO. That means that, if you
  1198. have a large amount of physical memory and/or IO, not all of the
  1199. memory can be "permanently mapped" by the kernel. The physical
  1200. memory that is not permanently mapped is called "high memory".
  1201. Depending on the selected kernel/user memory split, minimum
  1202. vmalloc space and actual amount of RAM, you may not need this
  1203. option which should result in a slightly faster kernel.
  1204. If unsure, say n.
  1205. config HIGHPTE
  1206. bool "Allocate 2nd-level pagetables from highmem"
  1207. depends on HIGHMEM
  1208. depends on !OUTER_CACHE
  1209. config HW_PERF_EVENTS
  1210. bool "Enable hardware performance counter support for perf events"
  1211. depends on PERF_EVENTS && CPU_HAS_PMU
  1212. default y
  1213. help
  1214. Enable hardware performance counter support for perf events. If
  1215. disabled, perf events will use software events only.
  1216. config SPARSE_IRQ
  1217. def_bool n
  1218. help
  1219. This enables support for sparse irqs. This is useful in general
  1220. as most CPUs have a fairly sparse array of IRQ vectors, which
  1221. the irq_desc then maps directly on to. Systems with a high
  1222. number of off-chip IRQs will want to treat this as
  1223. experimental until they have been independently verified.
  1224. source "mm/Kconfig"
  1225. config FORCE_MAX_ZONEORDER
  1226. int "Maximum zone order" if ARCH_SHMOBILE
  1227. range 11 64 if ARCH_SHMOBILE
  1228. default "9" if SA1111
  1229. default "11"
  1230. help
  1231. The kernel memory allocator divides physically contiguous memory
  1232. blocks into "zones", where each zone is a power of two number of
  1233. pages. This option selects the largest power of two that the kernel
  1234. keeps in the memory allocator. If you need to allocate very large
  1235. blocks of physically contiguous memory, then you may need to
  1236. increase this value.
  1237. This config option is actually maximum order plus one. For example,
  1238. a value of 11 means that the largest free memory block is 2^10 pages.
  1239. config LEDS
  1240. bool "Timer and CPU usage LEDs"
  1241. depends on ARCH_CDB89712 || ARCH_EBSA110 || \
  1242. ARCH_EBSA285 || ARCH_INTEGRATOR || \
  1243. ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
  1244. ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
  1245. ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
  1246. ARCH_AT91 || ARCH_DAVINCI || \
  1247. ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
  1248. help
  1249. If you say Y here, the LEDs on your machine will be used
  1250. to provide useful information about your current system status.
  1251. If you are compiling a kernel for a NetWinder or EBSA-285, you will
  1252. be able to select which LEDs are active using the options below. If
  1253. you are compiling a kernel for the EBSA-110 or the LART however, the
  1254. red LED will simply flash regularly to indicate that the system is
  1255. still functional. It is safe to say Y here if you have a CATS
  1256. system, but the driver will do nothing.
  1257. config LEDS_TIMER
  1258. bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
  1259. OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1260. || MACH_OMAP_PERSEUS2
  1261. depends on LEDS
  1262. depends on !GENERIC_CLOCKEVENTS
  1263. default y if ARCH_EBSA110
  1264. help
  1265. If you say Y here, one of the system LEDs (the green one on the
  1266. NetWinder, the amber one on the EBSA285, or the red one on the LART)
  1267. will flash regularly to indicate that the system is still
  1268. operational. This is mainly useful to kernel hackers who are
  1269. debugging unstable kernels.
  1270. The LART uses the same LED for both Timer LED and CPU usage LED
  1271. functions. You may choose to use both, but the Timer LED function
  1272. will overrule the CPU usage LED.
  1273. config LEDS_CPU
  1274. bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
  1275. !ARCH_OMAP) \
  1276. || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1277. || MACH_OMAP_PERSEUS2
  1278. depends on LEDS
  1279. help
  1280. If you say Y here, the red LED will be used to give a good real
  1281. time indication of CPU usage, by lighting whenever the idle task
  1282. is not currently executing.
  1283. The LART uses the same LED for both Timer LED and CPU usage LED
  1284. functions. You may choose to use both, but the Timer LED function
  1285. will overrule the CPU usage LED.
  1286. config ALIGNMENT_TRAP
  1287. bool
  1288. depends on CPU_CP15_MMU
  1289. default y if !ARCH_EBSA110
  1290. select HAVE_PROC_CPU if PROC_FS
  1291. help
  1292. ARM processors cannot fetch/store information which is not
  1293. naturally aligned on the bus, i.e., a 4 byte fetch must start at an
  1294. address divisible by 4. On 32-bit ARM processors, these non-aligned
  1295. fetch/store instructions will be emulated in software if you say
  1296. here, which has a severe performance impact. This is necessary for
  1297. correct operation of some network protocols. With an IP-only
  1298. configuration it is safe to say N, otherwise say Y.
  1299. config UACCESS_WITH_MEMCPY
  1300. bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
  1301. depends on MMU && EXPERIMENTAL
  1302. default y if CPU_FEROCEON
  1303. help
  1304. Implement faster copy_to_user and clear_user methods for CPU
  1305. cores where a 8-word STM instruction give significantly higher
  1306. memory write throughput than a sequence of individual 32bit stores.
  1307. A possible side effect is a slight increase in scheduling latency
  1308. between threads sharing the same address space if they invoke
  1309. such copy operations with large buffers.
  1310. However, if the CPU data cache is using a write-allocate mode,
  1311. this option is unlikely to provide any performance gain.
  1312. config SECCOMP
  1313. bool
  1314. prompt "Enable seccomp to safely compute untrusted bytecode"
  1315. ---help---
  1316. This kernel feature is useful for number crunching applications
  1317. that may need to compute untrusted bytecode during their
  1318. execution. By using pipes or other transports made available to
  1319. the process as file descriptors supporting the read/write
  1320. syscalls, it's possible to isolate those applications in
  1321. their own address space using seccomp. Once seccomp is
  1322. enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
  1323. and the task is only allowed to execute a few safe syscalls
  1324. defined by each seccomp mode.
  1325. config CC_STACKPROTECTOR
  1326. bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
  1327. depends on EXPERIMENTAL
  1328. help
  1329. This option turns on the -fstack-protector GCC feature. This
  1330. feature puts, at the beginning of functions, a canary value on
  1331. the stack just before the return address, and validates
  1332. the value just before actually returning. Stack based buffer
  1333. overflows (that need to overwrite this return address) now also
  1334. overwrite the canary, which gets detected and the attack is then
  1335. neutralized via a kernel panic.
  1336. This feature requires gcc version 4.2 or above.
  1337. config DEPRECATED_PARAM_STRUCT
  1338. bool "Provide old way to pass kernel parameters"
  1339. help
  1340. This was deprecated in 2001 and announced to live on for 5 years.
  1341. Some old boot loaders still use this way.
  1342. endmenu
  1343. menu "Boot options"
  1344. # Compressed boot loader in ROM. Yes, we really want to ask about
  1345. # TEXT and BSS so we preserve their values in the config files.
  1346. config ZBOOT_ROM_TEXT
  1347. hex "Compressed ROM boot loader base address"
  1348. default "0"
  1349. help
  1350. The physical address at which the ROM-able zImage is to be
  1351. placed in the target. Platforms which normally make use of
  1352. ROM-able zImage formats normally set this to a suitable
  1353. value in their defconfig file.
  1354. If ZBOOT_ROM is not enabled, this has no effect.
  1355. config ZBOOT_ROM_BSS
  1356. hex "Compressed ROM boot loader BSS address"
  1357. default "0"
  1358. help
  1359. The base address of an area of read/write memory in the target
  1360. for the ROM-able zImage which must be available while the
  1361. decompressor is running. It must be large enough to hold the
  1362. entire decompressed kernel plus an additional 128 KiB.
  1363. Platforms which normally make use of ROM-able zImage formats
  1364. normally set this to a suitable value in their defconfig file.
  1365. If ZBOOT_ROM is not enabled, this has no effect.
  1366. config ZBOOT_ROM
  1367. bool "Compressed boot loader in ROM/flash"
  1368. depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
  1369. help
  1370. Say Y here if you intend to execute your compressed kernel image
  1371. (zImage) directly from ROM or flash. If unsure, say N.
  1372. config CMDLINE
  1373. string "Default kernel command string"
  1374. default ""
  1375. help
  1376. On some architectures (EBSA110 and CATS), there is currently no way
  1377. for the boot loader to pass arguments to the kernel. For these
  1378. architectures, you should supply some command-line options at build
  1379. time by entering them here. As a minimum, you should specify the
  1380. memory size and the root device (e.g., mem=64M root=/dev/nfs).
  1381. config CMDLINE_FORCE
  1382. bool "Always use the default kernel command string"
  1383. depends on CMDLINE != ""
  1384. help
  1385. Always use the default kernel command string, even if the boot
  1386. loader passes other arguments to the kernel.
  1387. This is useful if you cannot or don't want to change the
  1388. command-line options your boot loader passes to the kernel.
  1389. If unsure, say N.
  1390. config XIP_KERNEL
  1391. bool "Kernel Execute-In-Place from ROM"
  1392. depends on !ZBOOT_ROM
  1393. help
  1394. Execute-In-Place allows the kernel to run from non-volatile storage
  1395. directly addressable by the CPU, such as NOR flash. This saves RAM
  1396. space since the text section of the kernel is not loaded from flash
  1397. to RAM. Read-write sections, such as the data section and stack,
  1398. are still copied to RAM. The XIP kernel is not compressed since
  1399. it has to run directly from flash, so it will take more space to
  1400. store it. The flash address used to link the kernel object files,
  1401. and for storing it, is configuration dependent. Therefore, if you
  1402. say Y here, you must know the proper physical address where to
  1403. store the kernel image depending on your own flash memory usage.
  1404. Also note that the make target becomes "make xipImage" rather than
  1405. "make zImage" or "make Image". The final kernel binary to put in
  1406. ROM memory will be arch/arm/boot/xipImage.
  1407. If unsure, say N.
  1408. config XIP_PHYS_ADDR
  1409. hex "XIP Kernel Physical Location"
  1410. depends on XIP_KERNEL
  1411. default "0x00080000"
  1412. help
  1413. This is the physical address in your flash memory the kernel will
  1414. be linked for and stored to. This address is dependent on your
  1415. own flash usage.
  1416. config KEXEC
  1417. bool "Kexec system call (EXPERIMENTAL)"
  1418. depends on EXPERIMENTAL
  1419. help
  1420. kexec is a system call that implements the ability to shutdown your
  1421. current kernel, and to start another kernel. It is like a reboot
  1422. but it is independent of the system firmware. And like a reboot
  1423. you can start any kernel with it, not just Linux.
  1424. It is an ongoing process to be certain the hardware in a machine
  1425. is properly shutdown, so do not be surprised if this code does not
  1426. initially work for you. It may help to enable device hotplugging
  1427. support.
  1428. config ATAGS_PROC
  1429. bool "Export atags in procfs"
  1430. depends on KEXEC
  1431. default y
  1432. help
  1433. Should the atags used to boot the kernel be exported in an "atags"
  1434. file in procfs. Useful with kexec.
  1435. config CRASH_DUMP
  1436. bool "Build kdump crash kernel (EXPERIMENTAL)"
  1437. depends on EXPERIMENTAL
  1438. help
  1439. Generate crash dump after being started by kexec. This should
  1440. be normally only set in special crash dump kernels which are
  1441. loaded in the main kernel with kexec-tools into a specially
  1442. reserved region and then later executed after a crash by
  1443. kdump/kexec. The crash dump kernel must be compiled to a
  1444. memory address not used by the main kernel
  1445. For more details see Documentation/kdump/kdump.txt
  1446. config AUTO_ZRELADDR
  1447. bool "Auto calculation of the decompressed kernel image address"
  1448. depends on !ZBOOT_ROM && !ARCH_U300
  1449. help
  1450. ZRELADDR is the physical address where the decompressed kernel
  1451. image will be placed. If AUTO_ZRELADDR is selected, the address
  1452. will be determined at run-time by masking the current IP with
  1453. 0xf8000000. This assumes the zImage being placed in the first 128MB
  1454. from start of memory.
  1455. endmenu
  1456. menu "CPU Power Management"
  1457. if ARCH_HAS_CPUFREQ
  1458. source "drivers/cpufreq/Kconfig"
  1459. config CPU_FREQ_IMX
  1460. tristate "CPUfreq driver for i.MX CPUs"
  1461. depends on ARCH_MXC && CPU_FREQ
  1462. help
  1463. This enables the CPUfreq driver for i.MX CPUs.
  1464. config CPU_FREQ_SA1100
  1465. bool
  1466. config CPU_FREQ_SA1110
  1467. bool
  1468. config CPU_FREQ_INTEGRATOR
  1469. tristate "CPUfreq driver for ARM Integrator CPUs"
  1470. depends on ARCH_INTEGRATOR && CPU_FREQ
  1471. default y
  1472. help
  1473. This enables the CPUfreq driver for ARM Integrator CPUs.
  1474. For details, take a look at <file:Documentation/cpu-freq>.
  1475. If in doubt, say Y.
  1476. config CPU_FREQ_PXA
  1477. bool
  1478. depends on CPU_FREQ && ARCH_PXA && PXA25x
  1479. default y
  1480. select CPU_FREQ_DEFAULT_GOV_USERSPACE
  1481. config CPU_FREQ_S3C64XX
  1482. bool "CPUfreq support for Samsung S3C64XX CPUs"
  1483. depends on CPU_FREQ && CPU_S3C6410
  1484. config CPU_FREQ_S3C
  1485. bool
  1486. help
  1487. Internal configuration node for common cpufreq on Samsung SoC
  1488. config CPU_FREQ_S3C24XX
  1489. bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
  1490. depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
  1491. select CPU_FREQ_S3C
  1492. help
  1493. This enables the CPUfreq driver for the Samsung S3C24XX family
  1494. of CPUs.
  1495. For details, take a look at <file:Documentation/cpu-freq>.
  1496. If in doubt, say N.
  1497. config CPU_FREQ_S3C24XX_PLL
  1498. bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
  1499. depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
  1500. help
  1501. Compile in support for changing the PLL frequency from the
  1502. S3C24XX series CPUfreq driver. The PLL takes time to settle
  1503. after a frequency change, so by default it is not enabled.
  1504. This also means that the PLL tables for the selected CPU(s) will
  1505. be built which may increase the size of the kernel image.
  1506. config CPU_FREQ_S3C24XX_DEBUG
  1507. bool "Debug CPUfreq Samsung driver core"
  1508. depends on CPU_FREQ_S3C24XX
  1509. help
  1510. Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
  1511. config CPU_FREQ_S3C24XX_IODEBUG
  1512. bool "Debug CPUfreq Samsung driver IO timing"
  1513. depends on CPU_FREQ_S3C24XX
  1514. help
  1515. Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
  1516. config CPU_FREQ_S3C24XX_DEBUGFS
  1517. bool "Export debugfs for CPUFreq"
  1518. depends on CPU_FREQ_S3C24XX && DEBUG_FS
  1519. help
  1520. Export status information via debugfs.
  1521. endif
  1522. source "drivers/cpuidle/Kconfig"
  1523. endmenu
  1524. menu "Floating point emulation"
  1525. comment "At least one emulation must be selected"
  1526. config FPE_NWFPE
  1527. bool "NWFPE math emulation"
  1528. depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
  1529. ---help---
  1530. Say Y to include the NWFPE floating point emulator in the kernel.
  1531. This is necessary to run most binaries. Linux does not currently
  1532. support floating point hardware so you need to say Y here even if
  1533. your machine has an FPA or floating point co-processor podule.
  1534. You may say N here if you are going to load the Acorn FPEmulator
  1535. early in the bootup.
  1536. config FPE_NWFPE_XP
  1537. bool "Support extended precision"
  1538. depends on FPE_NWFPE
  1539. help
  1540. Say Y to include 80-bit support in the kernel floating-point
  1541. emulator. Otherwise, only 32 and 64-bit support is compiled in.
  1542. Note that gcc does not generate 80-bit operations by default,
  1543. so in most cases this option only enlarges the size of the
  1544. floating point emulator without any good reason.
  1545. You almost surely want to say N here.
  1546. config FPE_FASTFPE
  1547. bool "FastFPE math emulation (EXPERIMENTAL)"
  1548. depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
  1549. ---help---
  1550. Say Y here to include the FAST floating point emulator in the kernel.
  1551. This is an experimental much faster emulator which now also has full
  1552. precision for the mantissa. It does not support any exceptions.
  1553. It is very simple, and approximately 3-6 times faster than NWFPE.
  1554. It should be sufficient for most programs. It may be not suitable
  1555. for scientific calculations, but you have to check this for yourself.
  1556. If you do not feel you need a faster FP emulation you should better
  1557. choose NWFPE.
  1558. config VFP
  1559. bool "VFP-format floating point maths"
  1560. depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
  1561. help
  1562. Say Y to include VFP support code in the kernel. This is needed
  1563. if your hardware includes a VFP unit.
  1564. Please see <file:Documentation/arm/VFP/release-notes.txt> for
  1565. release notes and additional status information.
  1566. Say N if your target does not have VFP hardware.
  1567. config VFPv3
  1568. bool
  1569. depends on VFP
  1570. default y if CPU_V7
  1571. config NEON
  1572. bool "Advanced SIMD (NEON) Extension support"
  1573. depends on VFPv3 && CPU_V7
  1574. help
  1575. Say Y to include support code for NEON, the ARMv7 Advanced SIMD
  1576. Extension.
  1577. endmenu
  1578. menu "Userspace binary formats"
  1579. source "fs/Kconfig.binfmt"
  1580. config ARTHUR
  1581. tristate "RISC OS personality"
  1582. depends on !AEABI
  1583. help
  1584. Say Y here to include the kernel code necessary if you want to run
  1585. Acorn RISC OS/Arthur binaries under Linux. This code is still very
  1586. experimental; if this sounds frightening, say N and sleep in peace.
  1587. You can also say M here to compile this support as a module (which
  1588. will be called arthur).
  1589. endmenu
  1590. menu "Power management options"
  1591. source "kernel/power/Kconfig"
  1592. config ARCH_SUSPEND_POSSIBLE
  1593. def_bool y
  1594. endmenu
  1595. source "net/Kconfig"
  1596. source "drivers/Kconfig"
  1597. source "fs/Kconfig"
  1598. source "arch/arm/Kconfig.debug"
  1599. source "security/Kconfig"
  1600. source "crypto/Kconfig"
  1601. source "lib/Kconfig"