process_64.c 20 KB

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  1. /*
  2. * Copyright (C) 1995 Linus Torvalds
  3. *
  4. * Pentium III FXSR, SSE support
  5. * Gareth Hughes <gareth@valinux.com>, May 2000
  6. *
  7. * X86-64 port
  8. * Andi Kleen.
  9. *
  10. * CPU hotplug support - ashok.raj@intel.com
  11. */
  12. /*
  13. * This file handles the architecture-dependent parts of process handling..
  14. */
  15. #include <stdarg.h>
  16. #include <linux/cpu.h>
  17. #include <linux/errno.h>
  18. #include <linux/sched.h>
  19. #include <linux/fs.h>
  20. #include <linux/kernel.h>
  21. #include <linux/mm.h>
  22. #include <linux/elfcore.h>
  23. #include <linux/smp.h>
  24. #include <linux/slab.h>
  25. #include <linux/user.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/utsname.h>
  28. #include <linux/delay.h>
  29. #include <linux/module.h>
  30. #include <linux/ptrace.h>
  31. #include <linux/random.h>
  32. #include <linux/notifier.h>
  33. #include <linux/kprobes.h>
  34. #include <linux/kdebug.h>
  35. #include <linux/tick.h>
  36. #include <linux/prctl.h>
  37. #include <asm/uaccess.h>
  38. #include <asm/pgtable.h>
  39. #include <asm/system.h>
  40. #include <asm/io.h>
  41. #include <asm/processor.h>
  42. #include <asm/i387.h>
  43. #include <asm/mmu_context.h>
  44. #include <asm/pda.h>
  45. #include <asm/prctl.h>
  46. #include <asm/desc.h>
  47. #include <asm/proto.h>
  48. #include <asm/ia32.h>
  49. #include <asm/idle.h>
  50. asmlinkage extern void ret_from_fork(void);
  51. unsigned long kernel_thread_flags = CLONE_VM | CLONE_UNTRACED;
  52. static ATOMIC_NOTIFIER_HEAD(idle_notifier);
  53. void idle_notifier_register(struct notifier_block *n)
  54. {
  55. atomic_notifier_chain_register(&idle_notifier, n);
  56. }
  57. void enter_idle(void)
  58. {
  59. write_pda(isidle, 1);
  60. atomic_notifier_call_chain(&idle_notifier, IDLE_START, NULL);
  61. }
  62. static void __exit_idle(void)
  63. {
  64. if (test_and_clear_bit_pda(0, isidle) == 0)
  65. return;
  66. atomic_notifier_call_chain(&idle_notifier, IDLE_END, NULL);
  67. }
  68. /* Called from interrupts to signify idle end */
  69. void exit_idle(void)
  70. {
  71. /* idle loop has pid 0 */
  72. if (current->pid)
  73. return;
  74. __exit_idle();
  75. }
  76. #ifdef CONFIG_HOTPLUG_CPU
  77. DECLARE_PER_CPU(int, cpu_state);
  78. #include <asm/nmi.h>
  79. /* We halt the CPU with physical CPU hotplug */
  80. static inline void play_dead(void)
  81. {
  82. idle_task_exit();
  83. wbinvd();
  84. mb();
  85. /* Ack it */
  86. __get_cpu_var(cpu_state) = CPU_DEAD;
  87. local_irq_disable();
  88. while (1)
  89. halt();
  90. }
  91. #else
  92. static inline void play_dead(void)
  93. {
  94. BUG();
  95. }
  96. #endif /* CONFIG_HOTPLUG_CPU */
  97. /*
  98. * The idle thread. There's no useful work to be
  99. * done, so just try to conserve power and have a
  100. * low exit latency (ie sit in a loop waiting for
  101. * somebody to say that they'd like to reschedule)
  102. */
  103. void cpu_idle(void)
  104. {
  105. current_thread_info()->status |= TS_POLLING;
  106. /* endless idle loop with no priority at all */
  107. while (1) {
  108. tick_nohz_stop_sched_tick();
  109. while (!need_resched()) {
  110. rmb();
  111. if (cpu_is_offline(smp_processor_id()))
  112. play_dead();
  113. /*
  114. * Idle routines should keep interrupts disabled
  115. * from here on, until they go to idle.
  116. * Otherwise, idle callbacks can misfire.
  117. */
  118. local_irq_disable();
  119. enter_idle();
  120. pm_idle();
  121. /* In many cases the interrupt that ended idle
  122. has already called exit_idle. But some idle
  123. loops can be woken up without interrupt. */
  124. __exit_idle();
  125. }
  126. tick_nohz_restart_sched_tick();
  127. preempt_enable_no_resched();
  128. schedule();
  129. preempt_disable();
  130. }
  131. }
  132. /* Prints also some state that isn't saved in the pt_regs */
  133. void __show_regs(struct pt_regs * regs)
  134. {
  135. unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs;
  136. unsigned long d0, d1, d2, d3, d6, d7;
  137. unsigned int fsindex, gsindex;
  138. unsigned int ds, cs, es;
  139. printk("\n");
  140. print_modules();
  141. printk("Pid: %d, comm: %.20s %s %s %.*s\n",
  142. current->pid, current->comm, print_tainted(),
  143. init_utsname()->release,
  144. (int)strcspn(init_utsname()->version, " "),
  145. init_utsname()->version);
  146. printk("RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->ip);
  147. printk_address(regs->ip, 1);
  148. printk("RSP: %04lx:%016lx EFLAGS: %08lx\n", regs->ss, regs->sp,
  149. regs->flags);
  150. printk("RAX: %016lx RBX: %016lx RCX: %016lx\n",
  151. regs->ax, regs->bx, regs->cx);
  152. printk("RDX: %016lx RSI: %016lx RDI: %016lx\n",
  153. regs->dx, regs->si, regs->di);
  154. printk("RBP: %016lx R08: %016lx R09: %016lx\n",
  155. regs->bp, regs->r8, regs->r9);
  156. printk("R10: %016lx R11: %016lx R12: %016lx\n",
  157. regs->r10, regs->r11, regs->r12);
  158. printk("R13: %016lx R14: %016lx R15: %016lx\n",
  159. regs->r13, regs->r14, regs->r15);
  160. asm("movl %%ds,%0" : "=r" (ds));
  161. asm("movl %%cs,%0" : "=r" (cs));
  162. asm("movl %%es,%0" : "=r" (es));
  163. asm("movl %%fs,%0" : "=r" (fsindex));
  164. asm("movl %%gs,%0" : "=r" (gsindex));
  165. rdmsrl(MSR_FS_BASE, fs);
  166. rdmsrl(MSR_GS_BASE, gs);
  167. rdmsrl(MSR_KERNEL_GS_BASE, shadowgs);
  168. cr0 = read_cr0();
  169. cr2 = read_cr2();
  170. cr3 = read_cr3();
  171. cr4 = read_cr4();
  172. printk("FS: %016lx(%04x) GS:%016lx(%04x) knlGS:%016lx\n",
  173. fs,fsindex,gs,gsindex,shadowgs);
  174. printk("CS: %04x DS: %04x ES: %04x CR0: %016lx\n", cs, ds, es, cr0);
  175. printk("CR2: %016lx CR3: %016lx CR4: %016lx\n", cr2, cr3, cr4);
  176. get_debugreg(d0, 0);
  177. get_debugreg(d1, 1);
  178. get_debugreg(d2, 2);
  179. printk("DR0: %016lx DR1: %016lx DR2: %016lx\n", d0, d1, d2);
  180. get_debugreg(d3, 3);
  181. get_debugreg(d6, 6);
  182. get_debugreg(d7, 7);
  183. printk("DR3: %016lx DR6: %016lx DR7: %016lx\n", d3, d6, d7);
  184. }
  185. void show_regs(struct pt_regs *regs)
  186. {
  187. printk("CPU %d:", smp_processor_id());
  188. __show_regs(regs);
  189. show_trace(NULL, regs, (void *)(regs + 1), regs->bp);
  190. }
  191. /*
  192. * Free current thread data structures etc..
  193. */
  194. void exit_thread(void)
  195. {
  196. struct task_struct *me = current;
  197. struct thread_struct *t = &me->thread;
  198. if (me->thread.io_bitmap_ptr) {
  199. struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
  200. kfree(t->io_bitmap_ptr);
  201. t->io_bitmap_ptr = NULL;
  202. clear_thread_flag(TIF_IO_BITMAP);
  203. /*
  204. * Careful, clear this in the TSS too:
  205. */
  206. memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
  207. t->io_bitmap_max = 0;
  208. put_cpu();
  209. }
  210. }
  211. void flush_thread(void)
  212. {
  213. struct task_struct *tsk = current;
  214. if (test_tsk_thread_flag(tsk, TIF_ABI_PENDING)) {
  215. clear_tsk_thread_flag(tsk, TIF_ABI_PENDING);
  216. if (test_tsk_thread_flag(tsk, TIF_IA32)) {
  217. clear_tsk_thread_flag(tsk, TIF_IA32);
  218. } else {
  219. set_tsk_thread_flag(tsk, TIF_IA32);
  220. current_thread_info()->status |= TS_COMPAT;
  221. }
  222. }
  223. clear_tsk_thread_flag(tsk, TIF_DEBUG);
  224. tsk->thread.debugreg0 = 0;
  225. tsk->thread.debugreg1 = 0;
  226. tsk->thread.debugreg2 = 0;
  227. tsk->thread.debugreg3 = 0;
  228. tsk->thread.debugreg6 = 0;
  229. tsk->thread.debugreg7 = 0;
  230. memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
  231. /*
  232. * Forget coprocessor state..
  233. */
  234. clear_fpu(tsk);
  235. clear_used_math();
  236. }
  237. void release_thread(struct task_struct *dead_task)
  238. {
  239. if (dead_task->mm) {
  240. if (dead_task->mm->context.size) {
  241. printk("WARNING: dead process %8s still has LDT? <%p/%d>\n",
  242. dead_task->comm,
  243. dead_task->mm->context.ldt,
  244. dead_task->mm->context.size);
  245. BUG();
  246. }
  247. }
  248. }
  249. static inline void set_32bit_tls(struct task_struct *t, int tls, u32 addr)
  250. {
  251. struct user_desc ud = {
  252. .base_addr = addr,
  253. .limit = 0xfffff,
  254. .seg_32bit = 1,
  255. .limit_in_pages = 1,
  256. .useable = 1,
  257. };
  258. struct desc_struct *desc = t->thread.tls_array;
  259. desc += tls;
  260. fill_ldt(desc, &ud);
  261. }
  262. static inline u32 read_32bit_tls(struct task_struct *t, int tls)
  263. {
  264. return get_desc_base(&t->thread.tls_array[tls]);
  265. }
  266. /*
  267. * This gets called before we allocate a new thread and copy
  268. * the current task into it.
  269. */
  270. void prepare_to_copy(struct task_struct *tsk)
  271. {
  272. unlazy_fpu(tsk);
  273. }
  274. int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
  275. unsigned long unused,
  276. struct task_struct * p, struct pt_regs * regs)
  277. {
  278. int err;
  279. struct pt_regs * childregs;
  280. struct task_struct *me = current;
  281. childregs = ((struct pt_regs *)
  282. (THREAD_SIZE + task_stack_page(p))) - 1;
  283. *childregs = *regs;
  284. childregs->ax = 0;
  285. childregs->sp = sp;
  286. if (sp == ~0UL)
  287. childregs->sp = (unsigned long)childregs;
  288. p->thread.sp = (unsigned long) childregs;
  289. p->thread.sp0 = (unsigned long) (childregs+1);
  290. p->thread.usersp = me->thread.usersp;
  291. set_tsk_thread_flag(p, TIF_FORK);
  292. p->thread.fs = me->thread.fs;
  293. p->thread.gs = me->thread.gs;
  294. asm("mov %%gs,%0" : "=m" (p->thread.gsindex));
  295. asm("mov %%fs,%0" : "=m" (p->thread.fsindex));
  296. asm("mov %%es,%0" : "=m" (p->thread.es));
  297. asm("mov %%ds,%0" : "=m" (p->thread.ds));
  298. if (unlikely(test_tsk_thread_flag(me, TIF_IO_BITMAP))) {
  299. p->thread.io_bitmap_ptr = kmalloc(IO_BITMAP_BYTES, GFP_KERNEL);
  300. if (!p->thread.io_bitmap_ptr) {
  301. p->thread.io_bitmap_max = 0;
  302. return -ENOMEM;
  303. }
  304. memcpy(p->thread.io_bitmap_ptr, me->thread.io_bitmap_ptr,
  305. IO_BITMAP_BYTES);
  306. set_tsk_thread_flag(p, TIF_IO_BITMAP);
  307. }
  308. /*
  309. * Set a new TLS for the child thread?
  310. */
  311. if (clone_flags & CLONE_SETTLS) {
  312. #ifdef CONFIG_IA32_EMULATION
  313. if (test_thread_flag(TIF_IA32))
  314. err = do_set_thread_area(p, -1,
  315. (struct user_desc __user *)childregs->si, 0);
  316. else
  317. #endif
  318. err = do_arch_prctl(p, ARCH_SET_FS, childregs->r8);
  319. if (err)
  320. goto out;
  321. }
  322. err = 0;
  323. out:
  324. if (err && p->thread.io_bitmap_ptr) {
  325. kfree(p->thread.io_bitmap_ptr);
  326. p->thread.io_bitmap_max = 0;
  327. }
  328. return err;
  329. }
  330. void
  331. start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
  332. {
  333. asm volatile("movl %0, %%fs; movl %0, %%es; movl %0, %%ds" :: "r"(0));
  334. load_gs_index(0);
  335. regs->ip = new_ip;
  336. regs->sp = new_sp;
  337. write_pda(oldrsp, new_sp);
  338. regs->cs = __USER_CS;
  339. regs->ss = __USER_DS;
  340. regs->flags = 0x200;
  341. set_fs(USER_DS);
  342. /*
  343. * Free the old FP and other extended state
  344. */
  345. free_thread_xstate(current);
  346. }
  347. EXPORT_SYMBOL_GPL(start_thread);
  348. static void hard_disable_TSC(void)
  349. {
  350. write_cr4(read_cr4() | X86_CR4_TSD);
  351. }
  352. void disable_TSC(void)
  353. {
  354. preempt_disable();
  355. if (!test_and_set_thread_flag(TIF_NOTSC))
  356. /*
  357. * Must flip the CPU state synchronously with
  358. * TIF_NOTSC in the current running context.
  359. */
  360. hard_disable_TSC();
  361. preempt_enable();
  362. }
  363. static void hard_enable_TSC(void)
  364. {
  365. write_cr4(read_cr4() & ~X86_CR4_TSD);
  366. }
  367. static void enable_TSC(void)
  368. {
  369. preempt_disable();
  370. if (test_and_clear_thread_flag(TIF_NOTSC))
  371. /*
  372. * Must flip the CPU state synchronously with
  373. * TIF_NOTSC in the current running context.
  374. */
  375. hard_enable_TSC();
  376. preempt_enable();
  377. }
  378. int get_tsc_mode(unsigned long adr)
  379. {
  380. unsigned int val;
  381. if (test_thread_flag(TIF_NOTSC))
  382. val = PR_TSC_SIGSEGV;
  383. else
  384. val = PR_TSC_ENABLE;
  385. return put_user(val, (unsigned int __user *)adr);
  386. }
  387. int set_tsc_mode(unsigned int val)
  388. {
  389. if (val == PR_TSC_SIGSEGV)
  390. disable_TSC();
  391. else if (val == PR_TSC_ENABLE)
  392. enable_TSC();
  393. else
  394. return -EINVAL;
  395. return 0;
  396. }
  397. /*
  398. * This special macro can be used to load a debugging register
  399. */
  400. #define loaddebug(thread, r) set_debugreg(thread->debugreg ## r, r)
  401. static inline void __switch_to_xtra(struct task_struct *prev_p,
  402. struct task_struct *next_p,
  403. struct tss_struct *tss)
  404. {
  405. struct thread_struct *prev, *next;
  406. unsigned long debugctl;
  407. prev = &prev_p->thread,
  408. next = &next_p->thread;
  409. debugctl = prev->debugctlmsr;
  410. if (next->ds_area_msr != prev->ds_area_msr) {
  411. /* we clear debugctl to make sure DS
  412. * is not in use when we change it */
  413. debugctl = 0;
  414. update_debugctlmsr(0);
  415. wrmsrl(MSR_IA32_DS_AREA, next->ds_area_msr);
  416. }
  417. if (next->debugctlmsr != debugctl)
  418. update_debugctlmsr(next->debugctlmsr);
  419. if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
  420. loaddebug(next, 0);
  421. loaddebug(next, 1);
  422. loaddebug(next, 2);
  423. loaddebug(next, 3);
  424. /* no 4 and 5 */
  425. loaddebug(next, 6);
  426. loaddebug(next, 7);
  427. }
  428. if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
  429. test_tsk_thread_flag(next_p, TIF_NOTSC)) {
  430. /* prev and next are different */
  431. if (test_tsk_thread_flag(next_p, TIF_NOTSC))
  432. hard_disable_TSC();
  433. else
  434. hard_enable_TSC();
  435. }
  436. if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
  437. /*
  438. * Copy the relevant range of the IO bitmap.
  439. * Normally this is 128 bytes or less:
  440. */
  441. memcpy(tss->io_bitmap, next->io_bitmap_ptr,
  442. max(prev->io_bitmap_max, next->io_bitmap_max));
  443. } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
  444. /*
  445. * Clear any possible leftover bits:
  446. */
  447. memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
  448. }
  449. #ifdef X86_BTS
  450. if (test_tsk_thread_flag(prev_p, TIF_BTS_TRACE_TS))
  451. ptrace_bts_take_timestamp(prev_p, BTS_TASK_DEPARTS);
  452. if (test_tsk_thread_flag(next_p, TIF_BTS_TRACE_TS))
  453. ptrace_bts_take_timestamp(next_p, BTS_TASK_ARRIVES);
  454. #endif
  455. }
  456. /*
  457. * switch_to(x,y) should switch tasks from x to y.
  458. *
  459. * This could still be optimized:
  460. * - fold all the options into a flag word and test it with a single test.
  461. * - could test fs/gs bitsliced
  462. *
  463. * Kprobes not supported here. Set the probe on schedule instead.
  464. */
  465. struct task_struct *
  466. __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
  467. {
  468. struct thread_struct *prev = &prev_p->thread,
  469. *next = &next_p->thread;
  470. int cpu = smp_processor_id();
  471. struct tss_struct *tss = &per_cpu(init_tss, cpu);
  472. /* we're going to use this soon, after a few expensive things */
  473. if (next_p->fpu_counter>5)
  474. prefetch(next->xstate);
  475. /*
  476. * Reload esp0, LDT and the page table pointer:
  477. */
  478. load_sp0(tss, next);
  479. /*
  480. * Switch DS and ES.
  481. * This won't pick up thread selector changes, but I guess that is ok.
  482. */
  483. asm volatile("mov %%es,%0" : "=m" (prev->es));
  484. if (unlikely(next->es | prev->es))
  485. loadsegment(es, next->es);
  486. asm volatile ("mov %%ds,%0" : "=m" (prev->ds));
  487. if (unlikely(next->ds | prev->ds))
  488. loadsegment(ds, next->ds);
  489. load_TLS(next, cpu);
  490. /*
  491. * Switch FS and GS.
  492. */
  493. {
  494. unsigned fsindex;
  495. asm volatile("movl %%fs,%0" : "=r" (fsindex));
  496. /* segment register != 0 always requires a reload.
  497. also reload when it has changed.
  498. when prev process used 64bit base always reload
  499. to avoid an information leak. */
  500. if (unlikely(fsindex | next->fsindex | prev->fs)) {
  501. loadsegment(fs, next->fsindex);
  502. /* check if the user used a selector != 0
  503. * if yes clear 64bit base, since overloaded base
  504. * is always mapped to the Null selector
  505. */
  506. if (fsindex)
  507. prev->fs = 0;
  508. }
  509. /* when next process has a 64bit base use it */
  510. if (next->fs)
  511. wrmsrl(MSR_FS_BASE, next->fs);
  512. prev->fsindex = fsindex;
  513. }
  514. {
  515. unsigned gsindex;
  516. asm volatile("movl %%gs,%0" : "=r" (gsindex));
  517. if (unlikely(gsindex | next->gsindex | prev->gs)) {
  518. load_gs_index(next->gsindex);
  519. if (gsindex)
  520. prev->gs = 0;
  521. }
  522. if (next->gs)
  523. wrmsrl(MSR_KERNEL_GS_BASE, next->gs);
  524. prev->gsindex = gsindex;
  525. }
  526. /* Must be after DS reload */
  527. unlazy_fpu(prev_p);
  528. /*
  529. * Switch the PDA and FPU contexts.
  530. */
  531. prev->usersp = read_pda(oldrsp);
  532. write_pda(oldrsp, next->usersp);
  533. write_pda(pcurrent, next_p);
  534. write_pda(kernelstack,
  535. (unsigned long)task_stack_page(next_p) + THREAD_SIZE - PDA_STACKOFFSET);
  536. #ifdef CONFIG_CC_STACKPROTECTOR
  537. write_pda(stack_canary, next_p->stack_canary);
  538. /*
  539. * Build time only check to make sure the stack_canary is at
  540. * offset 40 in the pda; this is a gcc ABI requirement
  541. */
  542. BUILD_BUG_ON(offsetof(struct x8664_pda, stack_canary) != 40);
  543. #endif
  544. /*
  545. * Now maybe reload the debug registers and handle I/O bitmaps
  546. */
  547. if (unlikely(task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT ||
  548. task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV))
  549. __switch_to_xtra(prev_p, next_p, tss);
  550. /* If the task has used fpu the last 5 timeslices, just do a full
  551. * restore of the math state immediately to avoid the trap; the
  552. * chances of needing FPU soon are obviously high now
  553. */
  554. if (next_p->fpu_counter>5)
  555. math_state_restore();
  556. return prev_p;
  557. }
  558. /*
  559. * sys_execve() executes a new program.
  560. */
  561. asmlinkage
  562. long sys_execve(char __user *name, char __user * __user *argv,
  563. char __user * __user *envp, struct pt_regs *regs)
  564. {
  565. long error;
  566. char * filename;
  567. filename = getname(name);
  568. error = PTR_ERR(filename);
  569. if (IS_ERR(filename))
  570. return error;
  571. error = do_execve(filename, argv, envp, regs);
  572. putname(filename);
  573. return error;
  574. }
  575. void set_personality_64bit(void)
  576. {
  577. /* inherit personality from parent */
  578. /* Make sure to be in 64bit mode */
  579. clear_thread_flag(TIF_IA32);
  580. /* TBD: overwrites user setup. Should have two bits.
  581. But 64bit processes have always behaved this way,
  582. so it's not too bad. The main problem is just that
  583. 32bit childs are affected again. */
  584. current->personality &= ~READ_IMPLIES_EXEC;
  585. }
  586. asmlinkage long sys_fork(struct pt_regs *regs)
  587. {
  588. return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
  589. }
  590. asmlinkage long
  591. sys_clone(unsigned long clone_flags, unsigned long newsp,
  592. void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
  593. {
  594. if (!newsp)
  595. newsp = regs->sp;
  596. return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
  597. }
  598. /*
  599. * This is trivial, and on the face of it looks like it
  600. * could equally well be done in user mode.
  601. *
  602. * Not so, for quite unobvious reasons - register pressure.
  603. * In user mode vfork() cannot have a stack frame, and if
  604. * done by calling the "clone()" system call directly, you
  605. * do not have enough call-clobbered registers to hold all
  606. * the information you need.
  607. */
  608. asmlinkage long sys_vfork(struct pt_regs *regs)
  609. {
  610. return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
  611. NULL, NULL);
  612. }
  613. unsigned long get_wchan(struct task_struct *p)
  614. {
  615. unsigned long stack;
  616. u64 fp,ip;
  617. int count = 0;
  618. if (!p || p == current || p->state==TASK_RUNNING)
  619. return 0;
  620. stack = (unsigned long)task_stack_page(p);
  621. if (p->thread.sp < stack || p->thread.sp > stack+THREAD_SIZE)
  622. return 0;
  623. fp = *(u64 *)(p->thread.sp);
  624. do {
  625. if (fp < (unsigned long)stack ||
  626. fp > (unsigned long)stack+THREAD_SIZE)
  627. return 0;
  628. ip = *(u64 *)(fp+8);
  629. if (!in_sched_functions(ip))
  630. return ip;
  631. fp = *(u64 *)fp;
  632. } while (count++ < 16);
  633. return 0;
  634. }
  635. long do_arch_prctl(struct task_struct *task, int code, unsigned long addr)
  636. {
  637. int ret = 0;
  638. int doit = task == current;
  639. int cpu;
  640. switch (code) {
  641. case ARCH_SET_GS:
  642. if (addr >= TASK_SIZE_OF(task))
  643. return -EPERM;
  644. cpu = get_cpu();
  645. /* handle small bases via the GDT because that's faster to
  646. switch. */
  647. if (addr <= 0xffffffff) {
  648. set_32bit_tls(task, GS_TLS, addr);
  649. if (doit) {
  650. load_TLS(&task->thread, cpu);
  651. load_gs_index(GS_TLS_SEL);
  652. }
  653. task->thread.gsindex = GS_TLS_SEL;
  654. task->thread.gs = 0;
  655. } else {
  656. task->thread.gsindex = 0;
  657. task->thread.gs = addr;
  658. if (doit) {
  659. load_gs_index(0);
  660. ret = checking_wrmsrl(MSR_KERNEL_GS_BASE, addr);
  661. }
  662. }
  663. put_cpu();
  664. break;
  665. case ARCH_SET_FS:
  666. /* Not strictly needed for fs, but do it for symmetry
  667. with gs */
  668. if (addr >= TASK_SIZE_OF(task))
  669. return -EPERM;
  670. cpu = get_cpu();
  671. /* handle small bases via the GDT because that's faster to
  672. switch. */
  673. if (addr <= 0xffffffff) {
  674. set_32bit_tls(task, FS_TLS, addr);
  675. if (doit) {
  676. load_TLS(&task->thread, cpu);
  677. asm volatile("movl %0,%%fs" :: "r"(FS_TLS_SEL));
  678. }
  679. task->thread.fsindex = FS_TLS_SEL;
  680. task->thread.fs = 0;
  681. } else {
  682. task->thread.fsindex = 0;
  683. task->thread.fs = addr;
  684. if (doit) {
  685. /* set the selector to 0 to not confuse
  686. __switch_to */
  687. asm volatile("movl %0,%%fs" :: "r" (0));
  688. ret = checking_wrmsrl(MSR_FS_BASE, addr);
  689. }
  690. }
  691. put_cpu();
  692. break;
  693. case ARCH_GET_FS: {
  694. unsigned long base;
  695. if (task->thread.fsindex == FS_TLS_SEL)
  696. base = read_32bit_tls(task, FS_TLS);
  697. else if (doit)
  698. rdmsrl(MSR_FS_BASE, base);
  699. else
  700. base = task->thread.fs;
  701. ret = put_user(base, (unsigned long __user *)addr);
  702. break;
  703. }
  704. case ARCH_GET_GS: {
  705. unsigned long base;
  706. unsigned gsindex;
  707. if (task->thread.gsindex == GS_TLS_SEL)
  708. base = read_32bit_tls(task, GS_TLS);
  709. else if (doit) {
  710. asm("movl %%gs,%0" : "=r" (gsindex));
  711. if (gsindex)
  712. rdmsrl(MSR_KERNEL_GS_BASE, base);
  713. else
  714. base = task->thread.gs;
  715. }
  716. else
  717. base = task->thread.gs;
  718. ret = put_user(base, (unsigned long __user *)addr);
  719. break;
  720. }
  721. default:
  722. ret = -EINVAL;
  723. break;
  724. }
  725. return ret;
  726. }
  727. long sys_arch_prctl(int code, unsigned long addr)
  728. {
  729. return do_arch_prctl(current, code, addr);
  730. }
  731. unsigned long arch_align_stack(unsigned long sp)
  732. {
  733. if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
  734. sp -= get_random_int() % 8192;
  735. return sp & ~0xf;
  736. }
  737. unsigned long arch_randomize_brk(struct mm_struct *mm)
  738. {
  739. unsigned long range_end = mm->brk + 0x02000000;
  740. return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
  741. }