armada-xp-openblocks-ax3-4.dts 3.5 KB

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  1. /*
  2. * Device Tree file for OpenBlocks AX3-4 board
  3. *
  4. * Copyright (C) 2012 Marvell
  5. *
  6. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. */
  12. /dts-v1/;
  13. /include/ "armada-xp-mv78260.dtsi"
  14. / {
  15. model = "PlatHome OpenBlocks AX3-4 board";
  16. compatible = "plathome,openblocks-ax3-4", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
  17. chosen {
  18. bootargs = "console=ttyS0,115200 earlyprintk";
  19. };
  20. memory {
  21. device_type = "memory";
  22. reg = <0 0x00000000 0 0xC0000000>; /* 3 GB */
  23. };
  24. soc {
  25. ranges = <0 0 0xd0000000 0x100000
  26. 0xf0000000 0 0xf0000000 0x8000000>;
  27. internal-regs {
  28. serial@12000 {
  29. clock-frequency = <250000000>;
  30. status = "okay";
  31. };
  32. serial@12100 {
  33. clock-frequency = <250000000>;
  34. status = "okay";
  35. };
  36. pinctrl {
  37. led_pins: led-pins-0 {
  38. marvell,pins = "mpp49", "mpp51", "mpp53";
  39. marvell,function = "gpio";
  40. };
  41. };
  42. leds {
  43. compatible = "gpio-leds";
  44. pinctrl-names = "default";
  45. pinctrl-0 = <&led_pins>;
  46. red_led {
  47. label = "red_led";
  48. gpios = <&gpio1 17 1>;
  49. default-state = "off";
  50. };
  51. yellow_led {
  52. label = "yellow_led";
  53. gpios = <&gpio1 19 1>;
  54. default-state = "off";
  55. };
  56. green_led {
  57. label = "green_led";
  58. gpios = <&gpio1 21 1>;
  59. default-state = "off";
  60. linux,default-trigger = "heartbeat";
  61. };
  62. };
  63. gpio_keys {
  64. compatible = "gpio-keys";
  65. #address-cells = <1>;
  66. #size-cells = <0>;
  67. button@1 {
  68. label = "Init Button";
  69. linux,code = <116>;
  70. gpios = <&gpio1 28 0>;
  71. };
  72. };
  73. mdio {
  74. phy0: ethernet-phy@0 {
  75. reg = <0>;
  76. };
  77. phy1: ethernet-phy@1 {
  78. reg = <1>;
  79. };
  80. phy2: ethernet-phy@2 {
  81. reg = <2>;
  82. };
  83. phy3: ethernet-phy@3 {
  84. reg = <3>;
  85. };
  86. };
  87. ethernet@70000 {
  88. status = "okay";
  89. phy = <&phy0>;
  90. phy-mode = "sgmii";
  91. };
  92. ethernet@74000 {
  93. status = "okay";
  94. phy = <&phy1>;
  95. phy-mode = "sgmii";
  96. };
  97. ethernet@30000 {
  98. status = "okay";
  99. phy = <&phy2>;
  100. phy-mode = "sgmii";
  101. };
  102. ethernet@34000 {
  103. status = "okay";
  104. phy = <&phy3>;
  105. phy-mode = "sgmii";
  106. };
  107. i2c@11000 {
  108. status = "okay";
  109. clock-frequency = <400000>;
  110. };
  111. i2c@11100 {
  112. status = "okay";
  113. clock-frequency = <400000>;
  114. s35390a: s35390a@30 {
  115. compatible = "s35390a";
  116. reg = <0x30>;
  117. };
  118. };
  119. sata@a0000 {
  120. nr-ports = <2>;
  121. status = "okay";
  122. };
  123. usb@50000 {
  124. status = "okay";
  125. };
  126. usb@51000 {
  127. status = "okay";
  128. };
  129. devbus-bootcs@10400 {
  130. status = "okay";
  131. ranges = <0 0xf0000000 0x8000000>; /* @addr 0xf000000, size 0x8000000 */
  132. /* Device Bus parameters are required */
  133. /* Read parameters */
  134. devbus,bus-width = <8>;
  135. devbus,turn-off-ps = <60000>;
  136. devbus,badr-skew-ps = <0>;
  137. devbus,acc-first-ps = <124000>;
  138. devbus,acc-next-ps = <248000>;
  139. devbus,rd-setup-ps = <0>;
  140. devbus,rd-hold-ps = <0>;
  141. /* Write parameters */
  142. devbus,sync-enable = <0>;
  143. devbus,wr-high-ps = <60000>;
  144. devbus,wr-low-ps = <60000>;
  145. devbus,ale-wr-ps = <60000>;
  146. /* NOR 128 MiB */
  147. nor@0 {
  148. compatible = "cfi-flash";
  149. reg = <0 0x8000000>;
  150. bank-width = <2>;
  151. };
  152. };
  153. pcie-controller {
  154. status = "okay";
  155. /* Internal mini-PCIe connector */
  156. pcie@1,0 {
  157. /* Port 0, Lane 0 */
  158. status = "okay";
  159. };
  160. };
  161. };
  162. };
  163. };