ata.h 15 KB

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  1. /*
  2. * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
  3. * Copyright 2003-2004 Jeff Garzik
  4. *
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2, or (at your option)
  9. * any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; see the file COPYING. If not, write to
  18. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  19. *
  20. *
  21. * libata documentation is available via 'make {ps|pdf}docs',
  22. * as Documentation/DocBook/libata.*
  23. *
  24. * Hardware documentation available from http://www.t13.org/
  25. *
  26. */
  27. #ifndef __LINUX_ATA_H__
  28. #define __LINUX_ATA_H__
  29. #include <linux/types.h>
  30. /* defines only for the constants which don't work well as enums */
  31. #define ATA_DMA_BOUNDARY 0xffffUL
  32. #define ATA_DMA_MASK 0xffffffffULL
  33. enum {
  34. /* various global constants */
  35. ATA_MAX_DEVICES = 2, /* per bus/port */
  36. ATA_MAX_PRD = 256, /* we could make these 256/256 */
  37. ATA_SECT_SIZE = 512,
  38. ATA_MAX_SECTORS_128 = 128,
  39. ATA_MAX_SECTORS = 256,
  40. ATA_MAX_SECTORS_LBA48 = 65535,/* TODO: 65536? */
  41. ATA_ID_WORDS = 256,
  42. ATA_ID_SERNO = 10,
  43. ATA_ID_FW_REV = 23,
  44. ATA_ID_PROD = 27,
  45. ATA_ID_OLD_PIO_MODES = 51,
  46. ATA_ID_FIELD_VALID = 53,
  47. ATA_ID_MWDMA_MODES = 63,
  48. ATA_ID_PIO_MODES = 64,
  49. ATA_ID_EIDE_DMA_MIN = 65,
  50. ATA_ID_EIDE_PIO = 67,
  51. ATA_ID_EIDE_PIO_IORDY = 68,
  52. ATA_ID_UDMA_MODES = 88,
  53. ATA_ID_MAJOR_VER = 80,
  54. ATA_ID_PIO4 = (1 << 1),
  55. ATA_ID_SERNO_LEN = 20,
  56. ATA_ID_FW_REV_LEN = 8,
  57. ATA_ID_PROD_LEN = 40,
  58. ATA_PCI_CTL_OFS = 2,
  59. ATA_PIO0 = (1 << 0),
  60. ATA_PIO1 = ATA_PIO0 | (1 << 1),
  61. ATA_PIO2 = ATA_PIO1 | (1 << 2),
  62. ATA_PIO3 = ATA_PIO2 | (1 << 3),
  63. ATA_PIO4 = ATA_PIO3 | (1 << 4),
  64. ATA_PIO5 = ATA_PIO4 | (1 << 5),
  65. ATA_PIO6 = ATA_PIO5 | (1 << 6),
  66. ATA_SWDMA0 = (1 << 0),
  67. ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
  68. ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
  69. ATA_SWDMA2_ONLY = (1 << 2),
  70. ATA_MWDMA0 = (1 << 0),
  71. ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
  72. ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
  73. ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
  74. ATA_MWDMA2_ONLY = (1 << 2),
  75. ATA_UDMA0 = (1 << 0),
  76. ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
  77. ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
  78. ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
  79. ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
  80. ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
  81. ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
  82. ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
  83. /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
  84. ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */
  85. /* DMA-related */
  86. ATA_PRD_SZ = 8,
  87. ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
  88. ATA_PRD_EOT = (1 << 31), /* end-of-table flag */
  89. ATA_DMA_TABLE_OFS = 4,
  90. ATA_DMA_STATUS = 2,
  91. ATA_DMA_CMD = 0,
  92. ATA_DMA_WR = (1 << 3),
  93. ATA_DMA_START = (1 << 0),
  94. ATA_DMA_INTR = (1 << 2),
  95. ATA_DMA_ERR = (1 << 1),
  96. ATA_DMA_ACTIVE = (1 << 0),
  97. /* bits in ATA command block registers */
  98. ATA_HOB = (1 << 7), /* LBA48 selector */
  99. ATA_NIEN = (1 << 1), /* disable-irq flag */
  100. ATA_LBA = (1 << 6), /* LBA28 selector */
  101. ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
  102. ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */
  103. ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
  104. ATA_BUSY = (1 << 7), /* BSY status bit */
  105. ATA_DRDY = (1 << 6), /* device ready */
  106. ATA_DF = (1 << 5), /* device fault */
  107. ATA_DRQ = (1 << 3), /* data request i/o */
  108. ATA_ERR = (1 << 0), /* have an error */
  109. ATA_SRST = (1 << 2), /* software reset */
  110. ATA_ICRC = (1 << 7), /* interface CRC error */
  111. ATA_UNC = (1 << 6), /* uncorrectable media error */
  112. ATA_IDNF = (1 << 4), /* ID not found */
  113. ATA_ABORTED = (1 << 2), /* command aborted */
  114. /* ATA command block registers */
  115. ATA_REG_DATA = 0x00,
  116. ATA_REG_ERR = 0x01,
  117. ATA_REG_NSECT = 0x02,
  118. ATA_REG_LBAL = 0x03,
  119. ATA_REG_LBAM = 0x04,
  120. ATA_REG_LBAH = 0x05,
  121. ATA_REG_DEVICE = 0x06,
  122. ATA_REG_STATUS = 0x07,
  123. ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */
  124. ATA_REG_CMD = ATA_REG_STATUS,
  125. ATA_REG_BYTEL = ATA_REG_LBAM,
  126. ATA_REG_BYTEH = ATA_REG_LBAH,
  127. ATA_REG_DEVSEL = ATA_REG_DEVICE,
  128. ATA_REG_IRQ = ATA_REG_NSECT,
  129. /* ATA device commands */
  130. ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */
  131. ATA_CMD_CHK_POWER = 0xE5, /* check power mode */
  132. ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */
  133. ATA_CMD_IDLE = 0xE3, /* place in idle power mode */
  134. ATA_CMD_EDD = 0x90, /* execute device diagnostic */
  135. ATA_CMD_FLUSH = 0xE7,
  136. ATA_CMD_FLUSH_EXT = 0xEA,
  137. ATA_CMD_ID_ATA = 0xEC,
  138. ATA_CMD_ID_ATAPI = 0xA1,
  139. ATA_CMD_READ = 0xC8,
  140. ATA_CMD_READ_EXT = 0x25,
  141. ATA_CMD_WRITE = 0xCA,
  142. ATA_CMD_WRITE_EXT = 0x35,
  143. ATA_CMD_WRITE_FUA_EXT = 0x3D,
  144. ATA_CMD_FPDMA_READ = 0x60,
  145. ATA_CMD_FPDMA_WRITE = 0x61,
  146. ATA_CMD_PIO_READ = 0x20,
  147. ATA_CMD_PIO_READ_EXT = 0x24,
  148. ATA_CMD_PIO_WRITE = 0x30,
  149. ATA_CMD_PIO_WRITE_EXT = 0x34,
  150. ATA_CMD_READ_MULTI = 0xC4,
  151. ATA_CMD_READ_MULTI_EXT = 0x29,
  152. ATA_CMD_WRITE_MULTI = 0xC5,
  153. ATA_CMD_WRITE_MULTI_EXT = 0x39,
  154. ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
  155. ATA_CMD_SET_FEATURES = 0xEF,
  156. ATA_CMD_SET_MULTI = 0xC6,
  157. ATA_CMD_PACKET = 0xA0,
  158. ATA_CMD_VERIFY = 0x40,
  159. ATA_CMD_VERIFY_EXT = 0x42,
  160. ATA_CMD_STANDBYNOW1 = 0xE0,
  161. ATA_CMD_IDLEIMMEDIATE = 0xE1,
  162. ATA_CMD_SLEEP = 0xE6,
  163. ATA_CMD_INIT_DEV_PARAMS = 0x91,
  164. ATA_CMD_READ_NATIVE_MAX = 0xF8,
  165. ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
  166. ATA_CMD_SET_MAX = 0xF9,
  167. ATA_CMD_SET_MAX_EXT = 0x37,
  168. ATA_CMD_READ_LOG_EXT = 0x2f,
  169. ATA_CMD_PMP_READ = 0xE4,
  170. ATA_CMD_PMP_WRITE = 0xE8,
  171. /* READ_LOG_EXT pages */
  172. ATA_LOG_SATA_NCQ = 0x10,
  173. /* READ/WRITE LONG (obsolete) */
  174. ATA_CMD_READ_LONG = 0x22,
  175. ATA_CMD_READ_LONG_ONCE = 0x23,
  176. ATA_CMD_WRITE_LONG = 0x32,
  177. ATA_CMD_WRITE_LONG_ONCE = 0x33,
  178. /* SETFEATURES stuff */
  179. SETFEATURES_XFER = 0x03,
  180. XFER_UDMA_7 = 0x47,
  181. XFER_UDMA_6 = 0x46,
  182. XFER_UDMA_5 = 0x45,
  183. XFER_UDMA_4 = 0x44,
  184. XFER_UDMA_3 = 0x43,
  185. XFER_UDMA_2 = 0x42,
  186. XFER_UDMA_1 = 0x41,
  187. XFER_UDMA_0 = 0x40,
  188. XFER_MW_DMA_4 = 0x24, /* CFA only */
  189. XFER_MW_DMA_3 = 0x23, /* CFA only */
  190. XFER_MW_DMA_2 = 0x22,
  191. XFER_MW_DMA_1 = 0x21,
  192. XFER_MW_DMA_0 = 0x20,
  193. XFER_SW_DMA_2 = 0x12,
  194. XFER_SW_DMA_1 = 0x11,
  195. XFER_SW_DMA_0 = 0x10,
  196. XFER_PIO_6 = 0x0E, /* CFA only */
  197. XFER_PIO_5 = 0x0D, /* CFA only */
  198. XFER_PIO_4 = 0x0C,
  199. XFER_PIO_3 = 0x0B,
  200. XFER_PIO_2 = 0x0A,
  201. XFER_PIO_1 = 0x09,
  202. XFER_PIO_0 = 0x08,
  203. XFER_PIO_SLOW = 0x00,
  204. SETFEATURES_WC_ON = 0x02, /* Enable write cache */
  205. SETFEATURES_WC_OFF = 0x82, /* Disable write cache */
  206. SETFEATURES_SPINUP = 0x07, /* Spin-up drive */
  207. SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
  208. SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */
  209. /* SETFEATURE Sector counts for SATA features */
  210. SATA_AN = 0x05, /* Asynchronous Notification */
  211. /* ATAPI stuff */
  212. ATAPI_PKT_DMA = (1 << 0),
  213. ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
  214. 0=to device, 1=to host */
  215. ATAPI_CDB_LEN = 16,
  216. /* PMP stuff */
  217. SATA_PMP_MAX_PORTS = 15,
  218. SATA_PMP_CTRL_PORT = 15,
  219. SATA_PMP_GSCR_DWORDS = 128,
  220. SATA_PMP_GSCR_PROD_ID = 0,
  221. SATA_PMP_GSCR_REV = 1,
  222. SATA_PMP_GSCR_PORT_INFO = 2,
  223. SATA_PMP_GSCR_ERROR = 32,
  224. SATA_PMP_GSCR_ERROR_EN = 33,
  225. SATA_PMP_GSCR_FEAT = 64,
  226. SATA_PMP_GSCR_FEAT_EN = 96,
  227. SATA_PMP_PSCR_STATUS = 0,
  228. SATA_PMP_PSCR_ERROR = 1,
  229. SATA_PMP_PSCR_CONTROL = 2,
  230. SATA_PMP_FEAT_BIST = (1 << 0),
  231. SATA_PMP_FEAT_PMREQ = (1 << 1),
  232. SATA_PMP_FEAT_DYNSSC = (1 << 2),
  233. SATA_PMP_FEAT_NOTIFY = (1 << 3),
  234. /* cable types */
  235. ATA_CBL_NONE = 0,
  236. ATA_CBL_PATA40 = 1,
  237. ATA_CBL_PATA80 = 2,
  238. ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */
  239. ATA_CBL_PATA_UNK = 4,
  240. ATA_CBL_SATA = 5,
  241. /* SATA Status and Control Registers */
  242. SCR_STATUS = 0,
  243. SCR_ERROR = 1,
  244. SCR_CONTROL = 2,
  245. SCR_ACTIVE = 3,
  246. SCR_NOTIFICATION = 4,
  247. /* SError bits */
  248. SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */
  249. SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */
  250. SERR_DATA = (1 << 8), /* unrecovered data error */
  251. SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */
  252. SERR_PROTOCOL = (1 << 10), /* protocol violation */
  253. SERR_INTERNAL = (1 << 11), /* host internal error */
  254. SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */
  255. SERR_PHY_INT_ERR = (1 << 17), /* PHY internal error */
  256. SERR_COMM_WAKE = (1 << 18), /* Comm wake */
  257. SERR_10B_8B_ERR = (1 << 19), /* 10b to 8b decode error */
  258. SERR_DISPARITY = (1 << 20), /* Disparity */
  259. SERR_CRC = (1 << 21), /* CRC error */
  260. SERR_HANDSHAKE = (1 << 22), /* Handshake error */
  261. SERR_LINK_SEQ_ERR = (1 << 23), /* Link sequence error */
  262. SERR_TRANS_ST_ERROR = (1 << 24), /* Transport state trans. error */
  263. SERR_UNRECOG_FIS = (1 << 25), /* Unrecognized FIS */
  264. SERR_DEV_XCHG = (1 << 26), /* device exchanged */
  265. /* struct ata_taskfile flags */
  266. ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */
  267. ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */
  268. ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */
  269. ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */
  270. ATA_TFLAG_LBA = (1 << 4), /* enable LBA */
  271. ATA_TFLAG_FUA = (1 << 5), /* enable FUA */
  272. ATA_TFLAG_POLLING = (1 << 6), /* set nIEN to 1 and use polling */
  273. };
  274. enum ata_tf_protocols {
  275. /* ATA taskfile protocols */
  276. ATA_PROT_UNKNOWN, /* unknown/invalid */
  277. ATA_PROT_NODATA, /* no data */
  278. ATA_PROT_PIO, /* PIO data xfer */
  279. ATA_PROT_DMA, /* DMA */
  280. ATA_PROT_NCQ, /* NCQ */
  281. ATA_PROT_ATAPI, /* packet command, PIO data xfer*/
  282. ATA_PROT_ATAPI_NODATA, /* packet command, no data */
  283. ATA_PROT_ATAPI_DMA, /* packet command with special DMA sauce */
  284. };
  285. enum ata_ioctls {
  286. ATA_IOC_GET_IO32 = 0x309,
  287. ATA_IOC_SET_IO32 = 0x324,
  288. };
  289. /* core structures */
  290. struct ata_prd {
  291. u32 addr;
  292. u32 flags_len;
  293. };
  294. struct ata_taskfile {
  295. unsigned long flags; /* ATA_TFLAG_xxx */
  296. u8 protocol; /* ATA_PROT_xxx */
  297. u8 ctl; /* control reg */
  298. u8 hob_feature; /* additional data */
  299. u8 hob_nsect; /* to support LBA48 */
  300. u8 hob_lbal;
  301. u8 hob_lbam;
  302. u8 hob_lbah;
  303. u8 feature;
  304. u8 nsect;
  305. u8 lbal;
  306. u8 lbam;
  307. u8 lbah;
  308. u8 device;
  309. u8 command; /* IO operation */
  310. };
  311. #define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0)
  312. #define ata_id_has_lba(id) ((id)[49] & (1 << 9))
  313. #define ata_id_has_dma(id) ((id)[49] & (1 << 8))
  314. #define ata_id_has_ncq(id) ((id)[76] & (1 << 8))
  315. #define ata_id_queue_depth(id) (((id)[75] & 0x1f) + 1)
  316. #define ata_id_removeable(id) ((id)[0] & (1 << 7))
  317. #define ata_id_has_dword_io(id) ((id)[48] & (1 << 0))
  318. #define ata_id_has_atapi_AN(id) \
  319. ( (((id)[76] != 0x0000) && ((id)[76] != 0xffff)) && \
  320. ((id)[78] & (1 << 5)) )
  321. #define ata_id_iordy_disable(id) ((id)[49] & (1 << 10))
  322. #define ata_id_has_iordy(id) ((id)[49] & (1 << 11))
  323. #define ata_id_u32(id,n) \
  324. (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
  325. #define ata_id_u64(id,n) \
  326. ( ((u64) (id)[(n) + 3] << 48) | \
  327. ((u64) (id)[(n) + 2] << 32) | \
  328. ((u64) (id)[(n) + 1] << 16) | \
  329. ((u64) (id)[(n) + 0]) )
  330. #define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20)
  331. static inline int ata_id_has_fua(const u16 *id)
  332. {
  333. if ((id[84] & 0xC000) != 0x4000)
  334. return 0;
  335. return id[84] & (1 << 6);
  336. }
  337. static inline int ata_id_has_flush(const u16 *id)
  338. {
  339. if ((id[83] & 0xC000) != 0x4000)
  340. return 0;
  341. return id[83] & (1 << 12);
  342. }
  343. static inline int ata_id_has_flush_ext(const u16 *id)
  344. {
  345. if ((id[83] & 0xC000) != 0x4000)
  346. return 0;
  347. return id[83] & (1 << 13);
  348. }
  349. static inline int ata_id_has_lba48(const u16 *id)
  350. {
  351. if ((id[83] & 0xC000) != 0x4000)
  352. return 0;
  353. return id[83] & (1 << 10);
  354. }
  355. static inline int ata_id_hpa_enabled(const u16 *id)
  356. {
  357. /* Yes children, word 83 valid bits cover word 82 data */
  358. if ((id[83] & 0xC000) != 0x4000)
  359. return 0;
  360. /* And 87 covers 85-87 */
  361. if ((id[87] & 0xC000) != 0x4000)
  362. return 0;
  363. /* Check command sets enabled as well as supported */
  364. if ((id[85] & ( 1 << 10)) == 0)
  365. return 0;
  366. return id[82] & (1 << 10);
  367. }
  368. static inline int ata_id_has_wcache(const u16 *id)
  369. {
  370. /* Yes children, word 83 valid bits cover word 82 data */
  371. if ((id[83] & 0xC000) != 0x4000)
  372. return 0;
  373. return id[82] & (1 << 5);
  374. }
  375. static inline int ata_id_has_pm(const u16 *id)
  376. {
  377. if ((id[83] & 0xC000) != 0x4000)
  378. return 0;
  379. return id[82] & (1 << 3);
  380. }
  381. static inline int ata_id_rahead_enabled(const u16 *id)
  382. {
  383. if ((id[87] & 0xC000) != 0x4000)
  384. return 0;
  385. return id[85] & (1 << 6);
  386. }
  387. static inline int ata_id_wcache_enabled(const u16 *id)
  388. {
  389. if ((id[87] & 0xC000) != 0x4000)
  390. return 0;
  391. return id[85] & (1 << 5);
  392. }
  393. /**
  394. * ata_id_major_version - get ATA level of drive
  395. * @id: Identify data
  396. *
  397. * Caveats:
  398. * ATA-1 considers identify optional
  399. * ATA-2 introduces mandatory identify
  400. * ATA-3 introduces word 80 and accurate reporting
  401. *
  402. * The practical impact of this is that ata_id_major_version cannot
  403. * reliably report on drives below ATA3.
  404. */
  405. static inline unsigned int ata_id_major_version(const u16 *id)
  406. {
  407. unsigned int mver;
  408. if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
  409. return 0;
  410. for (mver = 14; mver >= 1; mver--)
  411. if (id[ATA_ID_MAJOR_VER] & (1 << mver))
  412. break;
  413. return mver;
  414. }
  415. static inline int ata_id_is_sata(const u16 *id)
  416. {
  417. return ata_id_major_version(id) >= 5 && id[93] == 0;
  418. }
  419. static inline int ata_id_current_chs_valid(const u16 *id)
  420. {
  421. /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
  422. has not been issued to the device then the values of
  423. id[54] to id[56] are vendor specific. */
  424. return (id[53] & 0x01) && /* Current translation valid */
  425. id[54] && /* cylinders in current translation */
  426. id[55] && /* heads in current translation */
  427. id[55] <= 16 &&
  428. id[56]; /* sectors in current translation */
  429. }
  430. static inline int ata_id_is_cfa(const u16 *id)
  431. {
  432. u16 v = id[0];
  433. if (v == 0x848A) /* Standard CF */
  434. return 1;
  435. /* Could be CF hiding as standard ATA */
  436. if (ata_id_major_version(id) >= 3 && id[82] != 0xFFFF &&
  437. (id[82] & ( 1 << 2)))
  438. return 1;
  439. return 0;
  440. }
  441. static inline int ata_drive_40wire(const u16 *dev_id)
  442. {
  443. if (ata_id_is_sata(dev_id))
  444. return 0; /* SATA */
  445. if ((dev_id[93] & 0xE000) == 0x6000)
  446. return 0; /* 80 wire */
  447. return 1;
  448. }
  449. static inline int atapi_cdb_len(const u16 *dev_id)
  450. {
  451. u16 tmp = dev_id[0] & 0x3;
  452. switch (tmp) {
  453. case 0: return 12;
  454. case 1: return 16;
  455. default: return -1;
  456. }
  457. }
  458. static inline int is_atapi_taskfile(const struct ata_taskfile *tf)
  459. {
  460. return (tf->protocol == ATA_PROT_ATAPI) ||
  461. (tf->protocol == ATA_PROT_ATAPI_NODATA) ||
  462. (tf->protocol == ATA_PROT_ATAPI_DMA);
  463. }
  464. static inline int is_multi_taskfile(struct ata_taskfile *tf)
  465. {
  466. return (tf->command == ATA_CMD_READ_MULTI) ||
  467. (tf->command == ATA_CMD_WRITE_MULTI) ||
  468. (tf->command == ATA_CMD_READ_MULTI_EXT) ||
  469. (tf->command == ATA_CMD_WRITE_MULTI_EXT) ||
  470. (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT);
  471. }
  472. static inline int ata_ok(u8 status)
  473. {
  474. return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
  475. == ATA_DRDY);
  476. }
  477. static inline int lba_28_ok(u64 block, u32 n_block)
  478. {
  479. /* check the ending block number */
  480. return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256);
  481. }
  482. static inline int lba_48_ok(u64 block, u32 n_block)
  483. {
  484. /* check the ending block number */
  485. return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
  486. }
  487. #define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
  488. #define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
  489. #define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
  490. #define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
  491. #endif /* __LINUX_ATA_H__ */