calib.c 9.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359
  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "hw.h"
  17. #include "hw-ops.h"
  18. /* Common calibration code */
  19. /* We can tune this as we go by monitoring really low values */
  20. #define ATH9K_NF_TOO_LOW -60
  21. /* AR5416 may return very high value (like -31 dBm), in those cases the nf
  22. * is incorrect and we should use the static NF value. Later we can try to
  23. * find out why they are reporting these values */
  24. static bool ath9k_hw_nf_in_range(struct ath_hw *ah, s16 nf)
  25. {
  26. if (nf > ATH9K_NF_TOO_LOW) {
  27. ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
  28. "noise floor value detected (%d) is "
  29. "lower than what we think is a "
  30. "reasonable value (%d)\n",
  31. nf, ATH9K_NF_TOO_LOW);
  32. return false;
  33. }
  34. return true;
  35. }
  36. static int16_t ath9k_hw_get_nf_hist_mid(int16_t *nfCalBuffer)
  37. {
  38. int16_t nfval;
  39. int16_t sort[ATH9K_NF_CAL_HIST_MAX];
  40. int i, j;
  41. for (i = 0; i < ATH9K_NF_CAL_HIST_MAX; i++)
  42. sort[i] = nfCalBuffer[i];
  43. for (i = 0; i < ATH9K_NF_CAL_HIST_MAX - 1; i++) {
  44. for (j = 1; j < ATH9K_NF_CAL_HIST_MAX - i; j++) {
  45. if (sort[j] > sort[j - 1]) {
  46. nfval = sort[j];
  47. sort[j] = sort[j - 1];
  48. sort[j - 1] = nfval;
  49. }
  50. }
  51. }
  52. nfval = sort[(ATH9K_NF_CAL_HIST_MAX - 1) >> 1];
  53. return nfval;
  54. }
  55. static void ath9k_hw_update_nfcal_hist_buffer(struct ath9k_nfcal_hist *h,
  56. int16_t *nfarray)
  57. {
  58. int i;
  59. for (i = 0; i < NUM_NF_READINGS; i++) {
  60. h[i].nfCalBuffer[h[i].currIndex] = nfarray[i];
  61. if (++h[i].currIndex >= ATH9K_NF_CAL_HIST_MAX)
  62. h[i].currIndex = 0;
  63. if (h[i].invalidNFcount > 0) {
  64. h[i].invalidNFcount--;
  65. h[i].privNF = nfarray[i];
  66. } else {
  67. h[i].privNF =
  68. ath9k_hw_get_nf_hist_mid(h[i].nfCalBuffer);
  69. }
  70. }
  71. }
  72. static bool ath9k_hw_get_nf_thresh(struct ath_hw *ah,
  73. enum ieee80211_band band,
  74. int16_t *nft)
  75. {
  76. switch (band) {
  77. case IEEE80211_BAND_5GHZ:
  78. *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_5);
  79. break;
  80. case IEEE80211_BAND_2GHZ:
  81. *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_2);
  82. break;
  83. default:
  84. BUG_ON(1);
  85. return false;
  86. }
  87. return true;
  88. }
  89. void ath9k_hw_reset_calibration(struct ath_hw *ah,
  90. struct ath9k_cal_list *currCal)
  91. {
  92. int i;
  93. ath9k_hw_setup_calibration(ah, currCal);
  94. currCal->calState = CAL_RUNNING;
  95. for (i = 0; i < AR5416_MAX_CHAINS; i++) {
  96. ah->meas0.sign[i] = 0;
  97. ah->meas1.sign[i] = 0;
  98. ah->meas2.sign[i] = 0;
  99. ah->meas3.sign[i] = 0;
  100. }
  101. ah->cal_samples = 0;
  102. }
  103. /* This is done for the currently configured channel */
  104. bool ath9k_hw_reset_calvalid(struct ath_hw *ah)
  105. {
  106. struct ath_common *common = ath9k_hw_common(ah);
  107. struct ieee80211_conf *conf = &common->hw->conf;
  108. struct ath9k_cal_list *currCal = ah->cal_list_curr;
  109. if (!ah->curchan)
  110. return true;
  111. if (!AR_SREV_9100(ah) && !AR_SREV_9160_10_OR_LATER(ah))
  112. return true;
  113. if (currCal == NULL)
  114. return true;
  115. if (currCal->calState != CAL_DONE) {
  116. ath_print(common, ATH_DBG_CALIBRATE,
  117. "Calibration state incorrect, %d\n",
  118. currCal->calState);
  119. return true;
  120. }
  121. if (!ath9k_hw_iscal_supported(ah, currCal->calData->calType))
  122. return true;
  123. ath_print(common, ATH_DBG_CALIBRATE,
  124. "Resetting Cal %d state for channel %u\n",
  125. currCal->calData->calType, conf->channel->center_freq);
  126. ah->curchan->CalValid &= ~currCal->calData->calType;
  127. currCal->calState = CAL_WAITING;
  128. return false;
  129. }
  130. EXPORT_SYMBOL(ath9k_hw_reset_calvalid);
  131. void ath9k_hw_start_nfcal(struct ath_hw *ah, bool update)
  132. {
  133. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
  134. AR_PHY_AGC_CONTROL_ENABLE_NF);
  135. if (update)
  136. REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
  137. AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
  138. else
  139. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
  140. AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
  141. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
  142. }
  143. void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
  144. {
  145. struct ath9k_nfcal_hist *h;
  146. unsigned i, j;
  147. int32_t val;
  148. u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
  149. struct ath_common *common = ath9k_hw_common(ah);
  150. h = ah->nfCalHist;
  151. for (i = 0; i < NUM_NF_READINGS; i++) {
  152. if (chainmask & (1 << i)) {
  153. val = REG_READ(ah, ah->nf_regs[i]);
  154. val &= 0xFFFFFE00;
  155. val |= (((u32) (h[i].privNF) << 1) & 0x1ff);
  156. REG_WRITE(ah, ah->nf_regs[i], val);
  157. }
  158. }
  159. /*
  160. * Load software filtered NF value into baseband internal minCCApwr
  161. * variable.
  162. */
  163. REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
  164. AR_PHY_AGC_CONTROL_ENABLE_NF);
  165. REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
  166. AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
  167. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
  168. /*
  169. * Wait for load to complete, should be fast, a few 10s of us.
  170. * The max delay was changed from an original 250us to 10000us
  171. * since 250us often results in NF load timeout and causes deaf
  172. * condition during stress testing 12/12/2009
  173. */
  174. for (j = 0; j < 1000; j++) {
  175. if ((REG_READ(ah, AR_PHY_AGC_CONTROL) &
  176. AR_PHY_AGC_CONTROL_NF) == 0)
  177. break;
  178. udelay(10);
  179. }
  180. /*
  181. * We timed out waiting for the noisefloor to load, probably due to an
  182. * in-progress rx. Simply return here and allow the load plenty of time
  183. * to complete before the next calibration interval. We need to avoid
  184. * trying to load -50 (which happens below) while the previous load is
  185. * still in progress as this can cause rx deafness. Instead by returning
  186. * here, the baseband nf cal will just be capped by our present
  187. * noisefloor until the next calibration timer.
  188. */
  189. if (j == 1000) {
  190. ath_print(common, ATH_DBG_ANY, "Timeout while waiting for nf "
  191. "to load: AR_PHY_AGC_CONTROL=0x%x\n",
  192. REG_READ(ah, AR_PHY_AGC_CONTROL));
  193. return;
  194. }
  195. /*
  196. * Restore maxCCAPower register parameter again so that we're not capped
  197. * by the median we just loaded. This will be initial (and max) value
  198. * of next noise floor calibration the baseband does.
  199. */
  200. ENABLE_REGWRITE_BUFFER(ah);
  201. for (i = 0; i < NUM_NF_READINGS; i++) {
  202. if (chainmask & (1 << i)) {
  203. val = REG_READ(ah, ah->nf_regs[i]);
  204. val &= 0xFFFFFE00;
  205. val |= (((u32) (-50) << 1) & 0x1ff);
  206. REG_WRITE(ah, ah->nf_regs[i], val);
  207. }
  208. }
  209. REGWRITE_BUFFER_FLUSH(ah);
  210. DISABLE_REGWRITE_BUFFER(ah);
  211. }
  212. static void ath9k_hw_nf_sanitize(struct ath_hw *ah, s16 *nf)
  213. {
  214. struct ath_common *common = ath9k_hw_common(ah);
  215. struct ath_nf_limits *limit;
  216. int i;
  217. if (IS_CHAN_2GHZ(ah->curchan))
  218. limit = &ah->nf_2g;
  219. else
  220. limit = &ah->nf_5g;
  221. for (i = 0; i < NUM_NF_READINGS; i++) {
  222. if (!nf[i])
  223. continue;
  224. ath_print(common, ATH_DBG_CALIBRATE,
  225. "NF calibrated [%s] [chain %d] is %d\n",
  226. (i >= 3 ? "ext" : "ctl"), i % 3, nf[i]);
  227. if (nf[i] > limit->max) {
  228. ath_print(common, ATH_DBG_CALIBRATE,
  229. "NF[%d] (%d) > MAX (%d), correcting to MAX",
  230. i, nf[i], limit->max);
  231. nf[i] = limit->max;
  232. } else if (nf[i] < limit->min) {
  233. ath_print(common, ATH_DBG_CALIBRATE,
  234. "NF[%d] (%d) < MIN (%d), correcting to NOM",
  235. i, nf[i], limit->min);
  236. nf[i] = limit->nominal;
  237. }
  238. }
  239. }
  240. int16_t ath9k_hw_getnf(struct ath_hw *ah,
  241. struct ath9k_channel *chan)
  242. {
  243. struct ath_common *common = ath9k_hw_common(ah);
  244. int16_t nf, nfThresh;
  245. int16_t nfarray[NUM_NF_READINGS] = { 0 };
  246. struct ath9k_nfcal_hist *h;
  247. struct ieee80211_channel *c = chan->chan;
  248. chan->channelFlags &= (~CHANNEL_CW_INT);
  249. if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) {
  250. ath_print(common, ATH_DBG_CALIBRATE,
  251. "NF did not complete in calibration window\n");
  252. nf = 0;
  253. chan->rawNoiseFloor = nf;
  254. return chan->rawNoiseFloor;
  255. } else {
  256. ath9k_hw_do_getnf(ah, nfarray);
  257. ath9k_hw_nf_sanitize(ah, nfarray);
  258. nf = nfarray[0];
  259. if (ath9k_hw_get_nf_thresh(ah, c->band, &nfThresh)
  260. && nf > nfThresh) {
  261. ath_print(common, ATH_DBG_CALIBRATE,
  262. "noise floor failed detected; "
  263. "detected %d, threshold %d\n",
  264. nf, nfThresh);
  265. chan->channelFlags |= CHANNEL_CW_INT;
  266. }
  267. }
  268. h = ah->nfCalHist;
  269. ath9k_hw_update_nfcal_hist_buffer(h, nfarray);
  270. chan->rawNoiseFloor = h[0].privNF;
  271. return chan->rawNoiseFloor;
  272. }
  273. void ath9k_init_nfcal_hist_buffer(struct ath_hw *ah)
  274. {
  275. struct ath_nf_limits *limit;
  276. int i, j;
  277. if (!ah->curchan || IS_CHAN_2GHZ(ah->curchan))
  278. limit = &ah->nf_2g;
  279. else
  280. limit = &ah->nf_5g;
  281. for (i = 0; i < NUM_NF_READINGS; i++) {
  282. ah->nfCalHist[i].currIndex = 0;
  283. ah->nfCalHist[i].privNF = limit->nominal;
  284. ah->nfCalHist[i].invalidNFcount =
  285. AR_PHY_CCA_FILTERWINDOW_LENGTH;
  286. for (j = 0; j < ATH9K_NF_CAL_HIST_MAX; j++) {
  287. ah->nfCalHist[i].nfCalBuffer[j] = limit->nominal;
  288. }
  289. }
  290. }
  291. s16 ath9k_hw_getchan_noise(struct ath_hw *ah, struct ath9k_channel *chan)
  292. {
  293. s16 nf;
  294. if (chan->rawNoiseFloor == 0)
  295. nf = -96;
  296. else
  297. nf = chan->rawNoiseFloor;
  298. if (!ath9k_hw_nf_in_range(ah, nf))
  299. nf = ATH_DEFAULT_NOISE_FLOOR;
  300. return nf;
  301. }
  302. EXPORT_SYMBOL(ath9k_hw_getchan_noise);