iwl4965-base.c 250 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-eeprom.h"
  45. #include "iwl-core.h"
  46. #include "iwl-4965.h"
  47. #include "iwl-helpers.h"
  48. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  49. struct iwl4965_tx_queue *txq);
  50. /******************************************************************************
  51. *
  52. * module boiler plate
  53. *
  54. ******************************************************************************/
  55. /* module parameters */
  56. struct iwl_mod_params iwl4965_mod_params = {
  57. .num_of_queues = IWL_MAX_NUM_QUEUES,
  58. .enable_qos = 1,
  59. .amsdu_size_8K = 1,
  60. /* the rest are 0 by default */
  61. };
  62. /*
  63. * module name, copyright, version, etc.
  64. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  65. */
  66. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  67. #ifdef CONFIG_IWLWIFI_DEBUG
  68. #define VD "d"
  69. #else
  70. #define VD
  71. #endif
  72. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  73. #define VS "s"
  74. #else
  75. #define VS
  76. #endif
  77. #define DRV_VERSION IWLWIFI_VERSION VD VS
  78. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  79. MODULE_VERSION(DRV_VERSION);
  80. MODULE_AUTHOR(DRV_COPYRIGHT);
  81. MODULE_LICENSE("GPL");
  82. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  83. {
  84. u16 fc = le16_to_cpu(hdr->frame_control);
  85. int hdr_len = ieee80211_get_hdrlen(fc);
  86. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  87. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  88. return NULL;
  89. }
  90. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  91. struct iwl_priv *priv, enum ieee80211_band band)
  92. {
  93. return priv->hw->wiphy->bands[band];
  94. }
  95. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  96. {
  97. /* Single white space is for Linksys APs */
  98. if (essid_len == 1 && essid[0] == ' ')
  99. return 1;
  100. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  101. while (essid_len) {
  102. essid_len--;
  103. if (essid[essid_len] != '\0')
  104. return 0;
  105. }
  106. return 1;
  107. }
  108. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  109. {
  110. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  111. const char *s = essid;
  112. char *d = escaped;
  113. if (iwl4965_is_empty_essid(essid, essid_len)) {
  114. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  115. return escaped;
  116. }
  117. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  118. while (essid_len--) {
  119. if (*s == '\0') {
  120. *d++ = '\\';
  121. *d++ = '0';
  122. s++;
  123. } else
  124. *d++ = *s++;
  125. }
  126. *d = '\0';
  127. return escaped;
  128. }
  129. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  130. * DMA services
  131. *
  132. * Theory of operation
  133. *
  134. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  135. * of buffer descriptors, each of which points to one or more data buffers for
  136. * the device to read from or fill. Driver and device exchange status of each
  137. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  138. * entries in each circular buffer, to protect against confusing empty and full
  139. * queue states.
  140. *
  141. * The device reads or writes the data in the queues via the device's several
  142. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  143. *
  144. * For Tx queue, there are low mark and high mark limits. If, after queuing
  145. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  146. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  147. * Tx queue resumed.
  148. *
  149. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  150. * queue (#4) for sending commands to the device firmware, and 15 other
  151. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  152. *
  153. * See more detailed info in iwl-4965-hw.h.
  154. ***************************************************/
  155. int iwl4965_queue_space(const struct iwl4965_queue *q)
  156. {
  157. int s = q->read_ptr - q->write_ptr;
  158. if (q->read_ptr > q->write_ptr)
  159. s -= q->n_bd;
  160. if (s <= 0)
  161. s += q->n_window;
  162. /* keep some reserve to not confuse empty and full situations */
  163. s -= 2;
  164. if (s < 0)
  165. s = 0;
  166. return s;
  167. }
  168. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  169. {
  170. return q->write_ptr > q->read_ptr ?
  171. (i >= q->read_ptr && i < q->write_ptr) :
  172. !(i < q->read_ptr && i >= q->write_ptr);
  173. }
  174. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  175. {
  176. /* This is for scan command, the big buffer at end of command array */
  177. if (is_huge)
  178. return q->n_window; /* must be power of 2 */
  179. /* Otherwise, use normal size buffers */
  180. return index & (q->n_window - 1);
  181. }
  182. /**
  183. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  184. */
  185. static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
  186. int count, int slots_num, u32 id)
  187. {
  188. q->n_bd = count;
  189. q->n_window = slots_num;
  190. q->id = id;
  191. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  192. * and iwl_queue_dec_wrap are broken. */
  193. BUG_ON(!is_power_of_2(count));
  194. /* slots_num must be power-of-two size, otherwise
  195. * get_cmd_index is broken. */
  196. BUG_ON(!is_power_of_2(slots_num));
  197. q->low_mark = q->n_window / 4;
  198. if (q->low_mark < 4)
  199. q->low_mark = 4;
  200. q->high_mark = q->n_window / 8;
  201. if (q->high_mark < 2)
  202. q->high_mark = 2;
  203. q->write_ptr = q->read_ptr = 0;
  204. return 0;
  205. }
  206. /**
  207. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  208. */
  209. static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
  210. struct iwl4965_tx_queue *txq, u32 id)
  211. {
  212. struct pci_dev *dev = priv->pci_dev;
  213. /* Driver private data, only for Tx (not command) queues,
  214. * not shared with device. */
  215. if (id != IWL_CMD_QUEUE_NUM) {
  216. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  217. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  218. if (!txq->txb) {
  219. IWL_ERROR("kmalloc for auxiliary BD "
  220. "structures failed\n");
  221. goto error;
  222. }
  223. } else
  224. txq->txb = NULL;
  225. /* Circular buffer of transmit frame descriptors (TFDs),
  226. * shared with device */
  227. txq->bd = pci_alloc_consistent(dev,
  228. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  229. &txq->q.dma_addr);
  230. if (!txq->bd) {
  231. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  232. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  233. goto error;
  234. }
  235. txq->q.id = id;
  236. return 0;
  237. error:
  238. if (txq->txb) {
  239. kfree(txq->txb);
  240. txq->txb = NULL;
  241. }
  242. return -ENOMEM;
  243. }
  244. /**
  245. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  246. */
  247. int iwl4965_tx_queue_init(struct iwl_priv *priv,
  248. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  249. {
  250. struct pci_dev *dev = priv->pci_dev;
  251. int len;
  252. int rc = 0;
  253. /*
  254. * Alloc buffer array for commands (Tx or other types of commands).
  255. * For the command queue (#4), allocate command space + one big
  256. * command for scan, since scan command is very huge; the system will
  257. * not have two scans at the same time, so only one is needed.
  258. * For normal Tx queues (all other queues), no super-size command
  259. * space is needed.
  260. */
  261. len = sizeof(struct iwl4965_cmd) * slots_num;
  262. if (txq_id == IWL_CMD_QUEUE_NUM)
  263. len += IWL_MAX_SCAN_SIZE;
  264. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  265. if (!txq->cmd)
  266. return -ENOMEM;
  267. /* Alloc driver data array and TFD circular buffer */
  268. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  269. if (rc) {
  270. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  271. return -ENOMEM;
  272. }
  273. txq->need_update = 0;
  274. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  275. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  276. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  277. /* Initialize queue's high/low-water marks, and head/tail indexes */
  278. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  279. /* Tell device where to find queue */
  280. iwl4965_hw_tx_queue_init(priv, txq);
  281. return 0;
  282. }
  283. /**
  284. * iwl4965_tx_queue_free - Deallocate DMA queue.
  285. * @txq: Transmit queue to deallocate.
  286. *
  287. * Empty queue by removing and destroying all BD's.
  288. * Free all buffers.
  289. * 0-fill, but do not free "txq" descriptor structure.
  290. */
  291. void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
  292. {
  293. struct iwl4965_queue *q = &txq->q;
  294. struct pci_dev *dev = priv->pci_dev;
  295. int len;
  296. if (q->n_bd == 0)
  297. return;
  298. /* first, empty all BD's */
  299. for (; q->write_ptr != q->read_ptr;
  300. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  301. iwl4965_hw_txq_free_tfd(priv, txq);
  302. len = sizeof(struct iwl4965_cmd) * q->n_window;
  303. if (q->id == IWL_CMD_QUEUE_NUM)
  304. len += IWL_MAX_SCAN_SIZE;
  305. /* De-alloc array of command/tx buffers */
  306. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  307. /* De-alloc circular buffer of TFDs */
  308. if (txq->q.n_bd)
  309. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  310. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  311. /* De-alloc array of per-TFD driver data */
  312. if (txq->txb) {
  313. kfree(txq->txb);
  314. txq->txb = NULL;
  315. }
  316. /* 0-fill queue descriptor structure */
  317. memset(txq, 0, sizeof(*txq));
  318. }
  319. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  320. /*************** STATION TABLE MANAGEMENT ****
  321. * mac80211 should be examined to determine if sta_info is duplicating
  322. * the functionality provided here
  323. */
  324. /**************************************************************/
  325. #if 0 /* temporary disable till we add real remove station */
  326. /**
  327. * iwl4965_remove_station - Remove driver's knowledge of station.
  328. *
  329. * NOTE: This does not remove station from device's station table.
  330. */
  331. static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  332. {
  333. int index = IWL_INVALID_STATION;
  334. int i;
  335. unsigned long flags;
  336. spin_lock_irqsave(&priv->sta_lock, flags);
  337. if (is_ap)
  338. index = IWL_AP_ID;
  339. else if (is_broadcast_ether_addr(addr))
  340. index = priv->hw_setting.bcast_sta_id;
  341. else
  342. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  343. if (priv->stations[i].used &&
  344. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  345. addr)) {
  346. index = i;
  347. break;
  348. }
  349. if (unlikely(index == IWL_INVALID_STATION))
  350. goto out;
  351. if (priv->stations[index].used) {
  352. priv->stations[index].used = 0;
  353. priv->num_stations--;
  354. }
  355. BUG_ON(priv->num_stations < 0);
  356. out:
  357. spin_unlock_irqrestore(&priv->sta_lock, flags);
  358. return 0;
  359. }
  360. #endif
  361. /**
  362. * iwl4965_clear_stations_table - Clear the driver's station table
  363. *
  364. * NOTE: This does not clear or otherwise alter the device's station table.
  365. */
  366. static void iwl4965_clear_stations_table(struct iwl_priv *priv)
  367. {
  368. unsigned long flags;
  369. spin_lock_irqsave(&priv->sta_lock, flags);
  370. priv->num_stations = 0;
  371. memset(priv->stations, 0, sizeof(priv->stations));
  372. spin_unlock_irqrestore(&priv->sta_lock, flags);
  373. }
  374. /**
  375. * iwl4965_add_station_flags - Add station to tables in driver and device
  376. */
  377. u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
  378. int is_ap, u8 flags, void *ht_data)
  379. {
  380. int i;
  381. int index = IWL_INVALID_STATION;
  382. struct iwl4965_station_entry *station;
  383. unsigned long flags_spin;
  384. DECLARE_MAC_BUF(mac);
  385. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  386. if (is_ap)
  387. index = IWL_AP_ID;
  388. else if (is_broadcast_ether_addr(addr))
  389. index = priv->hw_setting.bcast_sta_id;
  390. else
  391. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  392. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  393. addr)) {
  394. index = i;
  395. break;
  396. }
  397. if (!priv->stations[i].used &&
  398. index == IWL_INVALID_STATION)
  399. index = i;
  400. }
  401. /* These two conditions have the same outcome, but keep them separate
  402. since they have different meanings */
  403. if (unlikely(index == IWL_INVALID_STATION)) {
  404. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  405. return index;
  406. }
  407. if (priv->stations[index].used &&
  408. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  409. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  410. return index;
  411. }
  412. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  413. station = &priv->stations[index];
  414. station->used = 1;
  415. priv->num_stations++;
  416. /* Set up the REPLY_ADD_STA command to send to device */
  417. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  418. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  419. station->sta.mode = 0;
  420. station->sta.sta.sta_id = index;
  421. station->sta.station_flags = 0;
  422. #ifdef CONFIG_IWL4965_HT
  423. /* BCAST station and IBSS stations do not work in HT mode */
  424. if (index != priv->hw_setting.bcast_sta_id &&
  425. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  426. iwl4965_set_ht_add_station(priv, index,
  427. (struct ieee80211_ht_info *) ht_data);
  428. #endif /*CONFIG_IWL4965_HT*/
  429. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  430. /* Add station to device's station table */
  431. iwl4965_send_add_station(priv, &station->sta, flags);
  432. return index;
  433. }
  434. /*************** DRIVER STATUS FUNCTIONS *****/
  435. static inline int iwl4965_is_ready(struct iwl_priv *priv)
  436. {
  437. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  438. * set but EXIT_PENDING is not */
  439. return test_bit(STATUS_READY, &priv->status) &&
  440. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  441. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  442. }
  443. static inline int iwl4965_is_alive(struct iwl_priv *priv)
  444. {
  445. return test_bit(STATUS_ALIVE, &priv->status);
  446. }
  447. static inline int iwl4965_is_init(struct iwl_priv *priv)
  448. {
  449. return test_bit(STATUS_INIT, &priv->status);
  450. }
  451. static inline int iwl4965_is_rfkill(struct iwl_priv *priv)
  452. {
  453. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  454. test_bit(STATUS_RF_KILL_SW, &priv->status);
  455. }
  456. static inline int iwl4965_is_ready_rf(struct iwl_priv *priv)
  457. {
  458. if (iwl4965_is_rfkill(priv))
  459. return 0;
  460. return iwl4965_is_ready(priv);
  461. }
  462. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  463. #define IWL_CMD(x) case x : return #x
  464. static const char *get_cmd_string(u8 cmd)
  465. {
  466. switch (cmd) {
  467. IWL_CMD(REPLY_ALIVE);
  468. IWL_CMD(REPLY_ERROR);
  469. IWL_CMD(REPLY_RXON);
  470. IWL_CMD(REPLY_RXON_ASSOC);
  471. IWL_CMD(REPLY_QOS_PARAM);
  472. IWL_CMD(REPLY_RXON_TIMING);
  473. IWL_CMD(REPLY_ADD_STA);
  474. IWL_CMD(REPLY_REMOVE_STA);
  475. IWL_CMD(REPLY_REMOVE_ALL_STA);
  476. IWL_CMD(REPLY_TX);
  477. IWL_CMD(REPLY_RATE_SCALE);
  478. IWL_CMD(REPLY_LEDS_CMD);
  479. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  480. IWL_CMD(RADAR_NOTIFICATION);
  481. IWL_CMD(REPLY_QUIET_CMD);
  482. IWL_CMD(REPLY_CHANNEL_SWITCH);
  483. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  484. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  485. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  486. IWL_CMD(POWER_TABLE_CMD);
  487. IWL_CMD(PM_SLEEP_NOTIFICATION);
  488. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  489. IWL_CMD(REPLY_SCAN_CMD);
  490. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  491. IWL_CMD(SCAN_START_NOTIFICATION);
  492. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  493. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  494. IWL_CMD(BEACON_NOTIFICATION);
  495. IWL_CMD(REPLY_TX_BEACON);
  496. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  497. IWL_CMD(QUIET_NOTIFICATION);
  498. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  499. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  500. IWL_CMD(REPLY_BT_CONFIG);
  501. IWL_CMD(REPLY_STATISTICS_CMD);
  502. IWL_CMD(STATISTICS_NOTIFICATION);
  503. IWL_CMD(REPLY_CARD_STATE_CMD);
  504. IWL_CMD(CARD_STATE_NOTIFICATION);
  505. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  506. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  507. IWL_CMD(SENSITIVITY_CMD);
  508. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  509. IWL_CMD(REPLY_RX_PHY_CMD);
  510. IWL_CMD(REPLY_RX_MPDU_CMD);
  511. IWL_CMD(REPLY_4965_RX);
  512. IWL_CMD(REPLY_COMPRESSED_BA);
  513. default:
  514. return "UNKNOWN";
  515. }
  516. }
  517. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  518. /**
  519. * iwl4965_enqueue_hcmd - enqueue a uCode command
  520. * @priv: device private data point
  521. * @cmd: a point to the ucode command structure
  522. *
  523. * The function returns < 0 values to indicate the operation is
  524. * failed. On success, it turns the index (> 0) of command in the
  525. * command queue.
  526. */
  527. static int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl4965_host_cmd *cmd)
  528. {
  529. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  530. struct iwl4965_queue *q = &txq->q;
  531. struct iwl4965_tfd_frame *tfd;
  532. u32 *control_flags;
  533. struct iwl4965_cmd *out_cmd;
  534. u32 idx;
  535. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  536. dma_addr_t phys_addr;
  537. int ret;
  538. unsigned long flags;
  539. /* If any of the command structures end up being larger than
  540. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  541. * we will need to increase the size of the TFD entries */
  542. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  543. !(cmd->meta.flags & CMD_SIZE_HUGE));
  544. if (iwl4965_is_rfkill(priv)) {
  545. IWL_DEBUG_INFO("Not sending command - RF KILL");
  546. return -EIO;
  547. }
  548. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  549. IWL_ERROR("No space for Tx\n");
  550. return -ENOSPC;
  551. }
  552. spin_lock_irqsave(&priv->hcmd_lock, flags);
  553. tfd = &txq->bd[q->write_ptr];
  554. memset(tfd, 0, sizeof(*tfd));
  555. control_flags = (u32 *) tfd;
  556. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  557. out_cmd = &txq->cmd[idx];
  558. out_cmd->hdr.cmd = cmd->id;
  559. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  560. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  561. /* At this point, the out_cmd now has all of the incoming cmd
  562. * information */
  563. out_cmd->hdr.flags = 0;
  564. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  565. INDEX_TO_SEQ(q->write_ptr));
  566. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  567. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  568. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  569. offsetof(struct iwl4965_cmd, hdr);
  570. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  571. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  572. "%d bytes at %d[%d]:%d\n",
  573. get_cmd_string(out_cmd->hdr.cmd),
  574. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  575. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  576. txq->need_update = 1;
  577. /* Set up entry in queue's byte count circular buffer */
  578. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  579. /* Increment and update queue's write index */
  580. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  581. iwl4965_tx_queue_update_write_ptr(priv, txq);
  582. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  583. return ret ? ret : idx;
  584. }
  585. static int iwl4965_send_cmd_async(struct iwl_priv *priv, struct iwl4965_host_cmd *cmd)
  586. {
  587. int ret;
  588. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  589. /* An asynchronous command can not expect an SKB to be set. */
  590. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  591. /* An asynchronous command MUST have a callback. */
  592. BUG_ON(!cmd->meta.u.callback);
  593. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  594. return -EBUSY;
  595. ret = iwl4965_enqueue_hcmd(priv, cmd);
  596. if (ret < 0) {
  597. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  598. get_cmd_string(cmd->id), ret);
  599. return ret;
  600. }
  601. return 0;
  602. }
  603. static int iwl4965_send_cmd_sync(struct iwl_priv *priv, struct iwl4965_host_cmd *cmd)
  604. {
  605. int cmd_idx;
  606. int ret;
  607. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  608. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  609. /* A synchronous command can not have a callback set. */
  610. BUG_ON(cmd->meta.u.callback != NULL);
  611. if (atomic_xchg(&entry, 1)) {
  612. IWL_ERROR("Error sending %s: Already sending a host command\n",
  613. get_cmd_string(cmd->id));
  614. return -EBUSY;
  615. }
  616. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  617. if (cmd->meta.flags & CMD_WANT_SKB)
  618. cmd->meta.source = &cmd->meta;
  619. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  620. if (cmd_idx < 0) {
  621. ret = cmd_idx;
  622. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  623. get_cmd_string(cmd->id), ret);
  624. goto out;
  625. }
  626. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  627. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  628. HOST_COMPLETE_TIMEOUT);
  629. if (!ret) {
  630. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  631. IWL_ERROR("Error sending %s: time out after %dms.\n",
  632. get_cmd_string(cmd->id),
  633. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  634. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  635. ret = -ETIMEDOUT;
  636. goto cancel;
  637. }
  638. }
  639. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  640. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  641. get_cmd_string(cmd->id));
  642. ret = -ECANCELED;
  643. goto fail;
  644. }
  645. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  646. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  647. get_cmd_string(cmd->id));
  648. ret = -EIO;
  649. goto fail;
  650. }
  651. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  652. IWL_ERROR("Error: Response NULL in '%s'\n",
  653. get_cmd_string(cmd->id));
  654. ret = -EIO;
  655. goto out;
  656. }
  657. ret = 0;
  658. goto out;
  659. cancel:
  660. if (cmd->meta.flags & CMD_WANT_SKB) {
  661. struct iwl4965_cmd *qcmd;
  662. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  663. * TX cmd queue. Otherwise in case the cmd comes
  664. * in later, it will possibly set an invalid
  665. * address (cmd->meta.source). */
  666. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  667. qcmd->meta.flags &= ~CMD_WANT_SKB;
  668. }
  669. fail:
  670. if (cmd->meta.u.skb) {
  671. dev_kfree_skb_any(cmd->meta.u.skb);
  672. cmd->meta.u.skb = NULL;
  673. }
  674. out:
  675. atomic_set(&entry, 0);
  676. return ret;
  677. }
  678. int iwl4965_send_cmd(struct iwl_priv *priv, struct iwl4965_host_cmd *cmd)
  679. {
  680. if (cmd->meta.flags & CMD_ASYNC)
  681. return iwl4965_send_cmd_async(priv, cmd);
  682. return iwl4965_send_cmd_sync(priv, cmd);
  683. }
  684. int iwl4965_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
  685. {
  686. struct iwl4965_host_cmd cmd = {
  687. .id = id,
  688. .len = len,
  689. .data = data,
  690. };
  691. return iwl4965_send_cmd_sync(priv, &cmd);
  692. }
  693. static int __must_check iwl4965_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
  694. {
  695. struct iwl4965_host_cmd cmd = {
  696. .id = id,
  697. .len = sizeof(val),
  698. .data = &val,
  699. };
  700. return iwl4965_send_cmd_sync(priv, &cmd);
  701. }
  702. int iwl4965_send_statistics_request(struct iwl_priv *priv)
  703. {
  704. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  705. }
  706. /**
  707. * iwl4965_rxon_add_station - add station into station table.
  708. *
  709. * there is only one AP station with id= IWL_AP_ID
  710. * NOTE: mutex must be held before calling this fnction
  711. */
  712. static int iwl4965_rxon_add_station(struct iwl_priv *priv,
  713. const u8 *addr, int is_ap)
  714. {
  715. u8 sta_id;
  716. /* Add station to device's station table */
  717. #ifdef CONFIG_IWL4965_HT
  718. struct ieee80211_conf *conf = &priv->hw->conf;
  719. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  720. if ((is_ap) &&
  721. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  722. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  723. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  724. 0, cur_ht_config);
  725. else
  726. #endif /* CONFIG_IWL4965_HT */
  727. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  728. 0, NULL);
  729. /* Set up default rate scaling table in device's station table */
  730. iwl4965_add_station(priv, addr, is_ap);
  731. return sta_id;
  732. }
  733. /**
  734. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  735. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  736. * @channel: Any channel valid for the requested phymode
  737. * In addition to setting the staging RXON, priv->phymode is also set.
  738. *
  739. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  740. * in the staging RXON flag structure based on the phymode
  741. */
  742. static int iwl4965_set_rxon_channel(struct iwl_priv *priv,
  743. enum ieee80211_band band,
  744. u16 channel)
  745. {
  746. if (!iwl4965_get_channel_info(priv, band, channel)) {
  747. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  748. channel, band);
  749. return -EINVAL;
  750. }
  751. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  752. (priv->band == band))
  753. return 0;
  754. priv->staging_rxon.channel = cpu_to_le16(channel);
  755. if (band == IEEE80211_BAND_5GHZ)
  756. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  757. else
  758. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  759. priv->band = band;
  760. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
  761. return 0;
  762. }
  763. /**
  764. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  765. *
  766. * NOTE: This is really only useful during development and can eventually
  767. * be #ifdef'd out once the driver is stable and folks aren't actively
  768. * making changes
  769. */
  770. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  771. {
  772. int error = 0;
  773. int counter = 1;
  774. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  775. error |= le32_to_cpu(rxon->flags &
  776. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  777. RXON_FLG_RADAR_DETECT_MSK));
  778. if (error)
  779. IWL_WARNING("check 24G fields %d | %d\n",
  780. counter++, error);
  781. } else {
  782. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  783. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  784. if (error)
  785. IWL_WARNING("check 52 fields %d | %d\n",
  786. counter++, error);
  787. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  788. if (error)
  789. IWL_WARNING("check 52 CCK %d | %d\n",
  790. counter++, error);
  791. }
  792. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  793. if (error)
  794. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  795. /* make sure basic rates 6Mbps and 1Mbps are supported */
  796. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  797. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  798. if (error)
  799. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  800. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  801. if (error)
  802. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  803. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  804. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  805. if (error)
  806. IWL_WARNING("check CCK and short slot %d | %d\n",
  807. counter++, error);
  808. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  809. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  810. if (error)
  811. IWL_WARNING("check CCK & auto detect %d | %d\n",
  812. counter++, error);
  813. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  814. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  815. if (error)
  816. IWL_WARNING("check TGG and auto detect %d | %d\n",
  817. counter++, error);
  818. if (error)
  819. IWL_WARNING("Tuning to channel %d\n",
  820. le16_to_cpu(rxon->channel));
  821. if (error) {
  822. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  823. return -1;
  824. }
  825. return 0;
  826. }
  827. /**
  828. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  829. * @priv: staging_rxon is compared to active_rxon
  830. *
  831. * If the RXON structure is changing enough to require a new tune,
  832. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  833. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  834. */
  835. static int iwl4965_full_rxon_required(struct iwl_priv *priv)
  836. {
  837. /* These items are only settable from the full RXON command */
  838. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  839. compare_ether_addr(priv->staging_rxon.bssid_addr,
  840. priv->active_rxon.bssid_addr) ||
  841. compare_ether_addr(priv->staging_rxon.node_addr,
  842. priv->active_rxon.node_addr) ||
  843. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  844. priv->active_rxon.wlap_bssid_addr) ||
  845. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  846. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  847. (priv->staging_rxon.air_propagation !=
  848. priv->active_rxon.air_propagation) ||
  849. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  850. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  851. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  852. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  853. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  854. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  855. return 1;
  856. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  857. * be updated with the RXON_ASSOC command -- however only some
  858. * flag transitions are allowed using RXON_ASSOC */
  859. /* Check if we are not switching bands */
  860. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  861. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  862. return 1;
  863. /* Check if we are switching association toggle */
  864. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  865. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  866. return 1;
  867. return 0;
  868. }
  869. static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
  870. {
  871. int rc = 0;
  872. struct iwl4965_rx_packet *res = NULL;
  873. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  874. struct iwl4965_host_cmd cmd = {
  875. .id = REPLY_RXON_ASSOC,
  876. .len = sizeof(rxon_assoc),
  877. .meta.flags = CMD_WANT_SKB,
  878. .data = &rxon_assoc,
  879. };
  880. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  881. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  882. if ((rxon1->flags == rxon2->flags) &&
  883. (rxon1->filter_flags == rxon2->filter_flags) &&
  884. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  885. (rxon1->ofdm_ht_single_stream_basic_rates ==
  886. rxon2->ofdm_ht_single_stream_basic_rates) &&
  887. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  888. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  889. (rxon1->rx_chain == rxon2->rx_chain) &&
  890. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  891. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  892. return 0;
  893. }
  894. rxon_assoc.flags = priv->staging_rxon.flags;
  895. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  896. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  897. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  898. rxon_assoc.reserved = 0;
  899. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  900. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  901. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  902. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  903. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  904. rc = iwl4965_send_cmd_sync(priv, &cmd);
  905. if (rc)
  906. return rc;
  907. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  908. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  909. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  910. rc = -EIO;
  911. }
  912. priv->alloc_rxb_skb--;
  913. dev_kfree_skb_any(cmd.meta.u.skb);
  914. return rc;
  915. }
  916. /**
  917. * iwl4965_commit_rxon - commit staging_rxon to hardware
  918. *
  919. * The RXON command in staging_rxon is committed to the hardware and
  920. * the active_rxon structure is updated with the new data. This
  921. * function correctly transitions out of the RXON_ASSOC_MSK state if
  922. * a HW tune is required based on the RXON structure changes.
  923. */
  924. static int iwl4965_commit_rxon(struct iwl_priv *priv)
  925. {
  926. /* cast away the const for active_rxon in this function */
  927. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  928. DECLARE_MAC_BUF(mac);
  929. int rc = 0;
  930. if (!iwl4965_is_alive(priv))
  931. return -1;
  932. /* always get timestamp with Rx frame */
  933. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  934. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  935. if (rc) {
  936. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  937. return -EINVAL;
  938. }
  939. /* If we don't need to send a full RXON, we can use
  940. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  941. * and other flags for the current radio configuration. */
  942. if (!iwl4965_full_rxon_required(priv)) {
  943. rc = iwl4965_send_rxon_assoc(priv);
  944. if (rc) {
  945. IWL_ERROR("Error setting RXON_ASSOC "
  946. "configuration (%d).\n", rc);
  947. return rc;
  948. }
  949. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  950. return 0;
  951. }
  952. /* station table will be cleared */
  953. priv->assoc_station_added = 0;
  954. #ifdef CONFIG_IWL4965_SENSITIVITY
  955. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  956. if (!priv->error_recovering)
  957. priv->start_calib = 0;
  958. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  959. #endif /* CONFIG_IWL4965_SENSITIVITY */
  960. /* If we are currently associated and the new config requires
  961. * an RXON_ASSOC and the new config wants the associated mask enabled,
  962. * we must clear the associated from the active configuration
  963. * before we apply the new config */
  964. if (iwl4965_is_associated(priv) &&
  965. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  966. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  967. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  968. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  969. sizeof(struct iwl4965_rxon_cmd),
  970. &priv->active_rxon);
  971. /* If the mask clearing failed then we set
  972. * active_rxon back to what it was previously */
  973. if (rc) {
  974. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  975. IWL_ERROR("Error clearing ASSOC_MSK on current "
  976. "configuration (%d).\n", rc);
  977. return rc;
  978. }
  979. }
  980. IWL_DEBUG_INFO("Sending RXON\n"
  981. "* with%s RXON_FILTER_ASSOC_MSK\n"
  982. "* channel = %d\n"
  983. "* bssid = %s\n",
  984. ((priv->staging_rxon.filter_flags &
  985. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  986. le16_to_cpu(priv->staging_rxon.channel),
  987. print_mac(mac, priv->staging_rxon.bssid_addr));
  988. /* Apply the new configuration */
  989. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  990. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  991. if (rc) {
  992. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  993. return rc;
  994. }
  995. iwl4965_clear_stations_table(priv);
  996. #ifdef CONFIG_IWL4965_SENSITIVITY
  997. if (!priv->error_recovering)
  998. priv->start_calib = 0;
  999. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  1000. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  1001. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1002. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  1003. /* If we issue a new RXON command which required a tune then we must
  1004. * send a new TXPOWER command or we won't be able to Tx any frames */
  1005. rc = iwl4965_hw_reg_send_txpower(priv);
  1006. if (rc) {
  1007. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  1008. return rc;
  1009. }
  1010. /* Add the broadcast address so we can send broadcast frames */
  1011. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  1012. IWL_INVALID_STATION) {
  1013. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  1014. return -EIO;
  1015. }
  1016. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1017. * add the IWL_AP_ID to the station rate table */
  1018. if (iwl4965_is_associated(priv) &&
  1019. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1020. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1021. == IWL_INVALID_STATION) {
  1022. IWL_ERROR("Error adding AP address for transmit.\n");
  1023. return -EIO;
  1024. }
  1025. priv->assoc_station_added = 1;
  1026. }
  1027. return 0;
  1028. }
  1029. static int iwl4965_send_bt_config(struct iwl_priv *priv)
  1030. {
  1031. struct iwl4965_bt_cmd bt_cmd = {
  1032. .flags = 3,
  1033. .lead_time = 0xAA,
  1034. .max_kill = 1,
  1035. .kill_ack_mask = 0,
  1036. .kill_cts_mask = 0,
  1037. };
  1038. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1039. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1040. }
  1041. static int iwl4965_send_scan_abort(struct iwl_priv *priv)
  1042. {
  1043. int rc = 0;
  1044. struct iwl4965_rx_packet *res;
  1045. struct iwl4965_host_cmd cmd = {
  1046. .id = REPLY_SCAN_ABORT_CMD,
  1047. .meta.flags = CMD_WANT_SKB,
  1048. };
  1049. /* If there isn't a scan actively going on in the hardware
  1050. * then we are in between scan bands and not actually
  1051. * actively scanning, so don't send the abort command */
  1052. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1053. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1054. return 0;
  1055. }
  1056. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1057. if (rc) {
  1058. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1059. return rc;
  1060. }
  1061. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1062. if (res->u.status != CAN_ABORT_STATUS) {
  1063. /* The scan abort will return 1 for success or
  1064. * 2 for "failure". A failure condition can be
  1065. * due to simply not being in an active scan which
  1066. * can occur if we send the scan abort before we
  1067. * the microcode has notified us that a scan is
  1068. * completed. */
  1069. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1070. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1071. clear_bit(STATUS_SCAN_HW, &priv->status);
  1072. }
  1073. dev_kfree_skb_any(cmd.meta.u.skb);
  1074. return rc;
  1075. }
  1076. static int iwl4965_card_state_sync_callback(struct iwl_priv *priv,
  1077. struct iwl4965_cmd *cmd,
  1078. struct sk_buff *skb)
  1079. {
  1080. return 1;
  1081. }
  1082. /*
  1083. * CARD_STATE_CMD
  1084. *
  1085. * Use: Sets the device's internal card state to enable, disable, or halt
  1086. *
  1087. * When in the 'enable' state the card operates as normal.
  1088. * When in the 'disable' state, the card enters into a low power mode.
  1089. * When in the 'halt' state, the card is shut down and must be fully
  1090. * restarted to come back on.
  1091. */
  1092. static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1093. {
  1094. struct iwl4965_host_cmd cmd = {
  1095. .id = REPLY_CARD_STATE_CMD,
  1096. .len = sizeof(u32),
  1097. .data = &flags,
  1098. .meta.flags = meta_flag,
  1099. };
  1100. if (meta_flag & CMD_ASYNC)
  1101. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1102. return iwl4965_send_cmd(priv, &cmd);
  1103. }
  1104. static int iwl4965_add_sta_sync_callback(struct iwl_priv *priv,
  1105. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1106. {
  1107. struct iwl4965_rx_packet *res = NULL;
  1108. if (!skb) {
  1109. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1110. return 1;
  1111. }
  1112. res = (struct iwl4965_rx_packet *)skb->data;
  1113. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1114. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1115. res->hdr.flags);
  1116. return 1;
  1117. }
  1118. switch (res->u.add_sta.status) {
  1119. case ADD_STA_SUCCESS_MSK:
  1120. break;
  1121. default:
  1122. break;
  1123. }
  1124. /* We didn't cache the SKB; let the caller free it */
  1125. return 1;
  1126. }
  1127. int iwl4965_send_add_station(struct iwl_priv *priv,
  1128. struct iwl4965_addsta_cmd *sta, u8 flags)
  1129. {
  1130. struct iwl4965_rx_packet *res = NULL;
  1131. int rc = 0;
  1132. struct iwl4965_host_cmd cmd = {
  1133. .id = REPLY_ADD_STA,
  1134. .len = sizeof(struct iwl4965_addsta_cmd),
  1135. .meta.flags = flags,
  1136. .data = sta,
  1137. };
  1138. if (flags & CMD_ASYNC)
  1139. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1140. else
  1141. cmd.meta.flags |= CMD_WANT_SKB;
  1142. rc = iwl4965_send_cmd(priv, &cmd);
  1143. if (rc || (flags & CMD_ASYNC))
  1144. return rc;
  1145. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1146. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1147. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1148. res->hdr.flags);
  1149. rc = -EIO;
  1150. }
  1151. if (rc == 0) {
  1152. switch (res->u.add_sta.status) {
  1153. case ADD_STA_SUCCESS_MSK:
  1154. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1155. break;
  1156. default:
  1157. rc = -EIO;
  1158. IWL_WARNING("REPLY_ADD_STA failed\n");
  1159. break;
  1160. }
  1161. }
  1162. priv->alloc_rxb_skb--;
  1163. dev_kfree_skb_any(cmd.meta.u.skb);
  1164. return rc;
  1165. }
  1166. static int iwl4965_update_sta_key_info(struct iwl_priv *priv,
  1167. struct ieee80211_key_conf *keyconf,
  1168. u8 sta_id)
  1169. {
  1170. unsigned long flags;
  1171. __le16 key_flags = 0;
  1172. switch (keyconf->alg) {
  1173. case ALG_CCMP:
  1174. key_flags |= STA_KEY_FLG_CCMP;
  1175. key_flags |= cpu_to_le16(
  1176. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1177. key_flags &= ~STA_KEY_FLG_INVALID;
  1178. break;
  1179. case ALG_TKIP:
  1180. case ALG_WEP:
  1181. default:
  1182. return -EINVAL;
  1183. }
  1184. spin_lock_irqsave(&priv->sta_lock, flags);
  1185. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1186. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1187. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1188. keyconf->keylen);
  1189. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1190. keyconf->keylen);
  1191. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1192. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1193. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1194. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1195. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1196. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1197. return 0;
  1198. }
  1199. static int iwl4965_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  1200. {
  1201. unsigned long flags;
  1202. spin_lock_irqsave(&priv->sta_lock, flags);
  1203. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1204. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1205. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1206. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1207. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1208. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1209. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1210. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1211. return 0;
  1212. }
  1213. static void iwl4965_clear_free_frames(struct iwl_priv *priv)
  1214. {
  1215. struct list_head *element;
  1216. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1217. priv->frames_count);
  1218. while (!list_empty(&priv->free_frames)) {
  1219. element = priv->free_frames.next;
  1220. list_del(element);
  1221. kfree(list_entry(element, struct iwl4965_frame, list));
  1222. priv->frames_count--;
  1223. }
  1224. if (priv->frames_count) {
  1225. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1226. priv->frames_count);
  1227. priv->frames_count = 0;
  1228. }
  1229. }
  1230. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
  1231. {
  1232. struct iwl4965_frame *frame;
  1233. struct list_head *element;
  1234. if (list_empty(&priv->free_frames)) {
  1235. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1236. if (!frame) {
  1237. IWL_ERROR("Could not allocate frame!\n");
  1238. return NULL;
  1239. }
  1240. priv->frames_count++;
  1241. return frame;
  1242. }
  1243. element = priv->free_frames.next;
  1244. list_del(element);
  1245. return list_entry(element, struct iwl4965_frame, list);
  1246. }
  1247. static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
  1248. {
  1249. memset(frame, 0, sizeof(*frame));
  1250. list_add(&frame->list, &priv->free_frames);
  1251. }
  1252. unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
  1253. struct ieee80211_hdr *hdr,
  1254. const u8 *dest, int left)
  1255. {
  1256. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1257. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1258. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1259. return 0;
  1260. if (priv->ibss_beacon->len > left)
  1261. return 0;
  1262. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1263. return priv->ibss_beacon->len;
  1264. }
  1265. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1266. {
  1267. u8 i;
  1268. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1269. i = iwl4965_rates[i].next_ieee) {
  1270. if (rate_mask & (1 << i))
  1271. return iwl4965_rates[i].plcp;
  1272. }
  1273. return IWL_RATE_INVALID;
  1274. }
  1275. static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
  1276. {
  1277. struct iwl4965_frame *frame;
  1278. unsigned int frame_size;
  1279. int rc;
  1280. u8 rate;
  1281. frame = iwl4965_get_free_frame(priv);
  1282. if (!frame) {
  1283. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1284. "command.\n");
  1285. return -ENOMEM;
  1286. }
  1287. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1288. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1289. 0xFF0);
  1290. if (rate == IWL_INVALID_RATE)
  1291. rate = IWL_RATE_6M_PLCP;
  1292. } else {
  1293. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1294. if (rate == IWL_INVALID_RATE)
  1295. rate = IWL_RATE_1M_PLCP;
  1296. }
  1297. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1298. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1299. &frame->u.cmd[0]);
  1300. iwl4965_free_frame(priv, frame);
  1301. return rc;
  1302. }
  1303. /******************************************************************************
  1304. *
  1305. * Misc. internal state and helper functions
  1306. *
  1307. ******************************************************************************/
  1308. static void iwl4965_unset_hw_setting(struct iwl_priv *priv)
  1309. {
  1310. if (priv->hw_setting.shared_virt)
  1311. pci_free_consistent(priv->pci_dev,
  1312. sizeof(struct iwl4965_shared),
  1313. priv->hw_setting.shared_virt,
  1314. priv->hw_setting.shared_phys);
  1315. }
  1316. /**
  1317. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1318. *
  1319. * return : set the bit for each supported rate insert in ie
  1320. */
  1321. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1322. u16 basic_rate, int *left)
  1323. {
  1324. u16 ret_rates = 0, bit;
  1325. int i;
  1326. u8 *cnt = ie;
  1327. u8 *rates = ie + 1;
  1328. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1329. if (bit & supported_rate) {
  1330. ret_rates |= bit;
  1331. rates[*cnt] = iwl4965_rates[i].ieee |
  1332. ((bit & basic_rate) ? 0x80 : 0x00);
  1333. (*cnt)++;
  1334. (*left)--;
  1335. if ((*left <= 0) ||
  1336. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1337. break;
  1338. }
  1339. }
  1340. return ret_rates;
  1341. }
  1342. /**
  1343. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1344. */
  1345. static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
  1346. enum ieee80211_band band,
  1347. struct ieee80211_mgmt *frame,
  1348. int left, int is_direct)
  1349. {
  1350. int len = 0;
  1351. u8 *pos = NULL;
  1352. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1353. #ifdef CONFIG_IWL4965_HT
  1354. const struct ieee80211_supported_band *sband =
  1355. iwl4965_get_hw_mode(priv, band);
  1356. #endif /* CONFIG_IWL4965_HT */
  1357. /* Make sure there is enough space for the probe request,
  1358. * two mandatory IEs and the data */
  1359. left -= 24;
  1360. if (left < 0)
  1361. return 0;
  1362. len += 24;
  1363. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1364. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1365. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1366. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1367. frame->seq_ctrl = 0;
  1368. /* fill in our indirect SSID IE */
  1369. /* ...next IE... */
  1370. left -= 2;
  1371. if (left < 0)
  1372. return 0;
  1373. len += 2;
  1374. pos = &(frame->u.probe_req.variable[0]);
  1375. *pos++ = WLAN_EID_SSID;
  1376. *pos++ = 0;
  1377. /* fill in our direct SSID IE... */
  1378. if (is_direct) {
  1379. /* ...next IE... */
  1380. left -= 2 + priv->essid_len;
  1381. if (left < 0)
  1382. return 0;
  1383. /* ... fill it in... */
  1384. *pos++ = WLAN_EID_SSID;
  1385. *pos++ = priv->essid_len;
  1386. memcpy(pos, priv->essid, priv->essid_len);
  1387. pos += priv->essid_len;
  1388. len += 2 + priv->essid_len;
  1389. }
  1390. /* fill in supported rate */
  1391. /* ...next IE... */
  1392. left -= 2;
  1393. if (left < 0)
  1394. return 0;
  1395. /* ... fill it in... */
  1396. *pos++ = WLAN_EID_SUPP_RATES;
  1397. *pos = 0;
  1398. /* exclude 60M rate */
  1399. active_rates = priv->rates_mask;
  1400. active_rates &= ~IWL_RATE_60M_MASK;
  1401. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1402. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1403. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1404. active_rate_basic, &left);
  1405. active_rates &= ~ret_rates;
  1406. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1407. active_rate_basic, &left);
  1408. active_rates &= ~ret_rates;
  1409. len += 2 + *pos;
  1410. pos += (*pos) + 1;
  1411. if (active_rates == 0)
  1412. goto fill_end;
  1413. /* fill in supported extended rate */
  1414. /* ...next IE... */
  1415. left -= 2;
  1416. if (left < 0)
  1417. return 0;
  1418. /* ... fill it in... */
  1419. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1420. *pos = 0;
  1421. iwl4965_supported_rate_to_ie(pos, active_rates,
  1422. active_rate_basic, &left);
  1423. if (*pos > 0)
  1424. len += 2 + *pos;
  1425. #ifdef CONFIG_IWL4965_HT
  1426. if (sband && sband->ht_info.ht_supported) {
  1427. struct ieee80211_ht_cap *ht_cap;
  1428. pos += (*pos) + 1;
  1429. *pos++ = WLAN_EID_HT_CAPABILITY;
  1430. *pos++ = sizeof(struct ieee80211_ht_cap);
  1431. ht_cap = (struct ieee80211_ht_cap *)pos;
  1432. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1433. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1434. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1435. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1436. ((sband->ht_info.ampdu_density << 2) &
  1437. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1438. len += 2 + sizeof(struct ieee80211_ht_cap);
  1439. }
  1440. #endif /*CONFIG_IWL4965_HT */
  1441. fill_end:
  1442. return (u16)len;
  1443. }
  1444. /*
  1445. * QoS support
  1446. */
  1447. static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
  1448. struct iwl4965_qosparam_cmd *qos)
  1449. {
  1450. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1451. sizeof(struct iwl4965_qosparam_cmd), qos);
  1452. }
  1453. static void iwl4965_reset_qos(struct iwl_priv *priv)
  1454. {
  1455. u16 cw_min = 15;
  1456. u16 cw_max = 1023;
  1457. u8 aifs = 2;
  1458. u8 is_legacy = 0;
  1459. unsigned long flags;
  1460. int i;
  1461. spin_lock_irqsave(&priv->lock, flags);
  1462. priv->qos_data.qos_active = 0;
  1463. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1464. if (priv->qos_data.qos_enable)
  1465. priv->qos_data.qos_active = 1;
  1466. if (!(priv->active_rate & 0xfff0)) {
  1467. cw_min = 31;
  1468. is_legacy = 1;
  1469. }
  1470. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1471. if (priv->qos_data.qos_enable)
  1472. priv->qos_data.qos_active = 1;
  1473. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1474. cw_min = 31;
  1475. is_legacy = 1;
  1476. }
  1477. if (priv->qos_data.qos_active)
  1478. aifs = 3;
  1479. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1480. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1481. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1482. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1483. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1484. if (priv->qos_data.qos_active) {
  1485. i = 1;
  1486. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1487. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1488. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1489. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1490. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1491. i = 2;
  1492. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1493. cpu_to_le16((cw_min + 1) / 2 - 1);
  1494. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1495. cpu_to_le16(cw_max);
  1496. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1497. if (is_legacy)
  1498. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1499. cpu_to_le16(6016);
  1500. else
  1501. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1502. cpu_to_le16(3008);
  1503. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1504. i = 3;
  1505. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1506. cpu_to_le16((cw_min + 1) / 4 - 1);
  1507. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1508. cpu_to_le16((cw_max + 1) / 2 - 1);
  1509. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1510. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1511. if (is_legacy)
  1512. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1513. cpu_to_le16(3264);
  1514. else
  1515. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1516. cpu_to_le16(1504);
  1517. } else {
  1518. for (i = 1; i < 4; i++) {
  1519. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1520. cpu_to_le16(cw_min);
  1521. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1522. cpu_to_le16(cw_max);
  1523. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1524. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1525. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1526. }
  1527. }
  1528. IWL_DEBUG_QOS("set QoS to default \n");
  1529. spin_unlock_irqrestore(&priv->lock, flags);
  1530. }
  1531. static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
  1532. {
  1533. unsigned long flags;
  1534. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1535. return;
  1536. if (!priv->qos_data.qos_enable)
  1537. return;
  1538. spin_lock_irqsave(&priv->lock, flags);
  1539. priv->qos_data.def_qos_parm.qos_flags = 0;
  1540. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1541. !priv->qos_data.qos_cap.q_AP.txop_request)
  1542. priv->qos_data.def_qos_parm.qos_flags |=
  1543. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1544. if (priv->qos_data.qos_active)
  1545. priv->qos_data.def_qos_parm.qos_flags |=
  1546. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1547. #ifdef CONFIG_IWL4965_HT
  1548. if (priv->current_ht_config.is_ht)
  1549. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1550. #endif /* CONFIG_IWL4965_HT */
  1551. spin_unlock_irqrestore(&priv->lock, flags);
  1552. if (force || iwl4965_is_associated(priv)) {
  1553. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1554. priv->qos_data.qos_active,
  1555. priv->qos_data.def_qos_parm.qos_flags);
  1556. iwl4965_send_qos_params_command(priv,
  1557. &(priv->qos_data.def_qos_parm));
  1558. }
  1559. }
  1560. /*
  1561. * Power management (not Tx power!) functions
  1562. */
  1563. #define MSEC_TO_USEC 1024
  1564. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1565. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1566. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1567. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1568. __constant_cpu_to_le32(X1), \
  1569. __constant_cpu_to_le32(X2), \
  1570. __constant_cpu_to_le32(X3), \
  1571. __constant_cpu_to_le32(X4)}
  1572. /* default power management (not Tx power) table values */
  1573. /* for tim 0-10 */
  1574. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1575. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1576. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1577. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1578. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1579. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1580. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1581. };
  1582. /* for tim > 10 */
  1583. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1584. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1585. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1586. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1587. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1588. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1589. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1590. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1591. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1592. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1593. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1594. };
  1595. int iwl4965_power_init_handle(struct iwl_priv *priv)
  1596. {
  1597. int rc = 0, i;
  1598. struct iwl4965_power_mgr *pow_data;
  1599. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1600. u16 pci_pm;
  1601. IWL_DEBUG_POWER("Initialize power \n");
  1602. pow_data = &(priv->power_data);
  1603. memset(pow_data, 0, sizeof(*pow_data));
  1604. pow_data->active_index = IWL_POWER_RANGE_0;
  1605. pow_data->dtim_val = 0xffff;
  1606. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1607. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1608. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1609. if (rc != 0)
  1610. return 0;
  1611. else {
  1612. struct iwl4965_powertable_cmd *cmd;
  1613. IWL_DEBUG_POWER("adjust power command flags\n");
  1614. for (i = 0; i < IWL_POWER_AC; i++) {
  1615. cmd = &pow_data->pwr_range_0[i].cmd;
  1616. if (pci_pm & 0x1)
  1617. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1618. else
  1619. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1620. }
  1621. }
  1622. return rc;
  1623. }
  1624. static int iwl4965_update_power_cmd(struct iwl_priv *priv,
  1625. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1626. {
  1627. int rc = 0, i;
  1628. u8 skip;
  1629. u32 max_sleep = 0;
  1630. struct iwl4965_power_vec_entry *range;
  1631. u8 period = 0;
  1632. struct iwl4965_power_mgr *pow_data;
  1633. if (mode > IWL_POWER_INDEX_5) {
  1634. IWL_DEBUG_POWER("Error invalid power mode \n");
  1635. return -1;
  1636. }
  1637. pow_data = &(priv->power_data);
  1638. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1639. range = &pow_data->pwr_range_0[0];
  1640. else
  1641. range = &pow_data->pwr_range_1[1];
  1642. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1643. #ifdef IWL_MAC80211_DISABLE
  1644. if (priv->assoc_network != NULL) {
  1645. unsigned long flags;
  1646. period = priv->assoc_network->tim.tim_period;
  1647. }
  1648. #endif /*IWL_MAC80211_DISABLE */
  1649. skip = range[mode].no_dtim;
  1650. if (period == 0) {
  1651. period = 1;
  1652. skip = 0;
  1653. }
  1654. if (skip == 0) {
  1655. max_sleep = period;
  1656. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1657. } else {
  1658. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1659. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1660. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1661. }
  1662. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1663. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1664. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1665. }
  1666. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1667. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1668. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1669. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1670. le32_to_cpu(cmd->sleep_interval[0]),
  1671. le32_to_cpu(cmd->sleep_interval[1]),
  1672. le32_to_cpu(cmd->sleep_interval[2]),
  1673. le32_to_cpu(cmd->sleep_interval[3]),
  1674. le32_to_cpu(cmd->sleep_interval[4]));
  1675. return rc;
  1676. }
  1677. static int iwl4965_send_power_mode(struct iwl_priv *priv, u32 mode)
  1678. {
  1679. u32 uninitialized_var(final_mode);
  1680. int rc;
  1681. struct iwl4965_powertable_cmd cmd;
  1682. /* If on battery, set to 3,
  1683. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1684. * else user level */
  1685. switch (mode) {
  1686. case IWL_POWER_BATTERY:
  1687. final_mode = IWL_POWER_INDEX_3;
  1688. break;
  1689. case IWL_POWER_AC:
  1690. final_mode = IWL_POWER_MODE_CAM;
  1691. break;
  1692. default:
  1693. final_mode = mode;
  1694. break;
  1695. }
  1696. cmd.keep_alive_beacons = 0;
  1697. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1698. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1699. if (final_mode == IWL_POWER_MODE_CAM)
  1700. clear_bit(STATUS_POWER_PMI, &priv->status);
  1701. else
  1702. set_bit(STATUS_POWER_PMI, &priv->status);
  1703. return rc;
  1704. }
  1705. int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1706. {
  1707. /* Filter incoming packets to determine if they are targeted toward
  1708. * this network, discarding packets coming from ourselves */
  1709. switch (priv->iw_mode) {
  1710. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1711. /* packets from our adapter are dropped (echo) */
  1712. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1713. return 0;
  1714. /* {broad,multi}cast packets to our IBSS go through */
  1715. if (is_multicast_ether_addr(header->addr1))
  1716. return !compare_ether_addr(header->addr3, priv->bssid);
  1717. /* packets to our adapter go through */
  1718. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1719. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1720. /* packets from our adapter are dropped (echo) */
  1721. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1722. return 0;
  1723. /* {broad,multi}cast packets to our BSS go through */
  1724. if (is_multicast_ether_addr(header->addr1))
  1725. return !compare_ether_addr(header->addr2, priv->bssid);
  1726. /* packets to our adapter go through */
  1727. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1728. }
  1729. return 1;
  1730. }
  1731. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1732. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1733. {
  1734. switch (status & TX_STATUS_MSK) {
  1735. case TX_STATUS_SUCCESS:
  1736. return "SUCCESS";
  1737. TX_STATUS_ENTRY(SHORT_LIMIT);
  1738. TX_STATUS_ENTRY(LONG_LIMIT);
  1739. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1740. TX_STATUS_ENTRY(MGMNT_ABORT);
  1741. TX_STATUS_ENTRY(NEXT_FRAG);
  1742. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1743. TX_STATUS_ENTRY(DEST_PS);
  1744. TX_STATUS_ENTRY(ABORTED);
  1745. TX_STATUS_ENTRY(BT_RETRY);
  1746. TX_STATUS_ENTRY(STA_INVALID);
  1747. TX_STATUS_ENTRY(FRAG_DROPPED);
  1748. TX_STATUS_ENTRY(TID_DISABLE);
  1749. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1750. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1751. TX_STATUS_ENTRY(TX_LOCKED);
  1752. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1753. }
  1754. return "UNKNOWN";
  1755. }
  1756. /**
  1757. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1758. *
  1759. * NOTE: priv->mutex is not required before calling this function
  1760. */
  1761. static int iwl4965_scan_cancel(struct iwl_priv *priv)
  1762. {
  1763. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1764. clear_bit(STATUS_SCANNING, &priv->status);
  1765. return 0;
  1766. }
  1767. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1768. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1769. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1770. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1771. queue_work(priv->workqueue, &priv->abort_scan);
  1772. } else
  1773. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1774. return test_bit(STATUS_SCANNING, &priv->status);
  1775. }
  1776. return 0;
  1777. }
  1778. /**
  1779. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1780. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1781. *
  1782. * NOTE: priv->mutex must be held before calling this function
  1783. */
  1784. static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1785. {
  1786. unsigned long now = jiffies;
  1787. int ret;
  1788. ret = iwl4965_scan_cancel(priv);
  1789. if (ret && ms) {
  1790. mutex_unlock(&priv->mutex);
  1791. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1792. test_bit(STATUS_SCANNING, &priv->status))
  1793. msleep(1);
  1794. mutex_lock(&priv->mutex);
  1795. return test_bit(STATUS_SCANNING, &priv->status);
  1796. }
  1797. return ret;
  1798. }
  1799. static void iwl4965_sequence_reset(struct iwl_priv *priv)
  1800. {
  1801. /* Reset ieee stats */
  1802. /* We don't reset the net_device_stats (ieee->stats) on
  1803. * re-association */
  1804. priv->last_seq_num = -1;
  1805. priv->last_frag_num = -1;
  1806. priv->last_packet_time = 0;
  1807. iwl4965_scan_cancel(priv);
  1808. }
  1809. #define MAX_UCODE_BEACON_INTERVAL 4096
  1810. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1811. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1812. {
  1813. u16 new_val = 0;
  1814. u16 beacon_factor = 0;
  1815. beacon_factor =
  1816. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1817. / MAX_UCODE_BEACON_INTERVAL;
  1818. new_val = beacon_val / beacon_factor;
  1819. return cpu_to_le16(new_val);
  1820. }
  1821. static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
  1822. {
  1823. u64 interval_tm_unit;
  1824. u64 tsf, result;
  1825. unsigned long flags;
  1826. struct ieee80211_conf *conf = NULL;
  1827. u16 beacon_int = 0;
  1828. conf = ieee80211_get_hw_conf(priv->hw);
  1829. spin_lock_irqsave(&priv->lock, flags);
  1830. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1831. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1832. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1833. tsf = priv->timestamp1;
  1834. tsf = ((tsf << 32) | priv->timestamp0);
  1835. beacon_int = priv->beacon_int;
  1836. spin_unlock_irqrestore(&priv->lock, flags);
  1837. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1838. if (beacon_int == 0) {
  1839. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1840. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1841. } else {
  1842. priv->rxon_timing.beacon_interval =
  1843. cpu_to_le16(beacon_int);
  1844. priv->rxon_timing.beacon_interval =
  1845. iwl4965_adjust_beacon_interval(
  1846. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1847. }
  1848. priv->rxon_timing.atim_window = 0;
  1849. } else {
  1850. priv->rxon_timing.beacon_interval =
  1851. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1852. /* TODO: we need to get atim_window from upper stack
  1853. * for now we set to 0 */
  1854. priv->rxon_timing.atim_window = 0;
  1855. }
  1856. interval_tm_unit =
  1857. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1858. result = do_div(tsf, interval_tm_unit);
  1859. priv->rxon_timing.beacon_init_val =
  1860. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1861. IWL_DEBUG_ASSOC
  1862. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1863. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1864. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1865. le16_to_cpu(priv->rxon_timing.atim_window));
  1866. }
  1867. static int iwl4965_scan_initiate(struct iwl_priv *priv)
  1868. {
  1869. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1870. IWL_ERROR("APs don't scan.\n");
  1871. return 0;
  1872. }
  1873. if (!iwl4965_is_ready_rf(priv)) {
  1874. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1875. return -EIO;
  1876. }
  1877. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1878. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1879. return -EAGAIN;
  1880. }
  1881. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1882. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1883. "Queuing.\n");
  1884. return -EAGAIN;
  1885. }
  1886. IWL_DEBUG_INFO("Starting scan...\n");
  1887. priv->scan_bands = 2;
  1888. set_bit(STATUS_SCANNING, &priv->status);
  1889. priv->scan_start = jiffies;
  1890. priv->scan_pass_start = priv->scan_start;
  1891. queue_work(priv->workqueue, &priv->request_scan);
  1892. return 0;
  1893. }
  1894. static int iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  1895. {
  1896. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  1897. if (hw_decrypt)
  1898. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  1899. else
  1900. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  1901. return 0;
  1902. }
  1903. static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
  1904. enum ieee80211_band band)
  1905. {
  1906. if (band == IEEE80211_BAND_5GHZ) {
  1907. priv->staging_rxon.flags &=
  1908. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1909. | RXON_FLG_CCK_MSK);
  1910. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1911. } else {
  1912. /* Copied from iwl4965_bg_post_associate() */
  1913. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1914. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1915. else
  1916. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1917. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  1918. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1919. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1920. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1921. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1922. }
  1923. }
  1924. /*
  1925. * initialize rxon structure with default values from eeprom
  1926. */
  1927. static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
  1928. {
  1929. const struct iwl4965_channel_info *ch_info;
  1930. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  1931. switch (priv->iw_mode) {
  1932. case IEEE80211_IF_TYPE_AP:
  1933. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  1934. break;
  1935. case IEEE80211_IF_TYPE_STA:
  1936. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1937. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1938. break;
  1939. case IEEE80211_IF_TYPE_IBSS:
  1940. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1941. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1942. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1943. RXON_FILTER_ACCEPT_GRP_MSK;
  1944. break;
  1945. case IEEE80211_IF_TYPE_MNTR:
  1946. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1947. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1948. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1949. break;
  1950. }
  1951. #if 0
  1952. /* TODO: Figure out when short_preamble would be set and cache from
  1953. * that */
  1954. if (!hw_to_local(priv->hw)->short_preamble)
  1955. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1956. else
  1957. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1958. #endif
  1959. ch_info = iwl4965_get_channel_info(priv, priv->band,
  1960. le16_to_cpu(priv->staging_rxon.channel));
  1961. if (!ch_info)
  1962. ch_info = &priv->channel_info[0];
  1963. /*
  1964. * in some case A channels are all non IBSS
  1965. * in this case force B/G channel
  1966. */
  1967. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  1968. !(is_channel_ibss(ch_info)))
  1969. ch_info = &priv->channel_info[0];
  1970. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  1971. priv->band = ch_info->band;
  1972. iwl4965_set_flags_for_phymode(priv, priv->band);
  1973. priv->staging_rxon.ofdm_basic_rates =
  1974. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1975. priv->staging_rxon.cck_basic_rates =
  1976. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1977. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  1978. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  1979. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1980. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  1981. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  1982. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  1983. iwl4965_set_rxon_chain(priv);
  1984. }
  1985. static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
  1986. {
  1987. if (mode == IEEE80211_IF_TYPE_IBSS) {
  1988. const struct iwl4965_channel_info *ch_info;
  1989. ch_info = iwl4965_get_channel_info(priv,
  1990. priv->band,
  1991. le16_to_cpu(priv->staging_rxon.channel));
  1992. if (!ch_info || !is_channel_ibss(ch_info)) {
  1993. IWL_ERROR("channel %d not IBSS channel\n",
  1994. le16_to_cpu(priv->staging_rxon.channel));
  1995. return -EINVAL;
  1996. }
  1997. }
  1998. priv->iw_mode = mode;
  1999. iwl4965_connection_init_rx_config(priv);
  2000. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2001. iwl4965_clear_stations_table(priv);
  2002. /* dont commit rxon if rf-kill is on*/
  2003. if (!iwl4965_is_ready_rf(priv))
  2004. return -EAGAIN;
  2005. cancel_delayed_work(&priv->scan_check);
  2006. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2007. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2008. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2009. return -EAGAIN;
  2010. }
  2011. iwl4965_commit_rxon(priv);
  2012. return 0;
  2013. }
  2014. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  2015. struct ieee80211_tx_control *ctl,
  2016. struct iwl4965_cmd *cmd,
  2017. struct sk_buff *skb_frag,
  2018. int last_frag)
  2019. {
  2020. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2021. switch (keyinfo->alg) {
  2022. case ALG_CCMP:
  2023. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2024. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2025. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  2026. cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
  2027. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2028. break;
  2029. case ALG_TKIP:
  2030. #if 0
  2031. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2032. if (last_frag)
  2033. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2034. 8);
  2035. else
  2036. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2037. #endif
  2038. break;
  2039. case ALG_WEP:
  2040. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2041. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2042. if (keyinfo->keylen == 13)
  2043. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2044. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2045. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2046. "with key %d\n", ctl->key_idx);
  2047. break;
  2048. default:
  2049. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2050. break;
  2051. }
  2052. }
  2053. /*
  2054. * handle build REPLY_TX command notification.
  2055. */
  2056. static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
  2057. struct iwl4965_cmd *cmd,
  2058. struct ieee80211_tx_control *ctrl,
  2059. struct ieee80211_hdr *hdr,
  2060. int is_unicast, u8 std_id)
  2061. {
  2062. __le16 *qc;
  2063. u16 fc = le16_to_cpu(hdr->frame_control);
  2064. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2065. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2066. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2067. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2068. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2069. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2070. if (ieee80211_is_probe_response(fc) &&
  2071. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2072. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2073. } else {
  2074. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2075. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2076. }
  2077. if (ieee80211_is_back_request(fc))
  2078. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  2079. cmd->cmd.tx.sta_id = std_id;
  2080. if (ieee80211_get_morefrag(hdr))
  2081. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2082. qc = ieee80211_get_qos_ctrl(hdr);
  2083. if (qc) {
  2084. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2085. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2086. } else
  2087. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2088. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2089. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2090. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2091. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2092. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2093. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2094. }
  2095. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2096. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2097. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2098. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2099. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2100. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2101. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2102. else
  2103. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2104. } else
  2105. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2106. cmd->cmd.tx.driver_txop = 0;
  2107. cmd->cmd.tx.tx_flags = tx_flags;
  2108. cmd->cmd.tx.next_frame_len = 0;
  2109. }
  2110. static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
  2111. {
  2112. /* 0 - mgmt, 1 - cnt, 2 - data */
  2113. int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
  2114. priv->tx_stats[idx].cnt++;
  2115. priv->tx_stats[idx].bytes += len;
  2116. }
  2117. /**
  2118. * iwl4965_get_sta_id - Find station's index within station table
  2119. *
  2120. * If new IBSS station, create new entry in station table
  2121. */
  2122. static int iwl4965_get_sta_id(struct iwl_priv *priv,
  2123. struct ieee80211_hdr *hdr)
  2124. {
  2125. int sta_id;
  2126. u16 fc = le16_to_cpu(hdr->frame_control);
  2127. DECLARE_MAC_BUF(mac);
  2128. /* If this frame is broadcast or management, use broadcast station id */
  2129. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2130. is_multicast_ether_addr(hdr->addr1))
  2131. return priv->hw_setting.bcast_sta_id;
  2132. switch (priv->iw_mode) {
  2133. /* If we are a client station in a BSS network, use the special
  2134. * AP station entry (that's the only station we communicate with) */
  2135. case IEEE80211_IF_TYPE_STA:
  2136. return IWL_AP_ID;
  2137. /* If we are an AP, then find the station, or use BCAST */
  2138. case IEEE80211_IF_TYPE_AP:
  2139. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2140. if (sta_id != IWL_INVALID_STATION)
  2141. return sta_id;
  2142. return priv->hw_setting.bcast_sta_id;
  2143. /* If this frame is going out to an IBSS network, find the station,
  2144. * or create a new station table entry */
  2145. case IEEE80211_IF_TYPE_IBSS:
  2146. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2147. if (sta_id != IWL_INVALID_STATION)
  2148. return sta_id;
  2149. /* Create new station table entry */
  2150. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  2151. 0, CMD_ASYNC, NULL);
  2152. if (sta_id != IWL_INVALID_STATION)
  2153. return sta_id;
  2154. IWL_DEBUG_DROP("Station %s not in station map. "
  2155. "Defaulting to broadcast...\n",
  2156. print_mac(mac, hdr->addr1));
  2157. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2158. return priv->hw_setting.bcast_sta_id;
  2159. default:
  2160. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2161. return priv->hw_setting.bcast_sta_id;
  2162. }
  2163. }
  2164. /*
  2165. * start REPLY_TX command process
  2166. */
  2167. static int iwl4965_tx_skb(struct iwl_priv *priv,
  2168. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2169. {
  2170. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2171. struct iwl4965_tfd_frame *tfd;
  2172. u32 *control_flags;
  2173. int txq_id = ctl->queue;
  2174. struct iwl4965_tx_queue *txq = NULL;
  2175. struct iwl4965_queue *q = NULL;
  2176. dma_addr_t phys_addr;
  2177. dma_addr_t txcmd_phys;
  2178. dma_addr_t scratch_phys;
  2179. struct iwl4965_cmd *out_cmd = NULL;
  2180. u16 len, idx, len_org;
  2181. u8 id, hdr_len, unicast;
  2182. u8 sta_id;
  2183. u16 seq_number = 0;
  2184. u16 fc;
  2185. __le16 *qc;
  2186. u8 wait_write_ptr = 0;
  2187. unsigned long flags;
  2188. int rc;
  2189. spin_lock_irqsave(&priv->lock, flags);
  2190. if (iwl4965_is_rfkill(priv)) {
  2191. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2192. goto drop_unlock;
  2193. }
  2194. if (!priv->vif) {
  2195. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  2196. goto drop_unlock;
  2197. }
  2198. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  2199. IWL_ERROR("ERROR: No TX rate available.\n");
  2200. goto drop_unlock;
  2201. }
  2202. unicast = !is_multicast_ether_addr(hdr->addr1);
  2203. id = 0;
  2204. fc = le16_to_cpu(hdr->frame_control);
  2205. #ifdef CONFIG_IWLWIFI_DEBUG
  2206. if (ieee80211_is_auth(fc))
  2207. IWL_DEBUG_TX("Sending AUTH frame\n");
  2208. else if (ieee80211_is_assoc_request(fc))
  2209. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2210. else if (ieee80211_is_reassoc_request(fc))
  2211. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2212. #endif
  2213. /* drop all data frame if we are not associated */
  2214. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  2215. (!iwl4965_is_associated(priv) ||
  2216. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  2217. !priv->assoc_station_added)) {
  2218. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2219. goto drop_unlock;
  2220. }
  2221. spin_unlock_irqrestore(&priv->lock, flags);
  2222. hdr_len = ieee80211_get_hdrlen(fc);
  2223. /* Find (or create) index into station table for destination station */
  2224. sta_id = iwl4965_get_sta_id(priv, hdr);
  2225. if (sta_id == IWL_INVALID_STATION) {
  2226. DECLARE_MAC_BUF(mac);
  2227. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2228. print_mac(mac, hdr->addr1));
  2229. goto drop;
  2230. }
  2231. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2232. qc = ieee80211_get_qos_ctrl(hdr);
  2233. if (qc) {
  2234. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2235. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2236. IEEE80211_SCTL_SEQ;
  2237. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2238. (hdr->seq_ctrl &
  2239. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2240. seq_number += 0x10;
  2241. #ifdef CONFIG_IWL4965_HT
  2242. /* aggregation is on for this <sta,tid> */
  2243. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  2244. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2245. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  2246. #endif /* CONFIG_IWL4965_HT */
  2247. }
  2248. /* Descriptor for chosen Tx queue */
  2249. txq = &priv->txq[txq_id];
  2250. q = &txq->q;
  2251. spin_lock_irqsave(&priv->lock, flags);
  2252. /* Set up first empty TFD within this queue's circular TFD buffer */
  2253. tfd = &txq->bd[q->write_ptr];
  2254. memset(tfd, 0, sizeof(*tfd));
  2255. control_flags = (u32 *) tfd;
  2256. idx = get_cmd_index(q, q->write_ptr, 0);
  2257. /* Set up driver data for this TFD */
  2258. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2259. txq->txb[q->write_ptr].skb[0] = skb;
  2260. memcpy(&(txq->txb[q->write_ptr].status.control),
  2261. ctl, sizeof(struct ieee80211_tx_control));
  2262. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2263. out_cmd = &txq->cmd[idx];
  2264. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2265. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2266. /*
  2267. * Set up the Tx-command (not MAC!) header.
  2268. * Store the chosen Tx queue and TFD index within the sequence field;
  2269. * after Tx, uCode's Tx response will return this value so driver can
  2270. * locate the frame within the tx queue and do post-tx processing.
  2271. */
  2272. out_cmd->hdr.cmd = REPLY_TX;
  2273. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2274. INDEX_TO_SEQ(q->write_ptr)));
  2275. /* Copy MAC header from skb into command buffer */
  2276. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2277. /*
  2278. * Use the first empty entry in this queue's command buffer array
  2279. * to contain the Tx command and MAC header concatenated together
  2280. * (payload data will be in another buffer).
  2281. * Size of this varies, due to varying MAC header length.
  2282. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2283. * of the MAC header (device reads on dword boundaries).
  2284. * We'll tell device about this padding later.
  2285. */
  2286. len = priv->hw_setting.tx_cmd_len +
  2287. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2288. len_org = len;
  2289. len = (len + 3) & ~3;
  2290. if (len_org != len)
  2291. len_org = 1;
  2292. else
  2293. len_org = 0;
  2294. /* Physical address of this Tx command's header (not MAC header!),
  2295. * within command buffer array. */
  2296. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2297. offsetof(struct iwl4965_cmd, hdr);
  2298. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2299. * first entry */
  2300. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2301. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2302. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2303. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2304. * if any (802.11 null frames have no payload). */
  2305. len = skb->len - hdr_len;
  2306. if (len) {
  2307. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2308. len, PCI_DMA_TODEVICE);
  2309. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2310. }
  2311. /* Tell 4965 about any 2-byte padding after MAC header */
  2312. if (len_org)
  2313. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2314. /* Total # bytes to be transmitted */
  2315. len = (u16)skb->len;
  2316. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2317. /* TODO need this for burst mode later on */
  2318. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2319. /* set is_hcca to 0; it probably will never be implemented */
  2320. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2321. iwl_update_tx_stats(priv, fc, len);
  2322. scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
  2323. offsetof(struct iwl4965_tx_cmd, scratch);
  2324. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2325. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2326. if (!ieee80211_get_morefrag(hdr)) {
  2327. txq->need_update = 1;
  2328. if (qc) {
  2329. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2330. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2331. }
  2332. } else {
  2333. wait_write_ptr = 1;
  2334. txq->need_update = 0;
  2335. }
  2336. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2337. sizeof(out_cmd->cmd.tx));
  2338. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2339. ieee80211_get_hdrlen(fc));
  2340. /* Set up entry for this TFD in Tx byte-count array */
  2341. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2342. /* Tell device the write index *just past* this latest filled TFD */
  2343. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  2344. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2345. spin_unlock_irqrestore(&priv->lock, flags);
  2346. if (rc)
  2347. return rc;
  2348. if ((iwl4965_queue_space(q) < q->high_mark)
  2349. && priv->mac80211_registered) {
  2350. if (wait_write_ptr) {
  2351. spin_lock_irqsave(&priv->lock, flags);
  2352. txq->need_update = 1;
  2353. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2354. spin_unlock_irqrestore(&priv->lock, flags);
  2355. }
  2356. ieee80211_stop_queue(priv->hw, ctl->queue);
  2357. }
  2358. return 0;
  2359. drop_unlock:
  2360. spin_unlock_irqrestore(&priv->lock, flags);
  2361. drop:
  2362. return -1;
  2363. }
  2364. static void iwl4965_set_rate(struct iwl_priv *priv)
  2365. {
  2366. const struct ieee80211_supported_band *hw = NULL;
  2367. struct ieee80211_rate *rate;
  2368. int i;
  2369. hw = iwl4965_get_hw_mode(priv, priv->band);
  2370. if (!hw) {
  2371. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2372. return;
  2373. }
  2374. priv->active_rate = 0;
  2375. priv->active_rate_basic = 0;
  2376. for (i = 0; i < hw->n_bitrates; i++) {
  2377. rate = &(hw->bitrates[i]);
  2378. if (rate->hw_value < IWL_RATE_COUNT)
  2379. priv->active_rate |= (1 << rate->hw_value);
  2380. }
  2381. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2382. priv->active_rate, priv->active_rate_basic);
  2383. /*
  2384. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2385. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2386. * OFDM
  2387. */
  2388. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2389. priv->staging_rxon.cck_basic_rates =
  2390. ((priv->active_rate_basic &
  2391. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2392. else
  2393. priv->staging_rxon.cck_basic_rates =
  2394. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2395. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2396. priv->staging_rxon.ofdm_basic_rates =
  2397. ((priv->active_rate_basic &
  2398. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2399. IWL_FIRST_OFDM_RATE) & 0xFF;
  2400. else
  2401. priv->staging_rxon.ofdm_basic_rates =
  2402. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2403. }
  2404. static void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2405. {
  2406. unsigned long flags;
  2407. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2408. return;
  2409. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2410. disable_radio ? "OFF" : "ON");
  2411. if (disable_radio) {
  2412. iwl4965_scan_cancel(priv);
  2413. /* FIXME: This is a workaround for AP */
  2414. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2415. spin_lock_irqsave(&priv->lock, flags);
  2416. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2417. CSR_UCODE_SW_BIT_RFKILL);
  2418. spin_unlock_irqrestore(&priv->lock, flags);
  2419. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2420. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2421. }
  2422. return;
  2423. }
  2424. spin_lock_irqsave(&priv->lock, flags);
  2425. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2426. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2427. spin_unlock_irqrestore(&priv->lock, flags);
  2428. /* wake up ucode */
  2429. msleep(10);
  2430. spin_lock_irqsave(&priv->lock, flags);
  2431. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2432. if (!iwl4965_grab_nic_access(priv))
  2433. iwl4965_release_nic_access(priv);
  2434. spin_unlock_irqrestore(&priv->lock, flags);
  2435. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2436. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2437. "disabled by HW switch\n");
  2438. return;
  2439. }
  2440. queue_work(priv->workqueue, &priv->restart);
  2441. return;
  2442. }
  2443. void iwl4965_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2444. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2445. {
  2446. u16 fc =
  2447. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2448. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2449. return;
  2450. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2451. return;
  2452. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2453. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2454. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2455. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2456. RX_RES_STATUS_BAD_ICV_MIC)
  2457. stats->flag |= RX_FLAG_MMIC_ERROR;
  2458. case RX_RES_STATUS_SEC_TYPE_WEP:
  2459. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2460. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2461. RX_RES_STATUS_DECRYPT_OK) {
  2462. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2463. stats->flag |= RX_FLAG_DECRYPTED;
  2464. }
  2465. break;
  2466. default:
  2467. break;
  2468. }
  2469. }
  2470. #define IWL_PACKET_RETRY_TIME HZ
  2471. int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2472. {
  2473. u16 sc = le16_to_cpu(header->seq_ctrl);
  2474. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2475. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2476. u16 *last_seq, *last_frag;
  2477. unsigned long *last_time;
  2478. switch (priv->iw_mode) {
  2479. case IEEE80211_IF_TYPE_IBSS:{
  2480. struct list_head *p;
  2481. struct iwl4965_ibss_seq *entry = NULL;
  2482. u8 *mac = header->addr2;
  2483. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2484. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2485. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2486. if (!compare_ether_addr(entry->mac, mac))
  2487. break;
  2488. }
  2489. if (p == &priv->ibss_mac_hash[index]) {
  2490. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2491. if (!entry) {
  2492. IWL_ERROR("Cannot malloc new mac entry\n");
  2493. return 0;
  2494. }
  2495. memcpy(entry->mac, mac, ETH_ALEN);
  2496. entry->seq_num = seq;
  2497. entry->frag_num = frag;
  2498. entry->packet_time = jiffies;
  2499. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2500. return 0;
  2501. }
  2502. last_seq = &entry->seq_num;
  2503. last_frag = &entry->frag_num;
  2504. last_time = &entry->packet_time;
  2505. break;
  2506. }
  2507. case IEEE80211_IF_TYPE_STA:
  2508. last_seq = &priv->last_seq_num;
  2509. last_frag = &priv->last_frag_num;
  2510. last_time = &priv->last_packet_time;
  2511. break;
  2512. default:
  2513. return 0;
  2514. }
  2515. if ((*last_seq == seq) &&
  2516. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2517. if (*last_frag == frag)
  2518. goto drop;
  2519. if (*last_frag + 1 != frag)
  2520. /* out-of-order fragment */
  2521. goto drop;
  2522. } else
  2523. *last_seq = seq;
  2524. *last_frag = frag;
  2525. *last_time = jiffies;
  2526. return 0;
  2527. drop:
  2528. return 1;
  2529. }
  2530. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2531. #include "iwl-spectrum.h"
  2532. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2533. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2534. #define TIME_UNIT 1024
  2535. /*
  2536. * extended beacon time format
  2537. * time in usec will be changed into a 32-bit value in 8:24 format
  2538. * the high 1 byte is the beacon counts
  2539. * the lower 3 bytes is the time in usec within one beacon interval
  2540. */
  2541. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2542. {
  2543. u32 quot;
  2544. u32 rem;
  2545. u32 interval = beacon_interval * 1024;
  2546. if (!interval || !usec)
  2547. return 0;
  2548. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2549. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2550. return (quot << 24) + rem;
  2551. }
  2552. /* base is usually what we get from ucode with each received frame,
  2553. * the same as HW timer counter counting down
  2554. */
  2555. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2556. {
  2557. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2558. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2559. u32 interval = beacon_interval * TIME_UNIT;
  2560. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2561. (addon & BEACON_TIME_MASK_HIGH);
  2562. if (base_low > addon_low)
  2563. res += base_low - addon_low;
  2564. else if (base_low < addon_low) {
  2565. res += interval + base_low - addon_low;
  2566. res += (1 << 24);
  2567. } else
  2568. res += (1 << 24);
  2569. return cpu_to_le32(res);
  2570. }
  2571. static int iwl4965_get_measurement(struct iwl_priv *priv,
  2572. struct ieee80211_measurement_params *params,
  2573. u8 type)
  2574. {
  2575. struct iwl4965_spectrum_cmd spectrum;
  2576. struct iwl4965_rx_packet *res;
  2577. struct iwl4965_host_cmd cmd = {
  2578. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2579. .data = (void *)&spectrum,
  2580. .meta.flags = CMD_WANT_SKB,
  2581. };
  2582. u32 add_time = le64_to_cpu(params->start_time);
  2583. int rc;
  2584. int spectrum_resp_status;
  2585. int duration = le16_to_cpu(params->duration);
  2586. if (iwl4965_is_associated(priv))
  2587. add_time =
  2588. iwl4965_usecs_to_beacons(
  2589. le64_to_cpu(params->start_time) - priv->last_tsf,
  2590. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2591. memset(&spectrum, 0, sizeof(spectrum));
  2592. spectrum.channel_count = cpu_to_le16(1);
  2593. spectrum.flags =
  2594. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2595. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2596. cmd.len = sizeof(spectrum);
  2597. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2598. if (iwl4965_is_associated(priv))
  2599. spectrum.start_time =
  2600. iwl4965_add_beacon_time(priv->last_beacon_time,
  2601. add_time,
  2602. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2603. else
  2604. spectrum.start_time = 0;
  2605. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2606. spectrum.channels[0].channel = params->channel;
  2607. spectrum.channels[0].type = type;
  2608. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2609. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2610. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2611. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2612. if (rc)
  2613. return rc;
  2614. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2615. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2616. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2617. rc = -EIO;
  2618. }
  2619. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2620. switch (spectrum_resp_status) {
  2621. case 0: /* Command will be handled */
  2622. if (res->u.spectrum.id != 0xff) {
  2623. IWL_DEBUG_INFO
  2624. ("Replaced existing measurement: %d\n",
  2625. res->u.spectrum.id);
  2626. priv->measurement_status &= ~MEASUREMENT_READY;
  2627. }
  2628. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2629. rc = 0;
  2630. break;
  2631. case 1: /* Command will not be handled */
  2632. rc = -EAGAIN;
  2633. break;
  2634. }
  2635. dev_kfree_skb_any(cmd.meta.u.skb);
  2636. return rc;
  2637. }
  2638. #endif
  2639. static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
  2640. struct iwl4965_tx_info *tx_sta)
  2641. {
  2642. tx_sta->status.ack_signal = 0;
  2643. tx_sta->status.excessive_retries = 0;
  2644. tx_sta->status.queue_length = 0;
  2645. tx_sta->status.queue_number = 0;
  2646. if (in_interrupt())
  2647. ieee80211_tx_status_irqsafe(priv->hw,
  2648. tx_sta->skb[0], &(tx_sta->status));
  2649. else
  2650. ieee80211_tx_status(priv->hw,
  2651. tx_sta->skb[0], &(tx_sta->status));
  2652. tx_sta->skb[0] = NULL;
  2653. }
  2654. /**
  2655. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2656. *
  2657. * When FW advances 'R' index, all entries between old and new 'R' index
  2658. * need to be reclaimed. As result, some free space forms. If there is
  2659. * enough free space (> low mark), wake the stack that feeds us.
  2660. */
  2661. int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2662. {
  2663. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2664. struct iwl4965_queue *q = &txq->q;
  2665. int nfreed = 0;
  2666. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2667. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2668. "is out of range [0-%d] %d %d.\n", txq_id,
  2669. index, q->n_bd, q->write_ptr, q->read_ptr);
  2670. return 0;
  2671. }
  2672. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2673. q->read_ptr != index;
  2674. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2675. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2676. iwl4965_txstatus_to_ieee(priv,
  2677. &(txq->txb[txq->q.read_ptr]));
  2678. iwl4965_hw_txq_free_tfd(priv, txq);
  2679. } else if (nfreed > 1) {
  2680. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2681. q->write_ptr, q->read_ptr);
  2682. queue_work(priv->workqueue, &priv->restart);
  2683. }
  2684. nfreed++;
  2685. }
  2686. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2687. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2688. priv->mac80211_registered)
  2689. ieee80211_wake_queue(priv->hw, txq_id); */
  2690. return nfreed;
  2691. }
  2692. static int iwl4965_is_tx_success(u32 status)
  2693. {
  2694. status &= TX_STATUS_MSK;
  2695. return (status == TX_STATUS_SUCCESS)
  2696. || (status == TX_STATUS_DIRECT_DONE);
  2697. }
  2698. /******************************************************************************
  2699. *
  2700. * Generic RX handler implementations
  2701. *
  2702. ******************************************************************************/
  2703. #ifdef CONFIG_IWL4965_HT
  2704. static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
  2705. struct ieee80211_hdr *hdr)
  2706. {
  2707. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2708. return IWL_AP_ID;
  2709. else {
  2710. u8 *da = ieee80211_get_DA(hdr);
  2711. return iwl4965_hw_find_station(priv, da);
  2712. }
  2713. }
  2714. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2715. struct iwl_priv *priv, int txq_id, int idx)
  2716. {
  2717. if (priv->txq[txq_id].txb[idx].skb[0])
  2718. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2719. txb[idx].skb[0]->data;
  2720. return NULL;
  2721. }
  2722. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2723. {
  2724. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2725. tx_resp->frame_count);
  2726. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2727. }
  2728. /**
  2729. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2730. */
  2731. static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
  2732. struct iwl4965_ht_agg *agg,
  2733. struct iwl4965_tx_resp_agg *tx_resp,
  2734. u16 start_idx)
  2735. {
  2736. u16 status;
  2737. struct agg_tx_status *frame_status = &tx_resp->status;
  2738. struct ieee80211_tx_status *tx_status = NULL;
  2739. struct ieee80211_hdr *hdr = NULL;
  2740. int i, sh;
  2741. int txq_id, idx;
  2742. u16 seq;
  2743. if (agg->wait_for_ba)
  2744. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2745. agg->frame_count = tx_resp->frame_count;
  2746. agg->start_idx = start_idx;
  2747. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2748. agg->bitmap = 0;
  2749. /* # frames attempted by Tx command */
  2750. if (agg->frame_count == 1) {
  2751. /* Only one frame was attempted; no block-ack will arrive */
  2752. status = le16_to_cpu(frame_status[0].status);
  2753. seq = le16_to_cpu(frame_status[0].sequence);
  2754. idx = SEQ_TO_INDEX(seq);
  2755. txq_id = SEQ_TO_QUEUE(seq);
  2756. /* FIXME: code repetition */
  2757. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2758. agg->frame_count, agg->start_idx, idx);
  2759. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2760. tx_status->retry_count = tx_resp->failure_frame;
  2761. tx_status->queue_number = status & 0xff;
  2762. tx_status->queue_length = tx_resp->failure_rts;
  2763. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2764. tx_status->flags = iwl4965_is_tx_success(status)?
  2765. IEEE80211_TX_STATUS_ACK : 0;
  2766. iwl4965_hwrate_to_tx_control(priv,
  2767. le32_to_cpu(tx_resp->rate_n_flags),
  2768. &tx_status->control);
  2769. /* FIXME: code repetition end */
  2770. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2771. status & 0xff, tx_resp->failure_frame);
  2772. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2773. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2774. agg->wait_for_ba = 0;
  2775. } else {
  2776. /* Two or more frames were attempted; expect block-ack */
  2777. u64 bitmap = 0;
  2778. int start = agg->start_idx;
  2779. /* Construct bit-map of pending frames within Tx window */
  2780. for (i = 0; i < agg->frame_count; i++) {
  2781. u16 sc;
  2782. status = le16_to_cpu(frame_status[i].status);
  2783. seq = le16_to_cpu(frame_status[i].sequence);
  2784. idx = SEQ_TO_INDEX(seq);
  2785. txq_id = SEQ_TO_QUEUE(seq);
  2786. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2787. AGG_TX_STATE_ABORT_MSK))
  2788. continue;
  2789. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2790. agg->frame_count, txq_id, idx);
  2791. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2792. sc = le16_to_cpu(hdr->seq_ctrl);
  2793. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2794. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2795. " idx=%d, seq_idx=%d, seq=%d\n",
  2796. idx, SEQ_TO_SN(sc),
  2797. hdr->seq_ctrl);
  2798. return -1;
  2799. }
  2800. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2801. i, idx, SEQ_TO_SN(sc));
  2802. sh = idx - start;
  2803. if (sh > 64) {
  2804. sh = (start - idx) + 0xff;
  2805. bitmap = bitmap << sh;
  2806. sh = 0;
  2807. start = idx;
  2808. } else if (sh < -64)
  2809. sh = 0xff - (start - idx);
  2810. else if (sh < 0) {
  2811. sh = start - idx;
  2812. start = idx;
  2813. bitmap = bitmap << sh;
  2814. sh = 0;
  2815. }
  2816. bitmap |= (1 << sh);
  2817. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2818. start, (u32)(bitmap & 0xFFFFFFFF));
  2819. }
  2820. agg->bitmap = bitmap;
  2821. agg->start_idx = start;
  2822. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2823. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2824. agg->frame_count, agg->start_idx,
  2825. agg->bitmap);
  2826. if (bitmap)
  2827. agg->wait_for_ba = 1;
  2828. }
  2829. return 0;
  2830. }
  2831. #endif
  2832. /**
  2833. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2834. */
  2835. static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
  2836. struct iwl4965_rx_mem_buffer *rxb)
  2837. {
  2838. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2839. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2840. int txq_id = SEQ_TO_QUEUE(sequence);
  2841. int index = SEQ_TO_INDEX(sequence);
  2842. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2843. struct ieee80211_tx_status *tx_status;
  2844. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2845. u32 status = le32_to_cpu(tx_resp->status);
  2846. #ifdef CONFIG_IWL4965_HT
  2847. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2848. struct ieee80211_hdr *hdr;
  2849. __le16 *qc;
  2850. #endif
  2851. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2852. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2853. "is out of range [0-%d] %d %d\n", txq_id,
  2854. index, txq->q.n_bd, txq->q.write_ptr,
  2855. txq->q.read_ptr);
  2856. return;
  2857. }
  2858. #ifdef CONFIG_IWL4965_HT
  2859. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2860. qc = ieee80211_get_qos_ctrl(hdr);
  2861. if (qc)
  2862. tid = le16_to_cpu(*qc) & 0xf;
  2863. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2864. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2865. IWL_ERROR("Station not known\n");
  2866. return;
  2867. }
  2868. if (txq->sched_retry) {
  2869. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2870. struct iwl4965_ht_agg *agg = NULL;
  2871. if (!qc)
  2872. return;
  2873. agg = &priv->stations[sta_id].tid[tid].agg;
  2874. iwl4965_tx_status_reply_tx(priv, agg,
  2875. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2876. if ((tx_resp->frame_count == 1) &&
  2877. !iwl4965_is_tx_success(status)) {
  2878. /* TODO: send BAR */
  2879. }
  2880. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2881. int freed;
  2882. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2883. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2884. "%d index %d\n", scd_ssn , index);
  2885. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2886. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2887. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2888. txq_id >= 0 && priv->mac80211_registered &&
  2889. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2890. ieee80211_wake_queue(priv->hw, txq_id);
  2891. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2892. }
  2893. } else {
  2894. #endif /* CONFIG_IWL4965_HT */
  2895. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2896. tx_status->retry_count = tx_resp->failure_frame;
  2897. tx_status->queue_number = status;
  2898. tx_status->queue_length = tx_resp->bt_kill_count;
  2899. tx_status->queue_length |= tx_resp->failure_rts;
  2900. tx_status->flags =
  2901. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2902. iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  2903. &tx_status->control);
  2904. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2905. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2906. status, le32_to_cpu(tx_resp->rate_n_flags),
  2907. tx_resp->failure_frame);
  2908. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2909. if (index != -1) {
  2910. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2911. #ifdef CONFIG_IWL4965_HT
  2912. if (tid != MAX_TID_COUNT)
  2913. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2914. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2915. (txq_id >= 0) &&
  2916. priv->mac80211_registered)
  2917. ieee80211_wake_queue(priv->hw, txq_id);
  2918. if (tid != MAX_TID_COUNT)
  2919. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2920. #endif
  2921. }
  2922. #ifdef CONFIG_IWL4965_HT
  2923. }
  2924. #endif /* CONFIG_IWL4965_HT */
  2925. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2926. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2927. }
  2928. static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
  2929. struct iwl4965_rx_mem_buffer *rxb)
  2930. {
  2931. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2932. struct iwl4965_alive_resp *palive;
  2933. struct delayed_work *pwork;
  2934. palive = &pkt->u.alive_frame;
  2935. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2936. "0x%01X 0x%01X\n",
  2937. palive->is_valid, palive->ver_type,
  2938. palive->ver_subtype);
  2939. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2940. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2941. memcpy(&priv->card_alive_init,
  2942. &pkt->u.alive_frame,
  2943. sizeof(struct iwl4965_init_alive_resp));
  2944. pwork = &priv->init_alive_start;
  2945. } else {
  2946. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2947. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2948. sizeof(struct iwl4965_alive_resp));
  2949. pwork = &priv->alive_start;
  2950. }
  2951. /* We delay the ALIVE response by 5ms to
  2952. * give the HW RF Kill time to activate... */
  2953. if (palive->is_valid == UCODE_VALID_OK)
  2954. queue_delayed_work(priv->workqueue, pwork,
  2955. msecs_to_jiffies(5));
  2956. else
  2957. IWL_WARNING("uCode did not respond OK.\n");
  2958. }
  2959. static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
  2960. struct iwl4965_rx_mem_buffer *rxb)
  2961. {
  2962. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2963. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2964. return;
  2965. }
  2966. static void iwl4965_rx_reply_error(struct iwl_priv *priv,
  2967. struct iwl4965_rx_mem_buffer *rxb)
  2968. {
  2969. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2970. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2971. "seq 0x%04X ser 0x%08X\n",
  2972. le32_to_cpu(pkt->u.err_resp.error_type),
  2973. get_cmd_string(pkt->u.err_resp.cmd_id),
  2974. pkt->u.err_resp.cmd_id,
  2975. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2976. le32_to_cpu(pkt->u.err_resp.error_info));
  2977. }
  2978. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2979. static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  2980. {
  2981. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2982. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2983. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  2984. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2985. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2986. rxon->channel = csa->channel;
  2987. priv->staging_rxon.channel = csa->channel;
  2988. }
  2989. static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2990. struct iwl4965_rx_mem_buffer *rxb)
  2991. {
  2992. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2993. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2994. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2995. if (!report->state) {
  2996. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2997. "Spectrum Measure Notification: Start\n");
  2998. return;
  2999. }
  3000. memcpy(&priv->measure_report, report, sizeof(*report));
  3001. priv->measurement_status |= MEASUREMENT_READY;
  3002. #endif
  3003. }
  3004. static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
  3005. struct iwl4965_rx_mem_buffer *rxb)
  3006. {
  3007. #ifdef CONFIG_IWLWIFI_DEBUG
  3008. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3009. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3010. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3011. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3012. #endif
  3013. }
  3014. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  3015. struct iwl4965_rx_mem_buffer *rxb)
  3016. {
  3017. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3018. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3019. "notification for %s:\n",
  3020. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3021. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3022. }
  3023. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3024. {
  3025. struct iwl_priv *priv =
  3026. container_of(work, struct iwl_priv, beacon_update);
  3027. struct sk_buff *beacon;
  3028. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3029. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  3030. if (!beacon) {
  3031. IWL_ERROR("update beacon failed\n");
  3032. return;
  3033. }
  3034. mutex_lock(&priv->mutex);
  3035. /* new beacon skb is allocated every time; dispose previous.*/
  3036. if (priv->ibss_beacon)
  3037. dev_kfree_skb(priv->ibss_beacon);
  3038. priv->ibss_beacon = beacon;
  3039. mutex_unlock(&priv->mutex);
  3040. iwl4965_send_beacon_cmd(priv);
  3041. }
  3042. static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
  3043. struct iwl4965_rx_mem_buffer *rxb)
  3044. {
  3045. #ifdef CONFIG_IWLWIFI_DEBUG
  3046. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3047. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3048. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3049. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3050. "tsf %d %d rate %d\n",
  3051. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3052. beacon->beacon_notify_hdr.failure_frame,
  3053. le32_to_cpu(beacon->ibss_mgr_status),
  3054. le32_to_cpu(beacon->high_tsf),
  3055. le32_to_cpu(beacon->low_tsf), rate);
  3056. #endif
  3057. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3058. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3059. queue_work(priv->workqueue, &priv->beacon_update);
  3060. }
  3061. /* Service response to REPLY_SCAN_CMD (0x80) */
  3062. static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
  3063. struct iwl4965_rx_mem_buffer *rxb)
  3064. {
  3065. #ifdef CONFIG_IWLWIFI_DEBUG
  3066. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3067. struct iwl4965_scanreq_notification *notif =
  3068. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3069. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3070. #endif
  3071. }
  3072. /* Service SCAN_START_NOTIFICATION (0x82) */
  3073. static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
  3074. struct iwl4965_rx_mem_buffer *rxb)
  3075. {
  3076. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3077. struct iwl4965_scanstart_notification *notif =
  3078. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3079. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3080. IWL_DEBUG_SCAN("Scan start: "
  3081. "%d [802.11%s] "
  3082. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3083. notif->channel,
  3084. notif->band ? "bg" : "a",
  3085. notif->tsf_high,
  3086. notif->tsf_low, notif->status, notif->beacon_timer);
  3087. }
  3088. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3089. static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
  3090. struct iwl4965_rx_mem_buffer *rxb)
  3091. {
  3092. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3093. struct iwl4965_scanresults_notification *notif =
  3094. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3095. IWL_DEBUG_SCAN("Scan ch.res: "
  3096. "%d [802.11%s] "
  3097. "(TSF: 0x%08X:%08X) - %d "
  3098. "elapsed=%lu usec (%dms since last)\n",
  3099. notif->channel,
  3100. notif->band ? "bg" : "a",
  3101. le32_to_cpu(notif->tsf_high),
  3102. le32_to_cpu(notif->tsf_low),
  3103. le32_to_cpu(notif->statistics[0]),
  3104. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3105. jiffies_to_msecs(elapsed_jiffies
  3106. (priv->last_scan_jiffies, jiffies)));
  3107. priv->last_scan_jiffies = jiffies;
  3108. priv->next_scan_jiffies = 0;
  3109. }
  3110. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3111. static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
  3112. struct iwl4965_rx_mem_buffer *rxb)
  3113. {
  3114. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3115. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3116. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3117. scan_notif->scanned_channels,
  3118. scan_notif->tsf_low,
  3119. scan_notif->tsf_high, scan_notif->status);
  3120. /* The HW is no longer scanning */
  3121. clear_bit(STATUS_SCAN_HW, &priv->status);
  3122. /* The scan completion notification came in, so kill that timer... */
  3123. cancel_delayed_work(&priv->scan_check);
  3124. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3125. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3126. jiffies_to_msecs(elapsed_jiffies
  3127. (priv->scan_pass_start, jiffies)));
  3128. /* Remove this scanned band from the list
  3129. * of pending bands to scan */
  3130. priv->scan_bands--;
  3131. /* If a request to abort was given, or the scan did not succeed
  3132. * then we reset the scan state machine and terminate,
  3133. * re-queuing another scan if one has been requested */
  3134. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3135. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3136. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3137. } else {
  3138. /* If there are more bands on this scan pass reschedule */
  3139. if (priv->scan_bands > 0)
  3140. goto reschedule;
  3141. }
  3142. priv->last_scan_jiffies = jiffies;
  3143. priv->next_scan_jiffies = 0;
  3144. IWL_DEBUG_INFO("Setting scan to off\n");
  3145. clear_bit(STATUS_SCANNING, &priv->status);
  3146. IWL_DEBUG_INFO("Scan took %dms\n",
  3147. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3148. queue_work(priv->workqueue, &priv->scan_completed);
  3149. return;
  3150. reschedule:
  3151. priv->scan_pass_start = jiffies;
  3152. queue_work(priv->workqueue, &priv->request_scan);
  3153. }
  3154. /* Handle notification from uCode that card's power state is changing
  3155. * due to software, hardware, or critical temperature RFKILL */
  3156. static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
  3157. struct iwl4965_rx_mem_buffer *rxb)
  3158. {
  3159. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3160. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3161. unsigned long status = priv->status;
  3162. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3163. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3164. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3165. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3166. RF_CARD_DISABLED)) {
  3167. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3168. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3169. if (!iwl4965_grab_nic_access(priv)) {
  3170. iwl4965_write_direct32(
  3171. priv, HBUS_TARG_MBX_C,
  3172. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3173. iwl4965_release_nic_access(priv);
  3174. }
  3175. if (!(flags & RXON_CARD_DISABLED)) {
  3176. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3177. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3178. if (!iwl4965_grab_nic_access(priv)) {
  3179. iwl4965_write_direct32(
  3180. priv, HBUS_TARG_MBX_C,
  3181. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3182. iwl4965_release_nic_access(priv);
  3183. }
  3184. }
  3185. if (flags & RF_CARD_DISABLED) {
  3186. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3187. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3188. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3189. if (!iwl4965_grab_nic_access(priv))
  3190. iwl4965_release_nic_access(priv);
  3191. }
  3192. }
  3193. if (flags & HW_CARD_DISABLED)
  3194. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3195. else
  3196. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3197. if (flags & SW_CARD_DISABLED)
  3198. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3199. else
  3200. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3201. if (!(flags & RXON_CARD_DISABLED))
  3202. iwl4965_scan_cancel(priv);
  3203. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3204. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3205. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3206. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3207. queue_work(priv->workqueue, &priv->rf_kill);
  3208. else
  3209. wake_up_interruptible(&priv->wait_command_queue);
  3210. }
  3211. /**
  3212. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3213. *
  3214. * Setup the RX handlers for each of the reply types sent from the uCode
  3215. * to the host.
  3216. *
  3217. * This function chains into the hardware specific files for them to setup
  3218. * any hardware specific handlers as well.
  3219. */
  3220. static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
  3221. {
  3222. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3223. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3224. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3225. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3226. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3227. iwl4965_rx_spectrum_measure_notif;
  3228. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3229. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3230. iwl4965_rx_pm_debug_statistics_notif;
  3231. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3232. /*
  3233. * The same handler is used for both the REPLY to a discrete
  3234. * statistics request from the host as well as for the periodic
  3235. * statistics notifications (after received beacons) from the uCode.
  3236. */
  3237. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3238. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3239. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3240. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3241. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3242. iwl4965_rx_scan_results_notif;
  3243. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3244. iwl4965_rx_scan_complete_notif;
  3245. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3246. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3247. /* Set up hardware specific Rx handlers */
  3248. iwl4965_hw_rx_handler_setup(priv);
  3249. }
  3250. /**
  3251. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3252. * @rxb: Rx buffer to reclaim
  3253. *
  3254. * If an Rx buffer has an async callback associated with it the callback
  3255. * will be executed. The attached skb (if present) will only be freed
  3256. * if the callback returns 1
  3257. */
  3258. static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
  3259. struct iwl4965_rx_mem_buffer *rxb)
  3260. {
  3261. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3262. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3263. int txq_id = SEQ_TO_QUEUE(sequence);
  3264. int index = SEQ_TO_INDEX(sequence);
  3265. int huge = sequence & SEQ_HUGE_FRAME;
  3266. int cmd_index;
  3267. struct iwl4965_cmd *cmd;
  3268. /* If a Tx command is being handled and it isn't in the actual
  3269. * command queue then there a command routing bug has been introduced
  3270. * in the queue management code. */
  3271. if (txq_id != IWL_CMD_QUEUE_NUM)
  3272. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3273. txq_id, pkt->hdr.cmd);
  3274. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3275. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3276. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3277. /* Input error checking is done when commands are added to queue. */
  3278. if (cmd->meta.flags & CMD_WANT_SKB) {
  3279. cmd->meta.source->u.skb = rxb->skb;
  3280. rxb->skb = NULL;
  3281. } else if (cmd->meta.u.callback &&
  3282. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3283. rxb->skb = NULL;
  3284. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3285. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3286. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3287. wake_up_interruptible(&priv->wait_command_queue);
  3288. }
  3289. }
  3290. /************************** RX-FUNCTIONS ****************************/
  3291. /*
  3292. * Rx theory of operation
  3293. *
  3294. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3295. * each of which point to Receive Buffers to be filled by 4965. These get
  3296. * used not only for Rx frames, but for any command response or notification
  3297. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3298. * of indexes into the circular buffer.
  3299. *
  3300. * Rx Queue Indexes
  3301. * The host/firmware share two index registers for managing the Rx buffers.
  3302. *
  3303. * The READ index maps to the first position that the firmware may be writing
  3304. * to -- the driver can read up to (but not including) this position and get
  3305. * good data.
  3306. * The READ index is managed by the firmware once the card is enabled.
  3307. *
  3308. * The WRITE index maps to the last position the driver has read from -- the
  3309. * position preceding WRITE is the last slot the firmware can place a packet.
  3310. *
  3311. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3312. * WRITE = READ.
  3313. *
  3314. * During initialization, the host sets up the READ queue position to the first
  3315. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3316. *
  3317. * When the firmware places a packet in a buffer, it will advance the READ index
  3318. * and fire the RX interrupt. The driver can then query the READ index and
  3319. * process as many packets as possible, moving the WRITE index forward as it
  3320. * resets the Rx queue buffers with new memory.
  3321. *
  3322. * The management in the driver is as follows:
  3323. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3324. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3325. * to replenish the iwl->rxq->rx_free.
  3326. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3327. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3328. * 'processed' and 'read' driver indexes as well)
  3329. * + A received packet is processed and handed to the kernel network stack,
  3330. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3331. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3332. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3333. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3334. * were enough free buffers and RX_STALLED is set it is cleared.
  3335. *
  3336. *
  3337. * Driver sequence:
  3338. *
  3339. * iwl4965_rx_queue_alloc() Allocates rx_free
  3340. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3341. * iwl4965_rx_queue_restock
  3342. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3343. * queue, updates firmware pointers, and updates
  3344. * the WRITE index. If insufficient rx_free buffers
  3345. * are available, schedules iwl4965_rx_replenish
  3346. *
  3347. * -- enable interrupts --
  3348. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3349. * READ INDEX, detaching the SKB from the pool.
  3350. * Moves the packet buffer from queue to rx_used.
  3351. * Calls iwl4965_rx_queue_restock to refill any empty
  3352. * slots.
  3353. * ...
  3354. *
  3355. */
  3356. /**
  3357. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3358. */
  3359. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3360. {
  3361. int s = q->read - q->write;
  3362. if (s <= 0)
  3363. s += RX_QUEUE_SIZE;
  3364. /* keep some buffer to not confuse full and empty queue */
  3365. s -= 2;
  3366. if (s < 0)
  3367. s = 0;
  3368. return s;
  3369. }
  3370. /**
  3371. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3372. */
  3373. int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
  3374. {
  3375. u32 reg = 0;
  3376. int rc = 0;
  3377. unsigned long flags;
  3378. spin_lock_irqsave(&q->lock, flags);
  3379. if (q->need_update == 0)
  3380. goto exit_unlock;
  3381. /* If power-saving is in use, make sure device is awake */
  3382. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3383. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3384. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3385. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3386. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3387. goto exit_unlock;
  3388. }
  3389. rc = iwl4965_grab_nic_access(priv);
  3390. if (rc)
  3391. goto exit_unlock;
  3392. /* Device expects a multiple of 8 */
  3393. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3394. q->write & ~0x7);
  3395. iwl4965_release_nic_access(priv);
  3396. /* Else device is assumed to be awake */
  3397. } else
  3398. /* Device expects a multiple of 8 */
  3399. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3400. q->need_update = 0;
  3401. exit_unlock:
  3402. spin_unlock_irqrestore(&q->lock, flags);
  3403. return rc;
  3404. }
  3405. /**
  3406. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3407. */
  3408. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3409. dma_addr_t dma_addr)
  3410. {
  3411. return cpu_to_le32((u32)(dma_addr >> 8));
  3412. }
  3413. /**
  3414. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3415. *
  3416. * If there are slots in the RX queue that need to be restocked,
  3417. * and we have free pre-allocated buffers, fill the ranks as much
  3418. * as we can, pulling from rx_free.
  3419. *
  3420. * This moves the 'write' index forward to catch up with 'processed', and
  3421. * also updates the memory address in the firmware to reference the new
  3422. * target buffer.
  3423. */
  3424. static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
  3425. {
  3426. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3427. struct list_head *element;
  3428. struct iwl4965_rx_mem_buffer *rxb;
  3429. unsigned long flags;
  3430. int write, rc;
  3431. spin_lock_irqsave(&rxq->lock, flags);
  3432. write = rxq->write & ~0x7;
  3433. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3434. /* Get next free Rx buffer, remove from free list */
  3435. element = rxq->rx_free.next;
  3436. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3437. list_del(element);
  3438. /* Point to Rx buffer via next RBD in circular buffer */
  3439. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3440. rxq->queue[rxq->write] = rxb;
  3441. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3442. rxq->free_count--;
  3443. }
  3444. spin_unlock_irqrestore(&rxq->lock, flags);
  3445. /* If the pre-allocated buffer pool is dropping low, schedule to
  3446. * refill it */
  3447. if (rxq->free_count <= RX_LOW_WATERMARK)
  3448. queue_work(priv->workqueue, &priv->rx_replenish);
  3449. /* If we've added more space for the firmware to place data, tell it.
  3450. * Increment device's write pointer in multiples of 8. */
  3451. if ((write != (rxq->write & ~0x7))
  3452. || (abs(rxq->write - rxq->read) > 7)) {
  3453. spin_lock_irqsave(&rxq->lock, flags);
  3454. rxq->need_update = 1;
  3455. spin_unlock_irqrestore(&rxq->lock, flags);
  3456. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3457. if (rc)
  3458. return rc;
  3459. }
  3460. return 0;
  3461. }
  3462. /**
  3463. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3464. *
  3465. * When moving to rx_free an SKB is allocated for the slot.
  3466. *
  3467. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3468. * This is called as a scheduled work item (except for during initialization)
  3469. */
  3470. static void iwl4965_rx_allocate(struct iwl_priv *priv)
  3471. {
  3472. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3473. struct list_head *element;
  3474. struct iwl4965_rx_mem_buffer *rxb;
  3475. unsigned long flags;
  3476. spin_lock_irqsave(&rxq->lock, flags);
  3477. while (!list_empty(&rxq->rx_used)) {
  3478. element = rxq->rx_used.next;
  3479. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3480. /* Alloc a new receive buffer */
  3481. rxb->skb =
  3482. alloc_skb(priv->hw_setting.rx_buf_size,
  3483. __GFP_NOWARN | GFP_ATOMIC);
  3484. if (!rxb->skb) {
  3485. if (net_ratelimit())
  3486. printk(KERN_CRIT DRV_NAME
  3487. ": Can not allocate SKB buffers\n");
  3488. /* We don't reschedule replenish work here -- we will
  3489. * call the restock method and if it still needs
  3490. * more buffers it will schedule replenish */
  3491. break;
  3492. }
  3493. priv->alloc_rxb_skb++;
  3494. list_del(element);
  3495. /* Get physical address of RB/SKB */
  3496. rxb->dma_addr =
  3497. pci_map_single(priv->pci_dev, rxb->skb->data,
  3498. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3499. list_add_tail(&rxb->list, &rxq->rx_free);
  3500. rxq->free_count++;
  3501. }
  3502. spin_unlock_irqrestore(&rxq->lock, flags);
  3503. }
  3504. /*
  3505. * this should be called while priv->lock is locked
  3506. */
  3507. static void __iwl4965_rx_replenish(void *data)
  3508. {
  3509. struct iwl_priv *priv = data;
  3510. iwl4965_rx_allocate(priv);
  3511. iwl4965_rx_queue_restock(priv);
  3512. }
  3513. void iwl4965_rx_replenish(void *data)
  3514. {
  3515. struct iwl_priv *priv = data;
  3516. unsigned long flags;
  3517. iwl4965_rx_allocate(priv);
  3518. spin_lock_irqsave(&priv->lock, flags);
  3519. iwl4965_rx_queue_restock(priv);
  3520. spin_unlock_irqrestore(&priv->lock, flags);
  3521. }
  3522. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3523. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3524. * This free routine walks the list of POOL entries and if SKB is set to
  3525. * non NULL it is unmapped and freed
  3526. */
  3527. static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3528. {
  3529. int i;
  3530. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3531. if (rxq->pool[i].skb != NULL) {
  3532. pci_unmap_single(priv->pci_dev,
  3533. rxq->pool[i].dma_addr,
  3534. priv->hw_setting.rx_buf_size,
  3535. PCI_DMA_FROMDEVICE);
  3536. dev_kfree_skb(rxq->pool[i].skb);
  3537. }
  3538. }
  3539. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3540. rxq->dma_addr);
  3541. rxq->bd = NULL;
  3542. }
  3543. int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
  3544. {
  3545. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3546. struct pci_dev *dev = priv->pci_dev;
  3547. int i;
  3548. spin_lock_init(&rxq->lock);
  3549. INIT_LIST_HEAD(&rxq->rx_free);
  3550. INIT_LIST_HEAD(&rxq->rx_used);
  3551. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3552. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3553. if (!rxq->bd)
  3554. return -ENOMEM;
  3555. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3556. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3557. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3558. /* Set us so that we have processed and used all buffers, but have
  3559. * not restocked the Rx queue with fresh buffers */
  3560. rxq->read = rxq->write = 0;
  3561. rxq->free_count = 0;
  3562. rxq->need_update = 0;
  3563. return 0;
  3564. }
  3565. void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3566. {
  3567. unsigned long flags;
  3568. int i;
  3569. spin_lock_irqsave(&rxq->lock, flags);
  3570. INIT_LIST_HEAD(&rxq->rx_free);
  3571. INIT_LIST_HEAD(&rxq->rx_used);
  3572. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3573. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3574. /* In the reset function, these buffers may have been allocated
  3575. * to an SKB, so we need to unmap and free potential storage */
  3576. if (rxq->pool[i].skb != NULL) {
  3577. pci_unmap_single(priv->pci_dev,
  3578. rxq->pool[i].dma_addr,
  3579. priv->hw_setting.rx_buf_size,
  3580. PCI_DMA_FROMDEVICE);
  3581. priv->alloc_rxb_skb--;
  3582. dev_kfree_skb(rxq->pool[i].skb);
  3583. rxq->pool[i].skb = NULL;
  3584. }
  3585. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3586. }
  3587. /* Set us so that we have processed and used all buffers, but have
  3588. * not restocked the Rx queue with fresh buffers */
  3589. rxq->read = rxq->write = 0;
  3590. rxq->free_count = 0;
  3591. spin_unlock_irqrestore(&rxq->lock, flags);
  3592. }
  3593. /* Convert linear signal-to-noise ratio into dB */
  3594. static u8 ratio2dB[100] = {
  3595. /* 0 1 2 3 4 5 6 7 8 9 */
  3596. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3597. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3598. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3599. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3600. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3601. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3602. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3603. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3604. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3605. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3606. };
  3607. /* Calculates a relative dB value from a ratio of linear
  3608. * (i.e. not dB) signal levels.
  3609. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3610. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3611. {
  3612. /* 1000:1 or higher just report as 60 dB */
  3613. if (sig_ratio >= 1000)
  3614. return 60;
  3615. /* 100:1 or higher, divide by 10 and use table,
  3616. * add 20 dB to make up for divide by 10 */
  3617. if (sig_ratio >= 100)
  3618. return (20 + (int)ratio2dB[sig_ratio/10]);
  3619. /* We shouldn't see this */
  3620. if (sig_ratio < 1)
  3621. return 0;
  3622. /* Use table for ratios 1:1 - 99:1 */
  3623. return (int)ratio2dB[sig_ratio];
  3624. }
  3625. #define PERFECT_RSSI (-20) /* dBm */
  3626. #define WORST_RSSI (-95) /* dBm */
  3627. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3628. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3629. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3630. * about formulas used below. */
  3631. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3632. {
  3633. int sig_qual;
  3634. int degradation = PERFECT_RSSI - rssi_dbm;
  3635. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3636. * as indicator; formula is (signal dbm - noise dbm).
  3637. * SNR at or above 40 is a great signal (100%).
  3638. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3639. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3640. if (noise_dbm) {
  3641. if (rssi_dbm - noise_dbm >= 40)
  3642. return 100;
  3643. else if (rssi_dbm < noise_dbm)
  3644. return 0;
  3645. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3646. /* Else use just the signal level.
  3647. * This formula is a least squares fit of data points collected and
  3648. * compared with a reference system that had a percentage (%) display
  3649. * for signal quality. */
  3650. } else
  3651. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3652. (15 * RSSI_RANGE + 62 * degradation)) /
  3653. (RSSI_RANGE * RSSI_RANGE);
  3654. if (sig_qual > 100)
  3655. sig_qual = 100;
  3656. else if (sig_qual < 1)
  3657. sig_qual = 0;
  3658. return sig_qual;
  3659. }
  3660. /**
  3661. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3662. *
  3663. * Uses the priv->rx_handlers callback function array to invoke
  3664. * the appropriate handlers, including command responses,
  3665. * frame-received notifications, and other notifications.
  3666. */
  3667. static void iwl4965_rx_handle(struct iwl_priv *priv)
  3668. {
  3669. struct iwl4965_rx_mem_buffer *rxb;
  3670. struct iwl4965_rx_packet *pkt;
  3671. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3672. u32 r, i;
  3673. int reclaim;
  3674. unsigned long flags;
  3675. u8 fill_rx = 0;
  3676. u32 count = 8;
  3677. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3678. * buffer that the driver may process (last buffer filled by ucode). */
  3679. r = iwl4965_hw_get_rx_read(priv);
  3680. i = rxq->read;
  3681. /* Rx interrupt, but nothing sent from uCode */
  3682. if (i == r)
  3683. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3684. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3685. fill_rx = 1;
  3686. while (i != r) {
  3687. rxb = rxq->queue[i];
  3688. /* If an RXB doesn't have a Rx queue slot associated with it,
  3689. * then a bug has been introduced in the queue refilling
  3690. * routines -- catch it here */
  3691. BUG_ON(rxb == NULL);
  3692. rxq->queue[i] = NULL;
  3693. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3694. priv->hw_setting.rx_buf_size,
  3695. PCI_DMA_FROMDEVICE);
  3696. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3697. /* Reclaim a command buffer only if this packet is a response
  3698. * to a (driver-originated) command.
  3699. * If the packet (e.g. Rx frame) originated from uCode,
  3700. * there is no command buffer to reclaim.
  3701. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3702. * but apparently a few don't get set; catch them here. */
  3703. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3704. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3705. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3706. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3707. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3708. (pkt->hdr.cmd != REPLY_TX);
  3709. /* Based on type of command response or notification,
  3710. * handle those that need handling via function in
  3711. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3712. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3713. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3714. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3715. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3716. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3717. } else {
  3718. /* No handling needed */
  3719. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3720. "r %d i %d No handler needed for %s, 0x%02x\n",
  3721. r, i, get_cmd_string(pkt->hdr.cmd),
  3722. pkt->hdr.cmd);
  3723. }
  3724. if (reclaim) {
  3725. /* Invoke any callbacks, transfer the skb to caller, and
  3726. * fire off the (possibly) blocking iwl4965_send_cmd()
  3727. * as we reclaim the driver command queue */
  3728. if (rxb && rxb->skb)
  3729. iwl4965_tx_cmd_complete(priv, rxb);
  3730. else
  3731. IWL_WARNING("Claim null rxb?\n");
  3732. }
  3733. /* For now we just don't re-use anything. We can tweak this
  3734. * later to try and re-use notification packets and SKBs that
  3735. * fail to Rx correctly */
  3736. if (rxb->skb != NULL) {
  3737. priv->alloc_rxb_skb--;
  3738. dev_kfree_skb_any(rxb->skb);
  3739. rxb->skb = NULL;
  3740. }
  3741. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3742. priv->hw_setting.rx_buf_size,
  3743. PCI_DMA_FROMDEVICE);
  3744. spin_lock_irqsave(&rxq->lock, flags);
  3745. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3746. spin_unlock_irqrestore(&rxq->lock, flags);
  3747. i = (i + 1) & RX_QUEUE_MASK;
  3748. /* If there are a lot of unused frames,
  3749. * restock the Rx queue so ucode wont assert. */
  3750. if (fill_rx) {
  3751. count++;
  3752. if (count >= 8) {
  3753. priv->rxq.read = i;
  3754. __iwl4965_rx_replenish(priv);
  3755. count = 0;
  3756. }
  3757. }
  3758. }
  3759. /* Backtrack one entry */
  3760. priv->rxq.read = i;
  3761. iwl4965_rx_queue_restock(priv);
  3762. }
  3763. /**
  3764. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3765. */
  3766. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3767. struct iwl4965_tx_queue *txq)
  3768. {
  3769. u32 reg = 0;
  3770. int rc = 0;
  3771. int txq_id = txq->q.id;
  3772. if (txq->need_update == 0)
  3773. return rc;
  3774. /* if we're trying to save power */
  3775. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3776. /* wake up nic if it's powered down ...
  3777. * uCode will wake up, and interrupt us again, so next
  3778. * time we'll skip this part. */
  3779. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3780. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3781. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3782. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3783. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3784. return rc;
  3785. }
  3786. /* restore this queue's parameters in nic hardware. */
  3787. rc = iwl4965_grab_nic_access(priv);
  3788. if (rc)
  3789. return rc;
  3790. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  3791. txq->q.write_ptr | (txq_id << 8));
  3792. iwl4965_release_nic_access(priv);
  3793. /* else not in power-save mode, uCode will never sleep when we're
  3794. * trying to tx (during RFKILL, we're not trying to tx). */
  3795. } else
  3796. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  3797. txq->q.write_ptr | (txq_id << 8));
  3798. txq->need_update = 0;
  3799. return rc;
  3800. }
  3801. #ifdef CONFIG_IWLWIFI_DEBUG
  3802. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3803. {
  3804. DECLARE_MAC_BUF(mac);
  3805. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3806. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3807. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3808. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3809. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3810. le32_to_cpu(rxon->filter_flags));
  3811. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3812. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3813. rxon->ofdm_basic_rates);
  3814. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3815. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3816. print_mac(mac, rxon->node_addr));
  3817. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3818. print_mac(mac, rxon->bssid_addr));
  3819. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3820. }
  3821. #endif
  3822. static void iwl4965_enable_interrupts(struct iwl_priv *priv)
  3823. {
  3824. IWL_DEBUG_ISR("Enabling interrupts\n");
  3825. set_bit(STATUS_INT_ENABLED, &priv->status);
  3826. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3827. }
  3828. static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
  3829. {
  3830. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3831. /* disable interrupts from uCode/NIC to host */
  3832. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  3833. /* acknowledge/clear/reset any interrupts still pending
  3834. * from uCode or flow handler (Rx/Tx DMA) */
  3835. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  3836. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3837. IWL_DEBUG_ISR("Disabled interrupts\n");
  3838. }
  3839. static const char *desc_lookup(int i)
  3840. {
  3841. switch (i) {
  3842. case 1:
  3843. return "FAIL";
  3844. case 2:
  3845. return "BAD_PARAM";
  3846. case 3:
  3847. return "BAD_CHECKSUM";
  3848. case 4:
  3849. return "NMI_INTERRUPT";
  3850. case 5:
  3851. return "SYSASSERT";
  3852. case 6:
  3853. return "FATAL_ERROR";
  3854. }
  3855. return "UNKNOWN";
  3856. }
  3857. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3858. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3859. static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
  3860. {
  3861. u32 data2, line;
  3862. u32 desc, time, count, base, data1;
  3863. u32 blink1, blink2, ilink1, ilink2;
  3864. int rc;
  3865. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3866. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3867. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3868. return;
  3869. }
  3870. rc = iwl4965_grab_nic_access(priv);
  3871. if (rc) {
  3872. IWL_WARNING("Can not read from adapter at this time.\n");
  3873. return;
  3874. }
  3875. count = iwl4965_read_targ_mem(priv, base);
  3876. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3877. IWL_ERROR("Start IWL Error Log Dump:\n");
  3878. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3879. }
  3880. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  3881. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  3882. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  3883. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  3884. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  3885. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  3886. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  3887. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  3888. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  3889. IWL_ERROR("Desc Time "
  3890. "data1 data2 line\n");
  3891. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3892. desc_lookup(desc), desc, time, data1, data2, line);
  3893. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3894. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3895. ilink1, ilink2);
  3896. iwl4965_release_nic_access(priv);
  3897. }
  3898. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3899. /**
  3900. * iwl4965_print_event_log - Dump error event log to syslog
  3901. *
  3902. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  3903. */
  3904. static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3905. u32 num_events, u32 mode)
  3906. {
  3907. u32 i;
  3908. u32 base; /* SRAM byte address of event log header */
  3909. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3910. u32 ptr; /* SRAM byte address of log data */
  3911. u32 ev, time, data; /* event log data */
  3912. if (num_events == 0)
  3913. return;
  3914. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3915. if (mode == 0)
  3916. event_size = 2 * sizeof(u32);
  3917. else
  3918. event_size = 3 * sizeof(u32);
  3919. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3920. /* "time" is actually "data" for mode 0 (no timestamp).
  3921. * place event id # at far right for easier visual parsing. */
  3922. for (i = 0; i < num_events; i++) {
  3923. ev = iwl4965_read_targ_mem(priv, ptr);
  3924. ptr += sizeof(u32);
  3925. time = iwl4965_read_targ_mem(priv, ptr);
  3926. ptr += sizeof(u32);
  3927. if (mode == 0)
  3928. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3929. else {
  3930. data = iwl4965_read_targ_mem(priv, ptr);
  3931. ptr += sizeof(u32);
  3932. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3933. }
  3934. }
  3935. }
  3936. static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
  3937. {
  3938. int rc;
  3939. u32 base; /* SRAM byte address of event log header */
  3940. u32 capacity; /* event log capacity in # entries */
  3941. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3942. u32 num_wraps; /* # times uCode wrapped to top of log */
  3943. u32 next_entry; /* index of next entry to be written by uCode */
  3944. u32 size; /* # entries that we'll print */
  3945. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3946. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3947. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3948. return;
  3949. }
  3950. rc = iwl4965_grab_nic_access(priv);
  3951. if (rc) {
  3952. IWL_WARNING("Can not read from adapter at this time.\n");
  3953. return;
  3954. }
  3955. /* event log header */
  3956. capacity = iwl4965_read_targ_mem(priv, base);
  3957. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  3958. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  3959. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  3960. size = num_wraps ? capacity : next_entry;
  3961. /* bail out if nothing in log */
  3962. if (size == 0) {
  3963. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  3964. iwl4965_release_nic_access(priv);
  3965. return;
  3966. }
  3967. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  3968. size, num_wraps);
  3969. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3970. * i.e the next one that uCode would fill. */
  3971. if (num_wraps)
  3972. iwl4965_print_event_log(priv, next_entry,
  3973. capacity - next_entry, mode);
  3974. /* (then/else) start at top of log */
  3975. iwl4965_print_event_log(priv, 0, next_entry, mode);
  3976. iwl4965_release_nic_access(priv);
  3977. }
  3978. /**
  3979. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  3980. */
  3981. static void iwl4965_irq_handle_error(struct iwl_priv *priv)
  3982. {
  3983. /* Set the FW error flag -- cleared on iwl4965_down */
  3984. set_bit(STATUS_FW_ERROR, &priv->status);
  3985. /* Cancel currently queued command. */
  3986. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3987. #ifdef CONFIG_IWLWIFI_DEBUG
  3988. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  3989. iwl4965_dump_nic_error_log(priv);
  3990. iwl4965_dump_nic_event_log(priv);
  3991. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  3992. }
  3993. #endif
  3994. wake_up_interruptible(&priv->wait_command_queue);
  3995. /* Keep the restart process from trying to send host
  3996. * commands by clearing the INIT status bit */
  3997. clear_bit(STATUS_READY, &priv->status);
  3998. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3999. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4000. "Restarting adapter due to uCode error.\n");
  4001. if (iwl4965_is_associated(priv)) {
  4002. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4003. sizeof(priv->recovery_rxon));
  4004. priv->error_recovering = 1;
  4005. }
  4006. queue_work(priv->workqueue, &priv->restart);
  4007. }
  4008. }
  4009. static void iwl4965_error_recovery(struct iwl_priv *priv)
  4010. {
  4011. unsigned long flags;
  4012. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4013. sizeof(priv->staging_rxon));
  4014. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4015. iwl4965_commit_rxon(priv);
  4016. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4017. spin_lock_irqsave(&priv->lock, flags);
  4018. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4019. priv->error_recovering = 0;
  4020. spin_unlock_irqrestore(&priv->lock, flags);
  4021. }
  4022. static void iwl4965_irq_tasklet(struct iwl_priv *priv)
  4023. {
  4024. u32 inta, handled = 0;
  4025. u32 inta_fh;
  4026. unsigned long flags;
  4027. #ifdef CONFIG_IWLWIFI_DEBUG
  4028. u32 inta_mask;
  4029. #endif
  4030. spin_lock_irqsave(&priv->lock, flags);
  4031. /* Ack/clear/reset pending uCode interrupts.
  4032. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4033. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4034. inta = iwl4965_read32(priv, CSR_INT);
  4035. iwl4965_write32(priv, CSR_INT, inta);
  4036. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4037. * Any new interrupts that happen after this, either while we're
  4038. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4039. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4040. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4041. #ifdef CONFIG_IWLWIFI_DEBUG
  4042. if (iwl_debug_level & IWL_DL_ISR) {
  4043. /* just for debug */
  4044. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4045. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4046. inta, inta_mask, inta_fh);
  4047. }
  4048. #endif
  4049. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4050. * atomic, make sure that inta covers all the interrupts that
  4051. * we've discovered, even if FH interrupt came in just after
  4052. * reading CSR_INT. */
  4053. if (inta_fh & CSR49_FH_INT_RX_MASK)
  4054. inta |= CSR_INT_BIT_FH_RX;
  4055. if (inta_fh & CSR49_FH_INT_TX_MASK)
  4056. inta |= CSR_INT_BIT_FH_TX;
  4057. /* Now service all interrupt bits discovered above. */
  4058. if (inta & CSR_INT_BIT_HW_ERR) {
  4059. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4060. /* Tell the device to stop sending interrupts */
  4061. iwl4965_disable_interrupts(priv);
  4062. iwl4965_irq_handle_error(priv);
  4063. handled |= CSR_INT_BIT_HW_ERR;
  4064. spin_unlock_irqrestore(&priv->lock, flags);
  4065. return;
  4066. }
  4067. #ifdef CONFIG_IWLWIFI_DEBUG
  4068. if (iwl_debug_level & (IWL_DL_ISR)) {
  4069. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4070. if (inta & CSR_INT_BIT_SCD)
  4071. IWL_DEBUG_ISR("Scheduler finished to transmit "
  4072. "the frame/frames.\n");
  4073. /* Alive notification via Rx interrupt will do the real work */
  4074. if (inta & CSR_INT_BIT_ALIVE)
  4075. IWL_DEBUG_ISR("Alive interrupt\n");
  4076. }
  4077. #endif
  4078. /* Safely ignore these bits for debug checks below */
  4079. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  4080. /* HW RF KILL switch toggled */
  4081. if (inta & CSR_INT_BIT_RF_KILL) {
  4082. int hw_rf_kill = 0;
  4083. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4084. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4085. hw_rf_kill = 1;
  4086. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4087. "RF_KILL bit toggled to %s.\n",
  4088. hw_rf_kill ? "disable radio":"enable radio");
  4089. /* Queue restart only if RF_KILL switch was set to "kill"
  4090. * when we loaded driver, and is now set to "enable".
  4091. * After we're Alive, RF_KILL gets handled by
  4092. * iwl4965_rx_card_state_notif() */
  4093. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4094. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4095. queue_work(priv->workqueue, &priv->restart);
  4096. }
  4097. handled |= CSR_INT_BIT_RF_KILL;
  4098. }
  4099. /* Chip got too hot and stopped itself */
  4100. if (inta & CSR_INT_BIT_CT_KILL) {
  4101. IWL_ERROR("Microcode CT kill error detected.\n");
  4102. handled |= CSR_INT_BIT_CT_KILL;
  4103. }
  4104. /* Error detected by uCode */
  4105. if (inta & CSR_INT_BIT_SW_ERR) {
  4106. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4107. inta);
  4108. iwl4965_irq_handle_error(priv);
  4109. handled |= CSR_INT_BIT_SW_ERR;
  4110. }
  4111. /* uCode wakes up after power-down sleep */
  4112. if (inta & CSR_INT_BIT_WAKEUP) {
  4113. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4114. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4115. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4116. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4117. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4118. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4119. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4120. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4121. handled |= CSR_INT_BIT_WAKEUP;
  4122. }
  4123. /* All uCode command responses, including Tx command responses,
  4124. * Rx "responses" (frame-received notification), and other
  4125. * notifications from uCode come through here*/
  4126. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4127. iwl4965_rx_handle(priv);
  4128. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4129. }
  4130. if (inta & CSR_INT_BIT_FH_TX) {
  4131. IWL_DEBUG_ISR("Tx interrupt\n");
  4132. handled |= CSR_INT_BIT_FH_TX;
  4133. }
  4134. if (inta & ~handled)
  4135. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4136. if (inta & ~CSR_INI_SET_MASK) {
  4137. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4138. inta & ~CSR_INI_SET_MASK);
  4139. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4140. }
  4141. /* Re-enable all interrupts */
  4142. iwl4965_enable_interrupts(priv);
  4143. #ifdef CONFIG_IWLWIFI_DEBUG
  4144. if (iwl_debug_level & (IWL_DL_ISR)) {
  4145. inta = iwl4965_read32(priv, CSR_INT);
  4146. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4147. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4148. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4149. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4150. }
  4151. #endif
  4152. spin_unlock_irqrestore(&priv->lock, flags);
  4153. }
  4154. static irqreturn_t iwl4965_isr(int irq, void *data)
  4155. {
  4156. struct iwl_priv *priv = data;
  4157. u32 inta, inta_mask;
  4158. u32 inta_fh;
  4159. if (!priv)
  4160. return IRQ_NONE;
  4161. spin_lock(&priv->lock);
  4162. /* Disable (but don't clear!) interrupts here to avoid
  4163. * back-to-back ISRs and sporadic interrupts from our NIC.
  4164. * If we have something to service, the tasklet will re-enable ints.
  4165. * If we *don't* have something, we'll re-enable before leaving here. */
  4166. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4167. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4168. /* Discover which interrupts are active/pending */
  4169. inta = iwl4965_read32(priv, CSR_INT);
  4170. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4171. /* Ignore interrupt if there's nothing in NIC to service.
  4172. * This may be due to IRQ shared with another device,
  4173. * or due to sporadic interrupts thrown from our NIC. */
  4174. if (!inta && !inta_fh) {
  4175. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4176. goto none;
  4177. }
  4178. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4179. /* Hardware disappeared. It might have already raised
  4180. * an interrupt */
  4181. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4182. goto unplugged;
  4183. }
  4184. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4185. inta, inta_mask, inta_fh);
  4186. inta &= ~CSR_INT_BIT_SCD;
  4187. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4188. if (likely(inta || inta_fh))
  4189. tasklet_schedule(&priv->irq_tasklet);
  4190. unplugged:
  4191. spin_unlock(&priv->lock);
  4192. return IRQ_HANDLED;
  4193. none:
  4194. /* re-enable interrupts here since we don't have anything to service. */
  4195. iwl4965_enable_interrupts(priv);
  4196. spin_unlock(&priv->lock);
  4197. return IRQ_NONE;
  4198. }
  4199. /************************** EEPROM BANDS ****************************
  4200. *
  4201. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4202. * EEPROM contents to the specific channel number supported for each
  4203. * band.
  4204. *
  4205. * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  4206. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4207. * The specific geography and calibration information for that channel
  4208. * is contained in the eeprom map itself.
  4209. *
  4210. * During init, we copy the eeprom information and channel map
  4211. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4212. *
  4213. * channel_map_24/52 provides the index in the channel_info array for a
  4214. * given channel. We have to have two separate maps as there is channel
  4215. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4216. * band_2
  4217. *
  4218. * A value of 0xff stored in the channel_map indicates that the channel
  4219. * is not supported by the hardware at all.
  4220. *
  4221. * A value of 0xfe in the channel_map indicates that the channel is not
  4222. * valid for Tx with the current hardware. This means that
  4223. * while the system can tune and receive on a given channel, it may not
  4224. * be able to associate or transmit any frames on that
  4225. * channel. There is no corresponding channel information for that
  4226. * entry.
  4227. *
  4228. *********************************************************************/
  4229. /* 2.4 GHz */
  4230. static const u8 iwl4965_eeprom_band_1[14] = {
  4231. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4232. };
  4233. /* 5.2 GHz bands */
  4234. static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
  4235. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4236. };
  4237. static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
  4238. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4239. };
  4240. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4241. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4242. };
  4243. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4244. 145, 149, 153, 157, 161, 165
  4245. };
  4246. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4247. 1, 2, 3, 4, 5, 6, 7
  4248. };
  4249. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4250. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4251. };
  4252. static void iwl4965_init_band_reference(const struct iwl_priv *priv,
  4253. int band,
  4254. int *eeprom_ch_count,
  4255. const struct iwl4965_eeprom_channel
  4256. **eeprom_ch_info,
  4257. const u8 **eeprom_ch_index)
  4258. {
  4259. switch (band) {
  4260. case 1: /* 2.4GHz band */
  4261. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4262. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4263. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4264. break;
  4265. case 2: /* 4.9GHz band */
  4266. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4267. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4268. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4269. break;
  4270. case 3: /* 5.2GHz band */
  4271. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4272. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4273. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4274. break;
  4275. case 4: /* 5.5GHz band */
  4276. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4277. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4278. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4279. break;
  4280. case 5: /* 5.7GHz band */
  4281. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4282. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4283. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4284. break;
  4285. case 6: /* 2.4GHz FAT channels */
  4286. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4287. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4288. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4289. break;
  4290. case 7: /* 5 GHz FAT channels */
  4291. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4292. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4293. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4294. break;
  4295. default:
  4296. BUG();
  4297. return;
  4298. }
  4299. }
  4300. /**
  4301. * iwl4965_get_channel_info - Find driver's private channel info
  4302. *
  4303. * Based on band and channel number.
  4304. */
  4305. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl_priv *priv,
  4306. enum ieee80211_band band, u16 channel)
  4307. {
  4308. int i;
  4309. switch (band) {
  4310. case IEEE80211_BAND_5GHZ:
  4311. for (i = 14; i < priv->channel_count; i++) {
  4312. if (priv->channel_info[i].channel == channel)
  4313. return &priv->channel_info[i];
  4314. }
  4315. break;
  4316. case IEEE80211_BAND_2GHZ:
  4317. if (channel >= 1 && channel <= 14)
  4318. return &priv->channel_info[channel - 1];
  4319. break;
  4320. default:
  4321. BUG();
  4322. }
  4323. return NULL;
  4324. }
  4325. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4326. ? # x " " : "")
  4327. /**
  4328. * iwl4965_init_channel_map - Set up driver's info for all possible channels
  4329. */
  4330. static int iwl4965_init_channel_map(struct iwl_priv *priv)
  4331. {
  4332. int eeprom_ch_count = 0;
  4333. const u8 *eeprom_ch_index = NULL;
  4334. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4335. int band, ch;
  4336. struct iwl4965_channel_info *ch_info;
  4337. if (priv->channel_count) {
  4338. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4339. return 0;
  4340. }
  4341. if (priv->eeprom.version < 0x2f) {
  4342. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4343. priv->eeprom.version);
  4344. return -EINVAL;
  4345. }
  4346. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4347. priv->channel_count =
  4348. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4349. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4350. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4351. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4352. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4353. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4354. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4355. priv->channel_count, GFP_KERNEL);
  4356. if (!priv->channel_info) {
  4357. IWL_ERROR("Could not allocate channel_info\n");
  4358. priv->channel_count = 0;
  4359. return -ENOMEM;
  4360. }
  4361. ch_info = priv->channel_info;
  4362. /* Loop through the 5 EEPROM bands adding them in order to the
  4363. * channel map we maintain (that contains additional information than
  4364. * what just in the EEPROM) */
  4365. for (band = 1; band <= 5; band++) {
  4366. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4367. &eeprom_ch_info, &eeprom_ch_index);
  4368. /* Loop through each band adding each of the channels */
  4369. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4370. ch_info->channel = eeprom_ch_index[ch];
  4371. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  4372. IEEE80211_BAND_5GHZ;
  4373. /* permanently store EEPROM's channel regulatory flags
  4374. * and max power in channel info database. */
  4375. ch_info->eeprom = eeprom_ch_info[ch];
  4376. /* Copy the run-time flags so they are there even on
  4377. * invalid channels */
  4378. ch_info->flags = eeprom_ch_info[ch].flags;
  4379. if (!(is_channel_valid(ch_info))) {
  4380. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4381. "No traffic\n",
  4382. ch_info->channel,
  4383. ch_info->flags,
  4384. is_channel_a_band(ch_info) ?
  4385. "5.2" : "2.4");
  4386. ch_info++;
  4387. continue;
  4388. }
  4389. /* Initialize regulatory-based run-time data */
  4390. ch_info->max_power_avg = ch_info->curr_txpow =
  4391. eeprom_ch_info[ch].max_power_avg;
  4392. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4393. ch_info->min_power = 0;
  4394. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x"
  4395. " %ddBm): Ad-Hoc %ssupported\n",
  4396. ch_info->channel,
  4397. is_channel_a_band(ch_info) ?
  4398. "5.2" : "2.4",
  4399. CHECK_AND_PRINT(VALID),
  4400. CHECK_AND_PRINT(IBSS),
  4401. CHECK_AND_PRINT(ACTIVE),
  4402. CHECK_AND_PRINT(RADAR),
  4403. CHECK_AND_PRINT(WIDE),
  4404. CHECK_AND_PRINT(NARROW),
  4405. CHECK_AND_PRINT(DFS),
  4406. eeprom_ch_info[ch].flags,
  4407. eeprom_ch_info[ch].max_power_avg,
  4408. ((eeprom_ch_info[ch].
  4409. flags & EEPROM_CHANNEL_IBSS)
  4410. && !(eeprom_ch_info[ch].
  4411. flags & EEPROM_CHANNEL_RADAR))
  4412. ? "" : "not ");
  4413. /* Set the user_txpower_limit to the highest power
  4414. * supported by any channel */
  4415. if (eeprom_ch_info[ch].max_power_avg >
  4416. priv->user_txpower_limit)
  4417. priv->user_txpower_limit =
  4418. eeprom_ch_info[ch].max_power_avg;
  4419. ch_info++;
  4420. }
  4421. }
  4422. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  4423. for (band = 6; band <= 7; band++) {
  4424. enum ieee80211_band ieeeband;
  4425. u8 fat_extension_chan;
  4426. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4427. &eeprom_ch_info, &eeprom_ch_index);
  4428. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  4429. ieeeband = (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  4430. /* Loop through each band adding each of the channels */
  4431. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4432. if ((band == 6) &&
  4433. ((eeprom_ch_index[ch] == 5) ||
  4434. (eeprom_ch_index[ch] == 6) ||
  4435. (eeprom_ch_index[ch] == 7)))
  4436. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4437. else
  4438. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4439. /* Set up driver's info for lower half */
  4440. iwl4965_set_fat_chan_info(priv, ieeeband,
  4441. eeprom_ch_index[ch],
  4442. &(eeprom_ch_info[ch]),
  4443. fat_extension_chan);
  4444. /* Set up driver's info for upper half */
  4445. iwl4965_set_fat_chan_info(priv, ieeeband,
  4446. (eeprom_ch_index[ch] + 4),
  4447. &(eeprom_ch_info[ch]),
  4448. HT_IE_EXT_CHANNEL_BELOW);
  4449. }
  4450. }
  4451. return 0;
  4452. }
  4453. /*
  4454. * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
  4455. */
  4456. static void iwl4965_free_channel_map(struct iwl_priv *priv)
  4457. {
  4458. kfree(priv->channel_info);
  4459. priv->channel_count = 0;
  4460. }
  4461. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4462. * sending probe req. This should be set long enough to hear probe responses
  4463. * from more than one AP. */
  4464. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4465. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4466. /* For faster active scanning, scan will move to the next channel if fewer than
  4467. * PLCP_QUIET_THRESH packets are heard on this channel within
  4468. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4469. * time if it's a quiet channel (nothing responded to our probe, and there's
  4470. * no other traffic).
  4471. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4472. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4473. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4474. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4475. * Must be set longer than active dwell time.
  4476. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4477. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4478. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4479. #define IWL_PASSIVE_DWELL_BASE (100)
  4480. #define IWL_CHANNEL_TUNE_TIME 5
  4481. static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
  4482. enum ieee80211_band band)
  4483. {
  4484. if (band == IEEE80211_BAND_5GHZ)
  4485. return IWL_ACTIVE_DWELL_TIME_52;
  4486. else
  4487. return IWL_ACTIVE_DWELL_TIME_24;
  4488. }
  4489. static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
  4490. enum ieee80211_band band)
  4491. {
  4492. u16 active = iwl4965_get_active_dwell_time(priv, band);
  4493. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  4494. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4495. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4496. if (iwl4965_is_associated(priv)) {
  4497. /* If we're associated, we clamp the maximum passive
  4498. * dwell time to be 98% of the beacon interval (minus
  4499. * 2 * channel tune time) */
  4500. passive = priv->beacon_int;
  4501. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4502. passive = IWL_PASSIVE_DWELL_BASE;
  4503. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4504. }
  4505. if (passive <= active)
  4506. passive = active + 1;
  4507. return passive;
  4508. }
  4509. static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
  4510. enum ieee80211_band band,
  4511. u8 is_active, u8 direct_mask,
  4512. struct iwl4965_scan_channel *scan_ch)
  4513. {
  4514. const struct ieee80211_channel *channels = NULL;
  4515. const struct ieee80211_supported_band *sband;
  4516. const struct iwl4965_channel_info *ch_info;
  4517. u16 passive_dwell = 0;
  4518. u16 active_dwell = 0;
  4519. int added, i;
  4520. sband = iwl4965_get_hw_mode(priv, band);
  4521. if (!sband)
  4522. return 0;
  4523. channels = sband->channels;
  4524. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  4525. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  4526. for (i = 0, added = 0; i < sband->n_channels; i++) {
  4527. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  4528. le16_to_cpu(priv->active_rxon.channel)) {
  4529. if (iwl4965_is_associated(priv)) {
  4530. IWL_DEBUG_SCAN
  4531. ("Skipping current channel %d\n",
  4532. le16_to_cpu(priv->active_rxon.channel));
  4533. continue;
  4534. }
  4535. } else if (priv->only_active_channel)
  4536. continue;
  4537. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  4538. ch_info = iwl4965_get_channel_info(priv, band,
  4539. scan_ch->channel);
  4540. if (!is_channel_valid(ch_info)) {
  4541. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4542. scan_ch->channel);
  4543. continue;
  4544. }
  4545. if (!is_active || is_channel_passive(ch_info) ||
  4546. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  4547. scan_ch->type = 0; /* passive */
  4548. else
  4549. scan_ch->type = 1; /* active */
  4550. if (scan_ch->type & 1)
  4551. scan_ch->type |= (direct_mask << 1);
  4552. if (is_channel_narrow(ch_info))
  4553. scan_ch->type |= (1 << 7);
  4554. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4555. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4556. /* Set txpower levels to defaults */
  4557. scan_ch->tpc.dsp_atten = 110;
  4558. /* scan_pwr_info->tpc.dsp_atten; */
  4559. /*scan_pwr_info->tpc.tx_gain; */
  4560. if (band == IEEE80211_BAND_5GHZ)
  4561. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4562. else {
  4563. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4564. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4565. * power level:
  4566. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4567. */
  4568. }
  4569. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4570. scan_ch->channel,
  4571. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4572. (scan_ch->type & 1) ?
  4573. active_dwell : passive_dwell);
  4574. scan_ch++;
  4575. added++;
  4576. }
  4577. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4578. return added;
  4579. }
  4580. static void iwl4965_init_hw_rates(struct iwl_priv *priv,
  4581. struct ieee80211_rate *rates)
  4582. {
  4583. int i;
  4584. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4585. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  4586. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  4587. rates[i].hw_value_short = i;
  4588. rates[i].flags = 0;
  4589. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  4590. /*
  4591. * If CCK != 1M then set short preamble rate flag.
  4592. */
  4593. rates[i].flags |=
  4594. (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  4595. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  4596. }
  4597. }
  4598. }
  4599. /**
  4600. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4601. */
  4602. static int iwl4965_init_geos(struct iwl_priv *priv)
  4603. {
  4604. struct iwl4965_channel_info *ch;
  4605. struct ieee80211_supported_band *sband;
  4606. struct ieee80211_channel *channels;
  4607. struct ieee80211_channel *geo_ch;
  4608. struct ieee80211_rate *rates;
  4609. int i = 0;
  4610. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4611. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4612. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4613. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4614. return 0;
  4615. }
  4616. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4617. priv->channel_count, GFP_KERNEL);
  4618. if (!channels)
  4619. return -ENOMEM;
  4620. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4621. GFP_KERNEL);
  4622. if (!rates) {
  4623. kfree(channels);
  4624. return -ENOMEM;
  4625. }
  4626. /* 5.2GHz channels start after the 2.4GHz channels */
  4627. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4628. sband->channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4629. /* just OFDM */
  4630. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4631. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4632. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_5GHZ);
  4633. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4634. sband->channels = channels;
  4635. /* OFDM & CCK */
  4636. sband->bitrates = rates;
  4637. sband->n_bitrates = IWL_RATE_COUNT;
  4638. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_2GHZ);
  4639. priv->ieee_channels = channels;
  4640. priv->ieee_rates = rates;
  4641. iwl4965_init_hw_rates(priv, rates);
  4642. for (i = 0; i < priv->channel_count; i++) {
  4643. ch = &priv->channel_info[i];
  4644. /* FIXME: might be removed if scan is OK */
  4645. if (!is_channel_valid(ch))
  4646. continue;
  4647. if (is_channel_a_band(ch))
  4648. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4649. else
  4650. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4651. geo_ch = &sband->channels[sband->n_channels++];
  4652. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4653. geo_ch->max_power = ch->max_power_avg;
  4654. geo_ch->max_antenna_gain = 0xff;
  4655. geo_ch->hw_value = ch->channel;
  4656. if (is_channel_valid(ch)) {
  4657. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4658. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4659. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4660. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4661. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4662. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4663. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4664. priv->max_channel_txpower_limit =
  4665. ch->max_power_avg;
  4666. } else {
  4667. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4668. }
  4669. /* Save flags for reg domain usage */
  4670. geo_ch->orig_flags = geo_ch->flags;
  4671. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4672. ch->channel, geo_ch->center_freq,
  4673. is_channel_a_band(ch) ? "5.2" : "2.4",
  4674. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4675. "restricted" : "valid",
  4676. geo_ch->flags);
  4677. }
  4678. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  4679. priv->cfg->sku & IWL_SKU_A) {
  4680. printk(KERN_INFO DRV_NAME
  4681. ": Incorrectly detected BG card as ABG. Please send "
  4682. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4683. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4684. priv->cfg->sku &= ~IWL_SKU_A;
  4685. }
  4686. printk(KERN_INFO DRV_NAME
  4687. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4688. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4689. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4690. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
  4691. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
  4692. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4693. return 0;
  4694. }
  4695. /*
  4696. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4697. */
  4698. static void iwl4965_free_geos(struct iwl_priv *priv)
  4699. {
  4700. kfree(priv->ieee_channels);
  4701. kfree(priv->ieee_rates);
  4702. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4703. }
  4704. /******************************************************************************
  4705. *
  4706. * uCode download functions
  4707. *
  4708. ******************************************************************************/
  4709. static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
  4710. {
  4711. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4712. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4713. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4714. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4715. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4716. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4717. }
  4718. /**
  4719. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4720. * looking at all data.
  4721. */
  4722. static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  4723. u32 len)
  4724. {
  4725. u32 val;
  4726. u32 save_len = len;
  4727. int rc = 0;
  4728. u32 errcnt;
  4729. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4730. rc = iwl4965_grab_nic_access(priv);
  4731. if (rc)
  4732. return rc;
  4733. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4734. errcnt = 0;
  4735. for (; len > 0; len -= sizeof(u32), image++) {
  4736. /* read data comes through single port, auto-incr addr */
  4737. /* NOTE: Use the debugless read so we don't flood kernel log
  4738. * if IWL_DL_IO is set */
  4739. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4740. if (val != le32_to_cpu(*image)) {
  4741. IWL_ERROR("uCode INST section is invalid at "
  4742. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4743. save_len - len, val, le32_to_cpu(*image));
  4744. rc = -EIO;
  4745. errcnt++;
  4746. if (errcnt >= 20)
  4747. break;
  4748. }
  4749. }
  4750. iwl4965_release_nic_access(priv);
  4751. if (!errcnt)
  4752. IWL_DEBUG_INFO
  4753. ("ucode image in INSTRUCTION memory is good\n");
  4754. return rc;
  4755. }
  4756. /**
  4757. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4758. * using sample data 100 bytes apart. If these sample points are good,
  4759. * it's a pretty good bet that everything between them is good, too.
  4760. */
  4761. static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4762. {
  4763. u32 val;
  4764. int rc = 0;
  4765. u32 errcnt = 0;
  4766. u32 i;
  4767. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4768. rc = iwl4965_grab_nic_access(priv);
  4769. if (rc)
  4770. return rc;
  4771. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4772. /* read data comes through single port, auto-incr addr */
  4773. /* NOTE: Use the debugless read so we don't flood kernel log
  4774. * if IWL_DL_IO is set */
  4775. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4776. i + RTC_INST_LOWER_BOUND);
  4777. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4778. if (val != le32_to_cpu(*image)) {
  4779. #if 0 /* Enable this if you want to see details */
  4780. IWL_ERROR("uCode INST section is invalid at "
  4781. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4782. i, val, *image);
  4783. #endif
  4784. rc = -EIO;
  4785. errcnt++;
  4786. if (errcnt >= 3)
  4787. break;
  4788. }
  4789. }
  4790. iwl4965_release_nic_access(priv);
  4791. return rc;
  4792. }
  4793. /**
  4794. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4795. * and verify its contents
  4796. */
  4797. static int iwl4965_verify_ucode(struct iwl_priv *priv)
  4798. {
  4799. __le32 *image;
  4800. u32 len;
  4801. int rc = 0;
  4802. /* Try bootstrap */
  4803. image = (__le32 *)priv->ucode_boot.v_addr;
  4804. len = priv->ucode_boot.len;
  4805. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4806. if (rc == 0) {
  4807. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4808. return 0;
  4809. }
  4810. /* Try initialize */
  4811. image = (__le32 *)priv->ucode_init.v_addr;
  4812. len = priv->ucode_init.len;
  4813. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4814. if (rc == 0) {
  4815. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4816. return 0;
  4817. }
  4818. /* Try runtime/protocol */
  4819. image = (__le32 *)priv->ucode_code.v_addr;
  4820. len = priv->ucode_code.len;
  4821. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4822. if (rc == 0) {
  4823. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4824. return 0;
  4825. }
  4826. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4827. /* Since nothing seems to match, show first several data entries in
  4828. * instruction SRAM, so maybe visual inspection will give a clue.
  4829. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4830. image = (__le32 *)priv->ucode_boot.v_addr;
  4831. len = priv->ucode_boot.len;
  4832. rc = iwl4965_verify_inst_full(priv, image, len);
  4833. return rc;
  4834. }
  4835. /* check contents of special bootstrap uCode SRAM */
  4836. static int iwl4965_verify_bsm(struct iwl_priv *priv)
  4837. {
  4838. __le32 *image = priv->ucode_boot.v_addr;
  4839. u32 len = priv->ucode_boot.len;
  4840. u32 reg;
  4841. u32 val;
  4842. IWL_DEBUG_INFO("Begin verify bsm\n");
  4843. /* verify BSM SRAM contents */
  4844. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  4845. for (reg = BSM_SRAM_LOWER_BOUND;
  4846. reg < BSM_SRAM_LOWER_BOUND + len;
  4847. reg += sizeof(u32), image ++) {
  4848. val = iwl4965_read_prph(priv, reg);
  4849. if (val != le32_to_cpu(*image)) {
  4850. IWL_ERROR("BSM uCode verification failed at "
  4851. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4852. BSM_SRAM_LOWER_BOUND,
  4853. reg - BSM_SRAM_LOWER_BOUND, len,
  4854. val, le32_to_cpu(*image));
  4855. return -EIO;
  4856. }
  4857. }
  4858. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4859. return 0;
  4860. }
  4861. /**
  4862. * iwl4965_load_bsm - Load bootstrap instructions
  4863. *
  4864. * BSM operation:
  4865. *
  4866. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4867. * in special SRAM that does not power down during RFKILL. When powering back
  4868. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4869. * the bootstrap program into the on-board processor, and starts it.
  4870. *
  4871. * The bootstrap program loads (via DMA) instructions and data for a new
  4872. * program from host DRAM locations indicated by the host driver in the
  4873. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4874. * automatically.
  4875. *
  4876. * When initializing the NIC, the host driver points the BSM to the
  4877. * "initialize" uCode image. This uCode sets up some internal data, then
  4878. * notifies host via "initialize alive" that it is complete.
  4879. *
  4880. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4881. * normal runtime uCode instructions and a backup uCode data cache buffer
  4882. * (filled initially with starting data values for the on-board processor),
  4883. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4884. * which begins normal operation.
  4885. *
  4886. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4887. * the backup data cache in DRAM before SRAM is powered down.
  4888. *
  4889. * When powering back up, the BSM loads the bootstrap program. This reloads
  4890. * the runtime uCode instructions and the backup data cache into SRAM,
  4891. * and re-launches the runtime uCode from where it left off.
  4892. */
  4893. static int iwl4965_load_bsm(struct iwl_priv *priv)
  4894. {
  4895. __le32 *image = priv->ucode_boot.v_addr;
  4896. u32 len = priv->ucode_boot.len;
  4897. dma_addr_t pinst;
  4898. dma_addr_t pdata;
  4899. u32 inst_len;
  4900. u32 data_len;
  4901. int rc;
  4902. int i;
  4903. u32 done;
  4904. u32 reg_offset;
  4905. IWL_DEBUG_INFO("Begin load bsm\n");
  4906. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4907. if (len > IWL_MAX_BSM_SIZE)
  4908. return -EINVAL;
  4909. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4910. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  4911. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  4912. * after the "initialize" uCode has run, to point to
  4913. * runtime/protocol instructions and backup data cache. */
  4914. pinst = priv->ucode_init.p_addr >> 4;
  4915. pdata = priv->ucode_init_data.p_addr >> 4;
  4916. inst_len = priv->ucode_init.len;
  4917. data_len = priv->ucode_init_data.len;
  4918. rc = iwl4965_grab_nic_access(priv);
  4919. if (rc)
  4920. return rc;
  4921. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4922. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4923. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  4924. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  4925. /* Fill BSM memory with bootstrap instructions */
  4926. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  4927. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  4928. reg_offset += sizeof(u32), image++)
  4929. _iwl4965_write_prph(priv, reg_offset,
  4930. le32_to_cpu(*image));
  4931. rc = iwl4965_verify_bsm(priv);
  4932. if (rc) {
  4933. iwl4965_release_nic_access(priv);
  4934. return rc;
  4935. }
  4936. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  4937. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  4938. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  4939. RTC_INST_LOWER_BOUND);
  4940. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  4941. /* Load bootstrap code into instruction SRAM now,
  4942. * to prepare to load "initialize" uCode */
  4943. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  4944. BSM_WR_CTRL_REG_BIT_START);
  4945. /* Wait for load of bootstrap uCode to finish */
  4946. for (i = 0; i < 100; i++) {
  4947. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  4948. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  4949. break;
  4950. udelay(10);
  4951. }
  4952. if (i < 100)
  4953. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  4954. else {
  4955. IWL_ERROR("BSM write did not complete!\n");
  4956. return -EIO;
  4957. }
  4958. /* Enable future boot loads whenever power management unit triggers it
  4959. * (e.g. when powering back up after power-save shutdown) */
  4960. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  4961. BSM_WR_CTRL_REG_BIT_START_EN);
  4962. iwl4965_release_nic_access(priv);
  4963. return 0;
  4964. }
  4965. static void iwl4965_nic_start(struct iwl_priv *priv)
  4966. {
  4967. /* Remove all resets to allow NIC to operate */
  4968. iwl4965_write32(priv, CSR_RESET, 0);
  4969. }
  4970. /**
  4971. * iwl4965_read_ucode - Read uCode images from disk file.
  4972. *
  4973. * Copy into buffers for card to fetch via bus-mastering
  4974. */
  4975. static int iwl4965_read_ucode(struct iwl_priv *priv)
  4976. {
  4977. struct iwl4965_ucode *ucode;
  4978. int ret;
  4979. const struct firmware *ucode_raw;
  4980. const char *name = priv->cfg->fw_name;
  4981. u8 *src;
  4982. size_t len;
  4983. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4984. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4985. * request_firmware() is synchronous, file is in memory on return. */
  4986. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4987. if (ret < 0) {
  4988. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  4989. name, ret);
  4990. goto error;
  4991. }
  4992. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4993. name, ucode_raw->size);
  4994. /* Make sure that we got at least our header! */
  4995. if (ucode_raw->size < sizeof(*ucode)) {
  4996. IWL_ERROR("File size way too small!\n");
  4997. ret = -EINVAL;
  4998. goto err_release;
  4999. }
  5000. /* Data from ucode file: header followed by uCode images */
  5001. ucode = (void *)ucode_raw->data;
  5002. ver = le32_to_cpu(ucode->ver);
  5003. inst_size = le32_to_cpu(ucode->inst_size);
  5004. data_size = le32_to_cpu(ucode->data_size);
  5005. init_size = le32_to_cpu(ucode->init_size);
  5006. init_data_size = le32_to_cpu(ucode->init_data_size);
  5007. boot_size = le32_to_cpu(ucode->boot_size);
  5008. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5009. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5010. inst_size);
  5011. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5012. data_size);
  5013. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5014. init_size);
  5015. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5016. init_data_size);
  5017. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5018. boot_size);
  5019. /* Verify size of file vs. image size info in file's header */
  5020. if (ucode_raw->size < sizeof(*ucode) +
  5021. inst_size + data_size + init_size +
  5022. init_data_size + boot_size) {
  5023. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5024. (int)ucode_raw->size);
  5025. ret = -EINVAL;
  5026. goto err_release;
  5027. }
  5028. /* Verify that uCode images will fit in card's SRAM */
  5029. if (inst_size > IWL_MAX_INST_SIZE) {
  5030. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  5031. inst_size);
  5032. ret = -EINVAL;
  5033. goto err_release;
  5034. }
  5035. if (data_size > IWL_MAX_DATA_SIZE) {
  5036. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  5037. data_size);
  5038. ret = -EINVAL;
  5039. goto err_release;
  5040. }
  5041. if (init_size > IWL_MAX_INST_SIZE) {
  5042. IWL_DEBUG_INFO
  5043. ("uCode init instr len %d too large to fit in\n",
  5044. init_size);
  5045. ret = -EINVAL;
  5046. goto err_release;
  5047. }
  5048. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5049. IWL_DEBUG_INFO
  5050. ("uCode init data len %d too large to fit in\n",
  5051. init_data_size);
  5052. ret = -EINVAL;
  5053. goto err_release;
  5054. }
  5055. if (boot_size > IWL_MAX_BSM_SIZE) {
  5056. IWL_DEBUG_INFO
  5057. ("uCode boot instr len %d too large to fit in\n",
  5058. boot_size);
  5059. ret = -EINVAL;
  5060. goto err_release;
  5061. }
  5062. /* Allocate ucode buffers for card's bus-master loading ... */
  5063. /* Runtime instructions and 2 copies of data:
  5064. * 1) unmodified from disk
  5065. * 2) backup cache for save/restore during power-downs */
  5066. priv->ucode_code.len = inst_size;
  5067. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  5068. priv->ucode_data.len = data_size;
  5069. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  5070. priv->ucode_data_backup.len = data_size;
  5071. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5072. /* Initialization instructions and data */
  5073. if (init_size && init_data_size) {
  5074. priv->ucode_init.len = init_size;
  5075. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  5076. priv->ucode_init_data.len = init_data_size;
  5077. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5078. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  5079. goto err_pci_alloc;
  5080. }
  5081. /* Bootstrap (instructions only, no data) */
  5082. if (boot_size) {
  5083. priv->ucode_boot.len = boot_size;
  5084. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5085. if (!priv->ucode_boot.v_addr)
  5086. goto err_pci_alloc;
  5087. }
  5088. /* Copy images into buffers for card's bus-master reads ... */
  5089. /* Runtime instructions (first block of data in file) */
  5090. src = &ucode->data[0];
  5091. len = priv->ucode_code.len;
  5092. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  5093. memcpy(priv->ucode_code.v_addr, src, len);
  5094. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5095. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5096. /* Runtime data (2nd block)
  5097. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5098. src = &ucode->data[inst_size];
  5099. len = priv->ucode_data.len;
  5100. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  5101. memcpy(priv->ucode_data.v_addr, src, len);
  5102. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5103. /* Initialization instructions (3rd block) */
  5104. if (init_size) {
  5105. src = &ucode->data[inst_size + data_size];
  5106. len = priv->ucode_init.len;
  5107. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  5108. len);
  5109. memcpy(priv->ucode_init.v_addr, src, len);
  5110. }
  5111. /* Initialization data (4th block) */
  5112. if (init_data_size) {
  5113. src = &ucode->data[inst_size + data_size + init_size];
  5114. len = priv->ucode_init_data.len;
  5115. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  5116. len);
  5117. memcpy(priv->ucode_init_data.v_addr, src, len);
  5118. }
  5119. /* Bootstrap instructions (5th block) */
  5120. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5121. len = priv->ucode_boot.len;
  5122. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  5123. memcpy(priv->ucode_boot.v_addr, src, len);
  5124. /* We have our copies now, allow OS release its copies */
  5125. release_firmware(ucode_raw);
  5126. return 0;
  5127. err_pci_alloc:
  5128. IWL_ERROR("failed to allocate pci memory\n");
  5129. ret = -ENOMEM;
  5130. iwl4965_dealloc_ucode_pci(priv);
  5131. err_release:
  5132. release_firmware(ucode_raw);
  5133. error:
  5134. return ret;
  5135. }
  5136. /**
  5137. * iwl4965_set_ucode_ptrs - Set uCode address location
  5138. *
  5139. * Tell initialization uCode where to find runtime uCode.
  5140. *
  5141. * BSM registers initially contain pointers to initialization uCode.
  5142. * We need to replace them to load runtime uCode inst and data,
  5143. * and to save runtime data when powering down.
  5144. */
  5145. static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
  5146. {
  5147. dma_addr_t pinst;
  5148. dma_addr_t pdata;
  5149. int rc = 0;
  5150. unsigned long flags;
  5151. /* bits 35:4 for 4965 */
  5152. pinst = priv->ucode_code.p_addr >> 4;
  5153. pdata = priv->ucode_data_backup.p_addr >> 4;
  5154. spin_lock_irqsave(&priv->lock, flags);
  5155. rc = iwl4965_grab_nic_access(priv);
  5156. if (rc) {
  5157. spin_unlock_irqrestore(&priv->lock, flags);
  5158. return rc;
  5159. }
  5160. /* Tell bootstrap uCode where to find image to load */
  5161. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5162. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5163. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5164. priv->ucode_data.len);
  5165. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5166. * that all new ptr/size info is in place */
  5167. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5168. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5169. iwl4965_release_nic_access(priv);
  5170. spin_unlock_irqrestore(&priv->lock, flags);
  5171. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5172. return rc;
  5173. }
  5174. /**
  5175. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5176. *
  5177. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5178. *
  5179. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5180. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5181. * (3945 does not contain this data).
  5182. *
  5183. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5184. */
  5185. static void iwl4965_init_alive_start(struct iwl_priv *priv)
  5186. {
  5187. /* Check alive response for "valid" sign from uCode */
  5188. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5189. /* We had an error bringing up the hardware, so take it
  5190. * all the way back down so we can try again */
  5191. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5192. goto restart;
  5193. }
  5194. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5195. * This is a paranoid check, because we would not have gotten the
  5196. * "initialize" alive if code weren't properly loaded. */
  5197. if (iwl4965_verify_ucode(priv)) {
  5198. /* Runtime instruction load was bad;
  5199. * take it all the way back down so we can try again */
  5200. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5201. goto restart;
  5202. }
  5203. /* Calculate temperature */
  5204. priv->temperature = iwl4965_get_temperature(priv);
  5205. /* Send pointers to protocol/runtime uCode image ... init code will
  5206. * load and launch runtime uCode, which will send us another "Alive"
  5207. * notification. */
  5208. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5209. if (iwl4965_set_ucode_ptrs(priv)) {
  5210. /* Runtime instruction load won't happen;
  5211. * take it all the way back down so we can try again */
  5212. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5213. goto restart;
  5214. }
  5215. return;
  5216. restart:
  5217. queue_work(priv->workqueue, &priv->restart);
  5218. }
  5219. /**
  5220. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5221. * from protocol/runtime uCode (initialization uCode's
  5222. * Alive gets handled by iwl4965_init_alive_start()).
  5223. */
  5224. static void iwl4965_alive_start(struct iwl_priv *priv)
  5225. {
  5226. int rc = 0;
  5227. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5228. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5229. /* We had an error bringing up the hardware, so take it
  5230. * all the way back down so we can try again */
  5231. IWL_DEBUG_INFO("Alive failed.\n");
  5232. goto restart;
  5233. }
  5234. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5235. * This is a paranoid check, because we would not have gotten the
  5236. * "runtime" alive if code weren't properly loaded. */
  5237. if (iwl4965_verify_ucode(priv)) {
  5238. /* Runtime instruction load was bad;
  5239. * take it all the way back down so we can try again */
  5240. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5241. goto restart;
  5242. }
  5243. iwl4965_clear_stations_table(priv);
  5244. rc = iwl4965_alive_notify(priv);
  5245. if (rc) {
  5246. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5247. rc);
  5248. goto restart;
  5249. }
  5250. /* After the ALIVE response, we can send host commands to 4965 uCode */
  5251. set_bit(STATUS_ALIVE, &priv->status);
  5252. /* Clear out the uCode error bit if it is set */
  5253. clear_bit(STATUS_FW_ERROR, &priv->status);
  5254. if (iwl4965_is_rfkill(priv))
  5255. return;
  5256. ieee80211_start_queues(priv->hw);
  5257. priv->active_rate = priv->rates_mask;
  5258. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5259. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5260. if (iwl4965_is_associated(priv)) {
  5261. struct iwl4965_rxon_cmd *active_rxon =
  5262. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5263. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5264. sizeof(priv->staging_rxon));
  5265. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5266. } else {
  5267. /* Initialize our rx_config data */
  5268. iwl4965_connection_init_rx_config(priv);
  5269. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5270. }
  5271. /* Configure Bluetooth device coexistence support */
  5272. iwl4965_send_bt_config(priv);
  5273. /* Configure the adapter for unassociated operation */
  5274. iwl4965_commit_rxon(priv);
  5275. /* At this point, the NIC is initialized and operational */
  5276. priv->notif_missed_beacons = 0;
  5277. set_bit(STATUS_READY, &priv->status);
  5278. iwl4965_rf_kill_ct_config(priv);
  5279. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5280. wake_up_interruptible(&priv->wait_command_queue);
  5281. if (priv->error_recovering)
  5282. iwl4965_error_recovery(priv);
  5283. return;
  5284. restart:
  5285. queue_work(priv->workqueue, &priv->restart);
  5286. }
  5287. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
  5288. static void __iwl4965_down(struct iwl_priv *priv)
  5289. {
  5290. unsigned long flags;
  5291. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5292. struct ieee80211_conf *conf = NULL;
  5293. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5294. conf = ieee80211_get_hw_conf(priv->hw);
  5295. if (!exit_pending)
  5296. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5297. iwl4965_clear_stations_table(priv);
  5298. /* Unblock any waiting calls */
  5299. wake_up_interruptible_all(&priv->wait_command_queue);
  5300. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5301. * exiting the module */
  5302. if (!exit_pending)
  5303. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5304. /* stop and reset the on-board processor */
  5305. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5306. /* tell the device to stop sending interrupts */
  5307. iwl4965_disable_interrupts(priv);
  5308. if (priv->mac80211_registered)
  5309. ieee80211_stop_queues(priv->hw);
  5310. /* If we have not previously called iwl4965_init() then
  5311. * clear all bits but the RF Kill and SUSPEND bits and return */
  5312. if (!iwl4965_is_init(priv)) {
  5313. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5314. STATUS_RF_KILL_HW |
  5315. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5316. STATUS_RF_KILL_SW |
  5317. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5318. STATUS_GEO_CONFIGURED |
  5319. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5320. STATUS_IN_SUSPEND;
  5321. goto exit;
  5322. }
  5323. /* ...otherwise clear out all the status bits but the RF Kill and
  5324. * SUSPEND bits and continue taking the NIC down. */
  5325. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5326. STATUS_RF_KILL_HW |
  5327. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5328. STATUS_RF_KILL_SW |
  5329. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5330. STATUS_GEO_CONFIGURED |
  5331. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5332. STATUS_IN_SUSPEND |
  5333. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5334. STATUS_FW_ERROR;
  5335. spin_lock_irqsave(&priv->lock, flags);
  5336. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  5337. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5338. spin_unlock_irqrestore(&priv->lock, flags);
  5339. iwl4965_hw_txq_ctx_stop(priv);
  5340. iwl4965_hw_rxq_stop(priv);
  5341. spin_lock_irqsave(&priv->lock, flags);
  5342. if (!iwl4965_grab_nic_access(priv)) {
  5343. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5344. APMG_CLK_VAL_DMA_CLK_RQT);
  5345. iwl4965_release_nic_access(priv);
  5346. }
  5347. spin_unlock_irqrestore(&priv->lock, flags);
  5348. udelay(5);
  5349. iwl4965_hw_nic_stop_master(priv);
  5350. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5351. iwl4965_hw_nic_reset(priv);
  5352. exit:
  5353. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5354. if (priv->ibss_beacon)
  5355. dev_kfree_skb(priv->ibss_beacon);
  5356. priv->ibss_beacon = NULL;
  5357. /* clear out any free frames */
  5358. iwl4965_clear_free_frames(priv);
  5359. }
  5360. static void iwl4965_down(struct iwl_priv *priv)
  5361. {
  5362. mutex_lock(&priv->mutex);
  5363. __iwl4965_down(priv);
  5364. mutex_unlock(&priv->mutex);
  5365. iwl4965_cancel_deferred_work(priv);
  5366. }
  5367. #define MAX_HW_RESTARTS 5
  5368. static int __iwl4965_up(struct iwl_priv *priv)
  5369. {
  5370. int rc, i;
  5371. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5372. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5373. return -EIO;
  5374. }
  5375. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5376. IWL_WARNING("Radio disabled by SW RF kill (module "
  5377. "parameter)\n");
  5378. return -ENODEV;
  5379. }
  5380. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5381. IWL_ERROR("ucode not available for device bringup\n");
  5382. return -EIO;
  5383. }
  5384. /* If platform's RF_KILL switch is NOT set to KILL */
  5385. if (iwl4965_read32(priv, CSR_GP_CNTRL) &
  5386. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  5387. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5388. else {
  5389. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5390. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  5391. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5392. return -ENODEV;
  5393. }
  5394. }
  5395. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5396. rc = iwl4965_hw_nic_init(priv);
  5397. if (rc) {
  5398. IWL_ERROR("Unable to int nic\n");
  5399. return rc;
  5400. }
  5401. /* make sure rfkill handshake bits are cleared */
  5402. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5403. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5404. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5405. /* clear (again), then enable host interrupts */
  5406. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5407. iwl4965_enable_interrupts(priv);
  5408. /* really make sure rfkill handshake bits are cleared */
  5409. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5410. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5411. /* Copy original ucode data image from disk into backup cache.
  5412. * This will be used to initialize the on-board processor's
  5413. * data SRAM for a clean start when the runtime program first loads. */
  5414. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5415. priv->ucode_data.len);
  5416. /* We return success when we resume from suspend and rf_kill is on. */
  5417. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  5418. return 0;
  5419. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5420. iwl4965_clear_stations_table(priv);
  5421. /* load bootstrap state machine,
  5422. * load bootstrap program into processor's memory,
  5423. * prepare to load the "initialize" uCode */
  5424. rc = iwl4965_load_bsm(priv);
  5425. if (rc) {
  5426. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5427. continue;
  5428. }
  5429. /* start card; "initialize" will load runtime ucode */
  5430. iwl4965_nic_start(priv);
  5431. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5432. return 0;
  5433. }
  5434. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5435. __iwl4965_down(priv);
  5436. /* tried to restart and config the device for as long as our
  5437. * patience could withstand */
  5438. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5439. return -EIO;
  5440. }
  5441. /*****************************************************************************
  5442. *
  5443. * Workqueue callbacks
  5444. *
  5445. *****************************************************************************/
  5446. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5447. {
  5448. struct iwl_priv *priv =
  5449. container_of(data, struct iwl_priv, init_alive_start.work);
  5450. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5451. return;
  5452. mutex_lock(&priv->mutex);
  5453. iwl4965_init_alive_start(priv);
  5454. mutex_unlock(&priv->mutex);
  5455. }
  5456. static void iwl4965_bg_alive_start(struct work_struct *data)
  5457. {
  5458. struct iwl_priv *priv =
  5459. container_of(data, struct iwl_priv, alive_start.work);
  5460. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5461. return;
  5462. mutex_lock(&priv->mutex);
  5463. iwl4965_alive_start(priv);
  5464. mutex_unlock(&priv->mutex);
  5465. }
  5466. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5467. {
  5468. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  5469. wake_up_interruptible(&priv->wait_command_queue);
  5470. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5471. return;
  5472. mutex_lock(&priv->mutex);
  5473. if (!iwl4965_is_rfkill(priv)) {
  5474. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5475. "HW and/or SW RF Kill no longer active, restarting "
  5476. "device\n");
  5477. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5478. queue_work(priv->workqueue, &priv->restart);
  5479. } else {
  5480. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5481. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5482. "disabled by SW switch\n");
  5483. else
  5484. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5485. "Kill switch must be turned off for "
  5486. "wireless networking to work.\n");
  5487. }
  5488. mutex_unlock(&priv->mutex);
  5489. }
  5490. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5491. static void iwl4965_bg_scan_check(struct work_struct *data)
  5492. {
  5493. struct iwl_priv *priv =
  5494. container_of(data, struct iwl_priv, scan_check.work);
  5495. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5496. return;
  5497. mutex_lock(&priv->mutex);
  5498. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5499. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5500. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5501. "Scan completion watchdog resetting adapter (%dms)\n",
  5502. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5503. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5504. iwl4965_send_scan_abort(priv);
  5505. }
  5506. mutex_unlock(&priv->mutex);
  5507. }
  5508. static void iwl4965_bg_request_scan(struct work_struct *data)
  5509. {
  5510. struct iwl_priv *priv =
  5511. container_of(data, struct iwl_priv, request_scan);
  5512. struct iwl4965_host_cmd cmd = {
  5513. .id = REPLY_SCAN_CMD,
  5514. .len = sizeof(struct iwl4965_scan_cmd),
  5515. .meta.flags = CMD_SIZE_HUGE,
  5516. };
  5517. int rc = 0;
  5518. struct iwl4965_scan_cmd *scan;
  5519. struct ieee80211_conf *conf = NULL;
  5520. u16 cmd_len;
  5521. enum ieee80211_band band;
  5522. u8 direct_mask;
  5523. conf = ieee80211_get_hw_conf(priv->hw);
  5524. mutex_lock(&priv->mutex);
  5525. if (!iwl4965_is_ready(priv)) {
  5526. IWL_WARNING("request scan called when driver not ready.\n");
  5527. goto done;
  5528. }
  5529. /* Make sure the scan wasn't cancelled before this queued work
  5530. * was given the chance to run... */
  5531. if (!test_bit(STATUS_SCANNING, &priv->status))
  5532. goto done;
  5533. /* This should never be called or scheduled if there is currently
  5534. * a scan active in the hardware. */
  5535. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5536. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5537. "Ignoring second request.\n");
  5538. rc = -EIO;
  5539. goto done;
  5540. }
  5541. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5542. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5543. goto done;
  5544. }
  5545. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5546. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5547. goto done;
  5548. }
  5549. if (iwl4965_is_rfkill(priv)) {
  5550. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5551. goto done;
  5552. }
  5553. if (!test_bit(STATUS_READY, &priv->status)) {
  5554. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5555. goto done;
  5556. }
  5557. if (!priv->scan_bands) {
  5558. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5559. goto done;
  5560. }
  5561. if (!priv->scan) {
  5562. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5563. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5564. if (!priv->scan) {
  5565. rc = -ENOMEM;
  5566. goto done;
  5567. }
  5568. }
  5569. scan = priv->scan;
  5570. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5571. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5572. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5573. if (iwl4965_is_associated(priv)) {
  5574. u16 interval = 0;
  5575. u32 extra;
  5576. u32 suspend_time = 100;
  5577. u32 scan_suspend_time = 100;
  5578. unsigned long flags;
  5579. IWL_DEBUG_INFO("Scanning while associated...\n");
  5580. spin_lock_irqsave(&priv->lock, flags);
  5581. interval = priv->beacon_int;
  5582. spin_unlock_irqrestore(&priv->lock, flags);
  5583. scan->suspend_time = 0;
  5584. scan->max_out_time = cpu_to_le32(200 * 1024);
  5585. if (!interval)
  5586. interval = suspend_time;
  5587. extra = (suspend_time / interval) << 22;
  5588. scan_suspend_time = (extra |
  5589. ((suspend_time % interval) * 1024));
  5590. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5591. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5592. scan_suspend_time, interval);
  5593. }
  5594. /* We should add the ability for user to lock to PASSIVE ONLY */
  5595. if (priv->one_direct_scan) {
  5596. IWL_DEBUG_SCAN
  5597. ("Kicking off one direct scan for '%s'\n",
  5598. iwl4965_escape_essid(priv->direct_ssid,
  5599. priv->direct_ssid_len));
  5600. scan->direct_scan[0].id = WLAN_EID_SSID;
  5601. scan->direct_scan[0].len = priv->direct_ssid_len;
  5602. memcpy(scan->direct_scan[0].ssid,
  5603. priv->direct_ssid, priv->direct_ssid_len);
  5604. direct_mask = 1;
  5605. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5606. scan->direct_scan[0].id = WLAN_EID_SSID;
  5607. scan->direct_scan[0].len = priv->essid_len;
  5608. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5609. direct_mask = 1;
  5610. } else
  5611. direct_mask = 0;
  5612. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5613. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5614. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5615. switch (priv->scan_bands) {
  5616. case 2:
  5617. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5618. scan->tx_cmd.rate_n_flags =
  5619. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5620. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5621. scan->good_CRC_th = 0;
  5622. band = IEEE80211_BAND_2GHZ;
  5623. break;
  5624. case 1:
  5625. scan->tx_cmd.rate_n_flags =
  5626. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5627. RATE_MCS_ANT_B_MSK);
  5628. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5629. band = IEEE80211_BAND_5GHZ;
  5630. break;
  5631. default:
  5632. IWL_WARNING("Invalid scan band count\n");
  5633. goto done;
  5634. }
  5635. /* We don't build a direct scan probe request; the uCode will do
  5636. * that based on the direct_mask added to each channel entry */
  5637. cmd_len = iwl4965_fill_probe_req(priv, band,
  5638. (struct ieee80211_mgmt *)scan->data,
  5639. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  5640. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  5641. /* select Rx chains */
  5642. /* Force use of chains B and C (0x6) for scan Rx.
  5643. * Avoid A (0x1) because of its off-channel reception on A-band.
  5644. * MIMO is not used here, but value is required to make uCode happy. */
  5645. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5646. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5647. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5648. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5649. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5650. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5651. if (direct_mask) {
  5652. IWL_DEBUG_SCAN
  5653. ("Initiating direct scan for %s.\n",
  5654. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5655. scan->channel_count =
  5656. iwl4965_get_channels_for_scan(
  5657. priv, band, 1, /* active */
  5658. direct_mask,
  5659. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5660. } else {
  5661. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5662. scan->channel_count =
  5663. iwl4965_get_channels_for_scan(
  5664. priv, band, 0, /* passive */
  5665. direct_mask,
  5666. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5667. }
  5668. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5669. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5670. cmd.data = scan;
  5671. scan->len = cpu_to_le16(cmd.len);
  5672. set_bit(STATUS_SCAN_HW, &priv->status);
  5673. rc = iwl4965_send_cmd_sync(priv, &cmd);
  5674. if (rc)
  5675. goto done;
  5676. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5677. IWL_SCAN_CHECK_WATCHDOG);
  5678. mutex_unlock(&priv->mutex);
  5679. return;
  5680. done:
  5681. /* inform mac80211 scan aborted */
  5682. queue_work(priv->workqueue, &priv->scan_completed);
  5683. mutex_unlock(&priv->mutex);
  5684. }
  5685. static void iwl4965_bg_up(struct work_struct *data)
  5686. {
  5687. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5688. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5689. return;
  5690. mutex_lock(&priv->mutex);
  5691. __iwl4965_up(priv);
  5692. mutex_unlock(&priv->mutex);
  5693. }
  5694. static void iwl4965_bg_restart(struct work_struct *data)
  5695. {
  5696. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5697. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5698. return;
  5699. iwl4965_down(priv);
  5700. queue_work(priv->workqueue, &priv->up);
  5701. }
  5702. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5703. {
  5704. struct iwl_priv *priv =
  5705. container_of(data, struct iwl_priv, rx_replenish);
  5706. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5707. return;
  5708. mutex_lock(&priv->mutex);
  5709. iwl4965_rx_replenish(priv);
  5710. mutex_unlock(&priv->mutex);
  5711. }
  5712. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5713. static void iwl4965_bg_post_associate(struct work_struct *data)
  5714. {
  5715. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5716. post_associate.work);
  5717. int rc = 0;
  5718. struct ieee80211_conf *conf = NULL;
  5719. DECLARE_MAC_BUF(mac);
  5720. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5721. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5722. return;
  5723. }
  5724. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5725. priv->assoc_id,
  5726. print_mac(mac, priv->active_rxon.bssid_addr));
  5727. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5728. return;
  5729. mutex_lock(&priv->mutex);
  5730. if (!priv->vif || !priv->is_open) {
  5731. mutex_unlock(&priv->mutex);
  5732. return;
  5733. }
  5734. iwl4965_scan_cancel_timeout(priv, 200);
  5735. conf = ieee80211_get_hw_conf(priv->hw);
  5736. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5737. iwl4965_commit_rxon(priv);
  5738. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5739. iwl4965_setup_rxon_timing(priv);
  5740. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5741. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5742. if (rc)
  5743. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5744. "Attempting to continue.\n");
  5745. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5746. #ifdef CONFIG_IWL4965_HT
  5747. if (priv->current_ht_config.is_ht)
  5748. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5749. #endif /* CONFIG_IWL4965_HT*/
  5750. iwl4965_set_rxon_chain(priv);
  5751. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5752. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5753. priv->assoc_id, priv->beacon_int);
  5754. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5755. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5756. else
  5757. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5758. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5759. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5760. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5761. else
  5762. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5763. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5764. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5765. }
  5766. iwl4965_commit_rxon(priv);
  5767. switch (priv->iw_mode) {
  5768. case IEEE80211_IF_TYPE_STA:
  5769. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5770. break;
  5771. case IEEE80211_IF_TYPE_IBSS:
  5772. /* clear out the station table */
  5773. iwl4965_clear_stations_table(priv);
  5774. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5775. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5776. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5777. iwl4965_send_beacon_cmd(priv);
  5778. break;
  5779. default:
  5780. IWL_ERROR("%s Should not be called in %d mode\n",
  5781. __FUNCTION__, priv->iw_mode);
  5782. break;
  5783. }
  5784. iwl4965_sequence_reset(priv);
  5785. #ifdef CONFIG_IWL4965_SENSITIVITY
  5786. /* Enable Rx differential gain and sensitivity calibrations */
  5787. iwl4965_chain_noise_reset(priv);
  5788. priv->start_calib = 1;
  5789. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5790. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5791. priv->assoc_station_added = 1;
  5792. iwl4965_activate_qos(priv, 0);
  5793. /* we have just associated, don't start scan too early */
  5794. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5795. mutex_unlock(&priv->mutex);
  5796. }
  5797. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5798. {
  5799. struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
  5800. if (!iwl4965_is_ready(priv))
  5801. return;
  5802. mutex_lock(&priv->mutex);
  5803. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5804. iwl4965_send_scan_abort(priv);
  5805. mutex_unlock(&priv->mutex);
  5806. }
  5807. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5808. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5809. {
  5810. struct iwl_priv *priv =
  5811. container_of(work, struct iwl_priv, scan_completed);
  5812. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5813. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5814. return;
  5815. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5816. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5817. ieee80211_scan_completed(priv->hw);
  5818. /* Since setting the TXPOWER may have been deferred while
  5819. * performing the scan, fire one off */
  5820. mutex_lock(&priv->mutex);
  5821. iwl4965_hw_reg_send_txpower(priv);
  5822. mutex_unlock(&priv->mutex);
  5823. }
  5824. /*****************************************************************************
  5825. *
  5826. * mac80211 entry point functions
  5827. *
  5828. *****************************************************************************/
  5829. #define UCODE_READY_TIMEOUT (2 * HZ)
  5830. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5831. {
  5832. struct iwl_priv *priv = hw->priv;
  5833. int ret;
  5834. IWL_DEBUG_MAC80211("enter\n");
  5835. if (pci_enable_device(priv->pci_dev)) {
  5836. IWL_ERROR("Fail to pci_enable_device\n");
  5837. return -ENODEV;
  5838. }
  5839. pci_restore_state(priv->pci_dev);
  5840. pci_enable_msi(priv->pci_dev);
  5841. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5842. DRV_NAME, priv);
  5843. if (ret) {
  5844. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5845. goto out_disable_msi;
  5846. }
  5847. /* we should be verifying the device is ready to be opened */
  5848. mutex_lock(&priv->mutex);
  5849. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5850. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5851. * ucode filename and max sizes are card-specific. */
  5852. if (!priv->ucode_code.len) {
  5853. ret = iwl4965_read_ucode(priv);
  5854. if (ret) {
  5855. IWL_ERROR("Could not read microcode: %d\n", ret);
  5856. mutex_unlock(&priv->mutex);
  5857. goto out_release_irq;
  5858. }
  5859. }
  5860. ret = __iwl4965_up(priv);
  5861. mutex_unlock(&priv->mutex);
  5862. if (ret)
  5863. goto out_release_irq;
  5864. IWL_DEBUG_INFO("Start UP work done.\n");
  5865. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5866. return 0;
  5867. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5868. * mac80211 will not be run successfully. */
  5869. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5870. test_bit(STATUS_READY, &priv->status),
  5871. UCODE_READY_TIMEOUT);
  5872. if (!ret) {
  5873. if (!test_bit(STATUS_READY, &priv->status)) {
  5874. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5875. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5876. ret = -ETIMEDOUT;
  5877. goto out_release_irq;
  5878. }
  5879. }
  5880. priv->is_open = 1;
  5881. IWL_DEBUG_MAC80211("leave\n");
  5882. return 0;
  5883. out_release_irq:
  5884. free_irq(priv->pci_dev->irq, priv);
  5885. out_disable_msi:
  5886. pci_disable_msi(priv->pci_dev);
  5887. pci_disable_device(priv->pci_dev);
  5888. priv->is_open = 0;
  5889. IWL_DEBUG_MAC80211("leave - failed\n");
  5890. return ret;
  5891. }
  5892. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5893. {
  5894. struct iwl_priv *priv = hw->priv;
  5895. IWL_DEBUG_MAC80211("enter\n");
  5896. if (!priv->is_open) {
  5897. IWL_DEBUG_MAC80211("leave - skip\n");
  5898. return;
  5899. }
  5900. priv->is_open = 0;
  5901. if (iwl4965_is_ready_rf(priv)) {
  5902. /* stop mac, cancel any scan request and clear
  5903. * RXON_FILTER_ASSOC_MSK BIT
  5904. */
  5905. mutex_lock(&priv->mutex);
  5906. iwl4965_scan_cancel_timeout(priv, 100);
  5907. cancel_delayed_work(&priv->post_associate);
  5908. mutex_unlock(&priv->mutex);
  5909. }
  5910. iwl4965_down(priv);
  5911. flush_workqueue(priv->workqueue);
  5912. free_irq(priv->pci_dev->irq, priv);
  5913. pci_disable_msi(priv->pci_dev);
  5914. pci_save_state(priv->pci_dev);
  5915. pci_disable_device(priv->pci_dev);
  5916. IWL_DEBUG_MAC80211("leave\n");
  5917. }
  5918. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5919. struct ieee80211_tx_control *ctl)
  5920. {
  5921. struct iwl_priv *priv = hw->priv;
  5922. IWL_DEBUG_MAC80211("enter\n");
  5923. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5924. IWL_DEBUG_MAC80211("leave - monitor\n");
  5925. return -1;
  5926. }
  5927. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5928. ctl->tx_rate->bitrate);
  5929. if (iwl4965_tx_skb(priv, skb, ctl))
  5930. dev_kfree_skb_any(skb);
  5931. IWL_DEBUG_MAC80211("leave\n");
  5932. return 0;
  5933. }
  5934. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  5935. struct ieee80211_if_init_conf *conf)
  5936. {
  5937. struct iwl_priv *priv = hw->priv;
  5938. unsigned long flags;
  5939. DECLARE_MAC_BUF(mac);
  5940. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  5941. if (priv->vif) {
  5942. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  5943. return -EOPNOTSUPP;
  5944. }
  5945. spin_lock_irqsave(&priv->lock, flags);
  5946. priv->vif = conf->vif;
  5947. spin_unlock_irqrestore(&priv->lock, flags);
  5948. mutex_lock(&priv->mutex);
  5949. if (conf->mac_addr) {
  5950. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  5951. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  5952. }
  5953. if (iwl4965_is_ready(priv))
  5954. iwl4965_set_mode(priv, conf->type);
  5955. mutex_unlock(&priv->mutex);
  5956. IWL_DEBUG_MAC80211("leave\n");
  5957. return 0;
  5958. }
  5959. /**
  5960. * iwl4965_mac_config - mac80211 config callback
  5961. *
  5962. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5963. * be set inappropriately and the driver currently sets the hardware up to
  5964. * use it whenever needed.
  5965. */
  5966. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5967. {
  5968. struct iwl_priv *priv = hw->priv;
  5969. const struct iwl4965_channel_info *ch_info;
  5970. unsigned long flags;
  5971. int ret = 0;
  5972. mutex_lock(&priv->mutex);
  5973. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  5974. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  5975. if (!iwl4965_is_ready(priv)) {
  5976. IWL_DEBUG_MAC80211("leave - not ready\n");
  5977. ret = -EIO;
  5978. goto out;
  5979. }
  5980. if (unlikely(!iwl4965_mod_params.disable_hw_scan &&
  5981. test_bit(STATUS_SCANNING, &priv->status))) {
  5982. IWL_DEBUG_MAC80211("leave - scanning\n");
  5983. set_bit(STATUS_CONF_PENDING, &priv->status);
  5984. mutex_unlock(&priv->mutex);
  5985. return 0;
  5986. }
  5987. spin_lock_irqsave(&priv->lock, flags);
  5988. ch_info = iwl4965_get_channel_info(priv, conf->channel->band,
  5989. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5990. if (!is_channel_valid(ch_info)) {
  5991. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5992. spin_unlock_irqrestore(&priv->lock, flags);
  5993. ret = -EINVAL;
  5994. goto out;
  5995. }
  5996. #ifdef CONFIG_IWL4965_HT
  5997. /* if we are switching from ht to 2.4 clear flags
  5998. * from any ht related info since 2.4 does not
  5999. * support ht */
  6000. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  6001. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6002. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6003. #endif
  6004. )
  6005. priv->staging_rxon.flags = 0;
  6006. #endif /* CONFIG_IWL4965_HT */
  6007. iwl4965_set_rxon_channel(priv, conf->channel->band,
  6008. ieee80211_frequency_to_channel(conf->channel->center_freq));
  6009. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  6010. /* The list of supported rates and rate mask can be different
  6011. * for each band; since the band may have changed, reset
  6012. * the rate mask to what mac80211 lists */
  6013. iwl4965_set_rate(priv);
  6014. spin_unlock_irqrestore(&priv->lock, flags);
  6015. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6016. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6017. iwl4965_hw_channel_switch(priv, conf->channel);
  6018. goto out;
  6019. }
  6020. #endif
  6021. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6022. if (!conf->radio_enabled) {
  6023. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6024. goto out;
  6025. }
  6026. if (iwl4965_is_rfkill(priv)) {
  6027. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6028. ret = -EIO;
  6029. goto out;
  6030. }
  6031. iwl4965_set_rate(priv);
  6032. if (memcmp(&priv->active_rxon,
  6033. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6034. iwl4965_commit_rxon(priv);
  6035. else
  6036. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6037. IWL_DEBUG_MAC80211("leave\n");
  6038. out:
  6039. clear_bit(STATUS_CONF_PENDING, &priv->status);
  6040. mutex_unlock(&priv->mutex);
  6041. return ret;
  6042. }
  6043. static void iwl4965_config_ap(struct iwl_priv *priv)
  6044. {
  6045. int rc = 0;
  6046. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6047. return;
  6048. /* The following should be done only at AP bring up */
  6049. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6050. /* RXON - unassoc (to set timing command) */
  6051. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6052. iwl4965_commit_rxon(priv);
  6053. /* RXON Timing */
  6054. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6055. iwl4965_setup_rxon_timing(priv);
  6056. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6057. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6058. if (rc)
  6059. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6060. "Attempting to continue.\n");
  6061. iwl4965_set_rxon_chain(priv);
  6062. /* FIXME: what should be the assoc_id for AP? */
  6063. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6064. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6065. priv->staging_rxon.flags |=
  6066. RXON_FLG_SHORT_PREAMBLE_MSK;
  6067. else
  6068. priv->staging_rxon.flags &=
  6069. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6070. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6071. if (priv->assoc_capability &
  6072. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6073. priv->staging_rxon.flags |=
  6074. RXON_FLG_SHORT_SLOT_MSK;
  6075. else
  6076. priv->staging_rxon.flags &=
  6077. ~RXON_FLG_SHORT_SLOT_MSK;
  6078. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6079. priv->staging_rxon.flags &=
  6080. ~RXON_FLG_SHORT_SLOT_MSK;
  6081. }
  6082. /* restore RXON assoc */
  6083. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6084. iwl4965_commit_rxon(priv);
  6085. iwl4965_activate_qos(priv, 1);
  6086. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6087. }
  6088. iwl4965_send_beacon_cmd(priv);
  6089. /* FIXME - we need to add code here to detect a totally new
  6090. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6091. * clear sta table, add BCAST sta... */
  6092. }
  6093. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  6094. struct ieee80211_vif *vif,
  6095. struct ieee80211_if_conf *conf)
  6096. {
  6097. struct iwl_priv *priv = hw->priv;
  6098. DECLARE_MAC_BUF(mac);
  6099. unsigned long flags;
  6100. int rc;
  6101. if (conf == NULL)
  6102. return -EIO;
  6103. if (priv->vif != vif) {
  6104. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  6105. mutex_unlock(&priv->mutex);
  6106. return 0;
  6107. }
  6108. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6109. (!conf->beacon || !conf->ssid_len)) {
  6110. IWL_DEBUG_MAC80211
  6111. ("Leaving in AP mode because HostAPD is not ready.\n");
  6112. return 0;
  6113. }
  6114. if (!iwl4965_is_alive(priv))
  6115. return -EAGAIN;
  6116. mutex_lock(&priv->mutex);
  6117. if (conf->bssid)
  6118. IWL_DEBUG_MAC80211("bssid: %s\n",
  6119. print_mac(mac, conf->bssid));
  6120. /*
  6121. * very dubious code was here; the probe filtering flag is never set:
  6122. *
  6123. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6124. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6125. */
  6126. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6127. if (!conf->bssid) {
  6128. conf->bssid = priv->mac_addr;
  6129. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6130. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6131. print_mac(mac, conf->bssid));
  6132. }
  6133. if (priv->ibss_beacon)
  6134. dev_kfree_skb(priv->ibss_beacon);
  6135. priv->ibss_beacon = conf->beacon;
  6136. }
  6137. if (iwl4965_is_rfkill(priv))
  6138. goto done;
  6139. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6140. !is_multicast_ether_addr(conf->bssid)) {
  6141. /* If there is currently a HW scan going on in the background
  6142. * then we need to cancel it else the RXON below will fail. */
  6143. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6144. IWL_WARNING("Aborted scan still in progress "
  6145. "after 100ms\n");
  6146. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6147. mutex_unlock(&priv->mutex);
  6148. return -EAGAIN;
  6149. }
  6150. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6151. /* TODO: Audit driver for usage of these members and see
  6152. * if mac80211 deprecates them (priv->bssid looks like it
  6153. * shouldn't be there, but I haven't scanned the IBSS code
  6154. * to verify) - jpk */
  6155. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6156. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6157. iwl4965_config_ap(priv);
  6158. else {
  6159. rc = iwl4965_commit_rxon(priv);
  6160. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6161. iwl4965_rxon_add_station(
  6162. priv, priv->active_rxon.bssid_addr, 1);
  6163. }
  6164. } else {
  6165. iwl4965_scan_cancel_timeout(priv, 100);
  6166. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6167. iwl4965_commit_rxon(priv);
  6168. }
  6169. done:
  6170. spin_lock_irqsave(&priv->lock, flags);
  6171. if (!conf->ssid_len)
  6172. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6173. else
  6174. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6175. priv->essid_len = conf->ssid_len;
  6176. spin_unlock_irqrestore(&priv->lock, flags);
  6177. IWL_DEBUG_MAC80211("leave\n");
  6178. mutex_unlock(&priv->mutex);
  6179. return 0;
  6180. }
  6181. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6182. unsigned int changed_flags,
  6183. unsigned int *total_flags,
  6184. int mc_count, struct dev_addr_list *mc_list)
  6185. {
  6186. /*
  6187. * XXX: dummy
  6188. * see also iwl4965_connection_init_rx_config
  6189. */
  6190. *total_flags = 0;
  6191. }
  6192. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6193. struct ieee80211_if_init_conf *conf)
  6194. {
  6195. struct iwl_priv *priv = hw->priv;
  6196. IWL_DEBUG_MAC80211("enter\n");
  6197. mutex_lock(&priv->mutex);
  6198. if (iwl4965_is_ready_rf(priv)) {
  6199. iwl4965_scan_cancel_timeout(priv, 100);
  6200. cancel_delayed_work(&priv->post_associate);
  6201. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6202. iwl4965_commit_rxon(priv);
  6203. }
  6204. if (priv->vif == conf->vif) {
  6205. priv->vif = NULL;
  6206. memset(priv->bssid, 0, ETH_ALEN);
  6207. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6208. priv->essid_len = 0;
  6209. }
  6210. mutex_unlock(&priv->mutex);
  6211. IWL_DEBUG_MAC80211("leave\n");
  6212. }
  6213. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  6214. struct ieee80211_vif *vif,
  6215. struct ieee80211_bss_conf *bss_conf,
  6216. u32 changes)
  6217. {
  6218. struct iwl_priv *priv = hw->priv;
  6219. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  6220. if (bss_conf->use_short_preamble)
  6221. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6222. else
  6223. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6224. }
  6225. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  6226. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  6227. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6228. else
  6229. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6230. }
  6231. if (changes & BSS_CHANGED_ASSOC) {
  6232. /*
  6233. * TODO:
  6234. * do stuff instead of sniffing assoc resp
  6235. */
  6236. }
  6237. if (iwl4965_is_associated(priv))
  6238. iwl4965_send_rxon_assoc(priv);
  6239. }
  6240. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6241. {
  6242. int rc = 0;
  6243. unsigned long flags;
  6244. struct iwl_priv *priv = hw->priv;
  6245. IWL_DEBUG_MAC80211("enter\n");
  6246. mutex_lock(&priv->mutex);
  6247. spin_lock_irqsave(&priv->lock, flags);
  6248. if (!iwl4965_is_ready_rf(priv)) {
  6249. rc = -EIO;
  6250. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6251. goto out_unlock;
  6252. }
  6253. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6254. rc = -EIO;
  6255. IWL_ERROR("ERROR: APs don't scan\n");
  6256. goto out_unlock;
  6257. }
  6258. /* we don't schedule scan within next_scan_jiffies period */
  6259. if (priv->next_scan_jiffies &&
  6260. time_after(priv->next_scan_jiffies, jiffies)) {
  6261. rc = -EAGAIN;
  6262. goto out_unlock;
  6263. }
  6264. /* if we just finished scan ask for delay */
  6265. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  6266. IWL_DELAY_NEXT_SCAN, jiffies)) {
  6267. rc = -EAGAIN;
  6268. goto out_unlock;
  6269. }
  6270. if (len) {
  6271. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  6272. iwl4965_escape_essid(ssid, len), (int)len);
  6273. priv->one_direct_scan = 1;
  6274. priv->direct_ssid_len = (u8)
  6275. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6276. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6277. } else
  6278. priv->one_direct_scan = 0;
  6279. rc = iwl4965_scan_initiate(priv);
  6280. IWL_DEBUG_MAC80211("leave\n");
  6281. out_unlock:
  6282. spin_unlock_irqrestore(&priv->lock, flags);
  6283. mutex_unlock(&priv->mutex);
  6284. return rc;
  6285. }
  6286. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6287. const u8 *local_addr, const u8 *addr,
  6288. struct ieee80211_key_conf *key)
  6289. {
  6290. struct iwl_priv *priv = hw->priv;
  6291. DECLARE_MAC_BUF(mac);
  6292. int rc = 0;
  6293. u8 sta_id;
  6294. IWL_DEBUG_MAC80211("enter\n");
  6295. if (!iwl4965_mod_params.hw_crypto) {
  6296. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6297. return -EOPNOTSUPP;
  6298. }
  6299. if (is_zero_ether_addr(addr))
  6300. /* only support pairwise keys */
  6301. return -EOPNOTSUPP;
  6302. sta_id = iwl4965_hw_find_station(priv, addr);
  6303. if (sta_id == IWL_INVALID_STATION) {
  6304. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6305. print_mac(mac, addr));
  6306. return -EINVAL;
  6307. }
  6308. mutex_lock(&priv->mutex);
  6309. iwl4965_scan_cancel_timeout(priv, 100);
  6310. switch (cmd) {
  6311. case SET_KEY:
  6312. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6313. if (!rc) {
  6314. iwl4965_set_rxon_hwcrypto(priv, 1);
  6315. iwl4965_commit_rxon(priv);
  6316. key->hw_key_idx = sta_id;
  6317. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6318. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6319. }
  6320. break;
  6321. case DISABLE_KEY:
  6322. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6323. if (!rc) {
  6324. iwl4965_set_rxon_hwcrypto(priv, 0);
  6325. iwl4965_commit_rxon(priv);
  6326. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6327. }
  6328. break;
  6329. default:
  6330. rc = -EINVAL;
  6331. }
  6332. IWL_DEBUG_MAC80211("leave\n");
  6333. mutex_unlock(&priv->mutex);
  6334. return rc;
  6335. }
  6336. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6337. const struct ieee80211_tx_queue_params *params)
  6338. {
  6339. struct iwl_priv *priv = hw->priv;
  6340. unsigned long flags;
  6341. int q;
  6342. IWL_DEBUG_MAC80211("enter\n");
  6343. if (!iwl4965_is_ready_rf(priv)) {
  6344. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6345. return -EIO;
  6346. }
  6347. if (queue >= AC_NUM) {
  6348. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6349. return 0;
  6350. }
  6351. if (!priv->qos_data.qos_enable) {
  6352. priv->qos_data.qos_active = 0;
  6353. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6354. return 0;
  6355. }
  6356. q = AC_NUM - 1 - queue;
  6357. spin_lock_irqsave(&priv->lock, flags);
  6358. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6359. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6360. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6361. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6362. cpu_to_le16((params->txop * 32));
  6363. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6364. priv->qos_data.qos_active = 1;
  6365. spin_unlock_irqrestore(&priv->lock, flags);
  6366. mutex_lock(&priv->mutex);
  6367. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6368. iwl4965_activate_qos(priv, 1);
  6369. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6370. iwl4965_activate_qos(priv, 0);
  6371. mutex_unlock(&priv->mutex);
  6372. IWL_DEBUG_MAC80211("leave\n");
  6373. return 0;
  6374. }
  6375. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6376. struct ieee80211_tx_queue_stats *stats)
  6377. {
  6378. struct iwl_priv *priv = hw->priv;
  6379. int i, avail;
  6380. struct iwl4965_tx_queue *txq;
  6381. struct iwl4965_queue *q;
  6382. unsigned long flags;
  6383. IWL_DEBUG_MAC80211("enter\n");
  6384. if (!iwl4965_is_ready_rf(priv)) {
  6385. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6386. return -EIO;
  6387. }
  6388. spin_lock_irqsave(&priv->lock, flags);
  6389. for (i = 0; i < AC_NUM; i++) {
  6390. txq = &priv->txq[i];
  6391. q = &txq->q;
  6392. avail = iwl4965_queue_space(q);
  6393. stats->data[i].len = q->n_window - avail;
  6394. stats->data[i].limit = q->n_window - q->high_mark;
  6395. stats->data[i].count = q->n_window;
  6396. }
  6397. spin_unlock_irqrestore(&priv->lock, flags);
  6398. IWL_DEBUG_MAC80211("leave\n");
  6399. return 0;
  6400. }
  6401. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6402. struct ieee80211_low_level_stats *stats)
  6403. {
  6404. IWL_DEBUG_MAC80211("enter\n");
  6405. IWL_DEBUG_MAC80211("leave\n");
  6406. return 0;
  6407. }
  6408. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6409. {
  6410. IWL_DEBUG_MAC80211("enter\n");
  6411. IWL_DEBUG_MAC80211("leave\n");
  6412. return 0;
  6413. }
  6414. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6415. {
  6416. struct iwl_priv *priv = hw->priv;
  6417. unsigned long flags;
  6418. mutex_lock(&priv->mutex);
  6419. IWL_DEBUG_MAC80211("enter\n");
  6420. priv->lq_mngr.lq_ready = 0;
  6421. #ifdef CONFIG_IWL4965_HT
  6422. spin_lock_irqsave(&priv->lock, flags);
  6423. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  6424. spin_unlock_irqrestore(&priv->lock, flags);
  6425. #endif /* CONFIG_IWL4965_HT */
  6426. iwl4965_reset_qos(priv);
  6427. cancel_delayed_work(&priv->post_associate);
  6428. spin_lock_irqsave(&priv->lock, flags);
  6429. priv->assoc_id = 0;
  6430. priv->assoc_capability = 0;
  6431. priv->call_post_assoc_from_beacon = 0;
  6432. priv->assoc_station_added = 0;
  6433. /* new association get rid of ibss beacon skb */
  6434. if (priv->ibss_beacon)
  6435. dev_kfree_skb(priv->ibss_beacon);
  6436. priv->ibss_beacon = NULL;
  6437. priv->beacon_int = priv->hw->conf.beacon_int;
  6438. priv->timestamp1 = 0;
  6439. priv->timestamp0 = 0;
  6440. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6441. priv->beacon_int = 0;
  6442. spin_unlock_irqrestore(&priv->lock, flags);
  6443. if (!iwl4965_is_ready_rf(priv)) {
  6444. IWL_DEBUG_MAC80211("leave - not ready\n");
  6445. mutex_unlock(&priv->mutex);
  6446. return;
  6447. }
  6448. /* we are restarting association process
  6449. * clear RXON_FILTER_ASSOC_MSK bit
  6450. */
  6451. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6452. iwl4965_scan_cancel_timeout(priv, 100);
  6453. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6454. iwl4965_commit_rxon(priv);
  6455. }
  6456. /* Per mac80211.h: This is only used in IBSS mode... */
  6457. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6458. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6459. mutex_unlock(&priv->mutex);
  6460. return;
  6461. }
  6462. priv->only_active_channel = 0;
  6463. iwl4965_set_rate(priv);
  6464. mutex_unlock(&priv->mutex);
  6465. IWL_DEBUG_MAC80211("leave\n");
  6466. }
  6467. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6468. struct ieee80211_tx_control *control)
  6469. {
  6470. struct iwl_priv *priv = hw->priv;
  6471. unsigned long flags;
  6472. mutex_lock(&priv->mutex);
  6473. IWL_DEBUG_MAC80211("enter\n");
  6474. if (!iwl4965_is_ready_rf(priv)) {
  6475. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6476. mutex_unlock(&priv->mutex);
  6477. return -EIO;
  6478. }
  6479. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6480. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6481. mutex_unlock(&priv->mutex);
  6482. return -EIO;
  6483. }
  6484. spin_lock_irqsave(&priv->lock, flags);
  6485. if (priv->ibss_beacon)
  6486. dev_kfree_skb(priv->ibss_beacon);
  6487. priv->ibss_beacon = skb;
  6488. priv->assoc_id = 0;
  6489. IWL_DEBUG_MAC80211("leave\n");
  6490. spin_unlock_irqrestore(&priv->lock, flags);
  6491. iwl4965_reset_qos(priv);
  6492. queue_work(priv->workqueue, &priv->post_associate.work);
  6493. mutex_unlock(&priv->mutex);
  6494. return 0;
  6495. }
  6496. #ifdef CONFIG_IWL4965_HT
  6497. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6498. struct iwl_priv *priv)
  6499. {
  6500. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6501. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6502. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6503. IWL_DEBUG_MAC80211("enter: \n");
  6504. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6505. iwl_conf->is_ht = 0;
  6506. return;
  6507. }
  6508. iwl_conf->is_ht = 1;
  6509. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6510. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6511. iwl_conf->sgf |= 0x1;
  6512. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6513. iwl_conf->sgf |= 0x2;
  6514. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6515. iwl_conf->max_amsdu_size =
  6516. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6517. iwl_conf->supported_chan_width =
  6518. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6519. iwl_conf->extension_chan_offset =
  6520. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6521. /* If no above or below channel supplied disable FAT channel */
  6522. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  6523. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  6524. iwl_conf->supported_chan_width = 0;
  6525. iwl_conf->tx_mimo_ps_mode =
  6526. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6527. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6528. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6529. iwl_conf->tx_chan_width =
  6530. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6531. iwl_conf->ht_protection =
  6532. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6533. iwl_conf->non_GF_STA_present =
  6534. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6535. IWL_DEBUG_MAC80211("control channel %d\n",
  6536. iwl_conf->control_channel);
  6537. IWL_DEBUG_MAC80211("leave\n");
  6538. }
  6539. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6540. struct ieee80211_conf *conf)
  6541. {
  6542. struct iwl_priv *priv = hw->priv;
  6543. IWL_DEBUG_MAC80211("enter: \n");
  6544. iwl4965_ht_info_fill(conf, priv);
  6545. iwl4965_set_rxon_chain(priv);
  6546. if (priv && priv->assoc_id &&
  6547. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6548. unsigned long flags;
  6549. spin_lock_irqsave(&priv->lock, flags);
  6550. if (priv->beacon_int)
  6551. queue_work(priv->workqueue, &priv->post_associate.work);
  6552. else
  6553. priv->call_post_assoc_from_beacon = 1;
  6554. spin_unlock_irqrestore(&priv->lock, flags);
  6555. }
  6556. IWL_DEBUG_MAC80211("leave:\n");
  6557. return 0;
  6558. }
  6559. #endif /*CONFIG_IWL4965_HT*/
  6560. /*****************************************************************************
  6561. *
  6562. * sysfs attributes
  6563. *
  6564. *****************************************************************************/
  6565. #ifdef CONFIG_IWLWIFI_DEBUG
  6566. /*
  6567. * The following adds a new attribute to the sysfs representation
  6568. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6569. * used for controlling the debug level.
  6570. *
  6571. * See the level definitions in iwl for details.
  6572. */
  6573. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6574. {
  6575. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6576. }
  6577. static ssize_t store_debug_level(struct device_driver *d,
  6578. const char *buf, size_t count)
  6579. {
  6580. char *p = (char *)buf;
  6581. u32 val;
  6582. val = simple_strtoul(p, &p, 0);
  6583. if (p == buf)
  6584. printk(KERN_INFO DRV_NAME
  6585. ": %s is not in hex or decimal form.\n", buf);
  6586. else
  6587. iwl_debug_level = val;
  6588. return strnlen(buf, count);
  6589. }
  6590. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6591. show_debug_level, store_debug_level);
  6592. #endif /* CONFIG_IWLWIFI_DEBUG */
  6593. static ssize_t show_rf_kill(struct device *d,
  6594. struct device_attribute *attr, char *buf)
  6595. {
  6596. /*
  6597. * 0 - RF kill not enabled
  6598. * 1 - SW based RF kill active (sysfs)
  6599. * 2 - HW based RF kill active
  6600. * 3 - Both HW and SW based RF kill active
  6601. */
  6602. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6603. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6604. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6605. return sprintf(buf, "%i\n", val);
  6606. }
  6607. static ssize_t store_rf_kill(struct device *d,
  6608. struct device_attribute *attr,
  6609. const char *buf, size_t count)
  6610. {
  6611. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6612. mutex_lock(&priv->mutex);
  6613. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6614. mutex_unlock(&priv->mutex);
  6615. return count;
  6616. }
  6617. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6618. static ssize_t show_temperature(struct device *d,
  6619. struct device_attribute *attr, char *buf)
  6620. {
  6621. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6622. if (!iwl4965_is_alive(priv))
  6623. return -EAGAIN;
  6624. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6625. }
  6626. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6627. static ssize_t show_rs_window(struct device *d,
  6628. struct device_attribute *attr,
  6629. char *buf)
  6630. {
  6631. struct iwl_priv *priv = d->driver_data;
  6632. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6633. }
  6634. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6635. static ssize_t show_tx_power(struct device *d,
  6636. struct device_attribute *attr, char *buf)
  6637. {
  6638. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6639. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6640. }
  6641. static ssize_t store_tx_power(struct device *d,
  6642. struct device_attribute *attr,
  6643. const char *buf, size_t count)
  6644. {
  6645. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6646. char *p = (char *)buf;
  6647. u32 val;
  6648. val = simple_strtoul(p, &p, 10);
  6649. if (p == buf)
  6650. printk(KERN_INFO DRV_NAME
  6651. ": %s is not in decimal form.\n", buf);
  6652. else
  6653. iwl4965_hw_reg_set_txpower(priv, val);
  6654. return count;
  6655. }
  6656. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6657. static ssize_t show_flags(struct device *d,
  6658. struct device_attribute *attr, char *buf)
  6659. {
  6660. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6661. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6662. }
  6663. static ssize_t store_flags(struct device *d,
  6664. struct device_attribute *attr,
  6665. const char *buf, size_t count)
  6666. {
  6667. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6668. u32 flags = simple_strtoul(buf, NULL, 0);
  6669. mutex_lock(&priv->mutex);
  6670. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6671. /* Cancel any currently running scans... */
  6672. if (iwl4965_scan_cancel_timeout(priv, 100))
  6673. IWL_WARNING("Could not cancel scan.\n");
  6674. else {
  6675. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6676. flags);
  6677. priv->staging_rxon.flags = cpu_to_le32(flags);
  6678. iwl4965_commit_rxon(priv);
  6679. }
  6680. }
  6681. mutex_unlock(&priv->mutex);
  6682. return count;
  6683. }
  6684. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6685. static ssize_t show_filter_flags(struct device *d,
  6686. struct device_attribute *attr, char *buf)
  6687. {
  6688. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6689. return sprintf(buf, "0x%04X\n",
  6690. le32_to_cpu(priv->active_rxon.filter_flags));
  6691. }
  6692. static ssize_t store_filter_flags(struct device *d,
  6693. struct device_attribute *attr,
  6694. const char *buf, size_t count)
  6695. {
  6696. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6697. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6698. mutex_lock(&priv->mutex);
  6699. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6700. /* Cancel any currently running scans... */
  6701. if (iwl4965_scan_cancel_timeout(priv, 100))
  6702. IWL_WARNING("Could not cancel scan.\n");
  6703. else {
  6704. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6705. "0x%04X\n", filter_flags);
  6706. priv->staging_rxon.filter_flags =
  6707. cpu_to_le32(filter_flags);
  6708. iwl4965_commit_rxon(priv);
  6709. }
  6710. }
  6711. mutex_unlock(&priv->mutex);
  6712. return count;
  6713. }
  6714. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6715. store_filter_flags);
  6716. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6717. static ssize_t show_measurement(struct device *d,
  6718. struct device_attribute *attr, char *buf)
  6719. {
  6720. struct iwl_priv *priv = dev_get_drvdata(d);
  6721. struct iwl4965_spectrum_notification measure_report;
  6722. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6723. u8 *data = (u8 *) & measure_report;
  6724. unsigned long flags;
  6725. spin_lock_irqsave(&priv->lock, flags);
  6726. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6727. spin_unlock_irqrestore(&priv->lock, flags);
  6728. return 0;
  6729. }
  6730. memcpy(&measure_report, &priv->measure_report, size);
  6731. priv->measurement_status = 0;
  6732. spin_unlock_irqrestore(&priv->lock, flags);
  6733. while (size && (PAGE_SIZE - len)) {
  6734. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6735. PAGE_SIZE - len, 1);
  6736. len = strlen(buf);
  6737. if (PAGE_SIZE - len)
  6738. buf[len++] = '\n';
  6739. ofs += 16;
  6740. size -= min(size, 16U);
  6741. }
  6742. return len;
  6743. }
  6744. static ssize_t store_measurement(struct device *d,
  6745. struct device_attribute *attr,
  6746. const char *buf, size_t count)
  6747. {
  6748. struct iwl_priv *priv = dev_get_drvdata(d);
  6749. struct ieee80211_measurement_params params = {
  6750. .channel = le16_to_cpu(priv->active_rxon.channel),
  6751. .start_time = cpu_to_le64(priv->last_tsf),
  6752. .duration = cpu_to_le16(1),
  6753. };
  6754. u8 type = IWL_MEASURE_BASIC;
  6755. u8 buffer[32];
  6756. u8 channel;
  6757. if (count) {
  6758. char *p = buffer;
  6759. strncpy(buffer, buf, min(sizeof(buffer), count));
  6760. channel = simple_strtoul(p, NULL, 0);
  6761. if (channel)
  6762. params.channel = channel;
  6763. p = buffer;
  6764. while (*p && *p != ' ')
  6765. p++;
  6766. if (*p)
  6767. type = simple_strtoul(p + 1, NULL, 0);
  6768. }
  6769. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6770. "channel %d (for '%s')\n", type, params.channel, buf);
  6771. iwl4965_get_measurement(priv, &params, type);
  6772. return count;
  6773. }
  6774. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6775. show_measurement, store_measurement);
  6776. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6777. static ssize_t store_retry_rate(struct device *d,
  6778. struct device_attribute *attr,
  6779. const char *buf, size_t count)
  6780. {
  6781. struct iwl_priv *priv = dev_get_drvdata(d);
  6782. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6783. if (priv->retry_rate <= 0)
  6784. priv->retry_rate = 1;
  6785. return count;
  6786. }
  6787. static ssize_t show_retry_rate(struct device *d,
  6788. struct device_attribute *attr, char *buf)
  6789. {
  6790. struct iwl_priv *priv = dev_get_drvdata(d);
  6791. return sprintf(buf, "%d", priv->retry_rate);
  6792. }
  6793. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6794. store_retry_rate);
  6795. static ssize_t store_power_level(struct device *d,
  6796. struct device_attribute *attr,
  6797. const char *buf, size_t count)
  6798. {
  6799. struct iwl_priv *priv = dev_get_drvdata(d);
  6800. int rc;
  6801. int mode;
  6802. mode = simple_strtoul(buf, NULL, 0);
  6803. mutex_lock(&priv->mutex);
  6804. if (!iwl4965_is_ready(priv)) {
  6805. rc = -EAGAIN;
  6806. goto out;
  6807. }
  6808. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6809. mode = IWL_POWER_AC;
  6810. else
  6811. mode |= IWL_POWER_ENABLED;
  6812. if (mode != priv->power_mode) {
  6813. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6814. if (rc) {
  6815. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6816. goto out;
  6817. }
  6818. priv->power_mode = mode;
  6819. }
  6820. rc = count;
  6821. out:
  6822. mutex_unlock(&priv->mutex);
  6823. return rc;
  6824. }
  6825. #define MAX_WX_STRING 80
  6826. /* Values are in microsecond */
  6827. static const s32 timeout_duration[] = {
  6828. 350000,
  6829. 250000,
  6830. 75000,
  6831. 37000,
  6832. 25000,
  6833. };
  6834. static const s32 period_duration[] = {
  6835. 400000,
  6836. 700000,
  6837. 1000000,
  6838. 1000000,
  6839. 1000000
  6840. };
  6841. static ssize_t show_power_level(struct device *d,
  6842. struct device_attribute *attr, char *buf)
  6843. {
  6844. struct iwl_priv *priv = dev_get_drvdata(d);
  6845. int level = IWL_POWER_LEVEL(priv->power_mode);
  6846. char *p = buf;
  6847. p += sprintf(p, "%d ", level);
  6848. switch (level) {
  6849. case IWL_POWER_MODE_CAM:
  6850. case IWL_POWER_AC:
  6851. p += sprintf(p, "(AC)");
  6852. break;
  6853. case IWL_POWER_BATTERY:
  6854. p += sprintf(p, "(BATTERY)");
  6855. break;
  6856. default:
  6857. p += sprintf(p,
  6858. "(Timeout %dms, Period %dms)",
  6859. timeout_duration[level - 1] / 1000,
  6860. period_duration[level - 1] / 1000);
  6861. }
  6862. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6863. p += sprintf(p, " OFF\n");
  6864. else
  6865. p += sprintf(p, " \n");
  6866. return (p - buf + 1);
  6867. }
  6868. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6869. store_power_level);
  6870. static ssize_t show_channels(struct device *d,
  6871. struct device_attribute *attr, char *buf)
  6872. {
  6873. /* all this shit doesn't belong into sysfs anyway */
  6874. return 0;
  6875. }
  6876. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6877. static ssize_t show_statistics(struct device *d,
  6878. struct device_attribute *attr, char *buf)
  6879. {
  6880. struct iwl_priv *priv = dev_get_drvdata(d);
  6881. u32 size = sizeof(struct iwl4965_notif_statistics);
  6882. u32 len = 0, ofs = 0;
  6883. u8 *data = (u8 *) & priv->statistics;
  6884. int rc = 0;
  6885. if (!iwl4965_is_alive(priv))
  6886. return -EAGAIN;
  6887. mutex_lock(&priv->mutex);
  6888. rc = iwl4965_send_statistics_request(priv);
  6889. mutex_unlock(&priv->mutex);
  6890. if (rc) {
  6891. len = sprintf(buf,
  6892. "Error sending statistics request: 0x%08X\n", rc);
  6893. return len;
  6894. }
  6895. while (size && (PAGE_SIZE - len)) {
  6896. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6897. PAGE_SIZE - len, 1);
  6898. len = strlen(buf);
  6899. if (PAGE_SIZE - len)
  6900. buf[len++] = '\n';
  6901. ofs += 16;
  6902. size -= min(size, 16U);
  6903. }
  6904. return len;
  6905. }
  6906. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6907. static ssize_t show_antenna(struct device *d,
  6908. struct device_attribute *attr, char *buf)
  6909. {
  6910. struct iwl_priv *priv = dev_get_drvdata(d);
  6911. if (!iwl4965_is_alive(priv))
  6912. return -EAGAIN;
  6913. return sprintf(buf, "%d\n", priv->antenna);
  6914. }
  6915. static ssize_t store_antenna(struct device *d,
  6916. struct device_attribute *attr,
  6917. const char *buf, size_t count)
  6918. {
  6919. int ant;
  6920. struct iwl_priv *priv = dev_get_drvdata(d);
  6921. if (count == 0)
  6922. return 0;
  6923. if (sscanf(buf, "%1i", &ant) != 1) {
  6924. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6925. return count;
  6926. }
  6927. if ((ant >= 0) && (ant <= 2)) {
  6928. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6929. priv->antenna = (enum iwl4965_antenna)ant;
  6930. } else
  6931. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6932. return count;
  6933. }
  6934. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6935. static ssize_t show_status(struct device *d,
  6936. struct device_attribute *attr, char *buf)
  6937. {
  6938. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6939. if (!iwl4965_is_alive(priv))
  6940. return -EAGAIN;
  6941. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6942. }
  6943. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6944. static ssize_t dump_error_log(struct device *d,
  6945. struct device_attribute *attr,
  6946. const char *buf, size_t count)
  6947. {
  6948. char *p = (char *)buf;
  6949. if (p[0] == '1')
  6950. iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  6951. return strnlen(buf, count);
  6952. }
  6953. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6954. static ssize_t dump_event_log(struct device *d,
  6955. struct device_attribute *attr,
  6956. const char *buf, size_t count)
  6957. {
  6958. char *p = (char *)buf;
  6959. if (p[0] == '1')
  6960. iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  6961. return strnlen(buf, count);
  6962. }
  6963. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6964. /*****************************************************************************
  6965. *
  6966. * driver setup and teardown
  6967. *
  6968. *****************************************************************************/
  6969. static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
  6970. {
  6971. priv->workqueue = create_workqueue(DRV_NAME);
  6972. init_waitqueue_head(&priv->wait_command_queue);
  6973. INIT_WORK(&priv->up, iwl4965_bg_up);
  6974. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  6975. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  6976. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  6977. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  6978. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  6979. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  6980. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  6981. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  6982. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  6983. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  6984. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  6985. iwl4965_hw_setup_deferred_work(priv);
  6986. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6987. iwl4965_irq_tasklet, (unsigned long)priv);
  6988. }
  6989. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
  6990. {
  6991. iwl4965_hw_cancel_deferred_work(priv);
  6992. cancel_delayed_work_sync(&priv->init_alive_start);
  6993. cancel_delayed_work(&priv->scan_check);
  6994. cancel_delayed_work(&priv->alive_start);
  6995. cancel_delayed_work(&priv->post_associate);
  6996. cancel_work_sync(&priv->beacon_update);
  6997. }
  6998. static struct attribute *iwl4965_sysfs_entries[] = {
  6999. &dev_attr_antenna.attr,
  7000. &dev_attr_channels.attr,
  7001. &dev_attr_dump_errors.attr,
  7002. &dev_attr_dump_events.attr,
  7003. &dev_attr_flags.attr,
  7004. &dev_attr_filter_flags.attr,
  7005. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7006. &dev_attr_measurement.attr,
  7007. #endif
  7008. &dev_attr_power_level.attr,
  7009. &dev_attr_retry_rate.attr,
  7010. &dev_attr_rf_kill.attr,
  7011. &dev_attr_rs_window.attr,
  7012. &dev_attr_statistics.attr,
  7013. &dev_attr_status.attr,
  7014. &dev_attr_temperature.attr,
  7015. &dev_attr_tx_power.attr,
  7016. NULL
  7017. };
  7018. static struct attribute_group iwl4965_attribute_group = {
  7019. .name = NULL, /* put in device directory */
  7020. .attrs = iwl4965_sysfs_entries,
  7021. };
  7022. static struct ieee80211_ops iwl4965_hw_ops = {
  7023. .tx = iwl4965_mac_tx,
  7024. .start = iwl4965_mac_start,
  7025. .stop = iwl4965_mac_stop,
  7026. .add_interface = iwl4965_mac_add_interface,
  7027. .remove_interface = iwl4965_mac_remove_interface,
  7028. .config = iwl4965_mac_config,
  7029. .config_interface = iwl4965_mac_config_interface,
  7030. .configure_filter = iwl4965_configure_filter,
  7031. .set_key = iwl4965_mac_set_key,
  7032. .get_stats = iwl4965_mac_get_stats,
  7033. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7034. .conf_tx = iwl4965_mac_conf_tx,
  7035. .get_tsf = iwl4965_mac_get_tsf,
  7036. .reset_tsf = iwl4965_mac_reset_tsf,
  7037. .beacon_update = iwl4965_mac_beacon_update,
  7038. .bss_info_changed = iwl4965_bss_info_changed,
  7039. #ifdef CONFIG_IWL4965_HT
  7040. .conf_ht = iwl4965_mac_conf_ht,
  7041. .ampdu_action = iwl4965_mac_ampdu_action,
  7042. #endif /* CONFIG_IWL4965_HT */
  7043. .hw_scan = iwl4965_mac_hw_scan
  7044. };
  7045. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7046. {
  7047. int err = 0;
  7048. struct iwl_priv *priv;
  7049. struct ieee80211_hw *hw;
  7050. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  7051. int i;
  7052. DECLARE_MAC_BUF(mac);
  7053. /************************
  7054. * 1. Allocating HW data
  7055. ************************/
  7056. /* Disabling hardware scan means that mac80211 will perform scans
  7057. * "the hard way", rather than using device's scan. */
  7058. if (iwl4965_mod_params.disable_hw_scan) {
  7059. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7060. iwl4965_hw_ops.hw_scan = NULL;
  7061. }
  7062. /* mac80211 allocates memory for this device instance, including
  7063. * space for this driver's private structure */
  7064. hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl4965_hw_ops);
  7065. if (hw == NULL) {
  7066. IWL_ERROR("Can not allocate network device\n");
  7067. err = -ENOMEM;
  7068. goto out;
  7069. }
  7070. SET_IEEE80211_DEV(hw, &pdev->dev);
  7071. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7072. priv = hw->priv;
  7073. priv->hw = hw;
  7074. priv->cfg = cfg;
  7075. priv->pci_dev = pdev;
  7076. #ifdef CONFIG_IWLWIFI_DEBUG
  7077. iwl_debug_level = iwl4965_mod_params.debug;
  7078. atomic_set(&priv->restrict_refcnt, 0);
  7079. #endif
  7080. /**************************
  7081. * 2. Initializing PCI bus
  7082. **************************/
  7083. if (pci_enable_device(pdev)) {
  7084. err = -ENODEV;
  7085. goto out_ieee80211_free_hw;
  7086. }
  7087. pci_set_master(pdev);
  7088. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7089. if (!err)
  7090. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7091. if (err) {
  7092. printk(KERN_WARNING DRV_NAME
  7093. ": No suitable DMA available.\n");
  7094. goto out_pci_disable_device;
  7095. }
  7096. err = pci_request_regions(pdev, DRV_NAME);
  7097. if (err)
  7098. goto out_pci_disable_device;
  7099. pci_set_drvdata(pdev, priv);
  7100. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7101. * PCI Tx retries from interfering with C3 CPU state */
  7102. pci_write_config_byte(pdev, 0x41, 0x00);
  7103. /***********************
  7104. * 3. Read REV register
  7105. ***********************/
  7106. priv->hw_base = pci_iomap(pdev, 0, 0);
  7107. if (!priv->hw_base) {
  7108. err = -ENODEV;
  7109. goto out_pci_release_regions;
  7110. }
  7111. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7112. (unsigned long long) pci_resource_len(pdev, 0));
  7113. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7114. printk(KERN_INFO DRV_NAME
  7115. ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
  7116. /*****************
  7117. * 4. Read EEPROM
  7118. *****************/
  7119. /* nic init */
  7120. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  7121. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  7122. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  7123. err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  7124. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  7125. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  7126. if (err < 0) {
  7127. IWL_DEBUG_INFO("Failed to init the card\n");
  7128. goto out_iounmap;
  7129. }
  7130. /* Read the EEPROM */
  7131. err = iwl_eeprom_init(priv);
  7132. if (err) {
  7133. IWL_ERROR("Unable to init EEPROM\n");
  7134. goto out_iounmap;
  7135. }
  7136. /* MAC Address location in EEPROM same for 3945/4965 */
  7137. iwl_eeprom_get_mac(priv, priv->mac_addr);
  7138. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  7139. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  7140. /************************
  7141. * 5. Setup HW constants
  7142. ************************/
  7143. /* Device-specific setup */
  7144. if (iwl4965_hw_set_hw_setting(priv)) {
  7145. IWL_ERROR("failed to set hw settings\n");
  7146. goto out_iounmap;
  7147. }
  7148. /*******************
  7149. * 6. Setup hw/priv
  7150. *******************/
  7151. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7152. * the range of signal quality values that we'll provide.
  7153. * Negative values for level/noise indicate that we'll provide dBm.
  7154. * For WE, at least, non-0 values here *enable* display of values
  7155. * in app (iwconfig). */
  7156. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7157. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7158. hw->max_signal = 100; /* link quality indication (%) */
  7159. /* Tell mac80211 our Tx characteristics */
  7160. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7161. /* Default value; 4 EDCA QOS priorities */
  7162. hw->queues = 4;
  7163. #ifdef CONFIG_IWL4965_HT
  7164. /* Enhanced value; more queues, to support 11n aggregation */
  7165. hw->queues = 16;
  7166. #endif /* CONFIG_IWL4965_HT */
  7167. hw->rate_control_algorithm = "iwl-4965-rs";
  7168. priv->antenna = (enum iwl4965_antenna)iwl4965_mod_params.antenna;
  7169. priv->retry_rate = 1;
  7170. priv->ibss_beacon = NULL;
  7171. spin_lock_init(&priv->lock);
  7172. spin_lock_init(&priv->power_data.lock);
  7173. spin_lock_init(&priv->sta_lock);
  7174. spin_lock_init(&priv->hcmd_lock);
  7175. spin_lock_init(&priv->lq_mngr.lock);
  7176. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7177. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7178. INIT_LIST_HEAD(&priv->free_frames);
  7179. mutex_init(&priv->mutex);
  7180. /* Clear the driver's (not device's) station table */
  7181. iwl4965_clear_stations_table(priv);
  7182. priv->data_retry_limit = -1;
  7183. priv->ieee_channels = NULL;
  7184. priv->ieee_rates = NULL;
  7185. priv->band = IEEE80211_BAND_2GHZ;
  7186. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7187. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7188. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7189. priv->ps_mode = IWL_MIMO_PS_NONE;
  7190. /* Choose which receivers/antennas to use */
  7191. iwl4965_set_rxon_chain(priv);
  7192. iwl4965_reset_qos(priv);
  7193. priv->qos_data.qos_active = 0;
  7194. priv->qos_data.qos_cap.val = 0;
  7195. iwl4965_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  7196. priv->rates_mask = IWL_RATES_MASK;
  7197. /* If power management is turned on, default to AC mode */
  7198. priv->power_mode = IWL_POWER_AC;
  7199. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7200. err = iwl4965_init_channel_map(priv);
  7201. if (err) {
  7202. IWL_ERROR("initializing regulatory failed: %d\n", err);
  7203. goto out_unset_hw_settings;
  7204. }
  7205. err = iwl4965_init_geos(priv);
  7206. if (err) {
  7207. IWL_ERROR("initializing geos failed: %d\n", err);
  7208. goto out_free_channel_map;
  7209. }
  7210. iwl4965_rate_control_register(priv->hw);
  7211. err = ieee80211_register_hw(priv->hw);
  7212. if (err) {
  7213. IWL_ERROR("Failed to register network device (error %d)\n", err);
  7214. goto out_free_geos;
  7215. }
  7216. priv->hw->conf.beacon_int = 100;
  7217. priv->mac80211_registered = 1;
  7218. /**********************************
  7219. * 7. Initialize module parameters
  7220. **********************************/
  7221. /* Disable radio (SW RF KILL) via parameter when loading driver */
  7222. if (iwl4965_mod_params.disable) {
  7223. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7224. IWL_DEBUG_INFO("Radio disabled.\n");
  7225. }
  7226. if (iwl4965_mod_params.enable_qos)
  7227. priv->qos_data.qos_enable = 1;
  7228. /********************
  7229. * 8. Setup services
  7230. ********************/
  7231. iwl4965_disable_interrupts(priv);
  7232. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7233. if (err) {
  7234. IWL_ERROR("failed to create sysfs device attributes\n");
  7235. goto out_free_geos;
  7236. }
  7237. err = iwl_dbgfs_register(priv, DRV_NAME);
  7238. if (err) {
  7239. IWL_ERROR("failed to create debugfs files\n");
  7240. goto out_remove_sysfs;
  7241. }
  7242. iwl4965_setup_deferred_work(priv);
  7243. iwl4965_setup_rx_handlers(priv);
  7244. /********************
  7245. * 9. Conclude
  7246. ********************/
  7247. pci_save_state(pdev);
  7248. pci_disable_device(pdev);
  7249. return 0;
  7250. out_remove_sysfs:
  7251. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7252. out_free_geos:
  7253. iwl4965_free_geos(priv);
  7254. out_free_channel_map:
  7255. iwl4965_free_channel_map(priv);
  7256. out_unset_hw_settings:
  7257. iwl4965_unset_hw_setting(priv);
  7258. out_iounmap:
  7259. pci_iounmap(pdev, priv->hw_base);
  7260. out_pci_release_regions:
  7261. pci_release_regions(pdev);
  7262. pci_set_drvdata(pdev, NULL);
  7263. out_pci_disable_device:
  7264. pci_disable_device(pdev);
  7265. out_ieee80211_free_hw:
  7266. ieee80211_free_hw(priv->hw);
  7267. out:
  7268. return err;
  7269. }
  7270. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7271. {
  7272. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7273. struct list_head *p, *q;
  7274. int i;
  7275. if (!priv)
  7276. return;
  7277. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7278. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7279. iwl4965_down(priv);
  7280. /* Free MAC hash list for ADHOC */
  7281. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7282. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7283. list_del(p);
  7284. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7285. }
  7286. }
  7287. iwl_dbgfs_unregister(priv);
  7288. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7289. iwl4965_dealloc_ucode_pci(priv);
  7290. if (priv->rxq.bd)
  7291. iwl4965_rx_queue_free(priv, &priv->rxq);
  7292. iwl4965_hw_txq_ctx_free(priv);
  7293. iwl4965_unset_hw_setting(priv);
  7294. iwl4965_clear_stations_table(priv);
  7295. if (priv->mac80211_registered) {
  7296. ieee80211_unregister_hw(priv->hw);
  7297. iwl4965_rate_control_unregister(priv->hw);
  7298. }
  7299. /*netif_stop_queue(dev); */
  7300. flush_workqueue(priv->workqueue);
  7301. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7302. * priv->workqueue... so we can't take down the workqueue
  7303. * until now... */
  7304. destroy_workqueue(priv->workqueue);
  7305. priv->workqueue = NULL;
  7306. pci_iounmap(pdev, priv->hw_base);
  7307. pci_release_regions(pdev);
  7308. pci_disable_device(pdev);
  7309. pci_set_drvdata(pdev, NULL);
  7310. iwl4965_free_channel_map(priv);
  7311. iwl4965_free_geos(priv);
  7312. if (priv->ibss_beacon)
  7313. dev_kfree_skb(priv->ibss_beacon);
  7314. ieee80211_free_hw(priv->hw);
  7315. }
  7316. #ifdef CONFIG_PM
  7317. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7318. {
  7319. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7320. if (priv->is_open) {
  7321. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7322. iwl4965_mac_stop(priv->hw);
  7323. priv->is_open = 1;
  7324. }
  7325. pci_set_power_state(pdev, PCI_D3hot);
  7326. return 0;
  7327. }
  7328. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7329. {
  7330. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7331. pci_set_power_state(pdev, PCI_D0);
  7332. if (priv->is_open)
  7333. iwl4965_mac_start(priv->hw);
  7334. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7335. return 0;
  7336. }
  7337. #endif /* CONFIG_PM */
  7338. /*****************************************************************************
  7339. *
  7340. * driver and module entry point
  7341. *
  7342. *****************************************************************************/
  7343. static struct pci_driver iwl4965_driver = {
  7344. .name = DRV_NAME,
  7345. .id_table = iwl4965_hw_card_ids,
  7346. .probe = iwl4965_pci_probe,
  7347. .remove = __devexit_p(iwl4965_pci_remove),
  7348. #ifdef CONFIG_PM
  7349. .suspend = iwl4965_pci_suspend,
  7350. .resume = iwl4965_pci_resume,
  7351. #endif
  7352. };
  7353. static int __init iwl4965_init(void)
  7354. {
  7355. int ret;
  7356. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7357. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7358. ret = pci_register_driver(&iwl4965_driver);
  7359. if (ret) {
  7360. IWL_ERROR("Unable to initialize PCI module\n");
  7361. return ret;
  7362. }
  7363. #ifdef CONFIG_IWLWIFI_DEBUG
  7364. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7365. if (ret) {
  7366. IWL_ERROR("Unable to create driver sysfs file\n");
  7367. pci_unregister_driver(&iwl4965_driver);
  7368. return ret;
  7369. }
  7370. #endif
  7371. return ret;
  7372. }
  7373. static void __exit iwl4965_exit(void)
  7374. {
  7375. #ifdef CONFIG_IWLWIFI_DEBUG
  7376. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7377. #endif
  7378. pci_unregister_driver(&iwl4965_driver);
  7379. }
  7380. module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
  7381. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7382. module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
  7383. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7384. module_param_named(hwcrypto, iwl4965_mod_params.hw_crypto, int, 0444);
  7385. MODULE_PARM_DESC(hwcrypto,
  7386. "using hardware crypto engine (default 0 [software])\n");
  7387. module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
  7388. MODULE_PARM_DESC(debug, "debug output mask");
  7389. module_param_named(
  7390. disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
  7391. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7392. module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
  7393. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7394. /* QoS */
  7395. module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
  7396. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7397. module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
  7398. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  7399. module_exit(iwl4965_exit);
  7400. module_init(iwl4965_init);