cm4040_cs.c 16 KB

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  1. /*
  2. * A driver for the Omnikey PCMCIA smartcard reader CardMan 4040
  3. *
  4. * (c) 2000-2004 Omnikey AG (http://www.omnikey.com/)
  5. *
  6. * (C) 2005-2006 Harald Welte <laforge@gnumonks.org>
  7. * - add support for poll()
  8. * - driver cleanup
  9. * - add waitqueues
  10. * - adhere to linux kernel coding style and policies
  11. * - support 2.6.13 "new style" pcmcia interface
  12. * - add class interface for udev device creation
  13. *
  14. * The device basically is a USB CCID compliant device that has been
  15. * attached to an I/O-Mapped FIFO.
  16. *
  17. * All rights reserved, Dual BSD/GPL Licensed.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/slab.h>
  22. #include <linux/init.h>
  23. #include <linux/fs.h>
  24. #include <linux/delay.h>
  25. #include <linux/poll.h>
  26. #include <linux/smp_lock.h>
  27. #include <linux/wait.h>
  28. #include <asm/uaccess.h>
  29. #include <asm/io.h>
  30. #include <pcmcia/cistpl.h>
  31. #include <pcmcia/cisreg.h>
  32. #include <pcmcia/ciscode.h>
  33. #include <pcmcia/ds.h>
  34. #include "cm4040_cs.h"
  35. #define reader_to_dev(x) (&x->p_dev->dev)
  36. /* n (debug level) is ignored */
  37. /* additional debug output may be enabled by re-compiling with
  38. * CM4040_DEBUG set */
  39. /* #define CM4040_DEBUG */
  40. #define DEBUGP(n, rdr, x, args...) do { \
  41. dev_dbg(reader_to_dev(rdr), "%s:" x, \
  42. __func__ , ## args); \
  43. } while (0)
  44. static char *version =
  45. "OMNIKEY CardMan 4040 v1.1.0gm5 - All bugs added by Harald Welte";
  46. #define CCID_DRIVER_BULK_DEFAULT_TIMEOUT (150*HZ)
  47. #define CCID_DRIVER_ASYNC_POWERUP_TIMEOUT (35*HZ)
  48. #define CCID_DRIVER_MINIMUM_TIMEOUT (3*HZ)
  49. #define READ_WRITE_BUFFER_SIZE 512
  50. #define POLL_LOOP_COUNT 1000
  51. /* how often to poll for fifo status change */
  52. #define POLL_PERIOD msecs_to_jiffies(10)
  53. static void reader_release(struct pcmcia_device *link);
  54. static int major;
  55. static struct class *cmx_class;
  56. #define BS_READABLE 0x01
  57. #define BS_WRITABLE 0x02
  58. struct reader_dev {
  59. struct pcmcia_device *p_dev;
  60. wait_queue_head_t devq;
  61. wait_queue_head_t poll_wait;
  62. wait_queue_head_t read_wait;
  63. wait_queue_head_t write_wait;
  64. unsigned long buffer_status;
  65. unsigned long timeout;
  66. unsigned char s_buf[READ_WRITE_BUFFER_SIZE];
  67. unsigned char r_buf[READ_WRITE_BUFFER_SIZE];
  68. struct timer_list poll_timer;
  69. };
  70. static struct pcmcia_device *dev_table[CM_MAX_DEV];
  71. #ifndef CM4040_DEBUG
  72. #define xoutb outb
  73. #define xinb inb
  74. #else
  75. static inline void xoutb(unsigned char val, unsigned short port)
  76. {
  77. pr_debug("outb(val=%.2x,port=%.4x)\n", val, port);
  78. outb(val, port);
  79. }
  80. static inline unsigned char xinb(unsigned short port)
  81. {
  82. unsigned char val;
  83. val = inb(port);
  84. pr_debug("%.2x=inb(%.4x)\n", val, port);
  85. return val;
  86. }
  87. #endif
  88. /* poll the device fifo status register. not to be confused with
  89. * the poll syscall. */
  90. static void cm4040_do_poll(unsigned long dummy)
  91. {
  92. struct reader_dev *dev = (struct reader_dev *) dummy;
  93. unsigned int obs = xinb(dev->p_dev->resource[0]->start
  94. + REG_OFFSET_BUFFER_STATUS);
  95. if ((obs & BSR_BULK_IN_FULL)) {
  96. set_bit(BS_READABLE, &dev->buffer_status);
  97. DEBUGP(4, dev, "waking up read_wait\n");
  98. wake_up_interruptible(&dev->read_wait);
  99. } else
  100. clear_bit(BS_READABLE, &dev->buffer_status);
  101. if (!(obs & BSR_BULK_OUT_FULL)) {
  102. set_bit(BS_WRITABLE, &dev->buffer_status);
  103. DEBUGP(4, dev, "waking up write_wait\n");
  104. wake_up_interruptible(&dev->write_wait);
  105. } else
  106. clear_bit(BS_WRITABLE, &dev->buffer_status);
  107. if (dev->buffer_status)
  108. wake_up_interruptible(&dev->poll_wait);
  109. mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD);
  110. }
  111. static void cm4040_stop_poll(struct reader_dev *dev)
  112. {
  113. del_timer_sync(&dev->poll_timer);
  114. }
  115. static int wait_for_bulk_out_ready(struct reader_dev *dev)
  116. {
  117. int i, rc;
  118. int iobase = dev->p_dev->resource[0]->start;
  119. for (i = 0; i < POLL_LOOP_COUNT; i++) {
  120. if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
  121. & BSR_BULK_OUT_FULL) == 0) {
  122. DEBUGP(4, dev, "BulkOut empty (i=%d)\n", i);
  123. return 1;
  124. }
  125. }
  126. DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n",
  127. dev->timeout);
  128. rc = wait_event_interruptible_timeout(dev->write_wait,
  129. test_and_clear_bit(BS_WRITABLE,
  130. &dev->buffer_status),
  131. dev->timeout);
  132. if (rc > 0)
  133. DEBUGP(4, dev, "woke up: BulkOut empty\n");
  134. else if (rc == 0)
  135. DEBUGP(4, dev, "woke up: BulkOut full, returning 0 :(\n");
  136. else if (rc < 0)
  137. DEBUGP(4, dev, "woke up: signal arrived\n");
  138. return rc;
  139. }
  140. /* Write to Sync Control Register */
  141. static int write_sync_reg(unsigned char val, struct reader_dev *dev)
  142. {
  143. int iobase = dev->p_dev->resource[0]->start;
  144. int rc;
  145. rc = wait_for_bulk_out_ready(dev);
  146. if (rc <= 0)
  147. return rc;
  148. xoutb(val, iobase + REG_OFFSET_SYNC_CONTROL);
  149. rc = wait_for_bulk_out_ready(dev);
  150. if (rc <= 0)
  151. return rc;
  152. return 1;
  153. }
  154. static int wait_for_bulk_in_ready(struct reader_dev *dev)
  155. {
  156. int i, rc;
  157. int iobase = dev->p_dev->resource[0]->start;
  158. for (i = 0; i < POLL_LOOP_COUNT; i++) {
  159. if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
  160. & BSR_BULK_IN_FULL) == BSR_BULK_IN_FULL) {
  161. DEBUGP(3, dev, "BulkIn full (i=%d)\n", i);
  162. return 1;
  163. }
  164. }
  165. DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n",
  166. dev->timeout);
  167. rc = wait_event_interruptible_timeout(dev->read_wait,
  168. test_and_clear_bit(BS_READABLE,
  169. &dev->buffer_status),
  170. dev->timeout);
  171. if (rc > 0)
  172. DEBUGP(4, dev, "woke up: BulkIn full\n");
  173. else if (rc == 0)
  174. DEBUGP(4, dev, "woke up: BulkIn not full, returning 0 :(\n");
  175. else if (rc < 0)
  176. DEBUGP(4, dev, "woke up: signal arrived\n");
  177. return rc;
  178. }
  179. static ssize_t cm4040_read(struct file *filp, char __user *buf,
  180. size_t count, loff_t *ppos)
  181. {
  182. struct reader_dev *dev = filp->private_data;
  183. int iobase = dev->p_dev->resource[0]->start;
  184. size_t bytes_to_read;
  185. unsigned long i;
  186. size_t min_bytes_to_read;
  187. int rc;
  188. unsigned char uc;
  189. DEBUGP(2, dev, "-> cm4040_read(%s,%d)\n", current->comm, current->pid);
  190. if (count == 0)
  191. return 0;
  192. if (count < 10)
  193. return -EFAULT;
  194. if (filp->f_flags & O_NONBLOCK) {
  195. DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
  196. DEBUGP(2, dev, "<- cm4040_read (failure)\n");
  197. return -EAGAIN;
  198. }
  199. if (!pcmcia_dev_present(dev->p_dev))
  200. return -ENODEV;
  201. for (i = 0; i < 5; i++) {
  202. rc = wait_for_bulk_in_ready(dev);
  203. if (rc <= 0) {
  204. DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
  205. DEBUGP(2, dev, "<- cm4040_read (failed)\n");
  206. if (rc == -ERESTARTSYS)
  207. return rc;
  208. return -EIO;
  209. }
  210. dev->r_buf[i] = xinb(iobase + REG_OFFSET_BULK_IN);
  211. #ifdef CM4040_DEBUG
  212. pr_debug("%lu:%2x ", i, dev->r_buf[i]);
  213. }
  214. pr_debug("\n");
  215. #else
  216. }
  217. #endif
  218. bytes_to_read = 5 + le32_to_cpu(*(__le32 *)&dev->r_buf[1]);
  219. DEBUGP(6, dev, "BytesToRead=%zu\n", bytes_to_read);
  220. min_bytes_to_read = min(count, bytes_to_read + 5);
  221. min_bytes_to_read = min_t(size_t, min_bytes_to_read, READ_WRITE_BUFFER_SIZE);
  222. DEBUGP(6, dev, "Min=%zu\n", min_bytes_to_read);
  223. for (i = 0; i < (min_bytes_to_read-5); i++) {
  224. rc = wait_for_bulk_in_ready(dev);
  225. if (rc <= 0) {
  226. DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
  227. DEBUGP(2, dev, "<- cm4040_read (failed)\n");
  228. if (rc == -ERESTARTSYS)
  229. return rc;
  230. return -EIO;
  231. }
  232. dev->r_buf[i+5] = xinb(iobase + REG_OFFSET_BULK_IN);
  233. #ifdef CM4040_DEBUG
  234. pr_debug("%lu:%2x ", i, dev->r_buf[i]);
  235. }
  236. pr_debug("\n");
  237. #else
  238. }
  239. #endif
  240. *ppos = min_bytes_to_read;
  241. if (copy_to_user(buf, dev->r_buf, min_bytes_to_read))
  242. return -EFAULT;
  243. rc = wait_for_bulk_in_ready(dev);
  244. if (rc <= 0) {
  245. DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
  246. DEBUGP(2, dev, "<- cm4040_read (failed)\n");
  247. if (rc == -ERESTARTSYS)
  248. return rc;
  249. return -EIO;
  250. }
  251. rc = write_sync_reg(SCR_READER_TO_HOST_DONE, dev);
  252. if (rc <= 0) {
  253. DEBUGP(5, dev, "write_sync_reg c=%.2x\n", rc);
  254. DEBUGP(2, dev, "<- cm4040_read (failed)\n");
  255. if (rc == -ERESTARTSYS)
  256. return rc;
  257. else
  258. return -EIO;
  259. }
  260. uc = xinb(iobase + REG_OFFSET_BULK_IN);
  261. DEBUGP(2, dev, "<- cm4040_read (successfully)\n");
  262. return min_bytes_to_read;
  263. }
  264. static ssize_t cm4040_write(struct file *filp, const char __user *buf,
  265. size_t count, loff_t *ppos)
  266. {
  267. struct reader_dev *dev = filp->private_data;
  268. int iobase = dev->p_dev->resource[0]->start;
  269. ssize_t rc;
  270. int i;
  271. unsigned int bytes_to_write;
  272. DEBUGP(2, dev, "-> cm4040_write(%s,%d)\n", current->comm, current->pid);
  273. if (count == 0) {
  274. DEBUGP(2, dev, "<- cm4040_write empty read (successfully)\n");
  275. return 0;
  276. }
  277. if ((count < 5) || (count > READ_WRITE_BUFFER_SIZE)) {
  278. DEBUGP(2, dev, "<- cm4040_write buffersize=%Zd < 5\n", count);
  279. return -EIO;
  280. }
  281. if (filp->f_flags & O_NONBLOCK) {
  282. DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
  283. DEBUGP(4, dev, "<- cm4040_write (failure)\n");
  284. return -EAGAIN;
  285. }
  286. if (!pcmcia_dev_present(dev->p_dev))
  287. return -ENODEV;
  288. bytes_to_write = count;
  289. if (copy_from_user(dev->s_buf, buf, bytes_to_write))
  290. return -EFAULT;
  291. switch (dev->s_buf[0]) {
  292. case CMD_PC_TO_RDR_XFRBLOCK:
  293. case CMD_PC_TO_RDR_SECURE:
  294. case CMD_PC_TO_RDR_TEST_SECURE:
  295. case CMD_PC_TO_RDR_OK_SECURE:
  296. dev->timeout = CCID_DRIVER_BULK_DEFAULT_TIMEOUT;
  297. break;
  298. case CMD_PC_TO_RDR_ICCPOWERON:
  299. dev->timeout = CCID_DRIVER_ASYNC_POWERUP_TIMEOUT;
  300. break;
  301. case CMD_PC_TO_RDR_GETSLOTSTATUS:
  302. case CMD_PC_TO_RDR_ICCPOWEROFF:
  303. case CMD_PC_TO_RDR_GETPARAMETERS:
  304. case CMD_PC_TO_RDR_RESETPARAMETERS:
  305. case CMD_PC_TO_RDR_SETPARAMETERS:
  306. case CMD_PC_TO_RDR_ESCAPE:
  307. case CMD_PC_TO_RDR_ICCCLOCK:
  308. default:
  309. dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT;
  310. break;
  311. }
  312. rc = write_sync_reg(SCR_HOST_TO_READER_START, dev);
  313. if (rc <= 0) {
  314. DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc);
  315. DEBUGP(2, dev, "<- cm4040_write (failed)\n");
  316. if (rc == -ERESTARTSYS)
  317. return rc;
  318. else
  319. return -EIO;
  320. }
  321. DEBUGP(4, dev, "start \n");
  322. for (i = 0; i < bytes_to_write; i++) {
  323. rc = wait_for_bulk_out_ready(dev);
  324. if (rc <= 0) {
  325. DEBUGP(5, dev, "wait_for_bulk_out_ready rc=%.2Zx\n",
  326. rc);
  327. DEBUGP(2, dev, "<- cm4040_write (failed)\n");
  328. if (rc == -ERESTARTSYS)
  329. return rc;
  330. else
  331. return -EIO;
  332. }
  333. xoutb(dev->s_buf[i],iobase + REG_OFFSET_BULK_OUT);
  334. }
  335. DEBUGP(4, dev, "end\n");
  336. rc = write_sync_reg(SCR_HOST_TO_READER_DONE, dev);
  337. if (rc <= 0) {
  338. DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc);
  339. DEBUGP(2, dev, "<- cm4040_write (failed)\n");
  340. if (rc == -ERESTARTSYS)
  341. return rc;
  342. else
  343. return -EIO;
  344. }
  345. DEBUGP(2, dev, "<- cm4040_write (successfully)\n");
  346. return count;
  347. }
  348. static unsigned int cm4040_poll(struct file *filp, poll_table *wait)
  349. {
  350. struct reader_dev *dev = filp->private_data;
  351. unsigned int mask = 0;
  352. poll_wait(filp, &dev->poll_wait, wait);
  353. if (test_and_clear_bit(BS_READABLE, &dev->buffer_status))
  354. mask |= POLLIN | POLLRDNORM;
  355. if (test_and_clear_bit(BS_WRITABLE, &dev->buffer_status))
  356. mask |= POLLOUT | POLLWRNORM;
  357. DEBUGP(2, dev, "<- cm4040_poll(%u)\n", mask);
  358. return mask;
  359. }
  360. static int cm4040_open(struct inode *inode, struct file *filp)
  361. {
  362. struct reader_dev *dev;
  363. struct pcmcia_device *link;
  364. int minor = iminor(inode);
  365. int ret;
  366. if (minor >= CM_MAX_DEV)
  367. return -ENODEV;
  368. lock_kernel();
  369. link = dev_table[minor];
  370. if (link == NULL || !pcmcia_dev_present(link)) {
  371. ret = -ENODEV;
  372. goto out;
  373. }
  374. if (link->open) {
  375. ret = -EBUSY;
  376. goto out;
  377. }
  378. dev = link->priv;
  379. filp->private_data = dev;
  380. if (filp->f_flags & O_NONBLOCK) {
  381. DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
  382. ret = -EAGAIN;
  383. goto out;
  384. }
  385. link->open = 1;
  386. dev->poll_timer.data = (unsigned long) dev;
  387. mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD);
  388. DEBUGP(2, dev, "<- cm4040_open (successfully)\n");
  389. ret = nonseekable_open(inode, filp);
  390. out:
  391. unlock_kernel();
  392. return ret;
  393. }
  394. static int cm4040_close(struct inode *inode, struct file *filp)
  395. {
  396. struct reader_dev *dev = filp->private_data;
  397. struct pcmcia_device *link;
  398. int minor = iminor(inode);
  399. DEBUGP(2, dev, "-> cm4040_close(maj/min=%d.%d)\n", imajor(inode),
  400. iminor(inode));
  401. if (minor >= CM_MAX_DEV)
  402. return -ENODEV;
  403. link = dev_table[minor];
  404. if (link == NULL)
  405. return -ENODEV;
  406. cm4040_stop_poll(dev);
  407. link->open = 0;
  408. wake_up(&dev->devq);
  409. DEBUGP(2, dev, "<- cm4040_close\n");
  410. return 0;
  411. }
  412. static void cm4040_reader_release(struct pcmcia_device *link)
  413. {
  414. struct reader_dev *dev = link->priv;
  415. DEBUGP(3, dev, "-> cm4040_reader_release\n");
  416. while (link->open) {
  417. DEBUGP(3, dev, KERN_INFO MODULE_NAME ": delaying release "
  418. "until process has terminated\n");
  419. wait_event(dev->devq, (link->open == 0));
  420. }
  421. DEBUGP(3, dev, "<- cm4040_reader_release\n");
  422. return;
  423. }
  424. static int cm4040_config_check(struct pcmcia_device *p_dev, void *priv_data)
  425. {
  426. return pcmcia_request_io(p_dev);
  427. }
  428. static int reader_config(struct pcmcia_device *link, int devno)
  429. {
  430. struct reader_dev *dev;
  431. int fail_rc;
  432. link->config_flags |= CONF_AUTO_SET_IO;
  433. if (pcmcia_loop_config(link, cm4040_config_check, NULL))
  434. goto cs_release;
  435. fail_rc = pcmcia_enable_device(link);
  436. if (fail_rc != 0) {
  437. dev_printk(KERN_INFO, &link->dev,
  438. "pcmcia_enable_device failed 0x%x\n",
  439. fail_rc);
  440. goto cs_release;
  441. }
  442. dev = link->priv;
  443. DEBUGP(2, dev, "device " DEVICE_NAME "%d at %pR\n", devno,
  444. link->resource[0]);
  445. DEBUGP(2, dev, "<- reader_config (succ)\n");
  446. return 0;
  447. cs_release:
  448. reader_release(link);
  449. return -ENODEV;
  450. }
  451. static void reader_release(struct pcmcia_device *link)
  452. {
  453. cm4040_reader_release(link);
  454. pcmcia_disable_device(link);
  455. }
  456. static int reader_probe(struct pcmcia_device *link)
  457. {
  458. struct reader_dev *dev;
  459. int i, ret;
  460. for (i = 0; i < CM_MAX_DEV; i++) {
  461. if (dev_table[i] == NULL)
  462. break;
  463. }
  464. if (i == CM_MAX_DEV)
  465. return -ENODEV;
  466. dev = kzalloc(sizeof(struct reader_dev), GFP_KERNEL);
  467. if (dev == NULL)
  468. return -ENOMEM;
  469. dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT;
  470. dev->buffer_status = 0;
  471. link->priv = dev;
  472. dev->p_dev = link;
  473. dev_table[i] = link;
  474. init_waitqueue_head(&dev->devq);
  475. init_waitqueue_head(&dev->poll_wait);
  476. init_waitqueue_head(&dev->read_wait);
  477. init_waitqueue_head(&dev->write_wait);
  478. setup_timer(&dev->poll_timer, cm4040_do_poll, 0);
  479. ret = reader_config(link, i);
  480. if (ret) {
  481. dev_table[i] = NULL;
  482. kfree(dev);
  483. return ret;
  484. }
  485. device_create(cmx_class, NULL, MKDEV(major, i), NULL, "cmx%d", i);
  486. return 0;
  487. }
  488. static void reader_detach(struct pcmcia_device *link)
  489. {
  490. struct reader_dev *dev = link->priv;
  491. int devno;
  492. /* find device */
  493. for (devno = 0; devno < CM_MAX_DEV; devno++) {
  494. if (dev_table[devno] == link)
  495. break;
  496. }
  497. if (devno == CM_MAX_DEV)
  498. return;
  499. reader_release(link);
  500. dev_table[devno] = NULL;
  501. kfree(dev);
  502. device_destroy(cmx_class, MKDEV(major, devno));
  503. return;
  504. }
  505. static const struct file_operations reader_fops = {
  506. .owner = THIS_MODULE,
  507. .read = cm4040_read,
  508. .write = cm4040_write,
  509. .open = cm4040_open,
  510. .release = cm4040_close,
  511. .poll = cm4040_poll,
  512. };
  513. static struct pcmcia_device_id cm4040_ids[] = {
  514. PCMCIA_DEVICE_MANF_CARD(0x0223, 0x0200),
  515. PCMCIA_DEVICE_PROD_ID12("OMNIKEY", "CardMan 4040",
  516. 0xE32CDD8C, 0x8F23318B),
  517. PCMCIA_DEVICE_NULL,
  518. };
  519. MODULE_DEVICE_TABLE(pcmcia, cm4040_ids);
  520. static struct pcmcia_driver reader_driver = {
  521. .owner = THIS_MODULE,
  522. .drv = {
  523. .name = "cm4040_cs",
  524. },
  525. .probe = reader_probe,
  526. .remove = reader_detach,
  527. .id_table = cm4040_ids,
  528. };
  529. static int __init cm4040_init(void)
  530. {
  531. int rc;
  532. printk(KERN_INFO "%s\n", version);
  533. cmx_class = class_create(THIS_MODULE, "cardman_4040");
  534. if (IS_ERR(cmx_class))
  535. return PTR_ERR(cmx_class);
  536. major = register_chrdev(0, DEVICE_NAME, &reader_fops);
  537. if (major < 0) {
  538. printk(KERN_WARNING MODULE_NAME
  539. ": could not get major number\n");
  540. class_destroy(cmx_class);
  541. return major;
  542. }
  543. rc = pcmcia_register_driver(&reader_driver);
  544. if (rc < 0) {
  545. unregister_chrdev(major, DEVICE_NAME);
  546. class_destroy(cmx_class);
  547. return rc;
  548. }
  549. return 0;
  550. }
  551. static void __exit cm4040_exit(void)
  552. {
  553. printk(KERN_INFO MODULE_NAME ": unloading\n");
  554. pcmcia_unregister_driver(&reader_driver);
  555. unregister_chrdev(major, DEVICE_NAME);
  556. class_destroy(cmx_class);
  557. }
  558. module_init(cm4040_init);
  559. module_exit(cm4040_exit);
  560. MODULE_LICENSE("Dual BSD/GPL");