uartlite.c 12 KB

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  1. /*
  2. * uartlite.c: Serial driver for Xilinx uartlite serial controller
  3. *
  4. * Peter Korsgaard <jacmet@sunsite.dk>
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. #include <linux/platform_device.h>
  11. #include <linux/module.h>
  12. #include <linux/console.h>
  13. #include <linux/serial.h>
  14. #include <linux/serial_core.h>
  15. #include <linux/tty.h>
  16. #include <linux/delay.h>
  17. #include <linux/interrupt.h>
  18. #include <asm/io.h>
  19. #define ULITE_NAME "ttyUL"
  20. #define ULITE_MAJOR 204
  21. #define ULITE_MINOR 187
  22. #define ULITE_NR_UARTS 4
  23. /* For register details see datasheet:
  24. http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_uartlite.pdf
  25. */
  26. #define ULITE_RX 0x00
  27. #define ULITE_TX 0x04
  28. #define ULITE_STATUS 0x08
  29. #define ULITE_CONTROL 0x0c
  30. #define ULITE_REGION 16
  31. #define ULITE_STATUS_RXVALID 0x01
  32. #define ULITE_STATUS_RXFULL 0x02
  33. #define ULITE_STATUS_TXEMPTY 0x04
  34. #define ULITE_STATUS_TXFULL 0x08
  35. #define ULITE_STATUS_IE 0x10
  36. #define ULITE_STATUS_OVERRUN 0x20
  37. #define ULITE_STATUS_FRAME 0x40
  38. #define ULITE_STATUS_PARITY 0x80
  39. #define ULITE_CONTROL_RST_TX 0x01
  40. #define ULITE_CONTROL_RST_RX 0x02
  41. #define ULITE_CONTROL_IE 0x10
  42. static struct uart_port ulite_ports[ULITE_NR_UARTS];
  43. static int ulite_receive(struct uart_port *port, int stat)
  44. {
  45. struct tty_struct *tty = port->info->tty;
  46. unsigned char ch = 0;
  47. char flag = TTY_NORMAL;
  48. if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
  49. | ULITE_STATUS_FRAME)) == 0)
  50. return 0;
  51. /* stats */
  52. if (stat & ULITE_STATUS_RXVALID) {
  53. port->icount.rx++;
  54. ch = in_be32((void*)port->membase + ULITE_RX);
  55. if (stat & ULITE_STATUS_PARITY)
  56. port->icount.parity++;
  57. }
  58. if (stat & ULITE_STATUS_OVERRUN)
  59. port->icount.overrun++;
  60. if (stat & ULITE_STATUS_FRAME)
  61. port->icount.frame++;
  62. /* drop byte with parity error if IGNPAR specificed */
  63. if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
  64. stat &= ~ULITE_STATUS_RXVALID;
  65. stat &= port->read_status_mask;
  66. if (stat & ULITE_STATUS_PARITY)
  67. flag = TTY_PARITY;
  68. stat &= ~port->ignore_status_mask;
  69. if (stat & ULITE_STATUS_RXVALID)
  70. tty_insert_flip_char(tty, ch, flag);
  71. if (stat & ULITE_STATUS_FRAME)
  72. tty_insert_flip_char(tty, 0, TTY_FRAME);
  73. if (stat & ULITE_STATUS_OVERRUN)
  74. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  75. return 1;
  76. }
  77. static int ulite_transmit(struct uart_port *port, int stat)
  78. {
  79. struct circ_buf *xmit = &port->info->xmit;
  80. if (stat & ULITE_STATUS_TXFULL)
  81. return 0;
  82. if (port->x_char) {
  83. out_be32((void*)port->membase + ULITE_TX, port->x_char);
  84. port->x_char = 0;
  85. port->icount.tx++;
  86. return 1;
  87. }
  88. if (uart_circ_empty(xmit) || uart_tx_stopped(port))
  89. return 0;
  90. out_be32((void*)port->membase + ULITE_TX, xmit->buf[xmit->tail]);
  91. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
  92. port->icount.tx++;
  93. /* wake up */
  94. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  95. uart_write_wakeup(port);
  96. return 1;
  97. }
  98. static irqreturn_t ulite_isr(int irq, void *dev_id)
  99. {
  100. struct uart_port *port = (struct uart_port *)dev_id;
  101. int busy;
  102. do {
  103. int stat = in_be32((void*)port->membase + ULITE_STATUS);
  104. busy = ulite_receive(port, stat);
  105. busy |= ulite_transmit(port, stat);
  106. } while (busy);
  107. tty_flip_buffer_push(port->info->tty);
  108. return IRQ_HANDLED;
  109. }
  110. static unsigned int ulite_tx_empty(struct uart_port *port)
  111. {
  112. unsigned long flags;
  113. unsigned int ret;
  114. spin_lock_irqsave(&port->lock, flags);
  115. ret = in_be32((void*)port->membase + ULITE_STATUS);
  116. spin_unlock_irqrestore(&port->lock, flags);
  117. return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
  118. }
  119. static unsigned int ulite_get_mctrl(struct uart_port *port)
  120. {
  121. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  122. }
  123. static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
  124. {
  125. /* N/A */
  126. }
  127. static void ulite_stop_tx(struct uart_port *port)
  128. {
  129. /* N/A */
  130. }
  131. static void ulite_start_tx(struct uart_port *port)
  132. {
  133. ulite_transmit(port, in_be32((void*)port->membase + ULITE_STATUS));
  134. }
  135. static void ulite_stop_rx(struct uart_port *port)
  136. {
  137. /* don't forward any more data (like !CREAD) */
  138. port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
  139. | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
  140. }
  141. static void ulite_enable_ms(struct uart_port *port)
  142. {
  143. /* N/A */
  144. }
  145. static void ulite_break_ctl(struct uart_port *port, int ctl)
  146. {
  147. /* N/A */
  148. }
  149. static int ulite_startup(struct uart_port *port)
  150. {
  151. int ret;
  152. ret = request_irq(port->irq, ulite_isr,
  153. IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "uartlite", port);
  154. if (ret)
  155. return ret;
  156. out_be32((void*)port->membase + ULITE_CONTROL,
  157. ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
  158. out_be32((void*)port->membase + ULITE_CONTROL, ULITE_CONTROL_IE);
  159. return 0;
  160. }
  161. static void ulite_shutdown(struct uart_port *port)
  162. {
  163. out_be32((void*)port->membase + ULITE_CONTROL, 0);
  164. in_be32((void*)port->membase + ULITE_CONTROL); /* dummy */
  165. free_irq(port->irq, port);
  166. }
  167. static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
  168. struct ktermios *old)
  169. {
  170. unsigned long flags;
  171. unsigned int baud;
  172. spin_lock_irqsave(&port->lock, flags);
  173. port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
  174. | ULITE_STATUS_TXFULL;
  175. if (termios->c_iflag & INPCK)
  176. port->read_status_mask |=
  177. ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
  178. port->ignore_status_mask = 0;
  179. if (termios->c_iflag & IGNPAR)
  180. port->ignore_status_mask |= ULITE_STATUS_PARITY
  181. | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
  182. /* ignore all characters if CREAD is not set */
  183. if ((termios->c_cflag & CREAD) == 0)
  184. port->ignore_status_mask |=
  185. ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
  186. | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
  187. /* update timeout */
  188. baud = uart_get_baud_rate(port, termios, old, 0, 460800);
  189. uart_update_timeout(port, termios->c_cflag, baud);
  190. spin_unlock_irqrestore(&port->lock, flags);
  191. }
  192. static const char *ulite_type(struct uart_port *port)
  193. {
  194. return port->type == PORT_UARTLITE ? "uartlite" : NULL;
  195. }
  196. static void ulite_release_port(struct uart_port *port)
  197. {
  198. release_mem_region(port->mapbase, ULITE_REGION);
  199. iounmap(port->membase);
  200. port->membase = NULL;
  201. }
  202. static int ulite_request_port(struct uart_port *port)
  203. {
  204. if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
  205. dev_err(port->dev, "Memory region busy\n");
  206. return -EBUSY;
  207. }
  208. port->membase = ioremap(port->mapbase, ULITE_REGION);
  209. if (!port->membase) {
  210. dev_err(port->dev, "Unable to map registers\n");
  211. release_mem_region(port->mapbase, ULITE_REGION);
  212. return -EBUSY;
  213. }
  214. return 0;
  215. }
  216. static void ulite_config_port(struct uart_port *port, int flags)
  217. {
  218. if (!ulite_request_port(port))
  219. port->type = PORT_UARTLITE;
  220. }
  221. static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
  222. {
  223. /* we don't want the core code to modify any port params */
  224. return -EINVAL;
  225. }
  226. static struct uart_ops ulite_ops = {
  227. .tx_empty = ulite_tx_empty,
  228. .set_mctrl = ulite_set_mctrl,
  229. .get_mctrl = ulite_get_mctrl,
  230. .stop_tx = ulite_stop_tx,
  231. .start_tx = ulite_start_tx,
  232. .stop_rx = ulite_stop_rx,
  233. .enable_ms = ulite_enable_ms,
  234. .break_ctl = ulite_break_ctl,
  235. .startup = ulite_startup,
  236. .shutdown = ulite_shutdown,
  237. .set_termios = ulite_set_termios,
  238. .type = ulite_type,
  239. .release_port = ulite_release_port,
  240. .request_port = ulite_request_port,
  241. .config_port = ulite_config_port,
  242. .verify_port = ulite_verify_port
  243. };
  244. #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
  245. static void ulite_console_wait_tx(struct uart_port *port)
  246. {
  247. int i;
  248. /* wait up to 10ms for the character(s) to be sent */
  249. for (i = 0; i < 10000; i++) {
  250. if (in_be32((void*)port->membase + ULITE_STATUS) & ULITE_STATUS_TXEMPTY)
  251. break;
  252. udelay(1);
  253. }
  254. }
  255. static void ulite_console_putchar(struct uart_port *port, int ch)
  256. {
  257. ulite_console_wait_tx(port);
  258. out_be32((void*)port->membase + ULITE_TX, ch);
  259. }
  260. static void ulite_console_write(struct console *co, const char *s,
  261. unsigned int count)
  262. {
  263. struct uart_port *port = &ulite_ports[co->index];
  264. unsigned long flags;
  265. unsigned int ier;
  266. int locked = 1;
  267. if (oops_in_progress) {
  268. locked = spin_trylock_irqsave(&port->lock, flags);
  269. } else
  270. spin_lock_irqsave(&port->lock, flags);
  271. /* save and disable interrupt */
  272. ier = in_be32((void*)port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
  273. out_be32((void*)port->membase + ULITE_CONTROL, 0);
  274. uart_console_write(port, s, count, ulite_console_putchar);
  275. ulite_console_wait_tx(port);
  276. /* restore interrupt state */
  277. if (ier)
  278. out_be32((void*)port->membase + ULITE_CONTROL, ULITE_CONTROL_IE);
  279. if (locked)
  280. spin_unlock_irqrestore(&port->lock, flags);
  281. }
  282. static int __init ulite_console_setup(struct console *co, char *options)
  283. {
  284. struct uart_port *port;
  285. int baud = 9600;
  286. int bits = 8;
  287. int parity = 'n';
  288. int flow = 'n';
  289. if (co->index < 0 || co->index >= ULITE_NR_UARTS)
  290. return -EINVAL;
  291. port = &ulite_ports[co->index];
  292. /* not initialized yet? */
  293. if (!port->membase)
  294. return -ENODEV;
  295. if (options)
  296. uart_parse_options(options, &baud, &parity, &bits, &flow);
  297. return uart_set_options(port, co, baud, parity, bits, flow);
  298. }
  299. static struct uart_driver ulite_uart_driver;
  300. static struct console ulite_console = {
  301. .name = ULITE_NAME,
  302. .write = ulite_console_write,
  303. .device = uart_console_device,
  304. .setup = ulite_console_setup,
  305. .flags = CON_PRINTBUFFER,
  306. .index = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
  307. .data = &ulite_uart_driver,
  308. };
  309. static int __init ulite_console_init(void)
  310. {
  311. register_console(&ulite_console);
  312. return 0;
  313. }
  314. console_initcall(ulite_console_init);
  315. #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
  316. static struct uart_driver ulite_uart_driver = {
  317. .owner = THIS_MODULE,
  318. .driver_name = "uartlite",
  319. .dev_name = ULITE_NAME,
  320. .major = ULITE_MAJOR,
  321. .minor = ULITE_MINOR,
  322. .nr = ULITE_NR_UARTS,
  323. #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
  324. .cons = &ulite_console,
  325. #endif
  326. };
  327. static int __devinit ulite_probe(struct platform_device *pdev)
  328. {
  329. struct resource *res, *res2;
  330. struct uart_port *port;
  331. if (pdev->id < 0 || pdev->id >= ULITE_NR_UARTS)
  332. return -EINVAL;
  333. if (ulite_ports[pdev->id].membase)
  334. return -EBUSY;
  335. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  336. if (!res)
  337. return -ENODEV;
  338. res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  339. if (!res2)
  340. return -ENODEV;
  341. port = &ulite_ports[pdev->id];
  342. port->fifosize = 16;
  343. port->regshift = 2;
  344. port->iotype = UPIO_MEM;
  345. port->iobase = 1; /* mark port in use */
  346. port->mapbase = res->start;
  347. port->membase = NULL;
  348. port->ops = &ulite_ops;
  349. port->irq = res2->start;
  350. port->flags = UPF_BOOT_AUTOCONF;
  351. port->dev = &pdev->dev;
  352. port->type = PORT_UNKNOWN;
  353. port->line = pdev->id;
  354. uart_add_one_port(&ulite_uart_driver, port);
  355. platform_set_drvdata(pdev, port);
  356. return 0;
  357. }
  358. static int ulite_remove(struct platform_device *pdev)
  359. {
  360. struct uart_port *port = platform_get_drvdata(pdev);
  361. platform_set_drvdata(pdev, NULL);
  362. if (port)
  363. uart_remove_one_port(&ulite_uart_driver, port);
  364. /* mark port as free */
  365. port->membase = NULL;
  366. return 0;
  367. }
  368. static struct platform_driver ulite_platform_driver = {
  369. .probe = ulite_probe,
  370. .remove = ulite_remove,
  371. .driver = {
  372. .owner = THIS_MODULE,
  373. .name = "uartlite",
  374. },
  375. };
  376. int __init ulite_init(void)
  377. {
  378. int ret;
  379. ret = uart_register_driver(&ulite_uart_driver);
  380. if (ret)
  381. return ret;
  382. ret = platform_driver_register(&ulite_platform_driver);
  383. if (ret)
  384. uart_unregister_driver(&ulite_uart_driver);
  385. return ret;
  386. }
  387. void __exit ulite_exit(void)
  388. {
  389. platform_driver_unregister(&ulite_platform_driver);
  390. uart_unregister_driver(&ulite_uart_driver);
  391. }
  392. module_init(ulite_init);
  393. module_exit(ulite_exit);
  394. MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
  395. MODULE_DESCRIPTION("Xilinx uartlite serial driver");
  396. MODULE_LICENSE("GPL");