core-card.c 18 KB

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  1. /*
  2. * Copyright (C) 2005-2007 Kristian Hoegsberg <krh@bitplanet.net>
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17. */
  18. #include <linux/bug.h>
  19. #include <linux/completion.h>
  20. #include <linux/crc-itu-t.h>
  21. #include <linux/device.h>
  22. #include <linux/errno.h>
  23. #include <linux/firewire.h>
  24. #include <linux/firewire-constants.h>
  25. #include <linux/jiffies.h>
  26. #include <linux/kernel.h>
  27. #include <linux/kref.h>
  28. #include <linux/list.h>
  29. #include <linux/module.h>
  30. #include <linux/mutex.h>
  31. #include <linux/spinlock.h>
  32. #include <linux/workqueue.h>
  33. #include <asm/atomic.h>
  34. #include <asm/byteorder.h>
  35. #include "core.h"
  36. int fw_compute_block_crc(__be32 *block)
  37. {
  38. int length;
  39. u16 crc;
  40. length = (be32_to_cpu(block[0]) >> 16) & 0xff;
  41. crc = crc_itu_t(0, (u8 *)&block[1], length * 4);
  42. *block |= cpu_to_be32(crc);
  43. return length;
  44. }
  45. static DEFINE_MUTEX(card_mutex);
  46. static LIST_HEAD(card_list);
  47. static LIST_HEAD(descriptor_list);
  48. static int descriptor_count;
  49. static __be32 tmp_config_rom[256];
  50. /* ROM header, bus info block, root dir header, capabilities = 7 quadlets */
  51. static size_t config_rom_length = 1 + 4 + 1 + 1;
  52. #define BIB_CRC(v) ((v) << 0)
  53. #define BIB_CRC_LENGTH(v) ((v) << 16)
  54. #define BIB_INFO_LENGTH(v) ((v) << 24)
  55. #define BIB_BUS_NAME 0x31333934 /* "1394" */
  56. #define BIB_LINK_SPEED(v) ((v) << 0)
  57. #define BIB_GENERATION(v) ((v) << 4)
  58. #define BIB_MAX_ROM(v) ((v) << 8)
  59. #define BIB_MAX_RECEIVE(v) ((v) << 12)
  60. #define BIB_CYC_CLK_ACC(v) ((v) << 16)
  61. #define BIB_PMC ((1) << 27)
  62. #define BIB_BMC ((1) << 28)
  63. #define BIB_ISC ((1) << 29)
  64. #define BIB_CMC ((1) << 30)
  65. #define BIB_IRMC ((1) << 31)
  66. #define NODE_CAPABILITIES 0x0c0083c0 /* per IEEE 1394 clause 8.3.2.6.5.2 */
  67. #define CANON_OUI 0x000085
  68. static void generate_config_rom(struct fw_card *card, __be32 *config_rom)
  69. {
  70. struct fw_descriptor *desc;
  71. int i, j, k, length;
  72. /*
  73. * Initialize contents of config rom buffer. On the OHCI
  74. * controller, block reads to the config rom accesses the host
  75. * memory, but quadlet read access the hardware bus info block
  76. * registers. That's just crack, but it means we should make
  77. * sure the contents of bus info block in host memory matches
  78. * the version stored in the OHCI registers.
  79. */
  80. config_rom[0] = cpu_to_be32(
  81. BIB_CRC_LENGTH(4) | BIB_INFO_LENGTH(4) | BIB_CRC(0));
  82. config_rom[1] = cpu_to_be32(BIB_BUS_NAME);
  83. config_rom[2] = cpu_to_be32(
  84. BIB_LINK_SPEED(card->link_speed) |
  85. BIB_GENERATION(card->config_rom_generation++ % 14 + 2) |
  86. BIB_MAX_ROM(2) |
  87. BIB_MAX_RECEIVE(card->max_receive) |
  88. BIB_BMC | BIB_ISC | BIB_CMC | BIB_IRMC);
  89. config_rom[3] = cpu_to_be32(card->guid >> 32);
  90. config_rom[4] = cpu_to_be32(card->guid);
  91. /* Generate root directory. */
  92. config_rom[6] = cpu_to_be32(NODE_CAPABILITIES);
  93. i = 7;
  94. j = 7 + descriptor_count;
  95. /* Generate root directory entries for descriptors. */
  96. list_for_each_entry (desc, &descriptor_list, link) {
  97. if (desc->immediate > 0)
  98. config_rom[i++] = cpu_to_be32(desc->immediate);
  99. config_rom[i] = cpu_to_be32(desc->key | (j - i));
  100. i++;
  101. j += desc->length;
  102. }
  103. /* Update root directory length. */
  104. config_rom[5] = cpu_to_be32((i - 5 - 1) << 16);
  105. /* End of root directory, now copy in descriptors. */
  106. list_for_each_entry (desc, &descriptor_list, link) {
  107. for (k = 0; k < desc->length; k++)
  108. config_rom[i + k] = cpu_to_be32(desc->data[k]);
  109. i += desc->length;
  110. }
  111. /* Calculate CRCs for all blocks in the config rom. This
  112. * assumes that CRC length and info length are identical for
  113. * the bus info block, which is always the case for this
  114. * implementation. */
  115. for (i = 0; i < j; i += length + 1)
  116. length = fw_compute_block_crc(config_rom + i);
  117. WARN_ON(j != config_rom_length);
  118. }
  119. static void update_config_roms(void)
  120. {
  121. struct fw_card *card;
  122. list_for_each_entry (card, &card_list, link) {
  123. generate_config_rom(card, tmp_config_rom);
  124. card->driver->set_config_rom(card, tmp_config_rom,
  125. config_rom_length);
  126. }
  127. }
  128. static size_t required_space(struct fw_descriptor *desc)
  129. {
  130. /* descriptor + entry into root dir + optional immediate entry */
  131. return desc->length + 1 + (desc->immediate > 0 ? 1 : 0);
  132. }
  133. int fw_core_add_descriptor(struct fw_descriptor *desc)
  134. {
  135. size_t i;
  136. int ret;
  137. /*
  138. * Check descriptor is valid; the length of all blocks in the
  139. * descriptor has to add up to exactly the length of the
  140. * block.
  141. */
  142. i = 0;
  143. while (i < desc->length)
  144. i += (desc->data[i] >> 16) + 1;
  145. if (i != desc->length)
  146. return -EINVAL;
  147. mutex_lock(&card_mutex);
  148. if (config_rom_length + required_space(desc) > 256) {
  149. ret = -EBUSY;
  150. } else {
  151. list_add_tail(&desc->link, &descriptor_list);
  152. config_rom_length += required_space(desc);
  153. descriptor_count++;
  154. if (desc->immediate > 0)
  155. descriptor_count++;
  156. update_config_roms();
  157. ret = 0;
  158. }
  159. mutex_unlock(&card_mutex);
  160. return ret;
  161. }
  162. EXPORT_SYMBOL(fw_core_add_descriptor);
  163. void fw_core_remove_descriptor(struct fw_descriptor *desc)
  164. {
  165. mutex_lock(&card_mutex);
  166. list_del(&desc->link);
  167. config_rom_length -= required_space(desc);
  168. descriptor_count--;
  169. if (desc->immediate > 0)
  170. descriptor_count--;
  171. update_config_roms();
  172. mutex_unlock(&card_mutex);
  173. }
  174. EXPORT_SYMBOL(fw_core_remove_descriptor);
  175. static int reset_bus(struct fw_card *card, bool short_reset)
  176. {
  177. int reg = short_reset ? 5 : 1;
  178. int bit = short_reset ? PHY_BUS_SHORT_RESET : PHY_BUS_RESET;
  179. return card->driver->update_phy_reg(card, reg, 0, bit);
  180. }
  181. void fw_schedule_bus_reset(struct fw_card *card, bool delayed, bool short_reset)
  182. {
  183. /* We don't try hard to sort out requests of long vs. short resets. */
  184. card->br_short = short_reset;
  185. /* Use an arbitrary short delay to combine multiple reset requests. */
  186. fw_card_get(card);
  187. if (!schedule_delayed_work(&card->br_work,
  188. delayed ? DIV_ROUND_UP(HZ, 100) : 0))
  189. fw_card_put(card);
  190. }
  191. EXPORT_SYMBOL(fw_schedule_bus_reset);
  192. static void br_work(struct work_struct *work)
  193. {
  194. struct fw_card *card = container_of(work, struct fw_card, br_work.work);
  195. /* Delay for 2s after last reset per IEEE 1394 clause 8.2.1. */
  196. if (card->reset_jiffies != 0 &&
  197. time_is_after_jiffies(card->reset_jiffies + 2 * HZ)) {
  198. if (!schedule_delayed_work(&card->br_work, 2 * HZ))
  199. fw_card_put(card);
  200. return;
  201. }
  202. fw_send_phy_config(card, FW_PHY_CONFIG_NO_NODE_ID, card->generation,
  203. FW_PHY_CONFIG_CURRENT_GAP_COUNT);
  204. reset_bus(card, card->br_short);
  205. fw_card_put(card);
  206. }
  207. static void allocate_broadcast_channel(struct fw_card *card, int generation)
  208. {
  209. int channel, bandwidth = 0;
  210. if (!card->broadcast_channel_allocated) {
  211. fw_iso_resource_manage(card, generation, 1ULL << 31,
  212. &channel, &bandwidth, true,
  213. card->bm_transaction_data);
  214. if (channel != 31) {
  215. fw_notify("failed to allocate broadcast channel\n");
  216. return;
  217. }
  218. card->broadcast_channel_allocated = true;
  219. }
  220. device_for_each_child(card->device, (void *)(long)generation,
  221. fw_device_set_broadcast_channel);
  222. }
  223. static const char gap_count_table[] = {
  224. 63, 5, 7, 8, 10, 13, 16, 18, 21, 24, 26, 29, 32, 35, 37, 40
  225. };
  226. void fw_schedule_bm_work(struct fw_card *card, unsigned long delay)
  227. {
  228. fw_card_get(card);
  229. if (!schedule_delayed_work(&card->bm_work, delay))
  230. fw_card_put(card);
  231. }
  232. static void bm_work(struct work_struct *work)
  233. {
  234. struct fw_card *card = container_of(work, struct fw_card, bm_work.work);
  235. struct fw_device *root_device, *irm_device;
  236. struct fw_node *root_node;
  237. int root_id, new_root_id, irm_id, bm_id, local_id;
  238. int gap_count, generation, grace, rcode;
  239. bool do_reset = false;
  240. bool root_device_is_running;
  241. bool root_device_is_cmc;
  242. bool irm_is_1394_1995_only;
  243. bool keep_this_irm;
  244. spin_lock_irq(&card->lock);
  245. if (card->local_node == NULL) {
  246. spin_unlock_irq(&card->lock);
  247. goto out_put_card;
  248. }
  249. generation = card->generation;
  250. root_node = card->root_node;
  251. fw_node_get(root_node);
  252. root_device = root_node->data;
  253. root_device_is_running = root_device &&
  254. atomic_read(&root_device->state) == FW_DEVICE_RUNNING;
  255. root_device_is_cmc = root_device && root_device->cmc;
  256. irm_device = card->irm_node->data;
  257. irm_is_1394_1995_only = irm_device && irm_device->config_rom &&
  258. (irm_device->config_rom[2] & 0x000000f0) == 0;
  259. /* Canon MV5i works unreliably if it is not root node. */
  260. keep_this_irm = irm_device && irm_device->config_rom &&
  261. irm_device->config_rom[3] >> 8 == CANON_OUI;
  262. root_id = root_node->node_id;
  263. irm_id = card->irm_node->node_id;
  264. local_id = card->local_node->node_id;
  265. grace = time_after(jiffies, card->reset_jiffies + DIV_ROUND_UP(HZ, 8));
  266. if ((is_next_generation(generation, card->bm_generation) &&
  267. !card->bm_abdicate) ||
  268. (card->bm_generation != generation && grace)) {
  269. /*
  270. * This first step is to figure out who is IRM and
  271. * then try to become bus manager. If the IRM is not
  272. * well defined (e.g. does not have an active link
  273. * layer or does not responds to our lock request, we
  274. * will have to do a little vigilante bus management.
  275. * In that case, we do a goto into the gap count logic
  276. * so that when we do the reset, we still optimize the
  277. * gap count. That could well save a reset in the
  278. * next generation.
  279. */
  280. if (!card->irm_node->link_on) {
  281. new_root_id = local_id;
  282. fw_notify("%s, making local node (%02x) root.\n",
  283. "IRM has link off", new_root_id);
  284. goto pick_me;
  285. }
  286. if (irm_is_1394_1995_only && !keep_this_irm) {
  287. new_root_id = local_id;
  288. fw_notify("%s, making local node (%02x) root.\n",
  289. "IRM is not 1394a compliant", new_root_id);
  290. goto pick_me;
  291. }
  292. card->bm_transaction_data[0] = cpu_to_be32(0x3f);
  293. card->bm_transaction_data[1] = cpu_to_be32(local_id);
  294. spin_unlock_irq(&card->lock);
  295. rcode = fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
  296. irm_id, generation, SCODE_100,
  297. CSR_REGISTER_BASE + CSR_BUS_MANAGER_ID,
  298. card->bm_transaction_data, 8);
  299. if (rcode == RCODE_GENERATION)
  300. /* Another bus reset, BM work has been rescheduled. */
  301. goto out;
  302. bm_id = be32_to_cpu(card->bm_transaction_data[0]);
  303. spin_lock_irq(&card->lock);
  304. if (rcode == RCODE_COMPLETE && generation == card->generation)
  305. card->bm_node_id =
  306. bm_id == 0x3f ? local_id : 0xffc0 | bm_id;
  307. spin_unlock_irq(&card->lock);
  308. if (rcode == RCODE_COMPLETE && bm_id != 0x3f) {
  309. /* Somebody else is BM. Only act as IRM. */
  310. if (local_id == irm_id)
  311. allocate_broadcast_channel(card, generation);
  312. goto out;
  313. }
  314. if (rcode == RCODE_SEND_ERROR) {
  315. /*
  316. * We have been unable to send the lock request due to
  317. * some local problem. Let's try again later and hope
  318. * that the problem has gone away by then.
  319. */
  320. fw_schedule_bm_work(card, DIV_ROUND_UP(HZ, 8));
  321. goto out;
  322. }
  323. spin_lock_irq(&card->lock);
  324. if (rcode != RCODE_COMPLETE && !keep_this_irm) {
  325. /*
  326. * The lock request failed, maybe the IRM
  327. * isn't really IRM capable after all. Let's
  328. * do a bus reset and pick the local node as
  329. * root, and thus, IRM.
  330. */
  331. new_root_id = local_id;
  332. fw_notify("%s, making local node (%02x) root.\n",
  333. "BM lock failed", new_root_id);
  334. goto pick_me;
  335. }
  336. } else if (card->bm_generation != generation) {
  337. /*
  338. * We weren't BM in the last generation, and the last
  339. * bus reset is less than 125ms ago. Reschedule this job.
  340. */
  341. spin_unlock_irq(&card->lock);
  342. fw_schedule_bm_work(card, DIV_ROUND_UP(HZ, 8));
  343. goto out;
  344. }
  345. /*
  346. * We're bus manager for this generation, so next step is to
  347. * make sure we have an active cycle master and do gap count
  348. * optimization.
  349. */
  350. card->bm_generation = generation;
  351. if (root_device == NULL) {
  352. /*
  353. * Either link_on is false, or we failed to read the
  354. * config rom. In either case, pick another root.
  355. */
  356. new_root_id = local_id;
  357. } else if (!root_device_is_running) {
  358. /*
  359. * If we haven't probed this device yet, bail out now
  360. * and let's try again once that's done.
  361. */
  362. spin_unlock_irq(&card->lock);
  363. goto out;
  364. } else if (root_device_is_cmc) {
  365. /*
  366. * We will send out a force root packet for this
  367. * node as part of the gap count optimization.
  368. */
  369. new_root_id = root_id;
  370. } else {
  371. /*
  372. * Current root has an active link layer and we
  373. * successfully read the config rom, but it's not
  374. * cycle master capable.
  375. */
  376. new_root_id = local_id;
  377. }
  378. pick_me:
  379. /*
  380. * Pick a gap count from 1394a table E-1. The table doesn't cover
  381. * the typically much larger 1394b beta repeater delays though.
  382. */
  383. if (!card->beta_repeaters_present &&
  384. root_node->max_hops < ARRAY_SIZE(gap_count_table))
  385. gap_count = gap_count_table[root_node->max_hops];
  386. else
  387. gap_count = 63;
  388. /*
  389. * Finally, figure out if we should do a reset or not. If we have
  390. * done less than 5 resets with the same physical topology and we
  391. * have either a new root or a new gap count setting, let's do it.
  392. */
  393. if (card->bm_retries++ < 5 &&
  394. (card->gap_count != gap_count || new_root_id != root_id))
  395. do_reset = true;
  396. spin_unlock_irq(&card->lock);
  397. if (do_reset) {
  398. fw_notify("phy config: card %d, new root=%x, gap_count=%d\n",
  399. card->index, new_root_id, gap_count);
  400. fw_send_phy_config(card, new_root_id, generation, gap_count);
  401. reset_bus(card, true);
  402. /* Will allocate broadcast channel after the reset. */
  403. goto out;
  404. }
  405. if (root_device_is_cmc) {
  406. /*
  407. * Make sure that the cycle master sends cycle start packets.
  408. */
  409. card->bm_transaction_data[0] = cpu_to_be32(CSR_STATE_BIT_CMSTR);
  410. rcode = fw_run_transaction(card, TCODE_WRITE_QUADLET_REQUEST,
  411. root_id, generation, SCODE_100,
  412. CSR_REGISTER_BASE + CSR_STATE_SET,
  413. card->bm_transaction_data, 4);
  414. if (rcode == RCODE_GENERATION)
  415. goto out;
  416. }
  417. if (local_id == irm_id)
  418. allocate_broadcast_channel(card, generation);
  419. out:
  420. fw_node_put(root_node);
  421. out_put_card:
  422. fw_card_put(card);
  423. }
  424. void fw_card_initialize(struct fw_card *card,
  425. const struct fw_card_driver *driver,
  426. struct device *device)
  427. {
  428. static atomic_t index = ATOMIC_INIT(-1);
  429. card->index = atomic_inc_return(&index);
  430. card->driver = driver;
  431. card->device = device;
  432. card->current_tlabel = 0;
  433. card->tlabel_mask = 0;
  434. card->split_timeout_hi = 0;
  435. card->split_timeout_lo = 800 << 19;
  436. card->split_timeout_cycles = 800;
  437. card->split_timeout_jiffies = DIV_ROUND_UP(HZ, 10);
  438. card->color = 0;
  439. card->broadcast_channel = BROADCAST_CHANNEL_INITIAL;
  440. kref_init(&card->kref);
  441. init_completion(&card->done);
  442. INIT_LIST_HEAD(&card->transaction_list);
  443. INIT_LIST_HEAD(&card->phy_receiver_list);
  444. spin_lock_init(&card->lock);
  445. card->local_node = NULL;
  446. INIT_DELAYED_WORK(&card->br_work, br_work);
  447. INIT_DELAYED_WORK(&card->bm_work, bm_work);
  448. }
  449. EXPORT_SYMBOL(fw_card_initialize);
  450. int fw_card_add(struct fw_card *card,
  451. u32 max_receive, u32 link_speed, u64 guid)
  452. {
  453. int ret;
  454. card->max_receive = max_receive;
  455. card->link_speed = link_speed;
  456. card->guid = guid;
  457. mutex_lock(&card_mutex);
  458. generate_config_rom(card, tmp_config_rom);
  459. ret = card->driver->enable(card, tmp_config_rom, config_rom_length);
  460. if (ret == 0)
  461. list_add_tail(&card->link, &card_list);
  462. mutex_unlock(&card_mutex);
  463. return ret;
  464. }
  465. EXPORT_SYMBOL(fw_card_add);
  466. /*
  467. * The next few functions implement a dummy driver that is used once a card
  468. * driver shuts down an fw_card. This allows the driver to cleanly unload,
  469. * as all IO to the card will be handled (and failed) by the dummy driver
  470. * instead of calling into the module. Only functions for iso context
  471. * shutdown still need to be provided by the card driver.
  472. *
  473. * .read/write_csr() should never be called anymore after the dummy driver
  474. * was bound since they are only used within request handler context.
  475. * .set_config_rom() is never called since the card is taken out of card_list
  476. * before switching to the dummy driver.
  477. */
  478. static int dummy_read_phy_reg(struct fw_card *card, int address)
  479. {
  480. return -ENODEV;
  481. }
  482. static int dummy_update_phy_reg(struct fw_card *card, int address,
  483. int clear_bits, int set_bits)
  484. {
  485. return -ENODEV;
  486. }
  487. static void dummy_send_request(struct fw_card *card, struct fw_packet *packet)
  488. {
  489. packet->callback(packet, card, RCODE_CANCELLED);
  490. }
  491. static void dummy_send_response(struct fw_card *card, struct fw_packet *packet)
  492. {
  493. packet->callback(packet, card, RCODE_CANCELLED);
  494. }
  495. static int dummy_cancel_packet(struct fw_card *card, struct fw_packet *packet)
  496. {
  497. return -ENOENT;
  498. }
  499. static int dummy_enable_phys_dma(struct fw_card *card,
  500. int node_id, int generation)
  501. {
  502. return -ENODEV;
  503. }
  504. static struct fw_iso_context *dummy_allocate_iso_context(struct fw_card *card,
  505. int type, int channel, size_t header_size)
  506. {
  507. return ERR_PTR(-ENODEV);
  508. }
  509. static int dummy_start_iso(struct fw_iso_context *ctx,
  510. s32 cycle, u32 sync, u32 tags)
  511. {
  512. return -ENODEV;
  513. }
  514. static int dummy_set_iso_channels(struct fw_iso_context *ctx, u64 *channels)
  515. {
  516. return -ENODEV;
  517. }
  518. static int dummy_queue_iso(struct fw_iso_context *ctx, struct fw_iso_packet *p,
  519. struct fw_iso_buffer *buffer, unsigned long payload)
  520. {
  521. return -ENODEV;
  522. }
  523. static const struct fw_card_driver dummy_driver_template = {
  524. .read_phy_reg = dummy_read_phy_reg,
  525. .update_phy_reg = dummy_update_phy_reg,
  526. .send_request = dummy_send_request,
  527. .send_response = dummy_send_response,
  528. .cancel_packet = dummy_cancel_packet,
  529. .enable_phys_dma = dummy_enable_phys_dma,
  530. .allocate_iso_context = dummy_allocate_iso_context,
  531. .start_iso = dummy_start_iso,
  532. .set_iso_channels = dummy_set_iso_channels,
  533. .queue_iso = dummy_queue_iso,
  534. };
  535. void fw_card_release(struct kref *kref)
  536. {
  537. struct fw_card *card = container_of(kref, struct fw_card, kref);
  538. complete(&card->done);
  539. }
  540. void fw_core_remove_card(struct fw_card *card)
  541. {
  542. struct fw_card_driver dummy_driver = dummy_driver_template;
  543. card->driver->update_phy_reg(card, 4,
  544. PHY_LINK_ACTIVE | PHY_CONTENDER, 0);
  545. fw_schedule_bus_reset(card, false, true);
  546. mutex_lock(&card_mutex);
  547. list_del_init(&card->link);
  548. mutex_unlock(&card_mutex);
  549. /* Switch off most of the card driver interface. */
  550. dummy_driver.free_iso_context = card->driver->free_iso_context;
  551. dummy_driver.stop_iso = card->driver->stop_iso;
  552. card->driver = &dummy_driver;
  553. fw_destroy_nodes(card);
  554. /* Wait for all users, especially device workqueue jobs, to finish. */
  555. fw_card_put(card);
  556. wait_for_completion(&card->done);
  557. WARN_ON(!list_empty(&card->transaction_list));
  558. }
  559. EXPORT_SYMBOL(fw_core_remove_card);