setup.c 31 KB

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  1. /*
  2. * Copyright (C) 2009 Renesas Solutions Corp.
  3. *
  4. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/device.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mfd/sh_mobile_sdhi.h>
  14. #include <linux/mmc/host.h>
  15. #include <linux/mmc/sh_mmcif.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/gpio.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/io.h>
  20. #include <linux/delay.h>
  21. #include <linux/usb/r8a66597.h>
  22. #include <linux/i2c.h>
  23. #include <linux/i2c/tsc2007.h>
  24. #include <linux/spi/spi.h>
  25. #include <linux/spi/sh_msiof.h>
  26. #include <linux/spi/mmc_spi.h>
  27. #include <linux/input.h>
  28. #include <linux/input/sh_keysc.h>
  29. #include <video/sh_mobile_lcdc.h>
  30. #include <sound/sh_fsi.h>
  31. #include <media/sh_mobile_ceu.h>
  32. #include <media/tw9910.h>
  33. #include <media/mt9t112.h>
  34. #include <asm/heartbeat.h>
  35. #include <asm/sh_eth.h>
  36. #include <asm/clock.h>
  37. #include <asm/suspend.h>
  38. #include <cpu/sh7724.h>
  39. /*
  40. * Address Interface BusWidth
  41. *-----------------------------------------
  42. * 0x0000_0000 uboot 16bit
  43. * 0x0004_0000 Linux romImage 16bit
  44. * 0x0014_0000 MTD for Linux 16bit
  45. * 0x0400_0000 Internal I/O 16/32bit
  46. * 0x0800_0000 DRAM 32bit
  47. * 0x1800_0000 MFI 16bit
  48. */
  49. /* SWITCH
  50. *------------------------------
  51. * DS2[1] = FlashROM write protect ON : write protect
  52. * OFF : No write protect
  53. * DS2[2] = RMII / TS, SCIF ON : RMII
  54. * OFF : TS, SCIF3
  55. * DS2[3] = Camera / Video ON : Camera
  56. * OFF : NTSC/PAL (IN)
  57. * DS2[5] = NTSC_OUT Clock ON : On board OSC
  58. * OFF : SH7724 DV_CLK
  59. * DS2[6-7] = MMC / SD ON-OFF : SD
  60. * OFF-ON : MMC
  61. */
  62. /* Heartbeat */
  63. static unsigned char led_pos[] = { 0, 1, 2, 3 };
  64. static struct heartbeat_data heartbeat_data = {
  65. .nr_bits = 4,
  66. .bit_pos = led_pos,
  67. };
  68. static struct resource heartbeat_resource = {
  69. .start = 0xA405012C, /* PTG */
  70. .end = 0xA405012E - 1,
  71. .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  72. };
  73. static struct platform_device heartbeat_device = {
  74. .name = "heartbeat",
  75. .id = -1,
  76. .dev = {
  77. .platform_data = &heartbeat_data,
  78. },
  79. .num_resources = 1,
  80. .resource = &heartbeat_resource,
  81. };
  82. /* MTD */
  83. static struct mtd_partition nor_flash_partitions[] = {
  84. {
  85. .name = "boot loader",
  86. .offset = 0,
  87. .size = (5 * 1024 * 1024),
  88. .mask_flags = MTD_WRITEABLE, /* force read-only */
  89. }, {
  90. .name = "free-area",
  91. .offset = MTDPART_OFS_APPEND,
  92. .size = MTDPART_SIZ_FULL,
  93. },
  94. };
  95. static struct physmap_flash_data nor_flash_data = {
  96. .width = 2,
  97. .parts = nor_flash_partitions,
  98. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  99. };
  100. static struct resource nor_flash_resources[] = {
  101. [0] = {
  102. .name = "NOR Flash",
  103. .start = 0x00000000,
  104. .end = 0x03ffffff,
  105. .flags = IORESOURCE_MEM,
  106. }
  107. };
  108. static struct platform_device nor_flash_device = {
  109. .name = "physmap-flash",
  110. .resource = nor_flash_resources,
  111. .num_resources = ARRAY_SIZE(nor_flash_resources),
  112. .dev = {
  113. .platform_data = &nor_flash_data,
  114. },
  115. };
  116. /* SH Eth */
  117. #define SH_ETH_ADDR (0xA4600000)
  118. static struct resource sh_eth_resources[] = {
  119. [0] = {
  120. .start = SH_ETH_ADDR,
  121. .end = SH_ETH_ADDR + 0x1FC,
  122. .flags = IORESOURCE_MEM,
  123. },
  124. [1] = {
  125. .start = 91,
  126. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  127. },
  128. };
  129. static struct sh_eth_plat_data sh_eth_plat = {
  130. .phy = 0x1f, /* SMSC LAN8700 */
  131. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  132. .ether_link_active_low = 1
  133. };
  134. static struct platform_device sh_eth_device = {
  135. .name = "sh-eth",
  136. .id = 0,
  137. .dev = {
  138. .platform_data = &sh_eth_plat,
  139. },
  140. .num_resources = ARRAY_SIZE(sh_eth_resources),
  141. .resource = sh_eth_resources,
  142. .archdata = {
  143. .hwblk_id = HWBLK_ETHER,
  144. },
  145. };
  146. /* USB0 host */
  147. static void usb0_port_power(int port, int power)
  148. {
  149. gpio_set_value(GPIO_PTB4, power);
  150. }
  151. static struct r8a66597_platdata usb0_host_data = {
  152. .on_chip = 1,
  153. .port_power = usb0_port_power,
  154. };
  155. static struct resource usb0_host_resources[] = {
  156. [0] = {
  157. .start = 0xa4d80000,
  158. .end = 0xa4d80124 - 1,
  159. .flags = IORESOURCE_MEM,
  160. },
  161. [1] = {
  162. .start = 65,
  163. .end = 65,
  164. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  165. },
  166. };
  167. static struct platform_device usb0_host_device = {
  168. .name = "r8a66597_hcd",
  169. .id = 0,
  170. .dev = {
  171. .dma_mask = NULL, /* not use dma */
  172. .coherent_dma_mask = 0xffffffff,
  173. .platform_data = &usb0_host_data,
  174. },
  175. .num_resources = ARRAY_SIZE(usb0_host_resources),
  176. .resource = usb0_host_resources,
  177. };
  178. /* USB1 host/function */
  179. static void usb1_port_power(int port, int power)
  180. {
  181. gpio_set_value(GPIO_PTB5, power);
  182. }
  183. static struct r8a66597_platdata usb1_common_data = {
  184. .on_chip = 1,
  185. .port_power = usb1_port_power,
  186. };
  187. static struct resource usb1_common_resources[] = {
  188. [0] = {
  189. .start = 0xa4d90000,
  190. .end = 0xa4d90124 - 1,
  191. .flags = IORESOURCE_MEM,
  192. },
  193. [1] = {
  194. .start = 66,
  195. .end = 66,
  196. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  197. },
  198. };
  199. static struct platform_device usb1_common_device = {
  200. /* .name will be added in arch_setup */
  201. .id = 1,
  202. .dev = {
  203. .dma_mask = NULL, /* not use dma */
  204. .coherent_dma_mask = 0xffffffff,
  205. .platform_data = &usb1_common_data,
  206. },
  207. .num_resources = ARRAY_SIZE(usb1_common_resources),
  208. .resource = usb1_common_resources,
  209. };
  210. /* LCDC */
  211. const static struct fb_videomode ecovec_lcd_modes[] = {
  212. {
  213. .name = "Panel",
  214. .xres = 800,
  215. .yres = 480,
  216. .left_margin = 220,
  217. .right_margin = 110,
  218. .hsync_len = 70,
  219. .upper_margin = 20,
  220. .lower_margin = 5,
  221. .vsync_len = 5,
  222. .sync = 0, /* hsync and vsync are active low */
  223. },
  224. };
  225. const static struct fb_videomode ecovec_dvi_modes[] = {
  226. {
  227. .name = "DVI",
  228. .xres = 1280,
  229. .yres = 720,
  230. .left_margin = 220,
  231. .right_margin = 110,
  232. .hsync_len = 40,
  233. .upper_margin = 20,
  234. .lower_margin = 5,
  235. .vsync_len = 5,
  236. .sync = 0, /* hsync and vsync are active low */
  237. },
  238. };
  239. static struct sh_mobile_lcdc_info lcdc_info = {
  240. .ch[0] = {
  241. .interface_type = RGB18,
  242. .chan = LCDC_CHAN_MAINLCD,
  243. .bpp = 16,
  244. .lcd_size_cfg = { /* 7.0 inch */
  245. .width = 152,
  246. .height = 91,
  247. },
  248. .board_cfg = {
  249. },
  250. }
  251. };
  252. static struct resource lcdc_resources[] = {
  253. [0] = {
  254. .name = "LCDC",
  255. .start = 0xfe940000,
  256. .end = 0xfe942fff,
  257. .flags = IORESOURCE_MEM,
  258. },
  259. [1] = {
  260. .start = 106,
  261. .flags = IORESOURCE_IRQ,
  262. },
  263. };
  264. static struct platform_device lcdc_device = {
  265. .name = "sh_mobile_lcdc_fb",
  266. .num_resources = ARRAY_SIZE(lcdc_resources),
  267. .resource = lcdc_resources,
  268. .dev = {
  269. .platform_data = &lcdc_info,
  270. },
  271. .archdata = {
  272. .hwblk_id = HWBLK_LCDC,
  273. },
  274. };
  275. /* CEU0 */
  276. static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
  277. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  278. };
  279. static struct resource ceu0_resources[] = {
  280. [0] = {
  281. .name = "CEU0",
  282. .start = 0xfe910000,
  283. .end = 0xfe91009f,
  284. .flags = IORESOURCE_MEM,
  285. },
  286. [1] = {
  287. .start = 52,
  288. .flags = IORESOURCE_IRQ,
  289. },
  290. [2] = {
  291. /* place holder for contiguous memory */
  292. },
  293. };
  294. static struct platform_device ceu0_device = {
  295. .name = "sh_mobile_ceu",
  296. .id = 0, /* "ceu0" clock */
  297. .num_resources = ARRAY_SIZE(ceu0_resources),
  298. .resource = ceu0_resources,
  299. .dev = {
  300. .platform_data = &sh_mobile_ceu0_info,
  301. },
  302. .archdata = {
  303. .hwblk_id = HWBLK_CEU0,
  304. },
  305. };
  306. /* CEU1 */
  307. static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
  308. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  309. };
  310. static struct resource ceu1_resources[] = {
  311. [0] = {
  312. .name = "CEU1",
  313. .start = 0xfe914000,
  314. .end = 0xfe91409f,
  315. .flags = IORESOURCE_MEM,
  316. },
  317. [1] = {
  318. .start = 63,
  319. .flags = IORESOURCE_IRQ,
  320. },
  321. [2] = {
  322. /* place holder for contiguous memory */
  323. },
  324. };
  325. static struct platform_device ceu1_device = {
  326. .name = "sh_mobile_ceu",
  327. .id = 1, /* "ceu1" clock */
  328. .num_resources = ARRAY_SIZE(ceu1_resources),
  329. .resource = ceu1_resources,
  330. .dev = {
  331. .platform_data = &sh_mobile_ceu1_info,
  332. },
  333. .archdata = {
  334. .hwblk_id = HWBLK_CEU1,
  335. },
  336. };
  337. /* I2C device */
  338. static struct i2c_board_info i2c0_devices[] = {
  339. {
  340. I2C_BOARD_INFO("da7210", 0x1a),
  341. },
  342. };
  343. static struct i2c_board_info i2c1_devices[] = {
  344. {
  345. I2C_BOARD_INFO("r2025sd", 0x32),
  346. },
  347. {
  348. I2C_BOARD_INFO("lis3lv02d", 0x1c),
  349. .irq = 33,
  350. }
  351. };
  352. /* KEYSC */
  353. static struct sh_keysc_info keysc_info = {
  354. .mode = SH_KEYSC_MODE_1,
  355. .scan_timing = 3,
  356. .delay = 50,
  357. .kycr2_delay = 100,
  358. .keycodes = { KEY_1, 0, 0, 0, 0,
  359. KEY_2, 0, 0, 0, 0,
  360. KEY_3, 0, 0, 0, 0,
  361. KEY_4, 0, 0, 0, 0,
  362. KEY_5, 0, 0, 0, 0,
  363. KEY_6, 0, 0, 0, 0, },
  364. };
  365. static struct resource keysc_resources[] = {
  366. [0] = {
  367. .name = "KEYSC",
  368. .start = 0x044b0000,
  369. .end = 0x044b000f,
  370. .flags = IORESOURCE_MEM,
  371. },
  372. [1] = {
  373. .start = 79,
  374. .flags = IORESOURCE_IRQ,
  375. },
  376. };
  377. static struct platform_device keysc_device = {
  378. .name = "sh_keysc",
  379. .id = 0, /* keysc0 clock */
  380. .num_resources = ARRAY_SIZE(keysc_resources),
  381. .resource = keysc_resources,
  382. .dev = {
  383. .platform_data = &keysc_info,
  384. },
  385. .archdata = {
  386. .hwblk_id = HWBLK_KEYSC,
  387. },
  388. };
  389. /* TouchScreen */
  390. #define IRQ0 32
  391. static int ts_get_pendown_state(void)
  392. {
  393. int val = 0;
  394. gpio_free(GPIO_FN_INTC_IRQ0);
  395. gpio_request(GPIO_PTZ0, NULL);
  396. gpio_direction_input(GPIO_PTZ0);
  397. val = gpio_get_value(GPIO_PTZ0);
  398. gpio_free(GPIO_PTZ0);
  399. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  400. return val ? 0 : 1;
  401. }
  402. static int ts_init(void)
  403. {
  404. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  405. return 0;
  406. }
  407. static struct tsc2007_platform_data tsc2007_info = {
  408. .model = 2007,
  409. .x_plate_ohms = 180,
  410. .get_pendown_state = ts_get_pendown_state,
  411. .init_platform_hw = ts_init,
  412. };
  413. static struct i2c_board_info ts_i2c_clients = {
  414. I2C_BOARD_INFO("tsc2007", 0x48),
  415. .type = "tsc2007",
  416. .platform_data = &tsc2007_info,
  417. .irq = IRQ0,
  418. };
  419. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  420. /* SDHI0 */
  421. static void sdhi0_set_pwr(struct platform_device *pdev, int state)
  422. {
  423. gpio_set_value(GPIO_PTB6, state);
  424. }
  425. static struct sh_mobile_sdhi_info sdhi0_info = {
  426. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  427. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  428. .set_pwr = sdhi0_set_pwr,
  429. .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
  430. };
  431. static struct resource sdhi0_resources[] = {
  432. [0] = {
  433. .name = "SDHI0",
  434. .start = 0x04ce0000,
  435. .end = 0x04ce01ff,
  436. .flags = IORESOURCE_MEM,
  437. },
  438. [1] = {
  439. .start = 100,
  440. .flags = IORESOURCE_IRQ,
  441. },
  442. };
  443. static struct platform_device sdhi0_device = {
  444. .name = "sh_mobile_sdhi",
  445. .num_resources = ARRAY_SIZE(sdhi0_resources),
  446. .resource = sdhi0_resources,
  447. .id = 0,
  448. .dev = {
  449. .platform_data = &sdhi0_info,
  450. },
  451. .archdata = {
  452. .hwblk_id = HWBLK_SDHI0,
  453. },
  454. };
  455. #if !defined(CONFIG_MMC_SH_MMCIF)
  456. /* SDHI1 */
  457. static void sdhi1_set_pwr(struct platform_device *pdev, int state)
  458. {
  459. gpio_set_value(GPIO_PTB7, state);
  460. }
  461. static struct sh_mobile_sdhi_info sdhi1_info = {
  462. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  463. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  464. .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
  465. .set_pwr = sdhi1_set_pwr,
  466. };
  467. static struct resource sdhi1_resources[] = {
  468. [0] = {
  469. .name = "SDHI1",
  470. .start = 0x04cf0000,
  471. .end = 0x04cf01ff,
  472. .flags = IORESOURCE_MEM,
  473. },
  474. [1] = {
  475. .start = 23,
  476. .flags = IORESOURCE_IRQ,
  477. },
  478. };
  479. static struct platform_device sdhi1_device = {
  480. .name = "sh_mobile_sdhi",
  481. .num_resources = ARRAY_SIZE(sdhi1_resources),
  482. .resource = sdhi1_resources,
  483. .id = 1,
  484. .dev = {
  485. .platform_data = &sdhi1_info,
  486. },
  487. .archdata = {
  488. .hwblk_id = HWBLK_SDHI1,
  489. },
  490. };
  491. #endif /* CONFIG_MMC_SH_MMCIF */
  492. #else
  493. /* MMC SPI */
  494. static int mmc_spi_get_ro(struct device *dev)
  495. {
  496. return gpio_get_value(GPIO_PTY6);
  497. }
  498. static int mmc_spi_get_cd(struct device *dev)
  499. {
  500. return !gpio_get_value(GPIO_PTY7);
  501. }
  502. static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
  503. {
  504. gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
  505. }
  506. static struct mmc_spi_platform_data mmc_spi_info = {
  507. .get_ro = mmc_spi_get_ro,
  508. .get_cd = mmc_spi_get_cd,
  509. .caps = MMC_CAP_NEEDS_POLL,
  510. .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
  511. .setpower = mmc_spi_setpower,
  512. };
  513. static struct spi_board_info spi_bus[] = {
  514. {
  515. .modalias = "mmc_spi",
  516. .platform_data = &mmc_spi_info,
  517. .max_speed_hz = 5000000,
  518. .mode = SPI_MODE_0,
  519. .controller_data = (void *) GPIO_PTM4,
  520. },
  521. };
  522. /* MSIOF0 */
  523. static struct sh_msiof_spi_info msiof0_data = {
  524. .num_chipselect = 1,
  525. };
  526. static struct resource msiof0_resources[] = {
  527. [0] = {
  528. .name = "MSIOF0",
  529. .start = 0xa4c40000,
  530. .end = 0xa4c40063,
  531. .flags = IORESOURCE_MEM,
  532. },
  533. [1] = {
  534. .start = 84,
  535. .flags = IORESOURCE_IRQ,
  536. },
  537. };
  538. static struct platform_device msiof0_device = {
  539. .name = "spi_sh_msiof",
  540. .id = 0, /* MSIOF0 */
  541. .dev = {
  542. .platform_data = &msiof0_data,
  543. },
  544. .num_resources = ARRAY_SIZE(msiof0_resources),
  545. .resource = msiof0_resources,
  546. .archdata = {
  547. .hwblk_id = HWBLK_MSIOF0,
  548. },
  549. };
  550. #endif
  551. /* I2C Video/Camera */
  552. static struct i2c_board_info i2c_camera[] = {
  553. {
  554. I2C_BOARD_INFO("tw9910", 0x45),
  555. },
  556. {
  557. /* 1st camera */
  558. I2C_BOARD_INFO("mt9t112", 0x3c),
  559. },
  560. {
  561. /* 2nd camera */
  562. I2C_BOARD_INFO("mt9t112", 0x3c),
  563. },
  564. };
  565. /* tw9910 */
  566. static int tw9910_power(struct device *dev, int mode)
  567. {
  568. int val = mode ? 0 : 1;
  569. gpio_set_value(GPIO_PTU2, val);
  570. if (mode)
  571. mdelay(100);
  572. return 0;
  573. }
  574. static struct tw9910_video_info tw9910_info = {
  575. .buswidth = SOCAM_DATAWIDTH_8,
  576. .mpout = TW9910_MPO_FIELD,
  577. };
  578. static struct soc_camera_link tw9910_link = {
  579. .i2c_adapter_id = 0,
  580. .bus_id = 1,
  581. .power = tw9910_power,
  582. .board_info = &i2c_camera[0],
  583. .priv = &tw9910_info,
  584. };
  585. /* mt9t112 */
  586. static int mt9t112_power1(struct device *dev, int mode)
  587. {
  588. gpio_set_value(GPIO_PTA3, mode);
  589. if (mode)
  590. mdelay(100);
  591. return 0;
  592. }
  593. static struct mt9t112_camera_info mt9t112_info1 = {
  594. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  595. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  596. };
  597. static struct soc_camera_link mt9t112_link1 = {
  598. .i2c_adapter_id = 0,
  599. .power = mt9t112_power1,
  600. .bus_id = 0,
  601. .board_info = &i2c_camera[1],
  602. .priv = &mt9t112_info1,
  603. };
  604. static int mt9t112_power2(struct device *dev, int mode)
  605. {
  606. gpio_set_value(GPIO_PTA4, mode);
  607. if (mode)
  608. mdelay(100);
  609. return 0;
  610. }
  611. static struct mt9t112_camera_info mt9t112_info2 = {
  612. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  613. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  614. };
  615. static struct soc_camera_link mt9t112_link2 = {
  616. .i2c_adapter_id = 1,
  617. .power = mt9t112_power2,
  618. .bus_id = 1,
  619. .board_info = &i2c_camera[2],
  620. .priv = &mt9t112_info2,
  621. };
  622. static struct platform_device camera_devices[] = {
  623. {
  624. .name = "soc-camera-pdrv",
  625. .id = 0,
  626. .dev = {
  627. .platform_data = &tw9910_link,
  628. },
  629. },
  630. {
  631. .name = "soc-camera-pdrv",
  632. .id = 1,
  633. .dev = {
  634. .platform_data = &mt9t112_link1,
  635. },
  636. },
  637. {
  638. .name = "soc-camera-pdrv",
  639. .id = 2,
  640. .dev = {
  641. .platform_data = &mt9t112_link2,
  642. },
  643. },
  644. };
  645. /* FSI */
  646. static struct sh_fsi_platform_info fsi_info = {
  647. .portb_flags = SH_FSI_BRS_INV |
  648. SH_FSI_OUT_SLAVE_MODE |
  649. SH_FSI_IN_SLAVE_MODE |
  650. SH_FSI_OFMT(I2S) |
  651. SH_FSI_IFMT(I2S),
  652. };
  653. static struct resource fsi_resources[] = {
  654. [0] = {
  655. .name = "FSI",
  656. .start = 0xFE3C0000,
  657. .end = 0xFE3C021d,
  658. .flags = IORESOURCE_MEM,
  659. },
  660. [1] = {
  661. .start = 108,
  662. .flags = IORESOURCE_IRQ,
  663. },
  664. };
  665. static struct platform_device fsi_device = {
  666. .name = "sh_fsi",
  667. .id = 0,
  668. .num_resources = ARRAY_SIZE(fsi_resources),
  669. .resource = fsi_resources,
  670. .dev = {
  671. .platform_data = &fsi_info,
  672. },
  673. .archdata = {
  674. .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
  675. },
  676. };
  677. /* IrDA */
  678. static struct resource irda_resources[] = {
  679. [0] = {
  680. .name = "IrDA",
  681. .start = 0xA45D0000,
  682. .end = 0xA45D0049,
  683. .flags = IORESOURCE_MEM,
  684. },
  685. [1] = {
  686. .start = 20,
  687. .flags = IORESOURCE_IRQ,
  688. },
  689. };
  690. static struct platform_device irda_device = {
  691. .name = "sh_sir",
  692. .num_resources = ARRAY_SIZE(irda_resources),
  693. .resource = irda_resources,
  694. };
  695. #include <media/ak881x.h>
  696. #include <media/sh_vou.h>
  697. static struct ak881x_pdata ak881x_pdata = {
  698. .flags = AK881X_IF_MODE_SLAVE,
  699. };
  700. static struct i2c_board_info ak8813 = {
  701. I2C_BOARD_INFO("ak8813", 0x20),
  702. .platform_data = &ak881x_pdata,
  703. };
  704. static struct sh_vou_pdata sh_vou_pdata = {
  705. .bus_fmt = SH_VOU_BUS_8BIT,
  706. .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
  707. .board_info = &ak8813,
  708. .i2c_adap = 0,
  709. };
  710. static struct resource sh_vou_resources[] = {
  711. [0] = {
  712. .start = 0xfe960000,
  713. .end = 0xfe962043,
  714. .flags = IORESOURCE_MEM,
  715. },
  716. [1] = {
  717. .start = 55,
  718. .flags = IORESOURCE_IRQ,
  719. },
  720. };
  721. static struct platform_device vou_device = {
  722. .name = "sh-vou",
  723. .id = -1,
  724. .num_resources = ARRAY_SIZE(sh_vou_resources),
  725. .resource = sh_vou_resources,
  726. .dev = {
  727. .platform_data = &sh_vou_pdata,
  728. },
  729. .archdata = {
  730. .hwblk_id = HWBLK_VOU,
  731. },
  732. };
  733. #if defined(CONFIG_MMC_SH_MMCIF)
  734. /* SH_MMCIF */
  735. static void mmcif_set_pwr(struct platform_device *pdev, int state)
  736. {
  737. gpio_set_value(GPIO_PTB7, state);
  738. }
  739. static void mmcif_down_pwr(struct platform_device *pdev)
  740. {
  741. gpio_set_value(GPIO_PTB7, 0);
  742. }
  743. static struct resource sh_mmcif_resources[] = {
  744. [0] = {
  745. .name = "SH_MMCIF",
  746. .start = 0xA4CA0000,
  747. .end = 0xA4CA00FF,
  748. .flags = IORESOURCE_MEM,
  749. },
  750. [1] = {
  751. /* MMC2I */
  752. .start = 29,
  753. .flags = IORESOURCE_IRQ,
  754. },
  755. [2] = {
  756. /* MMC3I */
  757. .start = 30,
  758. .flags = IORESOURCE_IRQ,
  759. },
  760. };
  761. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  762. .set_pwr = mmcif_set_pwr,
  763. .down_pwr = mmcif_down_pwr,
  764. .sup_pclk = 0, /* SH7724: Max Pclk/2 */
  765. .caps = MMC_CAP_4_BIT_DATA |
  766. MMC_CAP_8_BIT_DATA |
  767. MMC_CAP_NEEDS_POLL,
  768. .ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
  769. };
  770. static struct platform_device sh_mmcif_device = {
  771. .name = "sh_mmcif",
  772. .id = 0,
  773. .dev = {
  774. .platform_data = &sh_mmcif_plat,
  775. },
  776. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  777. .resource = sh_mmcif_resources,
  778. };
  779. #endif
  780. static struct platform_device *ecovec_devices[] __initdata = {
  781. &heartbeat_device,
  782. &nor_flash_device,
  783. &sh_eth_device,
  784. &usb0_host_device,
  785. &usb1_common_device,
  786. &lcdc_device,
  787. &ceu0_device,
  788. &ceu1_device,
  789. &keysc_device,
  790. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  791. &sdhi0_device,
  792. #if !defined(CONFIG_MMC_SH_MMCIF)
  793. &sdhi1_device,
  794. #endif
  795. #else
  796. &msiof0_device,
  797. #endif
  798. &camera_devices[0],
  799. &camera_devices[1],
  800. &camera_devices[2],
  801. &fsi_device,
  802. &irda_device,
  803. &vou_device,
  804. #if defined(CONFIG_MMC_SH_MMCIF)
  805. &sh_mmcif_device,
  806. #endif
  807. };
  808. #ifdef CONFIG_I2C
  809. #define EEPROM_ADDR 0x50
  810. static u8 mac_read(struct i2c_adapter *a, u8 command)
  811. {
  812. struct i2c_msg msg[2];
  813. u8 buf;
  814. int ret;
  815. msg[0].addr = EEPROM_ADDR;
  816. msg[0].flags = 0;
  817. msg[0].len = 1;
  818. msg[0].buf = &command;
  819. msg[1].addr = EEPROM_ADDR;
  820. msg[1].flags = I2C_M_RD;
  821. msg[1].len = 1;
  822. msg[1].buf = &buf;
  823. ret = i2c_transfer(a, msg, 2);
  824. if (ret < 0) {
  825. printk(KERN_ERR "error %d\n", ret);
  826. buf = 0xff;
  827. }
  828. return buf;
  829. }
  830. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  831. {
  832. struct i2c_adapter *a = i2c_get_adapter(1);
  833. int i;
  834. if (!a) {
  835. pr_err("can not get I2C 1\n");
  836. return;
  837. }
  838. /* read MAC address frome EEPROM */
  839. for (i = 0; i < sizeof(pd->mac_addr); i++) {
  840. pd->mac_addr[i] = mac_read(a, 0x10 + i);
  841. msleep(10);
  842. }
  843. i2c_put_adapter(a);
  844. }
  845. #else
  846. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  847. {
  848. pr_err("unable to read sh_eth MAC address\n");
  849. }
  850. #endif
  851. #define PORT_HIZA 0xA4050158
  852. #define IODRIVEA 0xA405018A
  853. extern char ecovec24_sdram_enter_start;
  854. extern char ecovec24_sdram_enter_end;
  855. extern char ecovec24_sdram_leave_start;
  856. extern char ecovec24_sdram_leave_end;
  857. static int __init arch_setup(void)
  858. {
  859. struct clk *clk;
  860. /* register board specific self-refresh code */
  861. sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
  862. SUSP_SH_RSTANDBY,
  863. &ecovec24_sdram_enter_start,
  864. &ecovec24_sdram_enter_end,
  865. &ecovec24_sdram_leave_start,
  866. &ecovec24_sdram_leave_end);
  867. /* enable STATUS0, STATUS2 and PDSTATUS */
  868. gpio_request(GPIO_FN_STATUS0, NULL);
  869. gpio_request(GPIO_FN_STATUS2, NULL);
  870. gpio_request(GPIO_FN_PDSTATUS, NULL);
  871. /* enable SCIFA0 */
  872. gpio_request(GPIO_FN_SCIF0_TXD, NULL);
  873. gpio_request(GPIO_FN_SCIF0_RXD, NULL);
  874. /* enable debug LED */
  875. gpio_request(GPIO_PTG0, NULL);
  876. gpio_request(GPIO_PTG1, NULL);
  877. gpio_request(GPIO_PTG2, NULL);
  878. gpio_request(GPIO_PTG3, NULL);
  879. gpio_direction_output(GPIO_PTG0, 0);
  880. gpio_direction_output(GPIO_PTG1, 0);
  881. gpio_direction_output(GPIO_PTG2, 0);
  882. gpio_direction_output(GPIO_PTG3, 0);
  883. __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
  884. /* enable SH-Eth */
  885. gpio_request(GPIO_PTA1, NULL);
  886. gpio_direction_output(GPIO_PTA1, 1);
  887. mdelay(20);
  888. gpio_request(GPIO_FN_RMII_RXD0, NULL);
  889. gpio_request(GPIO_FN_RMII_RXD1, NULL);
  890. gpio_request(GPIO_FN_RMII_TXD0, NULL);
  891. gpio_request(GPIO_FN_RMII_TXD1, NULL);
  892. gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
  893. gpio_request(GPIO_FN_RMII_TX_EN, NULL);
  894. gpio_request(GPIO_FN_RMII_RX_ER, NULL);
  895. gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
  896. gpio_request(GPIO_FN_MDIO, NULL);
  897. gpio_request(GPIO_FN_MDC, NULL);
  898. gpio_request(GPIO_FN_LNKSTA, NULL);
  899. /* enable USB */
  900. __raw_writew(0x0000, 0xA4D80000);
  901. __raw_writew(0x0000, 0xA4D90000);
  902. gpio_request(GPIO_PTB3, NULL);
  903. gpio_request(GPIO_PTB4, NULL);
  904. gpio_request(GPIO_PTB5, NULL);
  905. gpio_direction_input(GPIO_PTB3);
  906. gpio_direction_output(GPIO_PTB4, 0);
  907. gpio_direction_output(GPIO_PTB5, 0);
  908. __raw_writew(0x0600, 0xa40501d4);
  909. __raw_writew(0x0600, 0xa4050192);
  910. if (gpio_get_value(GPIO_PTB3)) {
  911. printk(KERN_INFO "USB1 function is selected\n");
  912. usb1_common_device.name = "r8a66597_udc";
  913. } else {
  914. printk(KERN_INFO "USB1 host is selected\n");
  915. usb1_common_device.name = "r8a66597_hcd";
  916. }
  917. /* enable LCDC */
  918. gpio_request(GPIO_FN_LCDD23, NULL);
  919. gpio_request(GPIO_FN_LCDD22, NULL);
  920. gpio_request(GPIO_FN_LCDD21, NULL);
  921. gpio_request(GPIO_FN_LCDD20, NULL);
  922. gpio_request(GPIO_FN_LCDD19, NULL);
  923. gpio_request(GPIO_FN_LCDD18, NULL);
  924. gpio_request(GPIO_FN_LCDD17, NULL);
  925. gpio_request(GPIO_FN_LCDD16, NULL);
  926. gpio_request(GPIO_FN_LCDD15, NULL);
  927. gpio_request(GPIO_FN_LCDD14, NULL);
  928. gpio_request(GPIO_FN_LCDD13, NULL);
  929. gpio_request(GPIO_FN_LCDD12, NULL);
  930. gpio_request(GPIO_FN_LCDD11, NULL);
  931. gpio_request(GPIO_FN_LCDD10, NULL);
  932. gpio_request(GPIO_FN_LCDD9, NULL);
  933. gpio_request(GPIO_FN_LCDD8, NULL);
  934. gpio_request(GPIO_FN_LCDD7, NULL);
  935. gpio_request(GPIO_FN_LCDD6, NULL);
  936. gpio_request(GPIO_FN_LCDD5, NULL);
  937. gpio_request(GPIO_FN_LCDD4, NULL);
  938. gpio_request(GPIO_FN_LCDD3, NULL);
  939. gpio_request(GPIO_FN_LCDD2, NULL);
  940. gpio_request(GPIO_FN_LCDD1, NULL);
  941. gpio_request(GPIO_FN_LCDD0, NULL);
  942. gpio_request(GPIO_FN_LCDDISP, NULL);
  943. gpio_request(GPIO_FN_LCDHSYN, NULL);
  944. gpio_request(GPIO_FN_LCDDCK, NULL);
  945. gpio_request(GPIO_FN_LCDVSYN, NULL);
  946. gpio_request(GPIO_FN_LCDDON, NULL);
  947. gpio_request(GPIO_FN_LCDLCLK, NULL);
  948. __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
  949. gpio_request(GPIO_PTE6, NULL);
  950. gpio_request(GPIO_PTU1, NULL);
  951. gpio_request(GPIO_PTR1, NULL);
  952. gpio_request(GPIO_PTA2, NULL);
  953. gpio_direction_input(GPIO_PTE6);
  954. gpio_direction_output(GPIO_PTU1, 0);
  955. gpio_direction_output(GPIO_PTR1, 0);
  956. gpio_direction_output(GPIO_PTA2, 0);
  957. /* I/O buffer drive ability is high */
  958. __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
  959. if (gpio_get_value(GPIO_PTE6)) {
  960. /* DVI */
  961. lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
  962. lcdc_info.ch[0].clock_divider = 1;
  963. lcdc_info.ch[0].lcd_cfg = ecovec_dvi_modes;
  964. lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_dvi_modes);
  965. gpio_set_value(GPIO_PTA2, 1);
  966. gpio_set_value(GPIO_PTU1, 1);
  967. } else {
  968. /* Panel */
  969. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  970. lcdc_info.ch[0].clock_divider = 2;
  971. lcdc_info.ch[0].lcd_cfg = ecovec_lcd_modes;
  972. lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_lcd_modes);
  973. gpio_set_value(GPIO_PTR1, 1);
  974. /* FIXME
  975. *
  976. * LCDDON control is needed for Panel,
  977. * but current sh_mobile_lcdc driver doesn't control it.
  978. * It is temporary correspondence
  979. */
  980. gpio_request(GPIO_PTF4, NULL);
  981. gpio_direction_output(GPIO_PTF4, 1);
  982. /* enable TouchScreen */
  983. i2c_register_board_info(0, &ts_i2c_clients, 1);
  984. set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
  985. }
  986. /* enable CEU0 */
  987. gpio_request(GPIO_FN_VIO0_D15, NULL);
  988. gpio_request(GPIO_FN_VIO0_D14, NULL);
  989. gpio_request(GPIO_FN_VIO0_D13, NULL);
  990. gpio_request(GPIO_FN_VIO0_D12, NULL);
  991. gpio_request(GPIO_FN_VIO0_D11, NULL);
  992. gpio_request(GPIO_FN_VIO0_D10, NULL);
  993. gpio_request(GPIO_FN_VIO0_D9, NULL);
  994. gpio_request(GPIO_FN_VIO0_D8, NULL);
  995. gpio_request(GPIO_FN_VIO0_D7, NULL);
  996. gpio_request(GPIO_FN_VIO0_D6, NULL);
  997. gpio_request(GPIO_FN_VIO0_D5, NULL);
  998. gpio_request(GPIO_FN_VIO0_D4, NULL);
  999. gpio_request(GPIO_FN_VIO0_D3, NULL);
  1000. gpio_request(GPIO_FN_VIO0_D2, NULL);
  1001. gpio_request(GPIO_FN_VIO0_D1, NULL);
  1002. gpio_request(GPIO_FN_VIO0_D0, NULL);
  1003. gpio_request(GPIO_FN_VIO0_VD, NULL);
  1004. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  1005. gpio_request(GPIO_FN_VIO0_FLD, NULL);
  1006. gpio_request(GPIO_FN_VIO0_HD, NULL);
  1007. platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
  1008. /* enable CEU1 */
  1009. gpio_request(GPIO_FN_VIO1_D7, NULL);
  1010. gpio_request(GPIO_FN_VIO1_D6, NULL);
  1011. gpio_request(GPIO_FN_VIO1_D5, NULL);
  1012. gpio_request(GPIO_FN_VIO1_D4, NULL);
  1013. gpio_request(GPIO_FN_VIO1_D3, NULL);
  1014. gpio_request(GPIO_FN_VIO1_D2, NULL);
  1015. gpio_request(GPIO_FN_VIO1_D1, NULL);
  1016. gpio_request(GPIO_FN_VIO1_D0, NULL);
  1017. gpio_request(GPIO_FN_VIO1_FLD, NULL);
  1018. gpio_request(GPIO_FN_VIO1_HD, NULL);
  1019. gpio_request(GPIO_FN_VIO1_VD, NULL);
  1020. gpio_request(GPIO_FN_VIO1_CLK, NULL);
  1021. platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
  1022. /* enable KEYSC */
  1023. gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
  1024. gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
  1025. gpio_request(GPIO_FN_KEYOUT3, NULL);
  1026. gpio_request(GPIO_FN_KEYOUT2, NULL);
  1027. gpio_request(GPIO_FN_KEYOUT1, NULL);
  1028. gpio_request(GPIO_FN_KEYOUT0, NULL);
  1029. gpio_request(GPIO_FN_KEYIN0, NULL);
  1030. /* enable user debug switch */
  1031. gpio_request(GPIO_PTR0, NULL);
  1032. gpio_request(GPIO_PTR4, NULL);
  1033. gpio_request(GPIO_PTR5, NULL);
  1034. gpio_request(GPIO_PTR6, NULL);
  1035. gpio_direction_input(GPIO_PTR0);
  1036. gpio_direction_input(GPIO_PTR4);
  1037. gpio_direction_input(GPIO_PTR5);
  1038. gpio_direction_input(GPIO_PTR6);
  1039. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  1040. /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
  1041. gpio_request(GPIO_FN_SDHI0CD, NULL);
  1042. gpio_request(GPIO_FN_SDHI0WP, NULL);
  1043. gpio_request(GPIO_FN_SDHI0CMD, NULL);
  1044. gpio_request(GPIO_FN_SDHI0CLK, NULL);
  1045. gpio_request(GPIO_FN_SDHI0D3, NULL);
  1046. gpio_request(GPIO_FN_SDHI0D2, NULL);
  1047. gpio_request(GPIO_FN_SDHI0D1, NULL);
  1048. gpio_request(GPIO_FN_SDHI0D0, NULL);
  1049. gpio_request(GPIO_PTB6, NULL);
  1050. gpio_direction_output(GPIO_PTB6, 0);
  1051. #if !defined(CONFIG_MMC_SH_MMCIF)
  1052. /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
  1053. gpio_request(GPIO_FN_SDHI1CD, NULL);
  1054. gpio_request(GPIO_FN_SDHI1WP, NULL);
  1055. gpio_request(GPIO_FN_SDHI1CMD, NULL);
  1056. gpio_request(GPIO_FN_SDHI1CLK, NULL);
  1057. gpio_request(GPIO_FN_SDHI1D3, NULL);
  1058. gpio_request(GPIO_FN_SDHI1D2, NULL);
  1059. gpio_request(GPIO_FN_SDHI1D1, NULL);
  1060. gpio_request(GPIO_FN_SDHI1D0, NULL);
  1061. gpio_request(GPIO_PTB7, NULL);
  1062. gpio_direction_output(GPIO_PTB7, 0);
  1063. /* I/O buffer drive ability is high for SDHI1 */
  1064. __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
  1065. #endif /* CONFIG_MMC_SH_MMCIF */
  1066. #else
  1067. /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
  1068. gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
  1069. gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
  1070. gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
  1071. gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
  1072. gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
  1073. gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
  1074. gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
  1075. gpio_request(GPIO_PTY6, NULL); /* write protect */
  1076. gpio_direction_input(GPIO_PTY6);
  1077. gpio_request(GPIO_PTY7, NULL); /* card detect */
  1078. gpio_direction_input(GPIO_PTY7);
  1079. spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
  1080. #endif
  1081. /* enable Video */
  1082. gpio_request(GPIO_PTU2, NULL);
  1083. gpio_direction_output(GPIO_PTU2, 1);
  1084. /* enable Camera */
  1085. gpio_request(GPIO_PTA3, NULL);
  1086. gpio_request(GPIO_PTA4, NULL);
  1087. gpio_direction_output(GPIO_PTA3, 0);
  1088. gpio_direction_output(GPIO_PTA4, 0);
  1089. /* enable FSI */
  1090. gpio_request(GPIO_FN_FSIMCKB, NULL);
  1091. gpio_request(GPIO_FN_FSIIBSD, NULL);
  1092. gpio_request(GPIO_FN_FSIOBSD, NULL);
  1093. gpio_request(GPIO_FN_FSIIBBCK, NULL);
  1094. gpio_request(GPIO_FN_FSIIBLRCK, NULL);
  1095. gpio_request(GPIO_FN_FSIOBBCK, NULL);
  1096. gpio_request(GPIO_FN_FSIOBLRCK, NULL);
  1097. gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
  1098. /* set SPU2 clock to 83.4 MHz */
  1099. clk = clk_get(NULL, "spu_clk");
  1100. if (!IS_ERR(clk)) {
  1101. clk_set_rate(clk, clk_round_rate(clk, 83333333));
  1102. clk_put(clk);
  1103. }
  1104. /* change parent of FSI B */
  1105. clk = clk_get(NULL, "fsib_clk");
  1106. if (!IS_ERR(clk)) {
  1107. /* 48kHz dummy clock was used to make sure 1/1 divide */
  1108. clk_set_rate(&sh7724_fsimckb_clk, 48000);
  1109. clk_set_parent(clk, &sh7724_fsimckb_clk);
  1110. clk_set_rate(clk, 48000);
  1111. clk_put(clk);
  1112. }
  1113. gpio_request(GPIO_PTU0, NULL);
  1114. gpio_direction_output(GPIO_PTU0, 0);
  1115. mdelay(20);
  1116. /* enable motion sensor */
  1117. gpio_request(GPIO_FN_INTC_IRQ1, NULL);
  1118. gpio_direction_input(GPIO_FN_INTC_IRQ1);
  1119. /* set VPU clock to 166 MHz */
  1120. clk = clk_get(NULL, "vpu_clk");
  1121. if (!IS_ERR(clk)) {
  1122. clk_set_rate(clk, clk_round_rate(clk, 166000000));
  1123. clk_put(clk);
  1124. }
  1125. /* enable IrDA */
  1126. gpio_request(GPIO_FN_IRDA_OUT, NULL);
  1127. gpio_request(GPIO_FN_IRDA_IN, NULL);
  1128. gpio_request(GPIO_PTU5, NULL);
  1129. gpio_direction_output(GPIO_PTU5, 0);
  1130. #if defined(CONFIG_MMC_SH_MMCIF)
  1131. /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
  1132. gpio_request(GPIO_FN_MMC_D7, NULL);
  1133. gpio_request(GPIO_FN_MMC_D6, NULL);
  1134. gpio_request(GPIO_FN_MMC_D5, NULL);
  1135. gpio_request(GPIO_FN_MMC_D4, NULL);
  1136. gpio_request(GPIO_FN_MMC_D3, NULL);
  1137. gpio_request(GPIO_FN_MMC_D2, NULL);
  1138. gpio_request(GPIO_FN_MMC_D1, NULL);
  1139. gpio_request(GPIO_FN_MMC_D0, NULL);
  1140. gpio_request(GPIO_FN_MMC_CLK, NULL);
  1141. gpio_request(GPIO_FN_MMC_CMD, NULL);
  1142. gpio_request(GPIO_PTB7, NULL);
  1143. gpio_direction_output(GPIO_PTB7, 0);
  1144. /* I/O buffer drive ability is high for MMCIF */
  1145. __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
  1146. #endif
  1147. /* enable I2C device */
  1148. i2c_register_board_info(0, i2c0_devices,
  1149. ARRAY_SIZE(i2c0_devices));
  1150. i2c_register_board_info(1, i2c1_devices,
  1151. ARRAY_SIZE(i2c1_devices));
  1152. #if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
  1153. /* VOU */
  1154. gpio_request(GPIO_FN_DV_D15, NULL);
  1155. gpio_request(GPIO_FN_DV_D14, NULL);
  1156. gpio_request(GPIO_FN_DV_D13, NULL);
  1157. gpio_request(GPIO_FN_DV_D12, NULL);
  1158. gpio_request(GPIO_FN_DV_D11, NULL);
  1159. gpio_request(GPIO_FN_DV_D10, NULL);
  1160. gpio_request(GPIO_FN_DV_D9, NULL);
  1161. gpio_request(GPIO_FN_DV_D8, NULL);
  1162. gpio_request(GPIO_FN_DV_CLKI, NULL);
  1163. gpio_request(GPIO_FN_DV_CLK, NULL);
  1164. gpio_request(GPIO_FN_DV_VSYNC, NULL);
  1165. gpio_request(GPIO_FN_DV_HSYNC, NULL);
  1166. /* AK8813 power / reset sequence */
  1167. gpio_request(GPIO_PTG4, NULL);
  1168. gpio_request(GPIO_PTU3, NULL);
  1169. /* Reset */
  1170. gpio_direction_output(GPIO_PTG4, 0);
  1171. /* Power down */
  1172. gpio_direction_output(GPIO_PTU3, 1);
  1173. udelay(10);
  1174. /* Power up, reset */
  1175. gpio_set_value(GPIO_PTU3, 0);
  1176. udelay(10);
  1177. /* Remove reset */
  1178. gpio_set_value(GPIO_PTG4, 1);
  1179. #endif
  1180. return platform_add_devices(ecovec_devices,
  1181. ARRAY_SIZE(ecovec_devices));
  1182. }
  1183. arch_initcall(arch_setup);
  1184. static int __init devices_setup(void)
  1185. {
  1186. sh_eth_init(&sh_eth_plat);
  1187. return 0;
  1188. }
  1189. device_initcall(devices_setup);
  1190. static struct sh_machine_vector mv_ecovec __initmv = {
  1191. .mv_name = "R0P7724 (EcoVec)",
  1192. };