smartreflex.c 27 KB

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  1. /*
  2. * OMAP SmartReflex Voltage Control
  3. *
  4. * Author: Thara Gopinath <thara@ti.com>
  5. *
  6. * Copyright (C) 2010 Texas Instruments, Inc.
  7. * Thara Gopinath <thara@ti.com>
  8. *
  9. * Copyright (C) 2008 Nokia Corporation
  10. * Kalle Jokiniemi
  11. *
  12. * Copyright (C) 2007 Texas Instruments, Inc.
  13. * Lesly A M <x0080970@ti.com>
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. #include <linux/interrupt.h>
  20. #include <linux/clk.h>
  21. #include <linux/io.h>
  22. #include <linux/debugfs.h>
  23. #include <linux/delay.h>
  24. #include <linux/slab.h>
  25. #include <linux/pm_runtime.h>
  26. #include <plat/common.h>
  27. #include <plat/smartreflex.h>
  28. #include "pm.h"
  29. #define SMARTREFLEX_NAME_LEN 16
  30. #define NVALUE_NAME_LEN 40
  31. #define SR_DISABLE_TIMEOUT 200
  32. struct omap_sr {
  33. int srid;
  34. int ip_type;
  35. int nvalue_count;
  36. bool autocomp_active;
  37. u32 clk_length;
  38. u32 err_weight;
  39. u32 err_minlimit;
  40. u32 err_maxlimit;
  41. u32 accum_data;
  42. u32 senn_avgweight;
  43. u32 senp_avgweight;
  44. u32 senp_mod;
  45. u32 senn_mod;
  46. unsigned int irq;
  47. void __iomem *base;
  48. struct platform_device *pdev;
  49. struct list_head node;
  50. struct omap_sr_nvalue_table *nvalue_table;
  51. struct voltagedomain *voltdm;
  52. };
  53. /* sr_list contains all the instances of smartreflex module */
  54. static LIST_HEAD(sr_list);
  55. static struct omap_sr_class_data *sr_class;
  56. static struct omap_sr_pmic_data *sr_pmic_data;
  57. static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
  58. {
  59. __raw_writel(value, (sr->base + offset));
  60. }
  61. static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
  62. u32 value)
  63. {
  64. u32 reg_val;
  65. u32 errconfig_offs = 0, errconfig_mask = 0;
  66. reg_val = __raw_readl(sr->base + offset);
  67. reg_val &= ~mask;
  68. /*
  69. * Smartreflex error config register is special as it contains
  70. * certain status bits which if written a 1 into means a clear
  71. * of those bits. So in order to make sure no accidental write of
  72. * 1 happens to those status bits, do a clear of them in the read
  73. * value. This mean this API doesn't rewrite values in these bits
  74. * if they are currently set, but does allow the caller to write
  75. * those bits.
  76. */
  77. if (sr->ip_type == SR_TYPE_V1) {
  78. errconfig_offs = ERRCONFIG_V1;
  79. errconfig_mask = ERRCONFIG_STATUS_V1_MASK;
  80. } else if (sr->ip_type == SR_TYPE_V2) {
  81. errconfig_offs = ERRCONFIG_V2;
  82. errconfig_mask = ERRCONFIG_VPBOUNDINTST_V2;
  83. }
  84. if (offset == errconfig_offs)
  85. reg_val &= ~errconfig_mask;
  86. reg_val |= value;
  87. __raw_writel(reg_val, (sr->base + offset));
  88. }
  89. static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
  90. {
  91. return __raw_readl(sr->base + offset);
  92. }
  93. static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
  94. {
  95. struct omap_sr *sr_info;
  96. if (!voltdm) {
  97. pr_err("%s: Null voltage domain passed!\n", __func__);
  98. return ERR_PTR(-EINVAL);
  99. }
  100. list_for_each_entry(sr_info, &sr_list, node) {
  101. if (voltdm == sr_info->voltdm)
  102. return sr_info;
  103. }
  104. return ERR_PTR(-ENODATA);
  105. }
  106. static irqreturn_t sr_interrupt(int irq, void *data)
  107. {
  108. struct omap_sr *sr_info = (struct omap_sr *)data;
  109. u32 status = 0;
  110. if (sr_info->ip_type == SR_TYPE_V1) {
  111. /* Read the status bits */
  112. status = sr_read_reg(sr_info, ERRCONFIG_V1);
  113. /* Clear them by writing back */
  114. sr_write_reg(sr_info, ERRCONFIG_V1, status);
  115. } else if (sr_info->ip_type == SR_TYPE_V2) {
  116. /* Read the status bits */
  117. sr_read_reg(sr_info, IRQSTATUS);
  118. /* Clear them by writing back */
  119. sr_write_reg(sr_info, IRQSTATUS, status);
  120. }
  121. if (sr_class->class_type == SR_CLASS2 && sr_class->notify)
  122. sr_class->notify(sr_info->voltdm, status);
  123. return IRQ_HANDLED;
  124. }
  125. static void sr_set_clk_length(struct omap_sr *sr)
  126. {
  127. struct clk *sys_ck;
  128. u32 sys_clk_speed;
  129. if (cpu_is_omap34xx())
  130. sys_ck = clk_get(NULL, "sys_ck");
  131. else
  132. sys_ck = clk_get(NULL, "sys_clkin_ck");
  133. if (IS_ERR(sys_ck)) {
  134. dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n",
  135. __func__);
  136. return;
  137. }
  138. sys_clk_speed = clk_get_rate(sys_ck);
  139. clk_put(sys_ck);
  140. switch (sys_clk_speed) {
  141. case 12000000:
  142. sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
  143. break;
  144. case 13000000:
  145. sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
  146. break;
  147. case 19200000:
  148. sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
  149. break;
  150. case 26000000:
  151. sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
  152. break;
  153. case 38400000:
  154. sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
  155. break;
  156. default:
  157. dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n",
  158. __func__, sys_clk_speed);
  159. break;
  160. }
  161. }
  162. static void sr_set_regfields(struct omap_sr *sr)
  163. {
  164. /*
  165. * For time being these values are defined in smartreflex.h
  166. * and populated during init. May be they can be moved to board
  167. * file or pmic specific data structure. In that case these structure
  168. * fields will have to be populated using the pdata or pmic structure.
  169. */
  170. if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
  171. sr->err_weight = OMAP3430_SR_ERRWEIGHT;
  172. sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
  173. sr->accum_data = OMAP3430_SR_ACCUMDATA;
  174. if (!(strcmp(sr->voltdm->name, "mpu"))) {
  175. sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
  176. sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
  177. } else {
  178. sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
  179. sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
  180. }
  181. }
  182. }
  183. static void sr_start_vddautocomp(struct omap_sr *sr)
  184. {
  185. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  186. dev_warn(&sr->pdev->dev,
  187. "%s: smartreflex class driver not registered\n",
  188. __func__);
  189. return;
  190. }
  191. if (!sr_class->enable(sr->voltdm))
  192. sr->autocomp_active = true;
  193. }
  194. static void sr_stop_vddautocomp(struct omap_sr *sr)
  195. {
  196. if (!sr_class || !(sr_class->disable)) {
  197. dev_warn(&sr->pdev->dev,
  198. "%s: smartreflex class driver not registered\n",
  199. __func__);
  200. return;
  201. }
  202. if (sr->autocomp_active) {
  203. sr_class->disable(sr->voltdm, 1);
  204. sr->autocomp_active = false;
  205. }
  206. }
  207. /*
  208. * This function handles the intializations which have to be done
  209. * only when both sr device and class driver regiter has
  210. * completed. This will be attempted to be called from both sr class
  211. * driver register and sr device intializtion API's. Only one call
  212. * will ultimately succeed.
  213. *
  214. * Currenly this function registers interrrupt handler for a particular SR
  215. * if smartreflex class driver is already registered and has
  216. * requested for interrupts and the SR interrupt line in present.
  217. */
  218. static int sr_late_init(struct omap_sr *sr_info)
  219. {
  220. char *name;
  221. struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
  222. struct resource *mem;
  223. int ret = 0;
  224. if (sr_class->class_type == SR_CLASS2 &&
  225. sr_class->notify_flags && sr_info->irq) {
  226. name = kzalloc(SMARTREFLEX_NAME_LEN + 1, GFP_KERNEL);
  227. strcpy(name, "sr_");
  228. strcat(name, sr_info->voltdm->name);
  229. ret = request_irq(sr_info->irq, sr_interrupt,
  230. 0, name, (void *)sr_info);
  231. if (ret)
  232. goto error;
  233. }
  234. if (pdata && pdata->enable_on_init)
  235. sr_start_vddautocomp(sr_info);
  236. return ret;
  237. error:
  238. iounmap(sr_info->base);
  239. mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0);
  240. release_mem_region(mem->start, resource_size(mem));
  241. list_del(&sr_info->node);
  242. dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
  243. "interrupt handler. Smartreflex will"
  244. "not function as desired\n", __func__);
  245. kfree(sr_info);
  246. return ret;
  247. }
  248. static void sr_v1_disable(struct omap_sr *sr)
  249. {
  250. int timeout = 0;
  251. /* Enable MCUDisableAcknowledge interrupt */
  252. sr_modify_reg(sr, ERRCONFIG_V1,
  253. ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
  254. /* SRCONFIG - disable SR */
  255. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  256. /* Disable all other SR interrupts and clear the status */
  257. sr_modify_reg(sr, ERRCONFIG_V1,
  258. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  259. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
  260. (ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
  261. ERRCONFIG_MCUBOUNDINTST |
  262. ERRCONFIG_VPBOUNDINTST_V1));
  263. /*
  264. * Wait for SR to be disabled.
  265. * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
  266. */
  267. omap_test_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
  268. ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
  269. timeout);
  270. if (timeout >= SR_DISABLE_TIMEOUT)
  271. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  272. __func__);
  273. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  274. sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
  275. ERRCONFIG_MCUDISACKINTST);
  276. }
  277. static void sr_v2_disable(struct omap_sr *sr)
  278. {
  279. int timeout = 0;
  280. /* Enable MCUDisableAcknowledge interrupt */
  281. sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
  282. /* SRCONFIG - disable SR */
  283. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  284. /* Disable all other SR interrupts and clear the status */
  285. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  286. ERRCONFIG_VPBOUNDINTST_V2);
  287. sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
  288. IRQENABLE_MCUVALIDINT |
  289. IRQENABLE_MCUBOUNDSINT));
  290. sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
  291. IRQSTATUS_MCVALIDINT |
  292. IRQSTATUS_MCBOUNDSINT));
  293. /*
  294. * Wait for SR to be disabled.
  295. * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
  296. */
  297. omap_test_timeout((sr_read_reg(sr, IRQSTATUS) &
  298. IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
  299. timeout);
  300. if (timeout >= SR_DISABLE_TIMEOUT)
  301. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  302. __func__);
  303. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  304. sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
  305. sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
  306. }
  307. static u32 sr_retrieve_nvalue(struct omap_sr *sr, u32 efuse_offs)
  308. {
  309. int i;
  310. if (!sr->nvalue_table) {
  311. dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
  312. __func__);
  313. return 0;
  314. }
  315. for (i = 0; i < sr->nvalue_count; i++) {
  316. if (sr->nvalue_table[i].efuse_offs == efuse_offs)
  317. return sr->nvalue_table[i].nvalue;
  318. }
  319. return 0;
  320. }
  321. /* Public Functions */
  322. /**
  323. * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the
  324. * error generator module.
  325. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  326. *
  327. * This API is to be called from the smartreflex class driver to
  328. * configure the error generator module inside the smartreflex module.
  329. * SR settings if using the ERROR module inside Smartreflex.
  330. * SR CLASS 3 by default uses only the ERROR module where as
  331. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  332. * module. Returns 0 on success and error value in case of failure.
  333. */
  334. int sr_configure_errgen(struct voltagedomain *voltdm)
  335. {
  336. u32 sr_config, sr_errconfig, errconfig_offs, vpboundint_en;
  337. u32 vpboundint_st, senp_en = 0, senn_en = 0;
  338. u8 senp_shift, senn_shift;
  339. struct omap_sr *sr = _sr_lookup(voltdm);
  340. if (IS_ERR(sr)) {
  341. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  342. __func__, voltdm->name);
  343. return -EINVAL;
  344. }
  345. if (!sr->clk_length)
  346. sr_set_clk_length(sr);
  347. senp_en = sr->senp_mod;
  348. senn_en = sr->senn_mod;
  349. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  350. SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
  351. if (sr->ip_type == SR_TYPE_V1) {
  352. sr_config |= SRCONFIG_DELAYCTRL;
  353. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  354. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  355. errconfig_offs = ERRCONFIG_V1;
  356. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  357. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  358. } else if (sr->ip_type == SR_TYPE_V2) {
  359. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  360. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  361. errconfig_offs = ERRCONFIG_V2;
  362. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  363. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  364. } else {
  365. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  366. "module without specifying the ip\n", __func__);
  367. return -EINVAL;
  368. }
  369. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  370. sr_write_reg(sr, SRCONFIG, sr_config);
  371. sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
  372. (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
  373. (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
  374. sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
  375. SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
  376. sr_errconfig);
  377. /* Enabling the interrupts if the ERROR module is used */
  378. sr_modify_reg(sr, errconfig_offs,
  379. vpboundint_en, (vpboundint_en | vpboundint_st));
  380. return 0;
  381. }
  382. /**
  383. * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the
  384. * minmaxavg module.
  385. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  386. *
  387. * This API is to be called from the smartreflex class driver to
  388. * configure the minmaxavg module inside the smartreflex module.
  389. * SR settings if using the ERROR module inside Smartreflex.
  390. * SR CLASS 3 by default uses only the ERROR module where as
  391. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  392. * module. Returns 0 on success and error value in case of failure.
  393. */
  394. int sr_configure_minmax(struct voltagedomain *voltdm)
  395. {
  396. u32 sr_config, sr_avgwt;
  397. u32 senp_en = 0, senn_en = 0;
  398. u8 senp_shift, senn_shift;
  399. struct omap_sr *sr = _sr_lookup(voltdm);
  400. if (IS_ERR(sr)) {
  401. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  402. __func__, voltdm->name);
  403. return -EINVAL;
  404. }
  405. if (!sr->clk_length)
  406. sr_set_clk_length(sr);
  407. senp_en = sr->senp_mod;
  408. senn_en = sr->senn_mod;
  409. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  410. SRCONFIG_SENENABLE |
  411. (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
  412. if (sr->ip_type == SR_TYPE_V1) {
  413. sr_config |= SRCONFIG_DELAYCTRL;
  414. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  415. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  416. } else if (sr->ip_type == SR_TYPE_V2) {
  417. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  418. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  419. } else {
  420. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  421. "module without specifying the ip\n", __func__);
  422. return -EINVAL;
  423. }
  424. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  425. sr_write_reg(sr, SRCONFIG, sr_config);
  426. sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
  427. (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
  428. sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
  429. /*
  430. * Enabling the interrupts if MINMAXAVG module is used.
  431. * TODO: check if all the interrupts are mandatory
  432. */
  433. if (sr->ip_type == SR_TYPE_V1) {
  434. sr_modify_reg(sr, ERRCONFIG_V1,
  435. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  436. ERRCONFIG_MCUBOUNDINTEN),
  437. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
  438. ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
  439. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
  440. } else if (sr->ip_type == SR_TYPE_V2) {
  441. sr_write_reg(sr, IRQSTATUS,
  442. IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
  443. IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
  444. sr_write_reg(sr, IRQENABLE_SET,
  445. IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
  446. IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
  447. }
  448. return 0;
  449. }
  450. /**
  451. * sr_enable() - Enables the smartreflex module.
  452. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  453. * @volt: The voltage at which the Voltage domain associated with
  454. * the smartreflex module is operating at.
  455. * This is required only to program the correct Ntarget value.
  456. *
  457. * This API is to be called from the smartreflex class driver to
  458. * enable a smartreflex module. Returns 0 on success. Returns error
  459. * value if the voltage passed is wrong or if ntarget value is wrong.
  460. */
  461. int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
  462. {
  463. u32 nvalue_reciprocal;
  464. struct omap_volt_data *volt_data;
  465. struct omap_sr *sr = _sr_lookup(voltdm);
  466. int ret;
  467. if (IS_ERR(sr)) {
  468. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  469. __func__, voltdm->name);
  470. return -EINVAL;
  471. }
  472. volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
  473. if (IS_ERR(volt_data)) {
  474. dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
  475. "for nominal voltage %ld\n", __func__, volt);
  476. return -ENODATA;
  477. }
  478. nvalue_reciprocal = sr_retrieve_nvalue(sr, volt_data->sr_efuse_offs);
  479. if (!nvalue_reciprocal) {
  480. dev_warn(&sr->pdev->dev, "%s: NVALUE = 0 at voltage %ld\n",
  481. __func__, volt);
  482. return -ENODATA;
  483. }
  484. /* errminlimit is opp dependent and hence linked to voltage */
  485. sr->err_minlimit = volt_data->sr_errminlimit;
  486. pm_runtime_get_sync(&sr->pdev->dev);
  487. /* Check if SR is already enabled. If yes do nothing */
  488. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
  489. return 0;
  490. /* Configure SR */
  491. ret = sr_class->configure(voltdm);
  492. if (ret)
  493. return ret;
  494. sr_write_reg(sr, NVALUERECIPROCAL, nvalue_reciprocal);
  495. /* SRCONFIG - enable SR */
  496. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
  497. return 0;
  498. }
  499. /**
  500. * sr_disable() - Disables the smartreflex module.
  501. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  502. *
  503. * This API is to be called from the smartreflex class driver to
  504. * disable a smartreflex module.
  505. */
  506. void sr_disable(struct voltagedomain *voltdm)
  507. {
  508. struct omap_sr *sr = _sr_lookup(voltdm);
  509. if (IS_ERR(sr)) {
  510. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  511. __func__, voltdm->name);
  512. return;
  513. }
  514. /* Check if SR clocks are already disabled. If yes do nothing */
  515. if (pm_runtime_suspended(&sr->pdev->dev))
  516. return;
  517. /*
  518. * Disable SR if only it is indeed enabled. Else just
  519. * disable the clocks.
  520. */
  521. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
  522. if (sr->ip_type == SR_TYPE_V1)
  523. sr_v1_disable(sr);
  524. else if (sr->ip_type == SR_TYPE_V2)
  525. sr_v2_disable(sr);
  526. }
  527. pm_runtime_put_sync(&sr->pdev->dev);
  528. }
  529. /**
  530. * sr_register_class() - API to register a smartreflex class parameters.
  531. * @class_data: The structure containing various sr class specific data.
  532. *
  533. * This API is to be called by the smartreflex class driver to register itself
  534. * with the smartreflex driver during init. Returns 0 on success else the
  535. * error value.
  536. */
  537. int sr_register_class(struct omap_sr_class_data *class_data)
  538. {
  539. struct omap_sr *sr_info;
  540. if (!class_data) {
  541. pr_warning("%s:, Smartreflex class data passed is NULL\n",
  542. __func__);
  543. return -EINVAL;
  544. }
  545. if (sr_class) {
  546. pr_warning("%s: Smartreflex class driver already registered\n",
  547. __func__);
  548. return -EBUSY;
  549. }
  550. sr_class = class_data;
  551. /*
  552. * Call into late init to do intializations that require
  553. * both sr driver and sr class driver to be initiallized.
  554. */
  555. list_for_each_entry(sr_info, &sr_list, node)
  556. sr_late_init(sr_info);
  557. return 0;
  558. }
  559. /**
  560. * omap_sr_enable() - API to enable SR clocks and to call into the
  561. * registered smartreflex class enable API.
  562. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  563. *
  564. * This API is to be called from the kernel in order to enable
  565. * a particular smartreflex module. This API will do the initial
  566. * configurations to turn on the smartreflex module and in turn call
  567. * into the registered smartreflex class enable API.
  568. */
  569. void omap_sr_enable(struct voltagedomain *voltdm)
  570. {
  571. struct omap_sr *sr = _sr_lookup(voltdm);
  572. if (IS_ERR(sr)) {
  573. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  574. __func__, voltdm->name);
  575. return;
  576. }
  577. if (!sr->autocomp_active)
  578. return;
  579. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  580. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  581. "registered\n", __func__);
  582. return;
  583. }
  584. sr_class->enable(voltdm);
  585. }
  586. /**
  587. * omap_sr_disable() - API to disable SR without resetting the voltage
  588. * processor voltage
  589. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  590. *
  591. * This API is to be called from the kernel in order to disable
  592. * a particular smartreflex module. This API will in turn call
  593. * into the registered smartreflex class disable API. This API will tell
  594. * the smartreflex class disable not to reset the VP voltage after
  595. * disabling smartreflex.
  596. */
  597. void omap_sr_disable(struct voltagedomain *voltdm)
  598. {
  599. struct omap_sr *sr = _sr_lookup(voltdm);
  600. if (IS_ERR(sr)) {
  601. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  602. __func__, voltdm->name);
  603. return;
  604. }
  605. if (!sr->autocomp_active)
  606. return;
  607. if (!sr_class || !(sr_class->disable)) {
  608. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  609. "registered\n", __func__);
  610. return;
  611. }
  612. sr_class->disable(voltdm, 0);
  613. }
  614. /**
  615. * omap_sr_disable_reset_volt() - API to disable SR and reset the
  616. * voltage processor voltage
  617. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  618. *
  619. * This API is to be called from the kernel in order to disable
  620. * a particular smartreflex module. This API will in turn call
  621. * into the registered smartreflex class disable API. This API will tell
  622. * the smartreflex class disable to reset the VP voltage after
  623. * disabling smartreflex.
  624. */
  625. void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
  626. {
  627. struct omap_sr *sr = _sr_lookup(voltdm);
  628. if (IS_ERR(sr)) {
  629. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  630. __func__, voltdm->name);
  631. return;
  632. }
  633. if (!sr->autocomp_active)
  634. return;
  635. if (!sr_class || !(sr_class->disable)) {
  636. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  637. "registered\n", __func__);
  638. return;
  639. }
  640. sr_class->disable(voltdm, 1);
  641. }
  642. /**
  643. * omap_sr_register_pmic() - API to register pmic specific info.
  644. * @pmic_data: The structure containing pmic specific data.
  645. *
  646. * This API is to be called from the PMIC specific code to register with
  647. * smartreflex driver pmic specific info. Currently the only info required
  648. * is the smartreflex init on the PMIC side.
  649. */
  650. void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
  651. {
  652. if (!pmic_data) {
  653. pr_warning("%s: Trying to register NULL PMIC data structure"
  654. "with smartreflex\n", __func__);
  655. return;
  656. }
  657. sr_pmic_data = pmic_data;
  658. }
  659. /* PM Debug Fs enteries to enable disable smartreflex. */
  660. static int omap_sr_autocomp_show(void *data, u64 *val)
  661. {
  662. struct omap_sr *sr_info = (struct omap_sr *) data;
  663. if (!sr_info) {
  664. pr_warning("%s: omap_sr struct not found\n", __func__);
  665. return -EINVAL;
  666. }
  667. *val = sr_info->autocomp_active;
  668. return 0;
  669. }
  670. static int omap_sr_autocomp_store(void *data, u64 val)
  671. {
  672. struct omap_sr *sr_info = (struct omap_sr *) data;
  673. if (!sr_info) {
  674. pr_warning("%s: omap_sr struct not found\n", __func__);
  675. return -EINVAL;
  676. }
  677. /* Sanity check */
  678. if (val && (val != 1)) {
  679. pr_warning("%s: Invalid argument %lld\n", __func__, val);
  680. return -EINVAL;
  681. }
  682. if (!val)
  683. sr_stop_vddautocomp(sr_info);
  684. else
  685. sr_start_vddautocomp(sr_info);
  686. return 0;
  687. }
  688. DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
  689. omap_sr_autocomp_store, "%llu\n");
  690. static int __init omap_sr_probe(struct platform_device *pdev)
  691. {
  692. struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
  693. struct omap_sr_data *pdata = pdev->dev.platform_data;
  694. struct resource *mem, *irq;
  695. struct dentry *vdd_dbg_dir, *dbg_dir, *nvalue_dir;
  696. struct omap_volt_data *volt_data;
  697. int i, ret = 0;
  698. if (!sr_info) {
  699. dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
  700. __func__);
  701. return -ENOMEM;
  702. }
  703. if (!pdata) {
  704. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  705. ret = -EINVAL;
  706. goto err_free_devinfo;
  707. }
  708. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  709. if (!mem) {
  710. dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
  711. ret = -ENODEV;
  712. goto err_free_devinfo;
  713. }
  714. irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  715. pm_runtime_enable(&pdev->dev);
  716. sr_info->pdev = pdev;
  717. sr_info->srid = pdev->id;
  718. sr_info->voltdm = pdata->voltdm;
  719. sr_info->nvalue_table = pdata->nvalue_table;
  720. sr_info->nvalue_count = pdata->nvalue_count;
  721. sr_info->senn_mod = pdata->senn_mod;
  722. sr_info->senp_mod = pdata->senp_mod;
  723. sr_info->autocomp_active = false;
  724. sr_info->ip_type = pdata->ip_type;
  725. sr_info->base = ioremap(mem->start, resource_size(mem));
  726. if (!sr_info->base) {
  727. dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
  728. ret = -ENOMEM;
  729. goto err_release_region;
  730. }
  731. if (irq)
  732. sr_info->irq = irq->start;
  733. sr_set_clk_length(sr_info);
  734. sr_set_regfields(sr_info);
  735. list_add(&sr_info->node, &sr_list);
  736. /*
  737. * Call into late init to do intializations that require
  738. * both sr driver and sr class driver to be initiallized.
  739. */
  740. if (sr_class) {
  741. ret = sr_late_init(sr_info);
  742. if (ret) {
  743. pr_warning("%s: Error in SR late init\n", __func__);
  744. return ret;
  745. }
  746. }
  747. dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
  748. /*
  749. * If the voltage domain debugfs directory is not created, do
  750. * not try to create rest of the debugfs entries.
  751. */
  752. vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm);
  753. if (!vdd_dbg_dir)
  754. return -EINVAL;
  755. dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir);
  756. if (IS_ERR(dbg_dir)) {
  757. dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
  758. __func__);
  759. return PTR_ERR(dbg_dir);
  760. }
  761. (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUGO, dbg_dir,
  762. (void *)sr_info, &pm_sr_fops);
  763. (void) debugfs_create_x32("errweight", S_IRUGO, dbg_dir,
  764. &sr_info->err_weight);
  765. (void) debugfs_create_x32("errmaxlimit", S_IRUGO, dbg_dir,
  766. &sr_info->err_maxlimit);
  767. (void) debugfs_create_x32("errminlimit", S_IRUGO, dbg_dir,
  768. &sr_info->err_minlimit);
  769. nvalue_dir = debugfs_create_dir("nvalue", dbg_dir);
  770. if (IS_ERR(nvalue_dir)) {
  771. dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
  772. "for n-values\n", __func__);
  773. return PTR_ERR(nvalue_dir);
  774. }
  775. omap_voltage_get_volttable(sr_info->voltdm, &volt_data);
  776. if (!volt_data) {
  777. dev_warn(&pdev->dev, "%s: No Voltage table for the"
  778. " corresponding vdd vdd_%s. Cannot create debugfs"
  779. "entries for n-values\n",
  780. __func__, sr_info->voltdm->name);
  781. return -ENODATA;
  782. }
  783. for (i = 0; i < sr_info->nvalue_count; i++) {
  784. char *name;
  785. char volt_name[32];
  786. name = kzalloc(NVALUE_NAME_LEN + 1, GFP_KERNEL);
  787. if (!name) {
  788. dev_err(&pdev->dev, "%s: Unable to allocate memory"
  789. " for n-value directory name\n", __func__);
  790. return -ENOMEM;
  791. }
  792. strcpy(name, "volt_");
  793. sprintf(volt_name, "%d", volt_data[i].volt_nominal);
  794. strcat(name, volt_name);
  795. (void) debugfs_create_x32(name, S_IRUGO | S_IWUGO, nvalue_dir,
  796. &(sr_info->nvalue_table[i].nvalue));
  797. }
  798. return ret;
  799. err_release_region:
  800. release_mem_region(mem->start, resource_size(mem));
  801. err_free_devinfo:
  802. kfree(sr_info);
  803. return ret;
  804. }
  805. static int __devexit omap_sr_remove(struct platform_device *pdev)
  806. {
  807. struct omap_sr_data *pdata = pdev->dev.platform_data;
  808. struct omap_sr *sr_info;
  809. struct resource *mem;
  810. if (!pdata) {
  811. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  812. return -EINVAL;
  813. }
  814. sr_info = _sr_lookup(pdata->voltdm);
  815. if (IS_ERR(sr_info)) {
  816. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  817. __func__);
  818. return -EINVAL;
  819. }
  820. if (sr_info->autocomp_active)
  821. sr_stop_vddautocomp(sr_info);
  822. list_del(&sr_info->node);
  823. iounmap(sr_info->base);
  824. kfree(sr_info);
  825. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  826. release_mem_region(mem->start, resource_size(mem));
  827. return 0;
  828. }
  829. static struct platform_driver smartreflex_driver = {
  830. .remove = omap_sr_remove,
  831. .driver = {
  832. .name = "smartreflex",
  833. },
  834. };
  835. static int __init sr_init(void)
  836. {
  837. int ret = 0;
  838. /*
  839. * sr_init is a late init. If by then a pmic specific API is not
  840. * registered either there is no need for anything to be done on
  841. * the PMIC side or somebody has forgotten to register a PMIC
  842. * handler. Warn for the second condition.
  843. */
  844. if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
  845. sr_pmic_data->sr_pmic_init();
  846. else
  847. pr_warning("%s: No PMIC hook to init smartreflex\n", __func__);
  848. ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe);
  849. if (ret) {
  850. pr_err("%s: platform driver register failed for SR\n",
  851. __func__);
  852. return ret;
  853. }
  854. return 0;
  855. }
  856. static void __exit sr_exit(void)
  857. {
  858. platform_driver_unregister(&smartreflex_driver);
  859. }
  860. late_initcall(sr_init);
  861. module_exit(sr_exit);
  862. MODULE_DESCRIPTION("OMAP Smartreflex Driver");
  863. MODULE_LICENSE("GPL");
  864. MODULE_ALIAS("platform:" DRIVER_NAME);
  865. MODULE_AUTHOR("Texas Instruments Inc");