devices-qsd8x50.c 4.5 KB

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  1. /*
  2. * Copyright (C) 2008 Google, Inc.
  3. * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
  4. *
  5. * This software is licensed under the terms of the GNU General Public
  6. * License version 2, as published by the Free Software Foundation, and
  7. * may be copied, distributed, and modified under those terms.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <mach/irqs.h>
  19. #include <mach/msm_iomap.h>
  20. #include <mach/dma.h>
  21. #include <mach/board.h>
  22. #include "devices.h"
  23. #include <asm/mach/flash.h>
  24. #include <mach/mmc.h>
  25. static struct resource resources_uart3[] = {
  26. {
  27. .start = INT_UART3,
  28. .end = INT_UART3,
  29. .flags = IORESOURCE_IRQ,
  30. },
  31. {
  32. .start = MSM_UART3_PHYS,
  33. .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
  34. .flags = IORESOURCE_MEM,
  35. },
  36. };
  37. struct platform_device msm_device_uart3 = {
  38. .name = "msm_serial",
  39. .id = 2,
  40. .num_resources = ARRAY_SIZE(resources_uart3),
  41. .resource = resources_uart3,
  42. };
  43. struct platform_device msm_device_smd = {
  44. .name = "msm_smd",
  45. .id = -1,
  46. };
  47. static struct resource resources_otg[] = {
  48. {
  49. .start = MSM_HSUSB_PHYS,
  50. .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
  51. .flags = IORESOURCE_MEM,
  52. },
  53. {
  54. .start = INT_USB_HS,
  55. .end = INT_USB_HS,
  56. .flags = IORESOURCE_IRQ,
  57. },
  58. };
  59. struct platform_device msm_device_otg = {
  60. .name = "msm_otg",
  61. .id = -1,
  62. .num_resources = ARRAY_SIZE(resources_otg),
  63. .resource = resources_otg,
  64. .dev = {
  65. .coherent_dma_mask = 0xffffffff,
  66. },
  67. };
  68. static struct resource resources_hsusb[] = {
  69. {
  70. .start = MSM_HSUSB_PHYS,
  71. .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
  72. .flags = IORESOURCE_MEM,
  73. },
  74. {
  75. .start = INT_USB_HS,
  76. .end = INT_USB_HS,
  77. .flags = IORESOURCE_IRQ,
  78. },
  79. };
  80. struct platform_device msm_device_hsusb = {
  81. .name = "msm_hsusb",
  82. .id = -1,
  83. .num_resources = ARRAY_SIZE(resources_hsusb),
  84. .resource = resources_hsusb,
  85. .dev = {
  86. .coherent_dma_mask = 0xffffffff,
  87. },
  88. };
  89. static u64 dma_mask = 0xffffffffULL;
  90. static struct resource resources_hsusb_host[] = {
  91. {
  92. .start = MSM_HSUSB_PHYS,
  93. .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
  94. .flags = IORESOURCE_MEM,
  95. },
  96. {
  97. .start = INT_USB_HS,
  98. .end = INT_USB_HS,
  99. .flags = IORESOURCE_IRQ,
  100. },
  101. };
  102. struct platform_device msm_device_hsusb_host = {
  103. .name = "msm_hsusb_host",
  104. .id = -1,
  105. .num_resources = ARRAY_SIZE(resources_hsusb_host),
  106. .resource = resources_hsusb_host,
  107. .dev = {
  108. .dma_mask = &dma_mask,
  109. .coherent_dma_mask = 0xffffffffULL,
  110. },
  111. };
  112. struct clk msm_clocks_8x50[] = {
  113. CLK_PCOM("adm_clk", ADM_CLK, NULL, 0),
  114. CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN),
  115. CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0),
  116. CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
  117. CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX),
  118. CLK_PCOM("gp_clk", GP_CLK, NULL, 0),
  119. CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0),
  120. CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0),
  121. CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0),
  122. CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF),
  123. CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0),
  124. CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX),
  125. CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF),
  126. CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0),
  127. CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0),
  128. CLK_PCOM("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, 0),
  129. CLK_PCOM("pbus_clk", PBUS_CLK, NULL, CLK_MIN),
  130. CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0),
  131. CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF),
  132. CLK_PCOM("spi_clk", SPI_CLK, NULL, 0),
  133. CLK_PCOM("tsif_clk", TSIF_CLK, NULL, 0),
  134. CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0),
  135. CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0),
  136. CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0),
  137. CLK_PCOM("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF),
  138. CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF),
  139. CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF),
  140. CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0),
  141. CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF | CLK_MIN),
  142. CLK_PCOM("vfe_clk", VFE_CLK, NULL, OFF),
  143. CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF),
  144. CLK_PCOM("vfe_axi_clk", VFE_AXI_CLK, NULL, OFF),
  145. CLK_PCOM("usb_hs2_clk", USB_HS2_CLK, NULL, OFF),
  146. CLK_PCOM("usb_hs2_pclk", USB_HS2_P_CLK, NULL, OFF),
  147. CLK_PCOM("usb_hs3_clk", USB_HS3_CLK, NULL, OFF),
  148. CLK_PCOM("usb_hs3_pclk", USB_HS3_P_CLK, NULL, OFF),
  149. CLK_PCOM("usb_phy_clk", USB_PHY_CLK, NULL, 0),
  150. };
  151. unsigned msm_num_clocks_8x50 = ARRAY_SIZE(msm_clocks_8x50);