pxa.c 20 KB

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  1. /*
  2. * linux/drivers/serial/pxa.c
  3. *
  4. * Based on drivers/serial/8250.c by Russell King.
  5. *
  6. * Author: Nicolas Pitre
  7. * Created: Feb 20, 2003
  8. * Copyright: (C) 2003 Monta Vista Software, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * Note 1: This driver is made separate from the already too overloaded
  16. * 8250.c because it needs some kirks of its own and that'll make it
  17. * easier to add DMA support.
  18. *
  19. * Note 2: I'm too sick of device allocation policies for serial ports.
  20. * If someone else wants to request an "official" allocation of major/minor
  21. * for this driver please be my guest. And don't forget that new hardware
  22. * to come from Intel might have more than 3 or 4 of those UARTs. Let's
  23. * hope for a better port registration and dynamic device allocation scheme
  24. * with the serial core maintainer satisfaction to appear soon.
  25. */
  26. #include <linux/config.h>
  27. #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  28. #define SUPPORT_SYSRQ
  29. #endif
  30. #include <linux/module.h>
  31. #include <linux/ioport.h>
  32. #include <linux/init.h>
  33. #include <linux/console.h>
  34. #include <linux/sysrq.h>
  35. #include <linux/serial_reg.h>
  36. #include <linux/circ_buf.h>
  37. #include <linux/delay.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/platform_device.h>
  40. #include <linux/tty.h>
  41. #include <linux/tty_flip.h>
  42. #include <linux/serial_core.h>
  43. #include <asm/io.h>
  44. #include <asm/hardware.h>
  45. #include <asm/irq.h>
  46. #include <asm/arch/pxa-regs.h>
  47. struct uart_pxa_port {
  48. struct uart_port port;
  49. unsigned char ier;
  50. unsigned char lcr;
  51. unsigned char mcr;
  52. unsigned int lsr_break_flag;
  53. unsigned int cken;
  54. char *name;
  55. };
  56. static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
  57. {
  58. offset <<= 2;
  59. return readl(up->port.membase + offset);
  60. }
  61. static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
  62. {
  63. offset <<= 2;
  64. writel(value, up->port.membase + offset);
  65. }
  66. static void serial_pxa_enable_ms(struct uart_port *port)
  67. {
  68. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  69. up->ier |= UART_IER_MSI;
  70. serial_out(up, UART_IER, up->ier);
  71. }
  72. static void serial_pxa_stop_tx(struct uart_port *port)
  73. {
  74. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  75. if (up->ier & UART_IER_THRI) {
  76. up->ier &= ~UART_IER_THRI;
  77. serial_out(up, UART_IER, up->ier);
  78. }
  79. }
  80. static void serial_pxa_stop_rx(struct uart_port *port)
  81. {
  82. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  83. up->ier &= ~UART_IER_RLSI;
  84. up->port.read_status_mask &= ~UART_LSR_DR;
  85. serial_out(up, UART_IER, up->ier);
  86. }
  87. static inline void
  88. receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs)
  89. {
  90. struct tty_struct *tty = up->port.info->tty;
  91. unsigned int ch, flag;
  92. int max_count = 256;
  93. do {
  94. ch = serial_in(up, UART_RX);
  95. flag = TTY_NORMAL;
  96. up->port.icount.rx++;
  97. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  98. UART_LSR_FE | UART_LSR_OE))) {
  99. /*
  100. * For statistics only
  101. */
  102. if (*status & UART_LSR_BI) {
  103. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  104. up->port.icount.brk++;
  105. /*
  106. * We do the SysRQ and SAK checking
  107. * here because otherwise the break
  108. * may get masked by ignore_status_mask
  109. * or read_status_mask.
  110. */
  111. if (uart_handle_break(&up->port))
  112. goto ignore_char;
  113. } else if (*status & UART_LSR_PE)
  114. up->port.icount.parity++;
  115. else if (*status & UART_LSR_FE)
  116. up->port.icount.frame++;
  117. if (*status & UART_LSR_OE)
  118. up->port.icount.overrun++;
  119. /*
  120. * Mask off conditions which should be ignored.
  121. */
  122. *status &= up->port.read_status_mask;
  123. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  124. if (up->port.line == up->port.cons->index) {
  125. /* Recover the break flag from console xmit */
  126. *status |= up->lsr_break_flag;
  127. up->lsr_break_flag = 0;
  128. }
  129. #endif
  130. if (*status & UART_LSR_BI) {
  131. flag = TTY_BREAK;
  132. } else if (*status & UART_LSR_PE)
  133. flag = TTY_PARITY;
  134. else if (*status & UART_LSR_FE)
  135. flag = TTY_FRAME;
  136. }
  137. if (uart_handle_sysrq_char(&up->port, ch, regs))
  138. goto ignore_char;
  139. uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
  140. ignore_char:
  141. *status = serial_in(up, UART_LSR);
  142. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  143. tty_flip_buffer_push(tty);
  144. }
  145. static void transmit_chars(struct uart_pxa_port *up)
  146. {
  147. struct circ_buf *xmit = &up->port.info->xmit;
  148. int count;
  149. if (up->port.x_char) {
  150. serial_out(up, UART_TX, up->port.x_char);
  151. up->port.icount.tx++;
  152. up->port.x_char = 0;
  153. return;
  154. }
  155. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  156. serial_pxa_stop_tx(&up->port);
  157. return;
  158. }
  159. count = up->port.fifosize / 2;
  160. do {
  161. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  162. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  163. up->port.icount.tx++;
  164. if (uart_circ_empty(xmit))
  165. break;
  166. } while (--count > 0);
  167. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  168. uart_write_wakeup(&up->port);
  169. if (uart_circ_empty(xmit))
  170. serial_pxa_stop_tx(&up->port);
  171. }
  172. static void serial_pxa_start_tx(struct uart_port *port)
  173. {
  174. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  175. if (!(up->ier & UART_IER_THRI)) {
  176. up->ier |= UART_IER_THRI;
  177. serial_out(up, UART_IER, up->ier);
  178. }
  179. }
  180. static inline void check_modem_status(struct uart_pxa_port *up)
  181. {
  182. int status;
  183. status = serial_in(up, UART_MSR);
  184. if ((status & UART_MSR_ANY_DELTA) == 0)
  185. return;
  186. if (status & UART_MSR_TERI)
  187. up->port.icount.rng++;
  188. if (status & UART_MSR_DDSR)
  189. up->port.icount.dsr++;
  190. if (status & UART_MSR_DDCD)
  191. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  192. if (status & UART_MSR_DCTS)
  193. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  194. wake_up_interruptible(&up->port.info->delta_msr_wait);
  195. }
  196. /*
  197. * This handles the interrupt from one port.
  198. */
  199. static inline irqreturn_t
  200. serial_pxa_irq(int irq, void *dev_id, struct pt_regs *regs)
  201. {
  202. struct uart_pxa_port *up = (struct uart_pxa_port *)dev_id;
  203. unsigned int iir, lsr;
  204. iir = serial_in(up, UART_IIR);
  205. if (iir & UART_IIR_NO_INT)
  206. return IRQ_NONE;
  207. lsr = serial_in(up, UART_LSR);
  208. if (lsr & UART_LSR_DR)
  209. receive_chars(up, &lsr, regs);
  210. check_modem_status(up);
  211. if (lsr & UART_LSR_THRE)
  212. transmit_chars(up);
  213. return IRQ_HANDLED;
  214. }
  215. static unsigned int serial_pxa_tx_empty(struct uart_port *port)
  216. {
  217. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  218. unsigned long flags;
  219. unsigned int ret;
  220. spin_lock_irqsave(&up->port.lock, flags);
  221. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  222. spin_unlock_irqrestore(&up->port.lock, flags);
  223. return ret;
  224. }
  225. static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
  226. {
  227. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  228. unsigned char status;
  229. unsigned int ret;
  230. status = serial_in(up, UART_MSR);
  231. ret = 0;
  232. if (status & UART_MSR_DCD)
  233. ret |= TIOCM_CAR;
  234. if (status & UART_MSR_RI)
  235. ret |= TIOCM_RNG;
  236. if (status & UART_MSR_DSR)
  237. ret |= TIOCM_DSR;
  238. if (status & UART_MSR_CTS)
  239. ret |= TIOCM_CTS;
  240. return ret;
  241. }
  242. static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
  243. {
  244. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  245. unsigned char mcr = 0;
  246. if (mctrl & TIOCM_RTS)
  247. mcr |= UART_MCR_RTS;
  248. if (mctrl & TIOCM_DTR)
  249. mcr |= UART_MCR_DTR;
  250. if (mctrl & TIOCM_OUT1)
  251. mcr |= UART_MCR_OUT1;
  252. if (mctrl & TIOCM_OUT2)
  253. mcr |= UART_MCR_OUT2;
  254. if (mctrl & TIOCM_LOOP)
  255. mcr |= UART_MCR_LOOP;
  256. mcr |= up->mcr;
  257. serial_out(up, UART_MCR, mcr);
  258. }
  259. static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
  260. {
  261. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  262. unsigned long flags;
  263. spin_lock_irqsave(&up->port.lock, flags);
  264. if (break_state == -1)
  265. up->lcr |= UART_LCR_SBC;
  266. else
  267. up->lcr &= ~UART_LCR_SBC;
  268. serial_out(up, UART_LCR, up->lcr);
  269. spin_unlock_irqrestore(&up->port.lock, flags);
  270. }
  271. #if 0
  272. static void serial_pxa_dma_init(struct pxa_uart *up)
  273. {
  274. up->rxdma =
  275. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
  276. if (up->rxdma < 0)
  277. goto out;
  278. up->txdma =
  279. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
  280. if (up->txdma < 0)
  281. goto err_txdma;
  282. up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
  283. if (!up->dmadesc)
  284. goto err_alloc;
  285. /* ... */
  286. err_alloc:
  287. pxa_free_dma(up->txdma);
  288. err_rxdma:
  289. pxa_free_dma(up->rxdma);
  290. out:
  291. return;
  292. }
  293. #endif
  294. static int serial_pxa_startup(struct uart_port *port)
  295. {
  296. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  297. unsigned long flags;
  298. int retval;
  299. if (port->line == 3) /* HWUART */
  300. up->mcr |= UART_MCR_AFE;
  301. else
  302. up->mcr = 0;
  303. /*
  304. * Allocate the IRQ
  305. */
  306. retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
  307. if (retval)
  308. return retval;
  309. /*
  310. * Clear the FIFO buffers and disable them.
  311. * (they will be reenabled in set_termios())
  312. */
  313. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  314. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  315. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  316. serial_out(up, UART_FCR, 0);
  317. /*
  318. * Clear the interrupt registers.
  319. */
  320. (void) serial_in(up, UART_LSR);
  321. (void) serial_in(up, UART_RX);
  322. (void) serial_in(up, UART_IIR);
  323. (void) serial_in(up, UART_MSR);
  324. /*
  325. * Now, initialize the UART
  326. */
  327. serial_out(up, UART_LCR, UART_LCR_WLEN8);
  328. spin_lock_irqsave(&up->port.lock, flags);
  329. up->port.mctrl |= TIOCM_OUT2;
  330. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  331. spin_unlock_irqrestore(&up->port.lock, flags);
  332. /*
  333. * Finally, enable interrupts. Note: Modem status interrupts
  334. * are set via set_termios(), which will be occuring imminently
  335. * anyway, so we don't enable them here.
  336. */
  337. up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
  338. serial_out(up, UART_IER, up->ier);
  339. /*
  340. * And clear the interrupt registers again for luck.
  341. */
  342. (void) serial_in(up, UART_LSR);
  343. (void) serial_in(up, UART_RX);
  344. (void) serial_in(up, UART_IIR);
  345. (void) serial_in(up, UART_MSR);
  346. return 0;
  347. }
  348. static void serial_pxa_shutdown(struct uart_port *port)
  349. {
  350. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  351. unsigned long flags;
  352. free_irq(up->port.irq, up);
  353. /*
  354. * Disable interrupts from this port
  355. */
  356. up->ier = 0;
  357. serial_out(up, UART_IER, 0);
  358. spin_lock_irqsave(&up->port.lock, flags);
  359. up->port.mctrl &= ~TIOCM_OUT2;
  360. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  361. spin_unlock_irqrestore(&up->port.lock, flags);
  362. /*
  363. * Disable break condition and FIFOs
  364. */
  365. serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
  366. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  367. UART_FCR_CLEAR_RCVR |
  368. UART_FCR_CLEAR_XMIT);
  369. serial_out(up, UART_FCR, 0);
  370. }
  371. static void
  372. serial_pxa_set_termios(struct uart_port *port, struct termios *termios,
  373. struct termios *old)
  374. {
  375. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  376. unsigned char cval, fcr = 0;
  377. unsigned long flags;
  378. unsigned int baud, quot;
  379. switch (termios->c_cflag & CSIZE) {
  380. case CS5:
  381. cval = UART_LCR_WLEN5;
  382. break;
  383. case CS6:
  384. cval = UART_LCR_WLEN6;
  385. break;
  386. case CS7:
  387. cval = UART_LCR_WLEN7;
  388. break;
  389. default:
  390. case CS8:
  391. cval = UART_LCR_WLEN8;
  392. break;
  393. }
  394. if (termios->c_cflag & CSTOPB)
  395. cval |= UART_LCR_STOP;
  396. if (termios->c_cflag & PARENB)
  397. cval |= UART_LCR_PARITY;
  398. if (!(termios->c_cflag & PARODD))
  399. cval |= UART_LCR_EPAR;
  400. /*
  401. * Ask the core to calculate the divisor for us.
  402. */
  403. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  404. quot = uart_get_divisor(port, baud);
  405. if ((up->port.uartclk / quot) < (2400 * 16))
  406. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
  407. else if ((up->port.uartclk / quot) < (230400 * 16))
  408. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
  409. else
  410. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
  411. /*
  412. * Ok, we're now changing the port state. Do it with
  413. * interrupts disabled.
  414. */
  415. spin_lock_irqsave(&up->port.lock, flags);
  416. /*
  417. * Ensure the port will be enabled.
  418. * This is required especially for serial console.
  419. */
  420. up->ier |= IER_UUE;
  421. /*
  422. * Update the per-port timeout.
  423. */
  424. uart_update_timeout(port, termios->c_cflag, baud);
  425. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  426. if (termios->c_iflag & INPCK)
  427. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  428. if (termios->c_iflag & (BRKINT | PARMRK))
  429. up->port.read_status_mask |= UART_LSR_BI;
  430. /*
  431. * Characters to ignore
  432. */
  433. up->port.ignore_status_mask = 0;
  434. if (termios->c_iflag & IGNPAR)
  435. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  436. if (termios->c_iflag & IGNBRK) {
  437. up->port.ignore_status_mask |= UART_LSR_BI;
  438. /*
  439. * If we're ignoring parity and break indicators,
  440. * ignore overruns too (for real raw support).
  441. */
  442. if (termios->c_iflag & IGNPAR)
  443. up->port.ignore_status_mask |= UART_LSR_OE;
  444. }
  445. /*
  446. * ignore all characters if CREAD is not set
  447. */
  448. if ((termios->c_cflag & CREAD) == 0)
  449. up->port.ignore_status_mask |= UART_LSR_DR;
  450. /*
  451. * CTS flow control flag and modem status interrupts
  452. */
  453. up->ier &= ~UART_IER_MSI;
  454. if (UART_ENABLE_MS(&up->port, termios->c_cflag))
  455. up->ier |= UART_IER_MSI;
  456. serial_out(up, UART_IER, up->ier);
  457. serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  458. serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
  459. serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
  460. serial_out(up, UART_LCR, cval); /* reset DLAB */
  461. up->lcr = cval; /* Save LCR */
  462. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  463. serial_out(up, UART_FCR, fcr);
  464. spin_unlock_irqrestore(&up->port.lock, flags);
  465. }
  466. static void
  467. serial_pxa_pm(struct uart_port *port, unsigned int state,
  468. unsigned int oldstate)
  469. {
  470. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  471. pxa_set_cken(up->cken, !state);
  472. if (!state)
  473. udelay(1);
  474. }
  475. static void serial_pxa_release_port(struct uart_port *port)
  476. {
  477. }
  478. static int serial_pxa_request_port(struct uart_port *port)
  479. {
  480. return 0;
  481. }
  482. static void serial_pxa_config_port(struct uart_port *port, int flags)
  483. {
  484. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  485. up->port.type = PORT_PXA;
  486. }
  487. static int
  488. serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
  489. {
  490. /* we don't want the core code to modify any port params */
  491. return -EINVAL;
  492. }
  493. static const char *
  494. serial_pxa_type(struct uart_port *port)
  495. {
  496. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  497. return up->name;
  498. }
  499. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  500. static struct uart_pxa_port serial_pxa_ports[];
  501. static struct uart_driver serial_pxa_reg;
  502. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  503. /*
  504. * Wait for transmitter & holding register to empty
  505. */
  506. static inline void wait_for_xmitr(struct uart_pxa_port *up)
  507. {
  508. unsigned int status, tmout = 10000;
  509. /* Wait up to 10ms for the character(s) to be sent. */
  510. do {
  511. status = serial_in(up, UART_LSR);
  512. if (status & UART_LSR_BI)
  513. up->lsr_break_flag = UART_LSR_BI;
  514. if (--tmout == 0)
  515. break;
  516. udelay(1);
  517. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  518. /* Wait up to 1s for flow control if necessary */
  519. if (up->port.flags & UPF_CONS_FLOW) {
  520. tmout = 1000000;
  521. while (--tmout &&
  522. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  523. udelay(1);
  524. }
  525. }
  526. static void serial_pxa_console_putchar(struct uart_port *port, int ch)
  527. {
  528. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  529. wait_for_xmitr(up);
  530. serial_out(up, UART_TX, ch);
  531. }
  532. /*
  533. * Print a string to the serial port trying not to disturb
  534. * any possible real use of the port...
  535. *
  536. * The console_lock must be held when we get here.
  537. */
  538. static void
  539. serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
  540. {
  541. struct uart_pxa_port *up = &serial_pxa_ports[co->index];
  542. unsigned int ier;
  543. /*
  544. * First save the IER then disable the interrupts
  545. */
  546. ier = serial_in(up, UART_IER);
  547. serial_out(up, UART_IER, UART_IER_UUE);
  548. uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
  549. /*
  550. * Finally, wait for transmitter to become empty
  551. * and restore the IER
  552. */
  553. wait_for_xmitr(up);
  554. serial_out(up, UART_IER, ier);
  555. }
  556. static int __init
  557. serial_pxa_console_setup(struct console *co, char *options)
  558. {
  559. struct uart_pxa_port *up;
  560. int baud = 9600;
  561. int bits = 8;
  562. int parity = 'n';
  563. int flow = 'n';
  564. if (co->index == -1 || co->index >= serial_pxa_reg.nr)
  565. co->index = 0;
  566. up = &serial_pxa_ports[co->index];
  567. if (options)
  568. uart_parse_options(options, &baud, &parity, &bits, &flow);
  569. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  570. }
  571. static struct console serial_pxa_console = {
  572. .name = "ttyS",
  573. .write = serial_pxa_console_write,
  574. .device = uart_console_device,
  575. .setup = serial_pxa_console_setup,
  576. .flags = CON_PRINTBUFFER,
  577. .index = -1,
  578. .data = &serial_pxa_reg,
  579. };
  580. static int __init
  581. serial_pxa_console_init(void)
  582. {
  583. register_console(&serial_pxa_console);
  584. return 0;
  585. }
  586. console_initcall(serial_pxa_console_init);
  587. #define PXA_CONSOLE &serial_pxa_console
  588. #else
  589. #define PXA_CONSOLE NULL
  590. #endif
  591. struct uart_ops serial_pxa_pops = {
  592. .tx_empty = serial_pxa_tx_empty,
  593. .set_mctrl = serial_pxa_set_mctrl,
  594. .get_mctrl = serial_pxa_get_mctrl,
  595. .stop_tx = serial_pxa_stop_tx,
  596. .start_tx = serial_pxa_start_tx,
  597. .stop_rx = serial_pxa_stop_rx,
  598. .enable_ms = serial_pxa_enable_ms,
  599. .break_ctl = serial_pxa_break_ctl,
  600. .startup = serial_pxa_startup,
  601. .shutdown = serial_pxa_shutdown,
  602. .set_termios = serial_pxa_set_termios,
  603. .pm = serial_pxa_pm,
  604. .type = serial_pxa_type,
  605. .release_port = serial_pxa_release_port,
  606. .request_port = serial_pxa_request_port,
  607. .config_port = serial_pxa_config_port,
  608. .verify_port = serial_pxa_verify_port,
  609. };
  610. static struct uart_pxa_port serial_pxa_ports[] = {
  611. { /* FFUART */
  612. .name = "FFUART",
  613. .cken = CKEN6_FFUART,
  614. .port = {
  615. .type = PORT_PXA,
  616. .iotype = UPIO_MEM,
  617. .membase = (void *)&FFUART,
  618. .mapbase = __PREG(FFUART),
  619. .irq = IRQ_FFUART,
  620. .uartclk = 921600 * 16,
  621. .fifosize = 64,
  622. .ops = &serial_pxa_pops,
  623. .line = 0,
  624. },
  625. }, { /* BTUART */
  626. .name = "BTUART",
  627. .cken = CKEN7_BTUART,
  628. .port = {
  629. .type = PORT_PXA,
  630. .iotype = UPIO_MEM,
  631. .membase = (void *)&BTUART,
  632. .mapbase = __PREG(BTUART),
  633. .irq = IRQ_BTUART,
  634. .uartclk = 921600 * 16,
  635. .fifosize = 64,
  636. .ops = &serial_pxa_pops,
  637. .line = 1,
  638. },
  639. }, { /* STUART */
  640. .name = "STUART",
  641. .cken = CKEN5_STUART,
  642. .port = {
  643. .type = PORT_PXA,
  644. .iotype = UPIO_MEM,
  645. .membase = (void *)&STUART,
  646. .mapbase = __PREG(STUART),
  647. .irq = IRQ_STUART,
  648. .uartclk = 921600 * 16,
  649. .fifosize = 64,
  650. .ops = &serial_pxa_pops,
  651. .line = 2,
  652. },
  653. }, { /* HWUART */
  654. .name = "HWUART",
  655. .cken = CKEN4_HWUART,
  656. .port = {
  657. .type = PORT_PXA,
  658. .iotype = UPIO_MEM,
  659. .membase = (void *)&HWUART,
  660. .mapbase = __PREG(HWUART),
  661. .irq = IRQ_HWUART,
  662. .uartclk = 921600 * 16,
  663. .fifosize = 64,
  664. .ops = &serial_pxa_pops,
  665. .line = 3,
  666. },
  667. }
  668. };
  669. static struct uart_driver serial_pxa_reg = {
  670. .owner = THIS_MODULE,
  671. .driver_name = "PXA serial",
  672. .devfs_name = "tts/",
  673. .dev_name = "ttyS",
  674. .major = TTY_MAJOR,
  675. .minor = 64,
  676. .nr = ARRAY_SIZE(serial_pxa_ports),
  677. .cons = PXA_CONSOLE,
  678. };
  679. static int serial_pxa_suspend(struct platform_device *dev, pm_message_t state)
  680. {
  681. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  682. if (sport)
  683. uart_suspend_port(&serial_pxa_reg, &sport->port);
  684. return 0;
  685. }
  686. static int serial_pxa_resume(struct platform_device *dev)
  687. {
  688. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  689. if (sport)
  690. uart_resume_port(&serial_pxa_reg, &sport->port);
  691. return 0;
  692. }
  693. static int serial_pxa_probe(struct platform_device *dev)
  694. {
  695. serial_pxa_ports[dev->id].port.dev = &dev->dev;
  696. uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port);
  697. platform_set_drvdata(dev, &serial_pxa_ports[dev->id]);
  698. return 0;
  699. }
  700. static int serial_pxa_remove(struct platform_device *dev)
  701. {
  702. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  703. platform_set_drvdata(dev, NULL);
  704. if (sport)
  705. uart_remove_one_port(&serial_pxa_reg, &sport->port);
  706. return 0;
  707. }
  708. static struct platform_driver serial_pxa_driver = {
  709. .probe = serial_pxa_probe,
  710. .remove = serial_pxa_remove,
  711. .suspend = serial_pxa_suspend,
  712. .resume = serial_pxa_resume,
  713. .driver = {
  714. .name = "pxa2xx-uart",
  715. },
  716. };
  717. int __init serial_pxa_init(void)
  718. {
  719. int ret;
  720. ret = uart_register_driver(&serial_pxa_reg);
  721. if (ret != 0)
  722. return ret;
  723. ret = platform_driver_register(&serial_pxa_driver);
  724. if (ret != 0)
  725. uart_unregister_driver(&serial_pxa_reg);
  726. return ret;
  727. }
  728. void __exit serial_pxa_exit(void)
  729. {
  730. platform_driver_unregister(&serial_pxa_driver);
  731. uart_unregister_driver(&serial_pxa_reg);
  732. }
  733. module_init(serial_pxa_init);
  734. module_exit(serial_pxa_exit);
  735. MODULE_LICENSE("GPL");