rtc-rs5c372.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726
  1. /*
  2. * An I2C driver for Ricoh RS5C372 and RV5C38[67] RTCs
  3. *
  4. * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net>
  5. * Copyright (C) 2006 Tower Technologies
  6. * Copyright (C) 2008 Paul Mundt
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/i2c.h>
  13. #include <linux/rtc.h>
  14. #include <linux/bcd.h>
  15. #define DRV_VERSION "0.6"
  16. /*
  17. * Ricoh has a family of I2C based RTCs, which differ only slightly from
  18. * each other. Differences center on pinout (e.g. how many interrupts,
  19. * output clock, etc) and how the control registers are used. The '372
  20. * is significant only because that's the one this driver first supported.
  21. */
  22. #define RS5C372_REG_SECS 0
  23. #define RS5C372_REG_MINS 1
  24. #define RS5C372_REG_HOURS 2
  25. #define RS5C372_REG_WDAY 3
  26. #define RS5C372_REG_DAY 4
  27. #define RS5C372_REG_MONTH 5
  28. #define RS5C372_REG_YEAR 6
  29. #define RS5C372_REG_TRIM 7
  30. # define RS5C372_TRIM_XSL 0x80
  31. # define RS5C372_TRIM_MASK 0x7F
  32. #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */
  33. #define RS5C_REG_ALARM_A_HOURS 9
  34. #define RS5C_REG_ALARM_A_WDAY 10
  35. #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */
  36. #define RS5C_REG_ALARM_B_HOURS 12
  37. #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */
  38. #define RS5C_REG_CTRL1 14
  39. # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */
  40. # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */
  41. # define RV5C387_CTRL1_24 (1 << 5)
  42. # define RS5C372A_CTRL1_SL1 (1 << 5)
  43. # define RS5C_CTRL1_CT_MASK (7 << 0)
  44. # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */
  45. # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */
  46. #define RS5C_REG_CTRL2 15
  47. # define RS5C372_CTRL2_24 (1 << 5)
  48. # define RS5C_CTRL2_XSTP (1 << 4)
  49. # define RS5C_CTRL2_CTFG (1 << 2)
  50. # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */
  51. # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */
  52. /* to read (style 1) or write registers starting at R */
  53. #define RS5C_ADDR(R) (((R) << 4) | 0)
  54. enum rtc_type {
  55. rtc_undef = 0,
  56. rtc_rs5c372a,
  57. rtc_rs5c372b,
  58. rtc_rv5c386,
  59. rtc_rv5c387a,
  60. };
  61. static const struct i2c_device_id rs5c372_id[] = {
  62. { "rs5c372a", rtc_rs5c372a },
  63. { "rs5c372b", rtc_rs5c372b },
  64. { "rv5c386", rtc_rv5c386 },
  65. { "rv5c387a", rtc_rv5c387a },
  66. { }
  67. };
  68. MODULE_DEVICE_TABLE(i2c, rs5c372_id);
  69. /* REVISIT: this assumes that:
  70. * - we're in the 21st century, so it's safe to ignore the century
  71. * bit for rv5c38[67] (REG_MONTH bit 7);
  72. * - we should use ALARM_A not ALARM_B (may be wrong on some boards)
  73. */
  74. struct rs5c372 {
  75. struct i2c_client *client;
  76. struct rtc_device *rtc;
  77. enum rtc_type type;
  78. unsigned time24:1;
  79. unsigned has_irq:1;
  80. unsigned smbus:1;
  81. char buf[17];
  82. char *regs;
  83. };
  84. static int rs5c_get_regs(struct rs5c372 *rs5c)
  85. {
  86. struct i2c_client *client = rs5c->client;
  87. struct i2c_msg msgs[] = {
  88. { client->addr, I2C_M_RD, sizeof rs5c->buf, rs5c->buf },
  89. };
  90. /* This implements the third reading method from the datasheet, using
  91. * an internal address that's reset after each transaction (by STOP)
  92. * to 0x0f ... so we read extra registers, and skip the first one.
  93. *
  94. * The first method doesn't work with the iop3xx adapter driver, on at
  95. * least 80219 chips; this works around that bug.
  96. *
  97. * The third method on the other hand doesn't work for the SMBus-only
  98. * configurations, so we use the the first method there, stripping off
  99. * the extra register in the process.
  100. */
  101. if (rs5c->smbus) {
  102. int addr = RS5C_ADDR(RS5C372_REG_SECS);
  103. int size = sizeof(rs5c->buf) - 1;
  104. if (i2c_smbus_read_i2c_block_data(client, addr, size,
  105. rs5c->buf + 1) != size) {
  106. dev_warn(&client->dev, "can't read registers\n");
  107. return -EIO;
  108. }
  109. } else {
  110. if ((i2c_transfer(client->adapter, msgs, 1)) != 1) {
  111. dev_warn(&client->dev, "can't read registers\n");
  112. return -EIO;
  113. }
  114. }
  115. dev_dbg(&client->dev,
  116. "%02x %02x %02x (%02x) %02x %02x %02x (%02x), "
  117. "%02x %02x %02x, %02x %02x %02x; %02x %02x\n",
  118. rs5c->regs[0], rs5c->regs[1], rs5c->regs[2], rs5c->regs[3],
  119. rs5c->regs[4], rs5c->regs[5], rs5c->regs[6], rs5c->regs[7],
  120. rs5c->regs[8], rs5c->regs[9], rs5c->regs[10], rs5c->regs[11],
  121. rs5c->regs[12], rs5c->regs[13], rs5c->regs[14], rs5c->regs[15]);
  122. return 0;
  123. }
  124. static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg)
  125. {
  126. unsigned hour;
  127. if (rs5c->time24)
  128. return BCD2BIN(reg & 0x3f);
  129. hour = BCD2BIN(reg & 0x1f);
  130. if (hour == 12)
  131. hour = 0;
  132. if (reg & 0x20)
  133. hour += 12;
  134. return hour;
  135. }
  136. static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour)
  137. {
  138. if (rs5c->time24)
  139. return BIN2BCD(hour);
  140. if (hour > 12)
  141. return 0x20 | BIN2BCD(hour - 12);
  142. if (hour == 12)
  143. return 0x20 | BIN2BCD(12);
  144. if (hour == 0)
  145. return BIN2BCD(12);
  146. return BIN2BCD(hour);
  147. }
  148. static int rs5c372_get_datetime(struct i2c_client *client, struct rtc_time *tm)
  149. {
  150. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  151. int status = rs5c_get_regs(rs5c);
  152. if (status < 0)
  153. return status;
  154. tm->tm_sec = BCD2BIN(rs5c->regs[RS5C372_REG_SECS] & 0x7f);
  155. tm->tm_min = BCD2BIN(rs5c->regs[RS5C372_REG_MINS] & 0x7f);
  156. tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]);
  157. tm->tm_wday = BCD2BIN(rs5c->regs[RS5C372_REG_WDAY] & 0x07);
  158. tm->tm_mday = BCD2BIN(rs5c->regs[RS5C372_REG_DAY] & 0x3f);
  159. /* tm->tm_mon is zero-based */
  160. tm->tm_mon = BCD2BIN(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1;
  161. /* year is 1900 + tm->tm_year */
  162. tm->tm_year = BCD2BIN(rs5c->regs[RS5C372_REG_YEAR]) + 100;
  163. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  164. "mday=%d, mon=%d, year=%d, wday=%d\n",
  165. __func__,
  166. tm->tm_sec, tm->tm_min, tm->tm_hour,
  167. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  168. /* rtc might need initialization */
  169. return rtc_valid_tm(tm);
  170. }
  171. static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm)
  172. {
  173. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  174. unsigned char buf[8];
  175. int addr;
  176. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d "
  177. "mday=%d, mon=%d, year=%d, wday=%d\n",
  178. __func__,
  179. tm->tm_sec, tm->tm_min, tm->tm_hour,
  180. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  181. addr = RS5C_ADDR(RS5C372_REG_SECS);
  182. buf[0] = BIN2BCD(tm->tm_sec);
  183. buf[1] = BIN2BCD(tm->tm_min);
  184. buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour);
  185. buf[3] = BIN2BCD(tm->tm_wday);
  186. buf[4] = BIN2BCD(tm->tm_mday);
  187. buf[5] = BIN2BCD(tm->tm_mon + 1);
  188. buf[6] = BIN2BCD(tm->tm_year - 100);
  189. if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) {
  190. dev_err(&client->dev, "%s: write error\n", __func__);
  191. return -EIO;
  192. }
  193. return 0;
  194. }
  195. #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
  196. #define NEED_TRIM
  197. #endif
  198. #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE)
  199. #define NEED_TRIM
  200. #endif
  201. #ifdef NEED_TRIM
  202. static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim)
  203. {
  204. struct rs5c372 *rs5c372 = i2c_get_clientdata(client);
  205. u8 tmp = rs5c372->regs[RS5C372_REG_TRIM];
  206. if (osc)
  207. *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768;
  208. if (trim) {
  209. dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp);
  210. tmp &= RS5C372_TRIM_MASK;
  211. if (tmp & 0x3e) {
  212. int t = tmp & 0x3f;
  213. if (tmp & 0x40)
  214. t = (~t | (s8)0xc0) + 1;
  215. else
  216. t = t - 1;
  217. tmp = t * 2;
  218. } else
  219. tmp = 0;
  220. *trim = tmp;
  221. }
  222. return 0;
  223. }
  224. #endif
  225. static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm)
  226. {
  227. return rs5c372_get_datetime(to_i2c_client(dev), tm);
  228. }
  229. static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm)
  230. {
  231. return rs5c372_set_datetime(to_i2c_client(dev), tm);
  232. }
  233. #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE)
  234. static int
  235. rs5c_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  236. {
  237. struct i2c_client *client = to_i2c_client(dev);
  238. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  239. unsigned char buf;
  240. int status, addr;
  241. buf = rs5c->regs[RS5C_REG_CTRL1];
  242. switch (cmd) {
  243. case RTC_UIE_OFF:
  244. case RTC_UIE_ON:
  245. /* some 327a modes use a different IRQ pin for 1Hz irqs */
  246. if (rs5c->type == rtc_rs5c372a
  247. && (buf & RS5C372A_CTRL1_SL1))
  248. return -ENOIOCTLCMD;
  249. case RTC_AIE_OFF:
  250. case RTC_AIE_ON:
  251. /* these irq management calls only make sense for chips
  252. * which are wired up to an IRQ.
  253. */
  254. if (!rs5c->has_irq)
  255. return -ENOIOCTLCMD;
  256. break;
  257. default:
  258. return -ENOIOCTLCMD;
  259. }
  260. status = rs5c_get_regs(rs5c);
  261. if (status < 0)
  262. return status;
  263. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  264. switch (cmd) {
  265. case RTC_AIE_OFF: /* alarm off */
  266. buf &= ~RS5C_CTRL1_AALE;
  267. break;
  268. case RTC_AIE_ON: /* alarm on */
  269. buf |= RS5C_CTRL1_AALE;
  270. break;
  271. case RTC_UIE_OFF: /* update off */
  272. buf &= ~RS5C_CTRL1_CT_MASK;
  273. break;
  274. case RTC_UIE_ON: /* update on */
  275. buf &= ~RS5C_CTRL1_CT_MASK;
  276. buf |= RS5C_CTRL1_CT4;
  277. break;
  278. }
  279. if (i2c_smbus_write_byte_data(client, addr, buf) < 0) {
  280. printk(KERN_WARNING "%s: can't update alarm\n",
  281. rs5c->rtc->name);
  282. status = -EIO;
  283. } else
  284. rs5c->regs[RS5C_REG_CTRL1] = buf;
  285. return status;
  286. }
  287. #else
  288. #define rs5c_rtc_ioctl NULL
  289. #endif
  290. /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI,
  291. * which only exposes a polled programming interface; and since
  292. * these calls map directly to those EFI requests; we don't demand
  293. * we have an IRQ for this chip when we go through this API.
  294. *
  295. * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs
  296. * though, managed through RTC_AIE_{ON,OFF} requests.
  297. */
  298. static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  299. {
  300. struct i2c_client *client = to_i2c_client(dev);
  301. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  302. int status;
  303. status = rs5c_get_regs(rs5c);
  304. if (status < 0)
  305. return status;
  306. /* report alarm time */
  307. t->time.tm_sec = 0;
  308. t->time.tm_min = BCD2BIN(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f);
  309. t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]);
  310. t->time.tm_mday = -1;
  311. t->time.tm_mon = -1;
  312. t->time.tm_year = -1;
  313. t->time.tm_wday = -1;
  314. t->time.tm_yday = -1;
  315. t->time.tm_isdst = -1;
  316. /* ... and status */
  317. t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE);
  318. t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG);
  319. return 0;
  320. }
  321. static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  322. {
  323. struct i2c_client *client = to_i2c_client(dev);
  324. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  325. int status, addr, i;
  326. unsigned char buf[3];
  327. /* only handle up to 24 hours in the future, like RTC_ALM_SET */
  328. if (t->time.tm_mday != -1
  329. || t->time.tm_mon != -1
  330. || t->time.tm_year != -1)
  331. return -EINVAL;
  332. /* REVISIT: round up tm_sec */
  333. /* if needed, disable irq (clears pending status) */
  334. status = rs5c_get_regs(rs5c);
  335. if (status < 0)
  336. return status;
  337. if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) {
  338. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  339. buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE;
  340. if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) {
  341. pr_debug("%s: can't disable alarm\n", rs5c->rtc->name);
  342. return -EIO;
  343. }
  344. rs5c->regs[RS5C_REG_CTRL1] = buf[0];
  345. }
  346. /* set alarm */
  347. buf[0] = BIN2BCD(t->time.tm_min);
  348. buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour);
  349. buf[2] = 0x7f; /* any/all days */
  350. for (i = 0; i < sizeof(buf); i++) {
  351. addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i);
  352. if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) {
  353. pr_debug("%s: can't set alarm time\n", rs5c->rtc->name);
  354. return -EIO;
  355. }
  356. }
  357. /* ... and maybe enable its irq */
  358. if (t->enabled) {
  359. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  360. buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE;
  361. if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0)
  362. printk(KERN_WARNING "%s: can't enable alarm\n",
  363. rs5c->rtc->name);
  364. rs5c->regs[RS5C_REG_CTRL1] = buf[0];
  365. }
  366. return 0;
  367. }
  368. #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
  369. static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq)
  370. {
  371. int err, osc, trim;
  372. err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim);
  373. if (err == 0) {
  374. seq_printf(seq, "crystal\t\t: %d.%03d KHz\n",
  375. osc / 1000, osc % 1000);
  376. seq_printf(seq, "trim\t\t: %d\n", trim);
  377. }
  378. return 0;
  379. }
  380. #else
  381. #define rs5c372_rtc_proc NULL
  382. #endif
  383. static const struct rtc_class_ops rs5c372_rtc_ops = {
  384. .proc = rs5c372_rtc_proc,
  385. .ioctl = rs5c_rtc_ioctl,
  386. .read_time = rs5c372_rtc_read_time,
  387. .set_time = rs5c372_rtc_set_time,
  388. .read_alarm = rs5c_read_alarm,
  389. .set_alarm = rs5c_set_alarm,
  390. };
  391. #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE)
  392. static ssize_t rs5c372_sysfs_show_trim(struct device *dev,
  393. struct device_attribute *attr, char *buf)
  394. {
  395. int err, trim;
  396. err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim);
  397. if (err)
  398. return err;
  399. return sprintf(buf, "%d\n", trim);
  400. }
  401. static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL);
  402. static ssize_t rs5c372_sysfs_show_osc(struct device *dev,
  403. struct device_attribute *attr, char *buf)
  404. {
  405. int err, osc;
  406. err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL);
  407. if (err)
  408. return err;
  409. return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000);
  410. }
  411. static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL);
  412. static int rs5c_sysfs_register(struct device *dev)
  413. {
  414. int err;
  415. err = device_create_file(dev, &dev_attr_trim);
  416. if (err)
  417. return err;
  418. err = device_create_file(dev, &dev_attr_osc);
  419. if (err)
  420. device_remove_file(dev, &dev_attr_trim);
  421. return err;
  422. }
  423. static void rs5c_sysfs_unregister(struct device *dev)
  424. {
  425. device_remove_file(dev, &dev_attr_trim);
  426. device_remove_file(dev, &dev_attr_osc);
  427. }
  428. #else
  429. static int rs5c_sysfs_register(struct device *dev)
  430. {
  431. return 0;
  432. }
  433. static void rs5c_sysfs_unregister(struct device *dev)
  434. {
  435. /* nothing */
  436. }
  437. #endif /* SYSFS */
  438. static struct i2c_driver rs5c372_driver;
  439. static int rs5c_oscillator_setup(struct rs5c372 *rs5c372)
  440. {
  441. unsigned char buf[2];
  442. int addr, i, ret = 0;
  443. if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP))
  444. return ret;
  445. rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP;
  446. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  447. buf[0] = rs5c372->regs[RS5C_REG_CTRL1];
  448. buf[1] = rs5c372->regs[RS5C_REG_CTRL2];
  449. /* use 24hr mode */
  450. switch (rs5c372->type) {
  451. case rtc_rs5c372a:
  452. case rtc_rs5c372b:
  453. buf[1] |= RS5C372_CTRL2_24;
  454. rs5c372->time24 = 1;
  455. break;
  456. case rtc_rv5c386:
  457. case rtc_rv5c387a:
  458. buf[0] |= RV5C387_CTRL1_24;
  459. rs5c372->time24 = 1;
  460. break;
  461. default:
  462. /* impossible */
  463. break;
  464. }
  465. for (i = 0; i < sizeof(buf); i++) {
  466. addr = RS5C_ADDR(RS5C_REG_CTRL1 + i);
  467. ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]);
  468. if (unlikely(ret < 0))
  469. return ret;
  470. }
  471. rs5c372->regs[RS5C_REG_CTRL1] = buf[0];
  472. rs5c372->regs[RS5C_REG_CTRL2] = buf[1];
  473. return 0;
  474. }
  475. static int rs5c372_probe(struct i2c_client *client,
  476. const struct i2c_device_id *id)
  477. {
  478. int err = 0;
  479. int smbus_mode = 0;
  480. struct rs5c372 *rs5c372;
  481. struct rtc_time tm;
  482. dev_dbg(&client->dev, "%s\n", __func__);
  483. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
  484. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) {
  485. /*
  486. * If we don't have any master mode adapter, try breaking
  487. * it down in to the barest of capabilities.
  488. */
  489. if (i2c_check_functionality(client->adapter,
  490. I2C_FUNC_SMBUS_BYTE_DATA |
  491. I2C_FUNC_SMBUS_I2C_BLOCK))
  492. smbus_mode = 1;
  493. else {
  494. /* Still no good, give up */
  495. err = -ENODEV;
  496. goto exit;
  497. }
  498. }
  499. if (!(rs5c372 = kzalloc(sizeof(struct rs5c372), GFP_KERNEL))) {
  500. err = -ENOMEM;
  501. goto exit;
  502. }
  503. rs5c372->client = client;
  504. i2c_set_clientdata(client, rs5c372);
  505. rs5c372->type = id->driver_data;
  506. /* we read registers 0x0f then 0x00-0x0f; skip the first one */
  507. rs5c372->regs = &rs5c372->buf[1];
  508. rs5c372->smbus = smbus_mode;
  509. err = rs5c_get_regs(rs5c372);
  510. if (err < 0)
  511. goto exit_kfree;
  512. /* clock may be set for am/pm or 24 hr time */
  513. switch (rs5c372->type) {
  514. case rtc_rs5c372a:
  515. case rtc_rs5c372b:
  516. /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b.
  517. * so does periodic irq, except some 327a modes.
  518. */
  519. if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24)
  520. rs5c372->time24 = 1;
  521. break;
  522. case rtc_rv5c386:
  523. case rtc_rv5c387a:
  524. if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24)
  525. rs5c372->time24 = 1;
  526. /* alarm uses ALARM_W; and nINTRB for alarm and periodic
  527. * irq, on both 386 and 387
  528. */
  529. break;
  530. default:
  531. dev_err(&client->dev, "unknown RTC type\n");
  532. goto exit_kfree;
  533. }
  534. /* if the oscillator lost power and no other software (like
  535. * the bootloader) set it up, do it here.
  536. */
  537. err = rs5c_oscillator_setup(rs5c372);
  538. if (unlikely(err < 0)) {
  539. dev_err(&client->dev, "setup error\n");
  540. goto exit_kfree;
  541. }
  542. if (rs5c372_get_datetime(client, &tm) < 0)
  543. dev_warn(&client->dev, "clock needs to be set\n");
  544. dev_info(&client->dev, "%s found, %s, driver version " DRV_VERSION "\n",
  545. ({ char *s; switch (rs5c372->type) {
  546. case rtc_rs5c372a: s = "rs5c372a"; break;
  547. case rtc_rs5c372b: s = "rs5c372b"; break;
  548. case rtc_rv5c386: s = "rv5c386"; break;
  549. case rtc_rv5c387a: s = "rv5c387a"; break;
  550. default: s = "chip"; break;
  551. }; s;}),
  552. rs5c372->time24 ? "24hr" : "am/pm"
  553. );
  554. /* REVISIT use client->irq to register alarm irq ... */
  555. rs5c372->rtc = rtc_device_register(rs5c372_driver.driver.name,
  556. &client->dev, &rs5c372_rtc_ops, THIS_MODULE);
  557. if (IS_ERR(rs5c372->rtc)) {
  558. err = PTR_ERR(rs5c372->rtc);
  559. goto exit_kfree;
  560. }
  561. err = rs5c_sysfs_register(&client->dev);
  562. if (err)
  563. goto exit_devreg;
  564. return 0;
  565. exit_devreg:
  566. rtc_device_unregister(rs5c372->rtc);
  567. exit_kfree:
  568. kfree(rs5c372);
  569. exit:
  570. return err;
  571. }
  572. static int rs5c372_remove(struct i2c_client *client)
  573. {
  574. struct rs5c372 *rs5c372 = i2c_get_clientdata(client);
  575. rtc_device_unregister(rs5c372->rtc);
  576. rs5c_sysfs_unregister(&client->dev);
  577. kfree(rs5c372);
  578. return 0;
  579. }
  580. static struct i2c_driver rs5c372_driver = {
  581. .driver = {
  582. .name = "rtc-rs5c372",
  583. },
  584. .probe = rs5c372_probe,
  585. .remove = rs5c372_remove,
  586. .id_table = rs5c372_id,
  587. };
  588. static __init int rs5c372_init(void)
  589. {
  590. return i2c_add_driver(&rs5c372_driver);
  591. }
  592. static __exit void rs5c372_exit(void)
  593. {
  594. i2c_del_driver(&rs5c372_driver);
  595. }
  596. module_init(rs5c372_init);
  597. module_exit(rs5c372_exit);
  598. MODULE_AUTHOR(
  599. "Pavel Mironchik <pmironchik@optifacio.net>, "
  600. "Alessandro Zummo <a.zummo@towertech.it>, "
  601. "Paul Mundt <lethal@linux-sh.org>");
  602. MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver");
  603. MODULE_LICENSE("GPL");
  604. MODULE_VERSION(DRV_VERSION);