lpfc_sli.c 107 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2007 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <scsi/scsi.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_host.h>
  29. #include <scsi/scsi_transport_fc.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. #include "lpfc_debugfs.h"
  39. /*
  40. * Define macro to log: Mailbox command x%x cannot issue Data
  41. * This allows multiple uses of lpfc_msgBlk0311
  42. * w/o perturbing log msg utility.
  43. */
  44. #define LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag) \
  45. lpfc_printf_log(phba, \
  46. KERN_INFO, \
  47. LOG_MBOX | LOG_SLI, \
  48. "(%d):0311 Mailbox command x%x cannot " \
  49. "issue Data: x%x x%x x%x\n", \
  50. pmbox->vport ? pmbox->vport->vpi : 0, \
  51. pmbox->mb.mbxCommand, \
  52. phba->pport->port_state, \
  53. psli->sli_flag, \
  54. flag)
  55. /* There are only four IOCB completion types. */
  56. typedef enum _lpfc_iocb_type {
  57. LPFC_UNKNOWN_IOCB,
  58. LPFC_UNSOL_IOCB,
  59. LPFC_SOL_IOCB,
  60. LPFC_ABORT_IOCB
  61. } lpfc_iocb_type;
  62. /* SLI-2/SLI-3 provide different sized iocbs. Given a pointer
  63. * to the start of the ring, and the slot number of the
  64. * desired iocb entry, calc a pointer to that entry.
  65. */
  66. static inline IOCB_t *
  67. lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  68. {
  69. return (IOCB_t *) (((char *) pring->cmdringaddr) +
  70. pring->cmdidx * phba->iocb_cmd_size);
  71. }
  72. static inline IOCB_t *
  73. lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  74. {
  75. return (IOCB_t *) (((char *) pring->rspringaddr) +
  76. pring->rspidx * phba->iocb_rsp_size);
  77. }
  78. static struct lpfc_iocbq *
  79. __lpfc_sli_get_iocbq(struct lpfc_hba *phba)
  80. {
  81. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  82. struct lpfc_iocbq * iocbq = NULL;
  83. list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
  84. return iocbq;
  85. }
  86. struct lpfc_iocbq *
  87. lpfc_sli_get_iocbq(struct lpfc_hba *phba)
  88. {
  89. struct lpfc_iocbq * iocbq = NULL;
  90. unsigned long iflags;
  91. spin_lock_irqsave(&phba->hbalock, iflags);
  92. iocbq = __lpfc_sli_get_iocbq(phba);
  93. spin_unlock_irqrestore(&phba->hbalock, iflags);
  94. return iocbq;
  95. }
  96. static void
  97. __lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  98. {
  99. size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
  100. /*
  101. * Clean all volatile data fields, preserve iotag and node struct.
  102. */
  103. memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
  104. list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
  105. }
  106. void
  107. lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  108. {
  109. unsigned long iflags;
  110. /*
  111. * Clean all volatile data fields, preserve iotag and node struct.
  112. */
  113. spin_lock_irqsave(&phba->hbalock, iflags);
  114. __lpfc_sli_release_iocbq(phba, iocbq);
  115. spin_unlock_irqrestore(&phba->hbalock, iflags);
  116. }
  117. /*
  118. * Translate the iocb command to an iocb command type used to decide the final
  119. * disposition of each completed IOCB.
  120. */
  121. static lpfc_iocb_type
  122. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  123. {
  124. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  125. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  126. return 0;
  127. switch (iocb_cmnd) {
  128. case CMD_XMIT_SEQUENCE_CR:
  129. case CMD_XMIT_SEQUENCE_CX:
  130. case CMD_XMIT_BCAST_CN:
  131. case CMD_XMIT_BCAST_CX:
  132. case CMD_ELS_REQUEST_CR:
  133. case CMD_ELS_REQUEST_CX:
  134. case CMD_CREATE_XRI_CR:
  135. case CMD_CREATE_XRI_CX:
  136. case CMD_GET_RPI_CN:
  137. case CMD_XMIT_ELS_RSP_CX:
  138. case CMD_GET_RPI_CR:
  139. case CMD_FCP_IWRITE_CR:
  140. case CMD_FCP_IWRITE_CX:
  141. case CMD_FCP_IREAD_CR:
  142. case CMD_FCP_IREAD_CX:
  143. case CMD_FCP_ICMND_CR:
  144. case CMD_FCP_ICMND_CX:
  145. case CMD_FCP_TSEND_CX:
  146. case CMD_FCP_TRSP_CX:
  147. case CMD_FCP_TRECEIVE_CX:
  148. case CMD_FCP_AUTO_TRSP_CX:
  149. case CMD_ADAPTER_MSG:
  150. case CMD_ADAPTER_DUMP:
  151. case CMD_XMIT_SEQUENCE64_CR:
  152. case CMD_XMIT_SEQUENCE64_CX:
  153. case CMD_XMIT_BCAST64_CN:
  154. case CMD_XMIT_BCAST64_CX:
  155. case CMD_ELS_REQUEST64_CR:
  156. case CMD_ELS_REQUEST64_CX:
  157. case CMD_FCP_IWRITE64_CR:
  158. case CMD_FCP_IWRITE64_CX:
  159. case CMD_FCP_IREAD64_CR:
  160. case CMD_FCP_IREAD64_CX:
  161. case CMD_FCP_ICMND64_CR:
  162. case CMD_FCP_ICMND64_CX:
  163. case CMD_FCP_TSEND64_CX:
  164. case CMD_FCP_TRSP64_CX:
  165. case CMD_FCP_TRECEIVE64_CX:
  166. case CMD_GEN_REQUEST64_CR:
  167. case CMD_GEN_REQUEST64_CX:
  168. case CMD_XMIT_ELS_RSP64_CX:
  169. type = LPFC_SOL_IOCB;
  170. break;
  171. case CMD_ABORT_XRI_CN:
  172. case CMD_ABORT_XRI_CX:
  173. case CMD_CLOSE_XRI_CN:
  174. case CMD_CLOSE_XRI_CX:
  175. case CMD_XRI_ABORTED_CX:
  176. case CMD_ABORT_MXRI64_CN:
  177. type = LPFC_ABORT_IOCB;
  178. break;
  179. case CMD_RCV_SEQUENCE_CX:
  180. case CMD_RCV_ELS_REQ_CX:
  181. case CMD_RCV_SEQUENCE64_CX:
  182. case CMD_RCV_ELS_REQ64_CX:
  183. case CMD_ASYNC_STATUS:
  184. case CMD_IOCB_RCV_SEQ64_CX:
  185. case CMD_IOCB_RCV_ELS64_CX:
  186. case CMD_IOCB_RCV_CONT64_CX:
  187. type = LPFC_UNSOL_IOCB;
  188. break;
  189. default:
  190. type = LPFC_UNKNOWN_IOCB;
  191. break;
  192. }
  193. return type;
  194. }
  195. static int
  196. lpfc_sli_ring_map(struct lpfc_hba *phba)
  197. {
  198. struct lpfc_sli *psli = &phba->sli;
  199. LPFC_MBOXQ_t *pmb;
  200. MAILBOX_t *pmbox;
  201. int i, rc, ret = 0;
  202. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  203. if (!pmb)
  204. return -ENOMEM;
  205. pmbox = &pmb->mb;
  206. phba->link_state = LPFC_INIT_MBX_CMDS;
  207. for (i = 0; i < psli->num_rings; i++) {
  208. lpfc_config_ring(phba, i, pmb);
  209. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  210. if (rc != MBX_SUCCESS) {
  211. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  212. "0446 Adapter failed to init (%d), "
  213. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  214. "ring %d\n",
  215. rc, pmbox->mbxCommand,
  216. pmbox->mbxStatus, i);
  217. phba->link_state = LPFC_HBA_ERROR;
  218. ret = -ENXIO;
  219. break;
  220. }
  221. }
  222. mempool_free(pmb, phba->mbox_mem_pool);
  223. return ret;
  224. }
  225. static int
  226. lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  227. struct lpfc_iocbq *piocb)
  228. {
  229. list_add_tail(&piocb->list, &pring->txcmplq);
  230. pring->txcmplq_cnt++;
  231. if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
  232. (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
  233. (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
  234. if (!piocb->vport)
  235. BUG();
  236. else
  237. mod_timer(&piocb->vport->els_tmofunc,
  238. jiffies + HZ * (phba->fc_ratov << 1));
  239. }
  240. return 0;
  241. }
  242. static struct lpfc_iocbq *
  243. lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  244. {
  245. struct lpfc_iocbq *cmd_iocb;
  246. list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
  247. if (cmd_iocb != NULL)
  248. pring->txq_cnt--;
  249. return cmd_iocb;
  250. }
  251. static IOCB_t *
  252. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  253. {
  254. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  255. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  256. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  257. uint32_t max_cmd_idx = pring->numCiocb;
  258. if ((pring->next_cmdidx == pring->cmdidx) &&
  259. (++pring->next_cmdidx >= max_cmd_idx))
  260. pring->next_cmdidx = 0;
  261. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  262. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  263. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  264. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  265. "0315 Ring %d issue: portCmdGet %d "
  266. "is bigger then cmd ring %d\n",
  267. pring->ringno,
  268. pring->local_getidx, max_cmd_idx);
  269. phba->link_state = LPFC_HBA_ERROR;
  270. /*
  271. * All error attention handlers are posted to
  272. * worker thread
  273. */
  274. phba->work_ha |= HA_ERATT;
  275. phba->work_hs = HS_FFER3;
  276. /* hbalock should already be held */
  277. if (phba->work_wait)
  278. lpfc_worker_wake_up(phba);
  279. return NULL;
  280. }
  281. if (pring->local_getidx == pring->next_cmdidx)
  282. return NULL;
  283. }
  284. return lpfc_cmd_iocb(phba, pring);
  285. }
  286. uint16_t
  287. lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  288. {
  289. struct lpfc_iocbq **new_arr;
  290. struct lpfc_iocbq **old_arr;
  291. size_t new_len;
  292. struct lpfc_sli *psli = &phba->sli;
  293. uint16_t iotag;
  294. spin_lock_irq(&phba->hbalock);
  295. iotag = psli->last_iotag;
  296. if(++iotag < psli->iocbq_lookup_len) {
  297. psli->last_iotag = iotag;
  298. psli->iocbq_lookup[iotag] = iocbq;
  299. spin_unlock_irq(&phba->hbalock);
  300. iocbq->iotag = iotag;
  301. return iotag;
  302. } else if (psli->iocbq_lookup_len < (0xffff
  303. - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
  304. new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
  305. spin_unlock_irq(&phba->hbalock);
  306. new_arr = kzalloc(new_len * sizeof (struct lpfc_iocbq *),
  307. GFP_KERNEL);
  308. if (new_arr) {
  309. spin_lock_irq(&phba->hbalock);
  310. old_arr = psli->iocbq_lookup;
  311. if (new_len <= psli->iocbq_lookup_len) {
  312. /* highly unprobable case */
  313. kfree(new_arr);
  314. iotag = psli->last_iotag;
  315. if(++iotag < psli->iocbq_lookup_len) {
  316. psli->last_iotag = iotag;
  317. psli->iocbq_lookup[iotag] = iocbq;
  318. spin_unlock_irq(&phba->hbalock);
  319. iocbq->iotag = iotag;
  320. return iotag;
  321. }
  322. spin_unlock_irq(&phba->hbalock);
  323. return 0;
  324. }
  325. if (psli->iocbq_lookup)
  326. memcpy(new_arr, old_arr,
  327. ((psli->last_iotag + 1) *
  328. sizeof (struct lpfc_iocbq *)));
  329. psli->iocbq_lookup = new_arr;
  330. psli->iocbq_lookup_len = new_len;
  331. psli->last_iotag = iotag;
  332. psli->iocbq_lookup[iotag] = iocbq;
  333. spin_unlock_irq(&phba->hbalock);
  334. iocbq->iotag = iotag;
  335. kfree(old_arr);
  336. return iotag;
  337. }
  338. } else
  339. spin_unlock_irq(&phba->hbalock);
  340. lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
  341. "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
  342. psli->last_iotag);
  343. return 0;
  344. }
  345. static void
  346. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  347. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  348. {
  349. /*
  350. * Set up an iotag
  351. */
  352. nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
  353. if (pring->ringno == LPFC_ELS_RING) {
  354. lpfc_debugfs_slow_ring_trc(phba,
  355. "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
  356. *(((uint32_t *) &nextiocb->iocb) + 4),
  357. *(((uint32_t *) &nextiocb->iocb) + 6),
  358. *(((uint32_t *) &nextiocb->iocb) + 7));
  359. }
  360. /*
  361. * Issue iocb command to adapter
  362. */
  363. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
  364. wmb();
  365. pring->stats.iocb_cmd++;
  366. /*
  367. * If there is no completion routine to call, we can release the
  368. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  369. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  370. */
  371. if (nextiocb->iocb_cmpl)
  372. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  373. else
  374. __lpfc_sli_release_iocbq(phba, nextiocb);
  375. /*
  376. * Let the HBA know what IOCB slot will be the next one the
  377. * driver will put a command into.
  378. */
  379. pring->cmdidx = pring->next_cmdidx;
  380. writel(pring->cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
  381. }
  382. static void
  383. lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  384. {
  385. int ringno = pring->ringno;
  386. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  387. wmb();
  388. /*
  389. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  390. * The HBA will tell us when an IOCB entry is available.
  391. */
  392. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  393. readl(phba->CAregaddr); /* flush */
  394. pring->stats.iocb_cmd_full++;
  395. }
  396. static void
  397. lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  398. {
  399. int ringno = pring->ringno;
  400. /*
  401. * Tell the HBA that there is work to do in this ring.
  402. */
  403. wmb();
  404. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  405. readl(phba->CAregaddr); /* flush */
  406. }
  407. static void
  408. lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  409. {
  410. IOCB_t *iocb;
  411. struct lpfc_iocbq *nextiocb;
  412. /*
  413. * Check to see if:
  414. * (a) there is anything on the txq to send
  415. * (b) link is up
  416. * (c) link attention events can be processed (fcp ring only)
  417. * (d) IOCB processing is not blocked by the outstanding mbox command.
  418. */
  419. if (pring->txq_cnt &&
  420. lpfc_is_link_up(phba) &&
  421. (pring->ringno != phba->sli.fcp_ring ||
  422. phba->sli.sli_flag & LPFC_PROCESS_LA)) {
  423. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  424. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  425. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  426. if (iocb)
  427. lpfc_sli_update_ring(phba, pring);
  428. else
  429. lpfc_sli_update_full_ring(phba, pring);
  430. }
  431. return;
  432. }
  433. static struct lpfc_hbq_entry *
  434. lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
  435. {
  436. struct hbq_s *hbqp = &phba->hbqs[hbqno];
  437. if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
  438. ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
  439. hbqp->next_hbqPutIdx = 0;
  440. if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
  441. uint32_t raw_index = phba->hbq_get[hbqno];
  442. uint32_t getidx = le32_to_cpu(raw_index);
  443. hbqp->local_hbqGetIdx = getidx;
  444. if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
  445. lpfc_printf_log(phba, KERN_ERR,
  446. LOG_SLI | LOG_VPORT,
  447. "1802 HBQ %d: local_hbqGetIdx "
  448. "%u is > than hbqp->entry_count %u\n",
  449. hbqno, hbqp->local_hbqGetIdx,
  450. hbqp->entry_count);
  451. phba->link_state = LPFC_HBA_ERROR;
  452. return NULL;
  453. }
  454. if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
  455. return NULL;
  456. }
  457. return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
  458. hbqp->hbqPutIdx;
  459. }
  460. void
  461. lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
  462. {
  463. struct lpfc_dmabuf *dmabuf, *next_dmabuf;
  464. struct hbq_dmabuf *hbq_buf;
  465. int i, hbq_count;
  466. hbq_count = lpfc_sli_hbq_count();
  467. /* Return all memory used by all HBQs */
  468. for (i = 0; i < hbq_count; ++i) {
  469. list_for_each_entry_safe(dmabuf, next_dmabuf,
  470. &phba->hbqs[i].hbq_buffer_list, list) {
  471. hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
  472. list_del(&hbq_buf->dbuf.list);
  473. (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
  474. }
  475. phba->hbqs[i].buffer_count = 0;
  476. }
  477. }
  478. static struct lpfc_hbq_entry *
  479. lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
  480. struct hbq_dmabuf *hbq_buf)
  481. {
  482. struct lpfc_hbq_entry *hbqe;
  483. dma_addr_t physaddr = hbq_buf->dbuf.phys;
  484. /* Get next HBQ entry slot to use */
  485. hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
  486. if (hbqe) {
  487. struct hbq_s *hbqp = &phba->hbqs[hbqno];
  488. hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
  489. hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
  490. hbqe->bde.tus.f.bdeSize = hbq_buf->size;
  491. hbqe->bde.tus.f.bdeFlags = 0;
  492. hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
  493. hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
  494. /* Sync SLIM */
  495. hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
  496. writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
  497. /* flush */
  498. readl(phba->hbq_put + hbqno);
  499. list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
  500. }
  501. return hbqe;
  502. }
  503. static struct lpfc_hbq_init lpfc_els_hbq = {
  504. .rn = 1,
  505. .entry_count = 200,
  506. .mask_count = 0,
  507. .profile = 0,
  508. .ring_mask = (1 << LPFC_ELS_RING),
  509. .buffer_count = 0,
  510. .init_count = 20,
  511. .add_count = 5,
  512. };
  513. static struct lpfc_hbq_init lpfc_extra_hbq = {
  514. .rn = 1,
  515. .entry_count = 200,
  516. .mask_count = 0,
  517. .profile = 0,
  518. .ring_mask = (1 << LPFC_EXTRA_RING),
  519. .buffer_count = 0,
  520. .init_count = 0,
  521. .add_count = 5,
  522. };
  523. struct lpfc_hbq_init *lpfc_hbq_defs[] = {
  524. &lpfc_els_hbq,
  525. &lpfc_extra_hbq,
  526. };
  527. static int
  528. lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
  529. {
  530. uint32_t i, start, end;
  531. struct hbq_dmabuf *hbq_buffer;
  532. if (!phba->hbqs[hbqno].hbq_alloc_buffer) {
  533. return 0;
  534. }
  535. start = phba->hbqs[hbqno].buffer_count;
  536. end = count + start;
  537. if (end > lpfc_hbq_defs[hbqno]->entry_count) {
  538. end = lpfc_hbq_defs[hbqno]->entry_count;
  539. }
  540. /* Populate HBQ entries */
  541. for (i = start; i < end; i++) {
  542. hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
  543. if (!hbq_buffer)
  544. return 1;
  545. hbq_buffer->tag = (i | (hbqno << 16));
  546. if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
  547. phba->hbqs[hbqno].buffer_count++;
  548. else
  549. (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
  550. }
  551. return 0;
  552. }
  553. int
  554. lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
  555. {
  556. return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
  557. lpfc_hbq_defs[qno]->add_count));
  558. }
  559. static int
  560. lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
  561. {
  562. return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
  563. lpfc_hbq_defs[qno]->init_count));
  564. }
  565. static struct hbq_dmabuf *
  566. lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
  567. {
  568. struct lpfc_dmabuf *d_buf;
  569. struct hbq_dmabuf *hbq_buf;
  570. uint32_t hbqno;
  571. hbqno = tag >> 16;
  572. if (hbqno >= LPFC_MAX_HBQS)
  573. return NULL;
  574. list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
  575. hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
  576. if (hbq_buf->tag == tag) {
  577. return hbq_buf;
  578. }
  579. }
  580. lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
  581. "1803 Bad hbq tag. Data: x%x x%x\n",
  582. tag, phba->hbqs[tag >> 16].buffer_count);
  583. return NULL;
  584. }
  585. void
  586. lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
  587. {
  588. uint32_t hbqno;
  589. if (hbq_buffer) {
  590. hbqno = hbq_buffer->tag >> 16;
  591. if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
  592. (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
  593. }
  594. }
  595. }
  596. static int
  597. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  598. {
  599. uint8_t ret;
  600. switch (mbxCommand) {
  601. case MBX_LOAD_SM:
  602. case MBX_READ_NV:
  603. case MBX_WRITE_NV:
  604. case MBX_WRITE_VPARMS:
  605. case MBX_RUN_BIU_DIAG:
  606. case MBX_INIT_LINK:
  607. case MBX_DOWN_LINK:
  608. case MBX_CONFIG_LINK:
  609. case MBX_CONFIG_RING:
  610. case MBX_RESET_RING:
  611. case MBX_READ_CONFIG:
  612. case MBX_READ_RCONFIG:
  613. case MBX_READ_SPARM:
  614. case MBX_READ_STATUS:
  615. case MBX_READ_RPI:
  616. case MBX_READ_XRI:
  617. case MBX_READ_REV:
  618. case MBX_READ_LNK_STAT:
  619. case MBX_REG_LOGIN:
  620. case MBX_UNREG_LOGIN:
  621. case MBX_READ_LA:
  622. case MBX_CLEAR_LA:
  623. case MBX_DUMP_MEMORY:
  624. case MBX_DUMP_CONTEXT:
  625. case MBX_RUN_DIAGS:
  626. case MBX_RESTART:
  627. case MBX_UPDATE_CFG:
  628. case MBX_DOWN_LOAD:
  629. case MBX_DEL_LD_ENTRY:
  630. case MBX_RUN_PROGRAM:
  631. case MBX_SET_MASK:
  632. case MBX_SET_SLIM:
  633. case MBX_UNREG_D_ID:
  634. case MBX_KILL_BOARD:
  635. case MBX_CONFIG_FARP:
  636. case MBX_BEACON:
  637. case MBX_LOAD_AREA:
  638. case MBX_RUN_BIU_DIAG64:
  639. case MBX_CONFIG_PORT:
  640. case MBX_READ_SPARM64:
  641. case MBX_READ_RPI64:
  642. case MBX_REG_LOGIN64:
  643. case MBX_READ_LA64:
  644. case MBX_FLASH_WR_ULA:
  645. case MBX_SET_DEBUG:
  646. case MBX_LOAD_EXP_ROM:
  647. case MBX_ASYNCEVT_ENABLE:
  648. case MBX_REG_VPI:
  649. case MBX_UNREG_VPI:
  650. case MBX_HEARTBEAT:
  651. ret = mbxCommand;
  652. break;
  653. default:
  654. ret = MBX_SHUTDOWN;
  655. break;
  656. }
  657. return ret;
  658. }
  659. static void
  660. lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
  661. {
  662. wait_queue_head_t *pdone_q;
  663. unsigned long drvr_flag;
  664. /*
  665. * If pdone_q is empty, the driver thread gave up waiting and
  666. * continued running.
  667. */
  668. pmboxq->mbox_flag |= LPFC_MBX_WAKE;
  669. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  670. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  671. if (pdone_q)
  672. wake_up_interruptible(pdone_q);
  673. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  674. return;
  675. }
  676. void
  677. lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
  678. {
  679. struct lpfc_dmabuf *mp;
  680. uint16_t rpi;
  681. int rc;
  682. mp = (struct lpfc_dmabuf *) (pmb->context1);
  683. if (mp) {
  684. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  685. kfree(mp);
  686. }
  687. /*
  688. * If a REG_LOGIN succeeded after node is destroyed or node
  689. * is in re-discovery driver need to cleanup the RPI.
  690. */
  691. if (!(phba->pport->load_flag & FC_UNLOADING) &&
  692. pmb->mb.mbxCommand == MBX_REG_LOGIN64 &&
  693. !pmb->mb.mbxStatus) {
  694. rpi = pmb->mb.un.varWords[0];
  695. lpfc_unreg_login(phba, pmb->mb.un.varRegLogin.vpi, rpi, pmb);
  696. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  697. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  698. if (rc != MBX_NOT_FINISHED)
  699. return;
  700. }
  701. mempool_free(pmb, phba->mbox_mem_pool);
  702. return;
  703. }
  704. int
  705. lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
  706. {
  707. MAILBOX_t *pmbox;
  708. LPFC_MBOXQ_t *pmb;
  709. int rc;
  710. LIST_HEAD(cmplq);
  711. phba->sli.slistat.mbox_event++;
  712. /* Get all completed mailboxe buffers into the cmplq */
  713. spin_lock_irq(&phba->hbalock);
  714. list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
  715. spin_unlock_irq(&phba->hbalock);
  716. /* Get a Mailbox buffer to setup mailbox commands for callback */
  717. do {
  718. list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
  719. if (pmb == NULL)
  720. break;
  721. pmbox = &pmb->mb;
  722. if (pmbox->mbxCommand != MBX_HEARTBEAT) {
  723. if (pmb->vport) {
  724. lpfc_debugfs_disc_trc(pmb->vport,
  725. LPFC_DISC_TRC_MBOX_VPORT,
  726. "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
  727. (uint32_t)pmbox->mbxCommand,
  728. pmbox->un.varWords[0],
  729. pmbox->un.varWords[1]);
  730. }
  731. else {
  732. lpfc_debugfs_disc_trc(phba->pport,
  733. LPFC_DISC_TRC_MBOX,
  734. "MBOX cmpl: cmd:x%x mb:x%x x%x",
  735. (uint32_t)pmbox->mbxCommand,
  736. pmbox->un.varWords[0],
  737. pmbox->un.varWords[1]);
  738. }
  739. }
  740. /*
  741. * It is a fatal error if unknown mbox command completion.
  742. */
  743. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  744. MBX_SHUTDOWN) {
  745. /* Unknow mailbox command compl */
  746. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  747. "(%d):0323 Unknown Mailbox command "
  748. "%x Cmpl\n",
  749. pmb->vport ? pmb->vport->vpi : 0,
  750. pmbox->mbxCommand);
  751. phba->link_state = LPFC_HBA_ERROR;
  752. phba->work_hs = HS_FFER3;
  753. lpfc_handle_eratt(phba);
  754. continue;
  755. }
  756. if (pmbox->mbxStatus) {
  757. phba->sli.slistat.mbox_stat_err++;
  758. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  759. /* Mbox cmd cmpl error - RETRYing */
  760. lpfc_printf_log(phba, KERN_INFO,
  761. LOG_MBOX | LOG_SLI,
  762. "(%d):0305 Mbox cmd cmpl "
  763. "error - RETRYing Data: x%x "
  764. "x%x x%x x%x\n",
  765. pmb->vport ? pmb->vport->vpi :0,
  766. pmbox->mbxCommand,
  767. pmbox->mbxStatus,
  768. pmbox->un.varWords[0],
  769. pmb->vport->port_state);
  770. pmbox->mbxStatus = 0;
  771. pmbox->mbxOwner = OWN_HOST;
  772. spin_lock_irq(&phba->hbalock);
  773. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  774. spin_unlock_irq(&phba->hbalock);
  775. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  776. if (rc == MBX_SUCCESS)
  777. continue;
  778. }
  779. }
  780. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  781. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  782. "(%d):0307 Mailbox cmd x%x Cmpl x%p "
  783. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  784. pmb->vport ? pmb->vport->vpi : 0,
  785. pmbox->mbxCommand,
  786. pmb->mbox_cmpl,
  787. *((uint32_t *) pmbox),
  788. pmbox->un.varWords[0],
  789. pmbox->un.varWords[1],
  790. pmbox->un.varWords[2],
  791. pmbox->un.varWords[3],
  792. pmbox->un.varWords[4],
  793. pmbox->un.varWords[5],
  794. pmbox->un.varWords[6],
  795. pmbox->un.varWords[7]);
  796. if (pmb->mbox_cmpl)
  797. pmb->mbox_cmpl(phba,pmb);
  798. } while (1);
  799. return 0;
  800. }
  801. static struct lpfc_dmabuf *
  802. lpfc_sli_replace_hbqbuff(struct lpfc_hba *phba, uint32_t tag)
  803. {
  804. struct hbq_dmabuf *hbq_entry, *new_hbq_entry;
  805. uint32_t hbqno;
  806. void *virt; /* virtual address ptr */
  807. dma_addr_t phys; /* mapped address */
  808. hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
  809. if (hbq_entry == NULL)
  810. return NULL;
  811. list_del(&hbq_entry->dbuf.list);
  812. hbqno = tag >> 16;
  813. new_hbq_entry = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
  814. if (new_hbq_entry == NULL)
  815. return &hbq_entry->dbuf;
  816. new_hbq_entry->tag = -1;
  817. phys = new_hbq_entry->dbuf.phys;
  818. virt = new_hbq_entry->dbuf.virt;
  819. new_hbq_entry->dbuf.phys = hbq_entry->dbuf.phys;
  820. new_hbq_entry->dbuf.virt = hbq_entry->dbuf.virt;
  821. hbq_entry->dbuf.phys = phys;
  822. hbq_entry->dbuf.virt = virt;
  823. lpfc_sli_free_hbq(phba, hbq_entry);
  824. return &new_hbq_entry->dbuf;
  825. }
  826. static struct lpfc_dmabuf *
  827. lpfc_sli_get_buff(struct lpfc_hba *phba,
  828. struct lpfc_sli_ring *pring,
  829. uint32_t tag)
  830. {
  831. if (tag & QUE_BUFTAG_BIT)
  832. return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
  833. else
  834. return lpfc_sli_replace_hbqbuff(phba, tag);
  835. }
  836. static int
  837. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  838. struct lpfc_iocbq *saveq)
  839. {
  840. IOCB_t * irsp;
  841. WORD5 * w5p;
  842. uint32_t Rctl, Type;
  843. uint32_t match, i;
  844. struct lpfc_iocbq *iocbq;
  845. match = 0;
  846. irsp = &(saveq->iocb);
  847. if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
  848. if (pring->lpfc_sli_rcv_async_status)
  849. pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
  850. else
  851. lpfc_printf_log(phba,
  852. KERN_WARNING,
  853. LOG_SLI,
  854. "0316 Ring %d handler: unexpected "
  855. "ASYNC_STATUS iocb received evt_code "
  856. "0x%x\n",
  857. pring->ringno,
  858. irsp->un.asyncstat.evt_code);
  859. return 1;
  860. }
  861. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  862. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)
  863. || (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)
  864. || (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX)) {
  865. Rctl = FC_ELS_REQ;
  866. Type = FC_ELS_DATA;
  867. } else {
  868. w5p =
  869. (WORD5 *) & (saveq->iocb.un.
  870. ulpWord[5]);
  871. Rctl = w5p->hcsw.Rctl;
  872. Type = w5p->hcsw.Type;
  873. /* Firmware Workaround */
  874. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  875. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
  876. irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
  877. Rctl = FC_ELS_REQ;
  878. Type = FC_ELS_DATA;
  879. w5p->hcsw.Rctl = Rctl;
  880. w5p->hcsw.Type = Type;
  881. }
  882. }
  883. if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
  884. struct lpfc_hbq_entry *hbqe_1, *hbqe_2;
  885. hbqe_1 = (struct lpfc_hbq_entry *) &saveq->iocb.un.ulpWord[0];
  886. hbqe_2 = (struct lpfc_hbq_entry *) &saveq->iocb.
  887. unsli3.sli3Words[4];
  888. if (irsp->ulpBdeCount != 0) {
  889. saveq->context2 = lpfc_sli_get_buff(phba, pring,
  890. irsp->un.ulpWord[3]);
  891. if (!saveq->context2)
  892. lpfc_printf_log(phba,
  893. KERN_ERR,
  894. LOG_SLI,
  895. "0341 Ring %d Cannot find buffer for "
  896. "an unsolicited iocb. tag 0x%x\n",
  897. pring->ringno,
  898. irsp->un.ulpWord[3]);
  899. }
  900. if (irsp->ulpBdeCount == 2) {
  901. saveq->context3 = lpfc_sli_get_buff(phba, pring,
  902. irsp->unsli3.sli3Words[7]);
  903. if (!saveq->context3)
  904. lpfc_printf_log(phba,
  905. KERN_ERR,
  906. LOG_SLI,
  907. "0342 Ring %d Cannot find buffer for an"
  908. " unsolicited iocb. tag 0x%x\n",
  909. pring->ringno,
  910. irsp->unsli3.sli3Words[7]);
  911. }
  912. list_for_each_entry(iocbq, &saveq->list, list) {
  913. hbqe_1 = (struct lpfc_hbq_entry *) &iocbq->iocb.
  914. un.ulpWord[0];
  915. hbqe_2 = (struct lpfc_hbq_entry *) &iocbq->iocb.
  916. unsli3.sli3Words[4];
  917. irsp = &(iocbq->iocb);
  918. if (irsp->ulpBdeCount != 0) {
  919. iocbq->context2 = lpfc_sli_get_buff(phba, pring,
  920. irsp->un.ulpWord[3]);
  921. if (!saveq->context2)
  922. lpfc_printf_log(phba,
  923. KERN_ERR,
  924. LOG_SLI,
  925. "0343 Ring %d Cannot find "
  926. "buffer for an unsolicited iocb"
  927. ". tag 0x%x\n", pring->ringno,
  928. irsp->un.ulpWord[3]);
  929. }
  930. if (irsp->ulpBdeCount == 2) {
  931. iocbq->context3 = lpfc_sli_get_buff(phba, pring,
  932. irsp->unsli3.sli3Words[7]);
  933. if (!saveq->context3)
  934. lpfc_printf_log(phba,
  935. KERN_ERR,
  936. LOG_SLI,
  937. "0344 Ring %d Cannot find "
  938. "buffer for an unsolicited "
  939. "iocb. tag 0x%x\n",
  940. pring->ringno,
  941. irsp->unsli3.sli3Words[7]);
  942. }
  943. }
  944. }
  945. /* unSolicited Responses */
  946. if (pring->prt[0].profile) {
  947. if (pring->prt[0].lpfc_sli_rcv_unsol_event)
  948. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
  949. saveq);
  950. match = 1;
  951. } else {
  952. /* We must search, based on rctl / type
  953. for the right routine */
  954. for (i = 0; i < pring->num_mask;
  955. i++) {
  956. if ((pring->prt[i].rctl ==
  957. Rctl)
  958. && (pring->prt[i].
  959. type == Type)) {
  960. if (pring->prt[i].lpfc_sli_rcv_unsol_event)
  961. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  962. (phba, pring, saveq);
  963. match = 1;
  964. break;
  965. }
  966. }
  967. }
  968. if (match == 0) {
  969. /* Unexpected Rctl / Type received */
  970. /* Ring <ringno> handler: unexpected
  971. Rctl <Rctl> Type <Type> received */
  972. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  973. "0313 Ring %d handler: unexpected Rctl x%x "
  974. "Type x%x received\n",
  975. pring->ringno, Rctl, Type);
  976. }
  977. return 1;
  978. }
  979. static struct lpfc_iocbq *
  980. lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
  981. struct lpfc_sli_ring *pring,
  982. struct lpfc_iocbq *prspiocb)
  983. {
  984. struct lpfc_iocbq *cmd_iocb = NULL;
  985. uint16_t iotag;
  986. iotag = prspiocb->iocb.ulpIoTag;
  987. if (iotag != 0 && iotag <= phba->sli.last_iotag) {
  988. cmd_iocb = phba->sli.iocbq_lookup[iotag];
  989. list_del_init(&cmd_iocb->list);
  990. pring->txcmplq_cnt--;
  991. return cmd_iocb;
  992. }
  993. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  994. "0317 iotag x%x is out off "
  995. "range: max iotag x%x wd0 x%x\n",
  996. iotag, phba->sli.last_iotag,
  997. *(((uint32_t *) &prspiocb->iocb) + 7));
  998. return NULL;
  999. }
  1000. static int
  1001. lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  1002. struct lpfc_iocbq *saveq)
  1003. {
  1004. struct lpfc_iocbq *cmdiocbp;
  1005. int rc = 1;
  1006. unsigned long iflag;
  1007. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  1008. spin_lock_irqsave(&phba->hbalock, iflag);
  1009. cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
  1010. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1011. if (cmdiocbp) {
  1012. if (cmdiocbp->iocb_cmpl) {
  1013. /*
  1014. * Post all ELS completions to the worker thread.
  1015. * All other are passed to the completion callback.
  1016. */
  1017. if (pring->ringno == LPFC_ELS_RING) {
  1018. if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
  1019. cmdiocbp->iocb_flag &=
  1020. ~LPFC_DRIVER_ABORTED;
  1021. saveq->iocb.ulpStatus =
  1022. IOSTAT_LOCAL_REJECT;
  1023. saveq->iocb.un.ulpWord[4] =
  1024. IOERR_SLI_ABORTED;
  1025. }
  1026. }
  1027. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  1028. } else
  1029. lpfc_sli_release_iocbq(phba, cmdiocbp);
  1030. } else {
  1031. /*
  1032. * Unknown initiating command based on the response iotag.
  1033. * This could be the case on the ELS ring because of
  1034. * lpfc_els_abort().
  1035. */
  1036. if (pring->ringno != LPFC_ELS_RING) {
  1037. /*
  1038. * Ring <ringno> handler: unexpected completion IoTag
  1039. * <IoTag>
  1040. */
  1041. lpfc_printf_vlog(cmdiocbp->vport, KERN_WARNING, LOG_SLI,
  1042. "0322 Ring %d handler: "
  1043. "unexpected completion IoTag x%x "
  1044. "Data: x%x x%x x%x x%x\n",
  1045. pring->ringno,
  1046. saveq->iocb.ulpIoTag,
  1047. saveq->iocb.ulpStatus,
  1048. saveq->iocb.un.ulpWord[4],
  1049. saveq->iocb.ulpCommand,
  1050. saveq->iocb.ulpContext);
  1051. }
  1052. }
  1053. return rc;
  1054. }
  1055. static void
  1056. lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1057. {
  1058. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1059. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1060. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1061. /*
  1062. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1063. * rsp ring <portRspMax>
  1064. */
  1065. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1066. "0312 Ring %d handler: portRspPut %d "
  1067. "is bigger then rsp ring %d\n",
  1068. pring->ringno, le32_to_cpu(pgp->rspPutInx),
  1069. pring->numRiocb);
  1070. phba->link_state = LPFC_HBA_ERROR;
  1071. /*
  1072. * All error attention handlers are posted to
  1073. * worker thread
  1074. */
  1075. phba->work_ha |= HA_ERATT;
  1076. phba->work_hs = HS_FFER3;
  1077. /* hbalock should already be held */
  1078. if (phba->work_wait)
  1079. lpfc_worker_wake_up(phba);
  1080. return;
  1081. }
  1082. void lpfc_sli_poll_fcp_ring(struct lpfc_hba *phba)
  1083. {
  1084. struct lpfc_sli *psli = &phba->sli;
  1085. struct lpfc_sli_ring *pring = &psli->ring[LPFC_FCP_RING];
  1086. IOCB_t *irsp = NULL;
  1087. IOCB_t *entry = NULL;
  1088. struct lpfc_iocbq *cmdiocbq = NULL;
  1089. struct lpfc_iocbq rspiocbq;
  1090. struct lpfc_pgp *pgp;
  1091. uint32_t status;
  1092. uint32_t portRspPut, portRspMax;
  1093. int type;
  1094. uint32_t rsp_cmpl = 0;
  1095. uint32_t ha_copy;
  1096. unsigned long iflags;
  1097. pring->stats.iocb_event++;
  1098. pgp = (phba->sli_rev == 3) ?
  1099. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1100. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1101. /*
  1102. * The next available response entry should never exceed the maximum
  1103. * entries. If it does, treat it as an adapter hardware error.
  1104. */
  1105. portRspMax = pring->numRiocb;
  1106. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1107. if (unlikely(portRspPut >= portRspMax)) {
  1108. lpfc_sli_rsp_pointers_error(phba, pring);
  1109. return;
  1110. }
  1111. rmb();
  1112. while (pring->rspidx != portRspPut) {
  1113. entry = lpfc_resp_iocb(phba, pring);
  1114. if (++pring->rspidx >= portRspMax)
  1115. pring->rspidx = 0;
  1116. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1117. (uint32_t *) &rspiocbq.iocb,
  1118. phba->iocb_rsp_size);
  1119. irsp = &rspiocbq.iocb;
  1120. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1121. pring->stats.iocb_rsp++;
  1122. rsp_cmpl++;
  1123. if (unlikely(irsp->ulpStatus)) {
  1124. /* Rsp ring <ringno> error: IOCB */
  1125. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1126. "0326 Rsp Ring %d error: IOCB Data: "
  1127. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1128. pring->ringno,
  1129. irsp->un.ulpWord[0],
  1130. irsp->un.ulpWord[1],
  1131. irsp->un.ulpWord[2],
  1132. irsp->un.ulpWord[3],
  1133. irsp->un.ulpWord[4],
  1134. irsp->un.ulpWord[5],
  1135. *(((uint32_t *) irsp) + 6),
  1136. *(((uint32_t *) irsp) + 7));
  1137. }
  1138. switch (type) {
  1139. case LPFC_ABORT_IOCB:
  1140. case LPFC_SOL_IOCB:
  1141. /*
  1142. * Idle exchange closed via ABTS from port. No iocb
  1143. * resources need to be recovered.
  1144. */
  1145. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1146. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1147. "0314 IOCB cmd 0x%x "
  1148. "processed. Skipping "
  1149. "completion",
  1150. irsp->ulpCommand);
  1151. break;
  1152. }
  1153. spin_lock_irqsave(&phba->hbalock, iflags);
  1154. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1155. &rspiocbq);
  1156. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1157. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1158. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1159. &rspiocbq);
  1160. }
  1161. break;
  1162. default:
  1163. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1164. char adaptermsg[LPFC_MAX_ADPTMSG];
  1165. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1166. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1167. MAX_MSG_DATA);
  1168. dev_warn(&((phba->pcidev)->dev),
  1169. "lpfc%d: %s\n",
  1170. phba->brd_no, adaptermsg);
  1171. } else {
  1172. /* Unknown IOCB command */
  1173. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1174. "0321 Unknown IOCB command "
  1175. "Data: x%x, x%x x%x x%x x%x\n",
  1176. type, irsp->ulpCommand,
  1177. irsp->ulpStatus,
  1178. irsp->ulpIoTag,
  1179. irsp->ulpContext);
  1180. }
  1181. break;
  1182. }
  1183. /*
  1184. * The response IOCB has been processed. Update the ring
  1185. * pointer in SLIM. If the port response put pointer has not
  1186. * been updated, sync the pgp->rspPutInx and fetch the new port
  1187. * response put pointer.
  1188. */
  1189. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1190. if (pring->rspidx == portRspPut)
  1191. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1192. }
  1193. ha_copy = readl(phba->HAregaddr);
  1194. ha_copy >>= (LPFC_FCP_RING * 4);
  1195. if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
  1196. spin_lock_irqsave(&phba->hbalock, iflags);
  1197. pring->stats.iocb_rsp_full++;
  1198. status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
  1199. writel(status, phba->CAregaddr);
  1200. readl(phba->CAregaddr);
  1201. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1202. }
  1203. if ((ha_copy & HA_R0CE_RSP) &&
  1204. (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1205. spin_lock_irqsave(&phba->hbalock, iflags);
  1206. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1207. pring->stats.iocb_cmd_empty++;
  1208. /* Force update of the local copy of cmdGetInx */
  1209. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1210. lpfc_sli_resume_iocb(phba, pring);
  1211. if ((pring->lpfc_sli_cmd_available))
  1212. (pring->lpfc_sli_cmd_available) (phba, pring);
  1213. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1214. }
  1215. return;
  1216. }
  1217. /*
  1218. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  1219. * to check it explicitly.
  1220. */
  1221. static int
  1222. lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
  1223. struct lpfc_sli_ring *pring, uint32_t mask)
  1224. {
  1225. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1226. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1227. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1228. IOCB_t *irsp = NULL;
  1229. IOCB_t *entry = NULL;
  1230. struct lpfc_iocbq *cmdiocbq = NULL;
  1231. struct lpfc_iocbq rspiocbq;
  1232. uint32_t status;
  1233. uint32_t portRspPut, portRspMax;
  1234. int rc = 1;
  1235. lpfc_iocb_type type;
  1236. unsigned long iflag;
  1237. uint32_t rsp_cmpl = 0;
  1238. spin_lock_irqsave(&phba->hbalock, iflag);
  1239. pring->stats.iocb_event++;
  1240. /*
  1241. * The next available response entry should never exceed the maximum
  1242. * entries. If it does, treat it as an adapter hardware error.
  1243. */
  1244. portRspMax = pring->numRiocb;
  1245. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1246. if (unlikely(portRspPut >= portRspMax)) {
  1247. lpfc_sli_rsp_pointers_error(phba, pring);
  1248. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1249. return 1;
  1250. }
  1251. rmb();
  1252. while (pring->rspidx != portRspPut) {
  1253. /*
  1254. * Fetch an entry off the ring and copy it into a local data
  1255. * structure. The copy involves a byte-swap since the
  1256. * network byte order and pci byte orders are different.
  1257. */
  1258. entry = lpfc_resp_iocb(phba, pring);
  1259. phba->last_completion_time = jiffies;
  1260. if (++pring->rspidx >= portRspMax)
  1261. pring->rspidx = 0;
  1262. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1263. (uint32_t *) &rspiocbq.iocb,
  1264. phba->iocb_rsp_size);
  1265. INIT_LIST_HEAD(&(rspiocbq.list));
  1266. irsp = &rspiocbq.iocb;
  1267. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1268. pring->stats.iocb_rsp++;
  1269. rsp_cmpl++;
  1270. if (unlikely(irsp->ulpStatus)) {
  1271. /*
  1272. * If resource errors reported from HBA, reduce
  1273. * queuedepths of the SCSI device.
  1274. */
  1275. if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
  1276. (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
  1277. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1278. lpfc_adjust_queue_depth(phba);
  1279. spin_lock_irqsave(&phba->hbalock, iflag);
  1280. }
  1281. /* Rsp ring <ringno> error: IOCB */
  1282. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1283. "0336 Rsp Ring %d error: IOCB Data: "
  1284. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1285. pring->ringno,
  1286. irsp->un.ulpWord[0],
  1287. irsp->un.ulpWord[1],
  1288. irsp->un.ulpWord[2],
  1289. irsp->un.ulpWord[3],
  1290. irsp->un.ulpWord[4],
  1291. irsp->un.ulpWord[5],
  1292. *(((uint32_t *) irsp) + 6),
  1293. *(((uint32_t *) irsp) + 7));
  1294. }
  1295. switch (type) {
  1296. case LPFC_ABORT_IOCB:
  1297. case LPFC_SOL_IOCB:
  1298. /*
  1299. * Idle exchange closed via ABTS from port. No iocb
  1300. * resources need to be recovered.
  1301. */
  1302. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1303. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1304. "0333 IOCB cmd 0x%x"
  1305. " processed. Skipping"
  1306. " completion\n",
  1307. irsp->ulpCommand);
  1308. break;
  1309. }
  1310. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1311. &rspiocbq);
  1312. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1313. if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
  1314. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1315. &rspiocbq);
  1316. } else {
  1317. spin_unlock_irqrestore(&phba->hbalock,
  1318. iflag);
  1319. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1320. &rspiocbq);
  1321. spin_lock_irqsave(&phba->hbalock,
  1322. iflag);
  1323. }
  1324. }
  1325. break;
  1326. case LPFC_UNSOL_IOCB:
  1327. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1328. lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
  1329. spin_lock_irqsave(&phba->hbalock, iflag);
  1330. break;
  1331. default:
  1332. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1333. char adaptermsg[LPFC_MAX_ADPTMSG];
  1334. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1335. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1336. MAX_MSG_DATA);
  1337. dev_warn(&((phba->pcidev)->dev),
  1338. "lpfc%d: %s\n",
  1339. phba->brd_no, adaptermsg);
  1340. } else {
  1341. /* Unknown IOCB command */
  1342. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1343. "0334 Unknown IOCB command "
  1344. "Data: x%x, x%x x%x x%x x%x\n",
  1345. type, irsp->ulpCommand,
  1346. irsp->ulpStatus,
  1347. irsp->ulpIoTag,
  1348. irsp->ulpContext);
  1349. }
  1350. break;
  1351. }
  1352. /*
  1353. * The response IOCB has been processed. Update the ring
  1354. * pointer in SLIM. If the port response put pointer has not
  1355. * been updated, sync the pgp->rspPutInx and fetch the new port
  1356. * response put pointer.
  1357. */
  1358. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1359. if (pring->rspidx == portRspPut)
  1360. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1361. }
  1362. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  1363. pring->stats.iocb_rsp_full++;
  1364. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1365. writel(status, phba->CAregaddr);
  1366. readl(phba->CAregaddr);
  1367. }
  1368. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1369. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1370. pring->stats.iocb_cmd_empty++;
  1371. /* Force update of the local copy of cmdGetInx */
  1372. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1373. lpfc_sli_resume_iocb(phba, pring);
  1374. if ((pring->lpfc_sli_cmd_available))
  1375. (pring->lpfc_sli_cmd_available) (phba, pring);
  1376. }
  1377. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1378. return rc;
  1379. }
  1380. int
  1381. lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
  1382. struct lpfc_sli_ring *pring, uint32_t mask)
  1383. {
  1384. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1385. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1386. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1387. IOCB_t *entry;
  1388. IOCB_t *irsp = NULL;
  1389. struct lpfc_iocbq *rspiocbp = NULL;
  1390. struct lpfc_iocbq *next_iocb;
  1391. struct lpfc_iocbq *cmdiocbp;
  1392. struct lpfc_iocbq *saveq;
  1393. uint8_t iocb_cmd_type;
  1394. lpfc_iocb_type type;
  1395. uint32_t status, free_saveq;
  1396. uint32_t portRspPut, portRspMax;
  1397. int rc = 1;
  1398. unsigned long iflag;
  1399. spin_lock_irqsave(&phba->hbalock, iflag);
  1400. pring->stats.iocb_event++;
  1401. /*
  1402. * The next available response entry should never exceed the maximum
  1403. * entries. If it does, treat it as an adapter hardware error.
  1404. */
  1405. portRspMax = pring->numRiocb;
  1406. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1407. if (portRspPut >= portRspMax) {
  1408. /*
  1409. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1410. * rsp ring <portRspMax>
  1411. */
  1412. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1413. "0303 Ring %d handler: portRspPut %d "
  1414. "is bigger then rsp ring %d\n",
  1415. pring->ringno, portRspPut, portRspMax);
  1416. phba->link_state = LPFC_HBA_ERROR;
  1417. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1418. phba->work_hs = HS_FFER3;
  1419. lpfc_handle_eratt(phba);
  1420. return 1;
  1421. }
  1422. rmb();
  1423. while (pring->rspidx != portRspPut) {
  1424. /*
  1425. * Build a completion list and call the appropriate handler.
  1426. * The process is to get the next available response iocb, get
  1427. * a free iocb from the list, copy the response data into the
  1428. * free iocb, insert to the continuation list, and update the
  1429. * next response index to slim. This process makes response
  1430. * iocb's in the ring available to DMA as fast as possible but
  1431. * pays a penalty for a copy operation. Since the iocb is
  1432. * only 32 bytes, this penalty is considered small relative to
  1433. * the PCI reads for register values and a slim write. When
  1434. * the ulpLe field is set, the entire Command has been
  1435. * received.
  1436. */
  1437. entry = lpfc_resp_iocb(phba, pring);
  1438. phba->last_completion_time = jiffies;
  1439. rspiocbp = __lpfc_sli_get_iocbq(phba);
  1440. if (rspiocbp == NULL) {
  1441. printk(KERN_ERR "%s: out of buffers! Failing "
  1442. "completion.\n", __FUNCTION__);
  1443. break;
  1444. }
  1445. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
  1446. phba->iocb_rsp_size);
  1447. irsp = &rspiocbp->iocb;
  1448. if (++pring->rspidx >= portRspMax)
  1449. pring->rspidx = 0;
  1450. if (pring->ringno == LPFC_ELS_RING) {
  1451. lpfc_debugfs_slow_ring_trc(phba,
  1452. "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
  1453. *(((uint32_t *) irsp) + 4),
  1454. *(((uint32_t *) irsp) + 6),
  1455. *(((uint32_t *) irsp) + 7));
  1456. }
  1457. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1458. if (list_empty(&(pring->iocb_continueq))) {
  1459. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1460. } else {
  1461. list_add_tail(&rspiocbp->list,
  1462. &(pring->iocb_continueq));
  1463. }
  1464. pring->iocb_continueq_cnt++;
  1465. if (irsp->ulpLe) {
  1466. /*
  1467. * By default, the driver expects to free all resources
  1468. * associated with this iocb completion.
  1469. */
  1470. free_saveq = 1;
  1471. saveq = list_get_first(&pring->iocb_continueq,
  1472. struct lpfc_iocbq, list);
  1473. irsp = &(saveq->iocb);
  1474. list_del_init(&pring->iocb_continueq);
  1475. pring->iocb_continueq_cnt = 0;
  1476. pring->stats.iocb_rsp++;
  1477. /*
  1478. * If resource errors reported from HBA, reduce
  1479. * queuedepths of the SCSI device.
  1480. */
  1481. if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
  1482. (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
  1483. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1484. lpfc_adjust_queue_depth(phba);
  1485. spin_lock_irqsave(&phba->hbalock, iflag);
  1486. }
  1487. if (irsp->ulpStatus) {
  1488. /* Rsp ring <ringno> error: IOCB */
  1489. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1490. "0328 Rsp Ring %d error: "
  1491. "IOCB Data: "
  1492. "x%x x%x x%x x%x "
  1493. "x%x x%x x%x x%x "
  1494. "x%x x%x x%x x%x "
  1495. "x%x x%x x%x x%x\n",
  1496. pring->ringno,
  1497. irsp->un.ulpWord[0],
  1498. irsp->un.ulpWord[1],
  1499. irsp->un.ulpWord[2],
  1500. irsp->un.ulpWord[3],
  1501. irsp->un.ulpWord[4],
  1502. irsp->un.ulpWord[5],
  1503. *(((uint32_t *) irsp) + 6),
  1504. *(((uint32_t *) irsp) + 7),
  1505. *(((uint32_t *) irsp) + 8),
  1506. *(((uint32_t *) irsp) + 9),
  1507. *(((uint32_t *) irsp) + 10),
  1508. *(((uint32_t *) irsp) + 11),
  1509. *(((uint32_t *) irsp) + 12),
  1510. *(((uint32_t *) irsp) + 13),
  1511. *(((uint32_t *) irsp) + 14),
  1512. *(((uint32_t *) irsp) + 15));
  1513. }
  1514. /*
  1515. * Fetch the IOCB command type and call the correct
  1516. * completion routine. Solicited and Unsolicited
  1517. * IOCBs on the ELS ring get freed back to the
  1518. * lpfc_iocb_list by the discovery kernel thread.
  1519. */
  1520. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1521. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1522. if (type == LPFC_SOL_IOCB) {
  1523. spin_unlock_irqrestore(&phba->hbalock,
  1524. iflag);
  1525. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1526. saveq);
  1527. spin_lock_irqsave(&phba->hbalock, iflag);
  1528. } else if (type == LPFC_UNSOL_IOCB) {
  1529. spin_unlock_irqrestore(&phba->hbalock,
  1530. iflag);
  1531. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1532. saveq);
  1533. spin_lock_irqsave(&phba->hbalock, iflag);
  1534. } else if (type == LPFC_ABORT_IOCB) {
  1535. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1536. ((cmdiocbp =
  1537. lpfc_sli_iocbq_lookup(phba, pring,
  1538. saveq)))) {
  1539. /* Call the specified completion
  1540. routine */
  1541. if (cmdiocbp->iocb_cmpl) {
  1542. spin_unlock_irqrestore(
  1543. &phba->hbalock,
  1544. iflag);
  1545. (cmdiocbp->iocb_cmpl) (phba,
  1546. cmdiocbp, saveq);
  1547. spin_lock_irqsave(
  1548. &phba->hbalock,
  1549. iflag);
  1550. } else
  1551. __lpfc_sli_release_iocbq(phba,
  1552. cmdiocbp);
  1553. }
  1554. } else if (type == LPFC_UNKNOWN_IOCB) {
  1555. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1556. char adaptermsg[LPFC_MAX_ADPTMSG];
  1557. memset(adaptermsg, 0,
  1558. LPFC_MAX_ADPTMSG);
  1559. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1560. MAX_MSG_DATA);
  1561. dev_warn(&((phba->pcidev)->dev),
  1562. "lpfc%d: %s\n",
  1563. phba->brd_no, adaptermsg);
  1564. } else {
  1565. /* Unknown IOCB command */
  1566. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1567. "0335 Unknown IOCB "
  1568. "command Data: x%x "
  1569. "x%x x%x x%x\n",
  1570. irsp->ulpCommand,
  1571. irsp->ulpStatus,
  1572. irsp->ulpIoTag,
  1573. irsp->ulpContext);
  1574. }
  1575. }
  1576. if (free_saveq) {
  1577. list_for_each_entry_safe(rspiocbp, next_iocb,
  1578. &saveq->list, list) {
  1579. list_del(&rspiocbp->list);
  1580. __lpfc_sli_release_iocbq(phba,
  1581. rspiocbp);
  1582. }
  1583. __lpfc_sli_release_iocbq(phba, saveq);
  1584. }
  1585. rspiocbp = NULL;
  1586. }
  1587. /*
  1588. * If the port response put pointer has not been updated, sync
  1589. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1590. * response put pointer.
  1591. */
  1592. if (pring->rspidx == portRspPut) {
  1593. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1594. }
  1595. } /* while (pring->rspidx != portRspPut) */
  1596. if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
  1597. /* At least one response entry has been freed */
  1598. pring->stats.iocb_rsp_full++;
  1599. /* SET RxRE_RSP in Chip Att register */
  1600. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1601. writel(status, phba->CAregaddr);
  1602. readl(phba->CAregaddr); /* flush */
  1603. }
  1604. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1605. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1606. pring->stats.iocb_cmd_empty++;
  1607. /* Force update of the local copy of cmdGetInx */
  1608. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1609. lpfc_sli_resume_iocb(phba, pring);
  1610. if ((pring->lpfc_sli_cmd_available))
  1611. (pring->lpfc_sli_cmd_available) (phba, pring);
  1612. }
  1613. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1614. return rc;
  1615. }
  1616. void
  1617. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1618. {
  1619. LIST_HEAD(completions);
  1620. struct lpfc_iocbq *iocb, *next_iocb;
  1621. IOCB_t *cmd = NULL;
  1622. if (pring->ringno == LPFC_ELS_RING) {
  1623. lpfc_fabric_abort_hba(phba);
  1624. }
  1625. /* Error everything on txq and txcmplq
  1626. * First do the txq.
  1627. */
  1628. spin_lock_irq(&phba->hbalock);
  1629. list_splice_init(&pring->txq, &completions);
  1630. pring->txq_cnt = 0;
  1631. /* Next issue ABTS for everything on the txcmplq */
  1632. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
  1633. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  1634. spin_unlock_irq(&phba->hbalock);
  1635. while (!list_empty(&completions)) {
  1636. iocb = list_get_first(&completions, struct lpfc_iocbq, list);
  1637. cmd = &iocb->iocb;
  1638. list_del_init(&iocb->list);
  1639. if (!iocb->iocb_cmpl)
  1640. lpfc_sli_release_iocbq(phba, iocb);
  1641. else {
  1642. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1643. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1644. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1645. }
  1646. }
  1647. }
  1648. int
  1649. lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
  1650. {
  1651. uint32_t status;
  1652. int i = 0;
  1653. int retval = 0;
  1654. /* Read the HBA Host Status Register */
  1655. status = readl(phba->HSregaddr);
  1656. /*
  1657. * Check status register every 100ms for 5 retries, then every
  1658. * 500ms for 5, then every 2.5 sec for 5, then reset board and
  1659. * every 2.5 sec for 4.
  1660. * Break our of the loop if errors occurred during init.
  1661. */
  1662. while (((status & mask) != mask) &&
  1663. !(status & HS_FFERM) &&
  1664. i++ < 20) {
  1665. if (i <= 5)
  1666. msleep(10);
  1667. else if (i <= 10)
  1668. msleep(500);
  1669. else
  1670. msleep(2500);
  1671. if (i == 15) {
  1672. /* Do post */
  1673. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1674. lpfc_sli_brdrestart(phba);
  1675. }
  1676. /* Read the HBA Host Status Register */
  1677. status = readl(phba->HSregaddr);
  1678. }
  1679. /* Check to see if any errors occurred during init */
  1680. if ((status & HS_FFERM) || (i >= 20)) {
  1681. phba->link_state = LPFC_HBA_ERROR;
  1682. retval = 1;
  1683. }
  1684. return retval;
  1685. }
  1686. #define BARRIER_TEST_PATTERN (0xdeadbeef)
  1687. void lpfc_reset_barrier(struct lpfc_hba *phba)
  1688. {
  1689. uint32_t __iomem *resp_buf;
  1690. uint32_t __iomem *mbox_buf;
  1691. volatile uint32_t mbox;
  1692. uint32_t hc_copy;
  1693. int i;
  1694. uint8_t hdrtype;
  1695. pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
  1696. if (hdrtype != 0x80 ||
  1697. (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
  1698. FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
  1699. return;
  1700. /*
  1701. * Tell the other part of the chip to suspend temporarily all
  1702. * its DMA activity.
  1703. */
  1704. resp_buf = phba->MBslimaddr;
  1705. /* Disable the error attention */
  1706. hc_copy = readl(phba->HCregaddr);
  1707. writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
  1708. readl(phba->HCregaddr); /* flush */
  1709. phba->link_flag |= LS_IGNORE_ERATT;
  1710. if (readl(phba->HAregaddr) & HA_ERATT) {
  1711. /* Clear Chip error bit */
  1712. writel(HA_ERATT, phba->HAregaddr);
  1713. phba->pport->stopped = 1;
  1714. }
  1715. mbox = 0;
  1716. ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
  1717. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
  1718. writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
  1719. mbox_buf = phba->MBslimaddr;
  1720. writel(mbox, mbox_buf);
  1721. for (i = 0;
  1722. readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
  1723. mdelay(1);
  1724. if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
  1725. if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
  1726. phba->pport->stopped)
  1727. goto restore_hc;
  1728. else
  1729. goto clear_errat;
  1730. }
  1731. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
  1732. for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
  1733. mdelay(1);
  1734. clear_errat:
  1735. while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
  1736. mdelay(1);
  1737. if (readl(phba->HAregaddr) & HA_ERATT) {
  1738. writel(HA_ERATT, phba->HAregaddr);
  1739. phba->pport->stopped = 1;
  1740. }
  1741. restore_hc:
  1742. phba->link_flag &= ~LS_IGNORE_ERATT;
  1743. writel(hc_copy, phba->HCregaddr);
  1744. readl(phba->HCregaddr); /* flush */
  1745. }
  1746. int
  1747. lpfc_sli_brdkill(struct lpfc_hba *phba)
  1748. {
  1749. struct lpfc_sli *psli;
  1750. LPFC_MBOXQ_t *pmb;
  1751. uint32_t status;
  1752. uint32_t ha_copy;
  1753. int retval;
  1754. int i = 0;
  1755. psli = &phba->sli;
  1756. /* Kill HBA */
  1757. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1758. "0329 Kill HBA Data: x%x x%x\n",
  1759. phba->pport->port_state, psli->sli_flag);
  1760. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1761. if (!pmb)
  1762. return 1;
  1763. /* Disable the error attention */
  1764. spin_lock_irq(&phba->hbalock);
  1765. status = readl(phba->HCregaddr);
  1766. status &= ~HC_ERINT_ENA;
  1767. writel(status, phba->HCregaddr);
  1768. readl(phba->HCregaddr); /* flush */
  1769. phba->link_flag |= LS_IGNORE_ERATT;
  1770. spin_unlock_irq(&phba->hbalock);
  1771. lpfc_kill_board(phba, pmb);
  1772. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  1773. retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  1774. if (retval != MBX_SUCCESS) {
  1775. if (retval != MBX_BUSY)
  1776. mempool_free(pmb, phba->mbox_mem_pool);
  1777. spin_lock_irq(&phba->hbalock);
  1778. phba->link_flag &= ~LS_IGNORE_ERATT;
  1779. spin_unlock_irq(&phba->hbalock);
  1780. return 1;
  1781. }
  1782. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1783. mempool_free(pmb, phba->mbox_mem_pool);
  1784. /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
  1785. * attention every 100ms for 3 seconds. If we don't get ERATT after
  1786. * 3 seconds we still set HBA_ERROR state because the status of the
  1787. * board is now undefined.
  1788. */
  1789. ha_copy = readl(phba->HAregaddr);
  1790. while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
  1791. mdelay(100);
  1792. ha_copy = readl(phba->HAregaddr);
  1793. }
  1794. del_timer_sync(&psli->mbox_tmo);
  1795. if (ha_copy & HA_ERATT) {
  1796. writel(HA_ERATT, phba->HAregaddr);
  1797. phba->pport->stopped = 1;
  1798. }
  1799. spin_lock_irq(&phba->hbalock);
  1800. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1801. phba->link_flag &= ~LS_IGNORE_ERATT;
  1802. spin_unlock_irq(&phba->hbalock);
  1803. psli->mbox_active = NULL;
  1804. lpfc_hba_down_post(phba);
  1805. phba->link_state = LPFC_HBA_ERROR;
  1806. return ha_copy & HA_ERATT ? 0 : 1;
  1807. }
  1808. int
  1809. lpfc_sli_brdreset(struct lpfc_hba *phba)
  1810. {
  1811. struct lpfc_sli *psli;
  1812. struct lpfc_sli_ring *pring;
  1813. uint16_t cfg_value;
  1814. int i;
  1815. psli = &phba->sli;
  1816. /* Reset HBA */
  1817. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1818. "0325 Reset HBA Data: x%x x%x\n",
  1819. phba->pport->port_state, psli->sli_flag);
  1820. /* perform board reset */
  1821. phba->fc_eventTag = 0;
  1822. phba->pport->fc_myDID = 0;
  1823. phba->pport->fc_prevDID = 0;
  1824. /* Turn off parity checking and serr during the physical reset */
  1825. pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
  1826. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1827. (cfg_value &
  1828. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1829. psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
  1830. /* Now toggle INITFF bit in the Host Control Register */
  1831. writel(HC_INITFF, phba->HCregaddr);
  1832. mdelay(1);
  1833. readl(phba->HCregaddr); /* flush */
  1834. writel(0, phba->HCregaddr);
  1835. readl(phba->HCregaddr); /* flush */
  1836. /* Restore PCI cmd register */
  1837. pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
  1838. /* Initialize relevant SLI info */
  1839. for (i = 0; i < psli->num_rings; i++) {
  1840. pring = &psli->ring[i];
  1841. pring->flag = 0;
  1842. pring->rspidx = 0;
  1843. pring->next_cmdidx = 0;
  1844. pring->local_getidx = 0;
  1845. pring->cmdidx = 0;
  1846. pring->missbufcnt = 0;
  1847. }
  1848. phba->link_state = LPFC_WARM_START;
  1849. return 0;
  1850. }
  1851. int
  1852. lpfc_sli_brdrestart(struct lpfc_hba *phba)
  1853. {
  1854. MAILBOX_t *mb;
  1855. struct lpfc_sli *psli;
  1856. uint16_t skip_post;
  1857. volatile uint32_t word0;
  1858. void __iomem *to_slim;
  1859. spin_lock_irq(&phba->hbalock);
  1860. psli = &phba->sli;
  1861. /* Restart HBA */
  1862. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1863. "0337 Restart HBA Data: x%x x%x\n",
  1864. phba->pport->port_state, psli->sli_flag);
  1865. word0 = 0;
  1866. mb = (MAILBOX_t *) &word0;
  1867. mb->mbxCommand = MBX_RESTART;
  1868. mb->mbxHc = 1;
  1869. lpfc_reset_barrier(phba);
  1870. to_slim = phba->MBslimaddr;
  1871. writel(*(uint32_t *) mb, to_slim);
  1872. readl(to_slim); /* flush */
  1873. /* Only skip post after fc_ffinit is completed */
  1874. if (phba->pport->port_state) {
  1875. skip_post = 1;
  1876. word0 = 1; /* This is really setting up word1 */
  1877. } else {
  1878. skip_post = 0;
  1879. word0 = 0; /* This is really setting up word1 */
  1880. }
  1881. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1882. writel(*(uint32_t *) mb, to_slim);
  1883. readl(to_slim); /* flush */
  1884. lpfc_sli_brdreset(phba);
  1885. phba->pport->stopped = 0;
  1886. phba->link_state = LPFC_INIT_START;
  1887. spin_unlock_irq(&phba->hbalock);
  1888. memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
  1889. psli->stats_start = get_seconds();
  1890. if (skip_post)
  1891. mdelay(100);
  1892. else
  1893. mdelay(2000);
  1894. lpfc_hba_down_post(phba);
  1895. return 0;
  1896. }
  1897. static int
  1898. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1899. {
  1900. uint32_t status, i = 0;
  1901. /* Read the HBA Host Status Register */
  1902. status = readl(phba->HSregaddr);
  1903. /* Check status register to see what current state is */
  1904. i = 0;
  1905. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1906. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1907. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1908. * 4.
  1909. */
  1910. if (i++ >= 20) {
  1911. /* Adapter failed to init, timeout, status reg
  1912. <status> */
  1913. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1914. "0436 Adapter failed to init, "
  1915. "timeout, status reg x%x\n", status);
  1916. phba->link_state = LPFC_HBA_ERROR;
  1917. return -ETIMEDOUT;
  1918. }
  1919. /* Check to see if any errors occurred during init */
  1920. if (status & HS_FFERM) {
  1921. /* ERROR: During chipset initialization */
  1922. /* Adapter failed to init, chipset, status reg
  1923. <status> */
  1924. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1925. "0437 Adapter failed to init, "
  1926. "chipset, status reg x%x\n", status);
  1927. phba->link_state = LPFC_HBA_ERROR;
  1928. return -EIO;
  1929. }
  1930. if (i <= 5) {
  1931. msleep(10);
  1932. } else if (i <= 10) {
  1933. msleep(500);
  1934. } else {
  1935. msleep(2500);
  1936. }
  1937. if (i == 15) {
  1938. /* Do post */
  1939. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1940. lpfc_sli_brdrestart(phba);
  1941. }
  1942. /* Read the HBA Host Status Register */
  1943. status = readl(phba->HSregaddr);
  1944. }
  1945. /* Check to see if any errors occurred during init */
  1946. if (status & HS_FFERM) {
  1947. /* ERROR: During chipset initialization */
  1948. /* Adapter failed to init, chipset, status reg <status> */
  1949. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1950. "0438 Adapter failed to init, chipset, "
  1951. "status reg x%x\n", status);
  1952. phba->link_state = LPFC_HBA_ERROR;
  1953. return -EIO;
  1954. }
  1955. /* Clear all interrupt enable conditions */
  1956. writel(0, phba->HCregaddr);
  1957. readl(phba->HCregaddr); /* flush */
  1958. /* setup host attn register */
  1959. writel(0xffffffff, phba->HAregaddr);
  1960. readl(phba->HAregaddr); /* flush */
  1961. return 0;
  1962. }
  1963. int
  1964. lpfc_sli_hbq_count(void)
  1965. {
  1966. return ARRAY_SIZE(lpfc_hbq_defs);
  1967. }
  1968. static int
  1969. lpfc_sli_hbq_entry_count(void)
  1970. {
  1971. int hbq_count = lpfc_sli_hbq_count();
  1972. int count = 0;
  1973. int i;
  1974. for (i = 0; i < hbq_count; ++i)
  1975. count += lpfc_hbq_defs[i]->entry_count;
  1976. return count;
  1977. }
  1978. int
  1979. lpfc_sli_hbq_size(void)
  1980. {
  1981. return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
  1982. }
  1983. static int
  1984. lpfc_sli_hbq_setup(struct lpfc_hba *phba)
  1985. {
  1986. int hbq_count = lpfc_sli_hbq_count();
  1987. LPFC_MBOXQ_t *pmb;
  1988. MAILBOX_t *pmbox;
  1989. uint32_t hbqno;
  1990. uint32_t hbq_entry_index;
  1991. /* Get a Mailbox buffer to setup mailbox
  1992. * commands for HBA initialization
  1993. */
  1994. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1995. if (!pmb)
  1996. return -ENOMEM;
  1997. pmbox = &pmb->mb;
  1998. /* Initialize the struct lpfc_sli_hbq structure for each hbq */
  1999. phba->link_state = LPFC_INIT_MBX_CMDS;
  2000. hbq_entry_index = 0;
  2001. for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
  2002. phba->hbqs[hbqno].next_hbqPutIdx = 0;
  2003. phba->hbqs[hbqno].hbqPutIdx = 0;
  2004. phba->hbqs[hbqno].local_hbqGetIdx = 0;
  2005. phba->hbqs[hbqno].entry_count =
  2006. lpfc_hbq_defs[hbqno]->entry_count;
  2007. lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
  2008. hbq_entry_index, pmb);
  2009. hbq_entry_index += phba->hbqs[hbqno].entry_count;
  2010. if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
  2011. /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
  2012. mbxStatus <status>, ring <num> */
  2013. lpfc_printf_log(phba, KERN_ERR,
  2014. LOG_SLI | LOG_VPORT,
  2015. "1805 Adapter failed to init. "
  2016. "Data: x%x x%x x%x\n",
  2017. pmbox->mbxCommand,
  2018. pmbox->mbxStatus, hbqno);
  2019. phba->link_state = LPFC_HBA_ERROR;
  2020. mempool_free(pmb, phba->mbox_mem_pool);
  2021. return ENXIO;
  2022. }
  2023. }
  2024. phba->hbq_count = hbq_count;
  2025. mempool_free(pmb, phba->mbox_mem_pool);
  2026. /* Initially populate or replenish the HBQs */
  2027. for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
  2028. if (lpfc_sli_hbqbuf_init_hbqs(phba, hbqno))
  2029. return -ENOMEM;
  2030. }
  2031. return 0;
  2032. }
  2033. static int
  2034. lpfc_do_config_port(struct lpfc_hba *phba, int sli_mode)
  2035. {
  2036. LPFC_MBOXQ_t *pmb;
  2037. uint32_t resetcount = 0, rc = 0, done = 0;
  2038. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  2039. if (!pmb) {
  2040. phba->link_state = LPFC_HBA_ERROR;
  2041. return -ENOMEM;
  2042. }
  2043. phba->sli_rev = sli_mode;
  2044. while (resetcount < 2 && !done) {
  2045. spin_lock_irq(&phba->hbalock);
  2046. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  2047. spin_unlock_irq(&phba->hbalock);
  2048. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  2049. lpfc_sli_brdrestart(phba);
  2050. msleep(2500);
  2051. rc = lpfc_sli_chipset_init(phba);
  2052. if (rc)
  2053. break;
  2054. spin_lock_irq(&phba->hbalock);
  2055. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2056. spin_unlock_irq(&phba->hbalock);
  2057. resetcount++;
  2058. /* Call pre CONFIG_PORT mailbox command initialization. A
  2059. * value of 0 means the call was successful. Any other
  2060. * nonzero value is a failure, but if ERESTART is returned,
  2061. * the driver may reset the HBA and try again.
  2062. */
  2063. rc = lpfc_config_port_prep(phba);
  2064. if (rc == -ERESTART) {
  2065. phba->link_state = LPFC_LINK_UNKNOWN;
  2066. continue;
  2067. } else if (rc) {
  2068. break;
  2069. }
  2070. phba->link_state = LPFC_INIT_MBX_CMDS;
  2071. lpfc_config_port(phba, pmb);
  2072. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  2073. if (rc != MBX_SUCCESS) {
  2074. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2075. "0442 Adapter failed to init, mbxCmd x%x "
  2076. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  2077. pmb->mb.mbxCommand, pmb->mb.mbxStatus, 0);
  2078. spin_lock_irq(&phba->hbalock);
  2079. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  2080. spin_unlock_irq(&phba->hbalock);
  2081. rc = -ENXIO;
  2082. } else {
  2083. done = 1;
  2084. phba->max_vpi = (phba->max_vpi &&
  2085. pmb->mb.un.varCfgPort.gmv) != 0
  2086. ? pmb->mb.un.varCfgPort.max_vpi
  2087. : 0;
  2088. }
  2089. }
  2090. if (!done) {
  2091. rc = -EINVAL;
  2092. goto do_prep_failed;
  2093. }
  2094. if ((pmb->mb.un.varCfgPort.sli_mode == 3) &&
  2095. (!pmb->mb.un.varCfgPort.cMA)) {
  2096. rc = -ENXIO;
  2097. goto do_prep_failed;
  2098. }
  2099. return rc;
  2100. do_prep_failed:
  2101. mempool_free(pmb, phba->mbox_mem_pool);
  2102. return rc;
  2103. }
  2104. int
  2105. lpfc_sli_hba_setup(struct lpfc_hba *phba)
  2106. {
  2107. uint32_t rc;
  2108. int mode = 3;
  2109. switch (lpfc_sli_mode) {
  2110. case 2:
  2111. if (phba->cfg_enable_npiv) {
  2112. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2113. "1824 NPIV enabled: Override lpfc_sli_mode "
  2114. "parameter (%d) to auto (0).\n",
  2115. lpfc_sli_mode);
  2116. break;
  2117. }
  2118. mode = 2;
  2119. break;
  2120. case 0:
  2121. case 3:
  2122. break;
  2123. default:
  2124. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2125. "1819 Unrecognized lpfc_sli_mode "
  2126. "parameter: %d.\n", lpfc_sli_mode);
  2127. break;
  2128. }
  2129. rc = lpfc_do_config_port(phba, mode);
  2130. if (rc && lpfc_sli_mode == 3)
  2131. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2132. "1820 Unable to select SLI-3. "
  2133. "Not supported by adapter.\n");
  2134. if (rc && mode != 2)
  2135. rc = lpfc_do_config_port(phba, 2);
  2136. if (rc)
  2137. goto lpfc_sli_hba_setup_error;
  2138. if (phba->sli_rev == 3) {
  2139. phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
  2140. phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
  2141. phba->sli3_options |= LPFC_SLI3_ENABLED;
  2142. phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
  2143. } else {
  2144. phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
  2145. phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
  2146. phba->sli3_options = 0;
  2147. }
  2148. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  2149. "0444 Firmware in SLI %x mode. Max_vpi %d\n",
  2150. phba->sli_rev, phba->max_vpi);
  2151. rc = lpfc_sli_ring_map(phba);
  2152. if (rc)
  2153. goto lpfc_sli_hba_setup_error;
  2154. /* Init HBQs */
  2155. if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
  2156. rc = lpfc_sli_hbq_setup(phba);
  2157. if (rc)
  2158. goto lpfc_sli_hba_setup_error;
  2159. }
  2160. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  2161. rc = lpfc_config_port_post(phba);
  2162. if (rc)
  2163. goto lpfc_sli_hba_setup_error;
  2164. return rc;
  2165. lpfc_sli_hba_setup_error:
  2166. phba->link_state = LPFC_HBA_ERROR;
  2167. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  2168. "0445 Firmware initialization failed\n");
  2169. return rc;
  2170. }
  2171. /*! lpfc_mbox_timeout
  2172. *
  2173. * \pre
  2174. * \post
  2175. * \param hba Pointer to per struct lpfc_hba structure
  2176. * \param l1 Pointer to the driver's mailbox queue.
  2177. * \return
  2178. * void
  2179. *
  2180. * \b Description:
  2181. *
  2182. * This routine handles mailbox timeout events at timer interrupt context.
  2183. */
  2184. void
  2185. lpfc_mbox_timeout(unsigned long ptr)
  2186. {
  2187. struct lpfc_hba *phba = (struct lpfc_hba *) ptr;
  2188. unsigned long iflag;
  2189. uint32_t tmo_posted;
  2190. spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
  2191. tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
  2192. if (!tmo_posted)
  2193. phba->pport->work_port_events |= WORKER_MBOX_TMO;
  2194. spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
  2195. if (!tmo_posted) {
  2196. spin_lock_irqsave(&phba->hbalock, iflag);
  2197. if (phba->work_wait)
  2198. lpfc_worker_wake_up(phba);
  2199. spin_unlock_irqrestore(&phba->hbalock, iflag);
  2200. }
  2201. }
  2202. void
  2203. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  2204. {
  2205. LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
  2206. MAILBOX_t *mb = &pmbox->mb;
  2207. struct lpfc_sli *psli = &phba->sli;
  2208. struct lpfc_sli_ring *pring;
  2209. if (!(phba->pport->work_port_events & WORKER_MBOX_TMO)) {
  2210. return;
  2211. }
  2212. /* Mbox cmd <mbxCommand> timeout */
  2213. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  2214. "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
  2215. mb->mbxCommand,
  2216. phba->pport->port_state,
  2217. phba->sli.sli_flag,
  2218. phba->sli.mbox_active);
  2219. /* Setting state unknown so lpfc_sli_abort_iocb_ring
  2220. * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
  2221. * it to fail all oustanding SCSI IO.
  2222. */
  2223. spin_lock_irq(&phba->pport->work_port_lock);
  2224. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  2225. spin_unlock_irq(&phba->pport->work_port_lock);
  2226. spin_lock_irq(&phba->hbalock);
  2227. phba->link_state = LPFC_LINK_UNKNOWN;
  2228. phba->pport->fc_flag |= FC_ESTABLISH_LINK;
  2229. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  2230. spin_unlock_irq(&phba->hbalock);
  2231. pring = &psli->ring[psli->fcp_ring];
  2232. lpfc_sli_abort_iocb_ring(phba, pring);
  2233. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  2234. "0345 Resetting board due to mailbox timeout\n");
  2235. /*
  2236. * lpfc_offline calls lpfc_sli_hba_down which will clean up
  2237. * on oustanding mailbox commands.
  2238. */
  2239. lpfc_offline_prep(phba);
  2240. lpfc_offline(phba);
  2241. lpfc_sli_brdrestart(phba);
  2242. if (lpfc_online(phba) == 0) /* Initialize the HBA */
  2243. mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
  2244. lpfc_unblock_mgmt_io(phba);
  2245. return;
  2246. }
  2247. int
  2248. lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
  2249. {
  2250. MAILBOX_t *mb;
  2251. struct lpfc_sli *psli = &phba->sli;
  2252. uint32_t status, evtctr;
  2253. uint32_t ha_copy;
  2254. int i;
  2255. unsigned long drvr_flag = 0;
  2256. volatile uint32_t word0, ldata;
  2257. void __iomem *to_slim;
  2258. if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
  2259. pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
  2260. if(!pmbox->vport) {
  2261. lpfc_printf_log(phba, KERN_ERR,
  2262. LOG_MBOX | LOG_VPORT,
  2263. "1806 Mbox x%x failed. No vport\n",
  2264. pmbox->mb.mbxCommand);
  2265. dump_stack();
  2266. return MBXERR_ERROR;
  2267. }
  2268. }
  2269. /* If the PCI channel is in offline state, do not post mbox. */
  2270. if (unlikely(pci_channel_offline(phba->pcidev)))
  2271. return MBX_NOT_FINISHED;
  2272. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  2273. psli = &phba->sli;
  2274. mb = &pmbox->mb;
  2275. status = MBX_SUCCESS;
  2276. if (phba->link_state == LPFC_HBA_ERROR) {
  2277. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2278. /* Mbox command <mbxCommand> cannot issue */
  2279. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
  2280. return MBX_NOT_FINISHED;
  2281. }
  2282. if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
  2283. !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
  2284. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2285. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
  2286. return MBX_NOT_FINISHED;
  2287. }
  2288. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  2289. /* Polling for a mbox command when another one is already active
  2290. * is not allowed in SLI. Also, the driver must have established
  2291. * SLI2 mode to queue and process multiple mbox commands.
  2292. */
  2293. if (flag & MBX_POLL) {
  2294. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2295. /* Mbox command <mbxCommand> cannot issue */
  2296. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2297. return MBX_NOT_FINISHED;
  2298. }
  2299. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  2300. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2301. /* Mbox command <mbxCommand> cannot issue */
  2302. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2303. return MBX_NOT_FINISHED;
  2304. }
  2305. /* Another mailbox command is still being processed, queue this
  2306. * command to be processed later.
  2307. */
  2308. lpfc_mbox_put(phba, pmbox);
  2309. /* Mbox cmd issue - BUSY */
  2310. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  2311. "(%d):0308 Mbox cmd issue - BUSY Data: "
  2312. "x%x x%x x%x x%x\n",
  2313. pmbox->vport ? pmbox->vport->vpi : 0xffffff,
  2314. mb->mbxCommand, phba->pport->port_state,
  2315. psli->sli_flag, flag);
  2316. psli->slistat.mbox_busy++;
  2317. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2318. if (pmbox->vport) {
  2319. lpfc_debugfs_disc_trc(pmbox->vport,
  2320. LPFC_DISC_TRC_MBOX_VPORT,
  2321. "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
  2322. (uint32_t)mb->mbxCommand,
  2323. mb->un.varWords[0], mb->un.varWords[1]);
  2324. }
  2325. else {
  2326. lpfc_debugfs_disc_trc(phba->pport,
  2327. LPFC_DISC_TRC_MBOX,
  2328. "MBOX Bsy: cmd:x%x mb:x%x x%x",
  2329. (uint32_t)mb->mbxCommand,
  2330. mb->un.varWords[0], mb->un.varWords[1]);
  2331. }
  2332. return MBX_BUSY;
  2333. }
  2334. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  2335. /* If we are not polling, we MUST be in SLI2 mode */
  2336. if (flag != MBX_POLL) {
  2337. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
  2338. (mb->mbxCommand != MBX_KILL_BOARD)) {
  2339. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2340. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2341. /* Mbox command <mbxCommand> cannot issue */
  2342. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2343. return MBX_NOT_FINISHED;
  2344. }
  2345. /* timeout active mbox command */
  2346. mod_timer(&psli->mbox_tmo, (jiffies +
  2347. (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
  2348. }
  2349. /* Mailbox cmd <cmd> issue */
  2350. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  2351. "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
  2352. "x%x\n",
  2353. pmbox->vport ? pmbox->vport->vpi : 0,
  2354. mb->mbxCommand, phba->pport->port_state,
  2355. psli->sli_flag, flag);
  2356. if (mb->mbxCommand != MBX_HEARTBEAT) {
  2357. if (pmbox->vport) {
  2358. lpfc_debugfs_disc_trc(pmbox->vport,
  2359. LPFC_DISC_TRC_MBOX_VPORT,
  2360. "MBOX Send vport: cmd:x%x mb:x%x x%x",
  2361. (uint32_t)mb->mbxCommand,
  2362. mb->un.varWords[0], mb->un.varWords[1]);
  2363. }
  2364. else {
  2365. lpfc_debugfs_disc_trc(phba->pport,
  2366. LPFC_DISC_TRC_MBOX,
  2367. "MBOX Send: cmd:x%x mb:x%x x%x",
  2368. (uint32_t)mb->mbxCommand,
  2369. mb->un.varWords[0], mb->un.varWords[1]);
  2370. }
  2371. }
  2372. psli->slistat.mbox_cmd++;
  2373. evtctr = psli->slistat.mbox_event;
  2374. /* next set own bit for the adapter and copy over command word */
  2375. mb->mbxOwner = OWN_CHIP;
  2376. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2377. /* First copy command data to host SLIM area */
  2378. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  2379. } else {
  2380. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2381. /* copy command data into host mbox for cmpl */
  2382. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  2383. MAILBOX_CMD_SIZE);
  2384. }
  2385. /* First copy mbox command data to HBA SLIM, skip past first
  2386. word */
  2387. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  2388. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  2389. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  2390. /* Next copy over first word, with mbxOwner set */
  2391. ldata = *((volatile uint32_t *)mb);
  2392. to_slim = phba->MBslimaddr;
  2393. writel(ldata, to_slim);
  2394. readl(to_slim); /* flush */
  2395. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2396. /* switch over to host mailbox */
  2397. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  2398. }
  2399. }
  2400. wmb();
  2401. /* interrupt board to doit right away */
  2402. writel(CA_MBATT, phba->CAregaddr);
  2403. readl(phba->CAregaddr); /* flush */
  2404. switch (flag) {
  2405. case MBX_NOWAIT:
  2406. /* Don't wait for it to finish, just return */
  2407. psli->mbox_active = pmbox;
  2408. break;
  2409. case MBX_POLL:
  2410. psli->mbox_active = NULL;
  2411. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2412. /* First read mbox status word */
  2413. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  2414. word0 = le32_to_cpu(word0);
  2415. } else {
  2416. /* First read mbox status word */
  2417. word0 = readl(phba->MBslimaddr);
  2418. }
  2419. /* Read the HBA Host Attention Register */
  2420. ha_copy = readl(phba->HAregaddr);
  2421. i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
  2422. i *= 1000; /* Convert to ms */
  2423. /* Wait for command to complete */
  2424. while (((word0 & OWN_CHIP) == OWN_CHIP) ||
  2425. (!(ha_copy & HA_MBATT) &&
  2426. (phba->link_state > LPFC_WARM_START))) {
  2427. if (i-- <= 0) {
  2428. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2429. spin_unlock_irqrestore(&phba->hbalock,
  2430. drvr_flag);
  2431. return MBX_NOT_FINISHED;
  2432. }
  2433. /* Check if we took a mbox interrupt while we were
  2434. polling */
  2435. if (((word0 & OWN_CHIP) != OWN_CHIP)
  2436. && (evtctr != psli->slistat.mbox_event))
  2437. break;
  2438. spin_unlock_irqrestore(&phba->hbalock,
  2439. drvr_flag);
  2440. msleep(1);
  2441. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  2442. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2443. /* First copy command data */
  2444. word0 = *((volatile uint32_t *)
  2445. &phba->slim2p->mbx);
  2446. word0 = le32_to_cpu(word0);
  2447. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2448. MAILBOX_t *slimmb;
  2449. volatile uint32_t slimword0;
  2450. /* Check real SLIM for any errors */
  2451. slimword0 = readl(phba->MBslimaddr);
  2452. slimmb = (MAILBOX_t *) & slimword0;
  2453. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  2454. && slimmb->mbxStatus) {
  2455. psli->sli_flag &=
  2456. ~LPFC_SLI2_ACTIVE;
  2457. word0 = slimword0;
  2458. }
  2459. }
  2460. } else {
  2461. /* First copy command data */
  2462. word0 = readl(phba->MBslimaddr);
  2463. }
  2464. /* Read the HBA Host Attention Register */
  2465. ha_copy = readl(phba->HAregaddr);
  2466. }
  2467. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2468. /* copy results back to user */
  2469. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  2470. MAILBOX_CMD_SIZE);
  2471. } else {
  2472. /* First copy command data */
  2473. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  2474. MAILBOX_CMD_SIZE);
  2475. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  2476. pmbox->context2) {
  2477. lpfc_memcpy_from_slim((void *)pmbox->context2,
  2478. phba->MBslimaddr + DMP_RSP_OFFSET,
  2479. mb->un.varDmp.word_cnt);
  2480. }
  2481. }
  2482. writel(HA_MBATT, phba->HAregaddr);
  2483. readl(phba->HAregaddr); /* flush */
  2484. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2485. status = mb->mbxStatus;
  2486. }
  2487. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2488. return status;
  2489. }
  2490. /*
  2491. * Caller needs to hold lock.
  2492. */
  2493. static void
  2494. __lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2495. struct lpfc_iocbq *piocb)
  2496. {
  2497. /* Insert the caller's iocb in the txq tail for later processing. */
  2498. list_add_tail(&piocb->list, &pring->txq);
  2499. pring->txq_cnt++;
  2500. }
  2501. static struct lpfc_iocbq *
  2502. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2503. struct lpfc_iocbq **piocb)
  2504. {
  2505. struct lpfc_iocbq * nextiocb;
  2506. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  2507. if (!nextiocb) {
  2508. nextiocb = *piocb;
  2509. *piocb = NULL;
  2510. }
  2511. return nextiocb;
  2512. }
  2513. /*
  2514. * Lockless version of lpfc_sli_issue_iocb.
  2515. */
  2516. static int
  2517. __lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2518. struct lpfc_iocbq *piocb, uint32_t flag)
  2519. {
  2520. struct lpfc_iocbq *nextiocb;
  2521. IOCB_t *iocb;
  2522. if (piocb->iocb_cmpl && (!piocb->vport) &&
  2523. (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
  2524. (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
  2525. lpfc_printf_log(phba, KERN_ERR,
  2526. LOG_SLI | LOG_VPORT,
  2527. "1807 IOCB x%x failed. No vport\n",
  2528. piocb->iocb.ulpCommand);
  2529. dump_stack();
  2530. return IOCB_ERROR;
  2531. }
  2532. /* If the PCI channel is in offline state, do not post iocbs. */
  2533. if (unlikely(pci_channel_offline(phba->pcidev)))
  2534. return IOCB_ERROR;
  2535. /*
  2536. * We should never get an IOCB if we are in a < LINK_DOWN state
  2537. */
  2538. if (unlikely(phba->link_state < LPFC_LINK_DOWN))
  2539. return IOCB_ERROR;
  2540. /*
  2541. * Check to see if we are blocking IOCB processing because of a
  2542. * outstanding event.
  2543. */
  2544. if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
  2545. goto iocb_busy;
  2546. if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
  2547. /*
  2548. * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
  2549. * can be issued if the link is not up.
  2550. */
  2551. switch (piocb->iocb.ulpCommand) {
  2552. case CMD_QUE_RING_BUF_CN:
  2553. case CMD_QUE_RING_BUF64_CN:
  2554. /*
  2555. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  2556. * completion, iocb_cmpl MUST be 0.
  2557. */
  2558. if (piocb->iocb_cmpl)
  2559. piocb->iocb_cmpl = NULL;
  2560. /*FALLTHROUGH*/
  2561. case CMD_CREATE_XRI_CR:
  2562. case CMD_CLOSE_XRI_CN:
  2563. case CMD_CLOSE_XRI_CX:
  2564. break;
  2565. default:
  2566. goto iocb_busy;
  2567. }
  2568. /*
  2569. * For FCP commands, we must be in a state where we can process link
  2570. * attention events.
  2571. */
  2572. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  2573. !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
  2574. goto iocb_busy;
  2575. }
  2576. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  2577. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  2578. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  2579. if (iocb)
  2580. lpfc_sli_update_ring(phba, pring);
  2581. else
  2582. lpfc_sli_update_full_ring(phba, pring);
  2583. if (!piocb)
  2584. return IOCB_SUCCESS;
  2585. goto out_busy;
  2586. iocb_busy:
  2587. pring->stats.iocb_cmd_delay++;
  2588. out_busy:
  2589. if (!(flag & SLI_IOCB_RET_IOCB)) {
  2590. __lpfc_sli_ringtx_put(phba, pring, piocb);
  2591. return IOCB_SUCCESS;
  2592. }
  2593. return IOCB_BUSY;
  2594. }
  2595. int
  2596. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2597. struct lpfc_iocbq *piocb, uint32_t flag)
  2598. {
  2599. unsigned long iflags;
  2600. int rc;
  2601. spin_lock_irqsave(&phba->hbalock, iflags);
  2602. rc = __lpfc_sli_issue_iocb(phba, pring, piocb, flag);
  2603. spin_unlock_irqrestore(&phba->hbalock, iflags);
  2604. return rc;
  2605. }
  2606. static int
  2607. lpfc_extra_ring_setup( struct lpfc_hba *phba)
  2608. {
  2609. struct lpfc_sli *psli;
  2610. struct lpfc_sli_ring *pring;
  2611. psli = &phba->sli;
  2612. /* Adjust cmd/rsp ring iocb entries more evenly */
  2613. /* Take some away from the FCP ring */
  2614. pring = &psli->ring[psli->fcp_ring];
  2615. pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2616. pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2617. pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2618. pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2619. /* and give them to the extra ring */
  2620. pring = &psli->ring[psli->extra_ring];
  2621. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2622. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2623. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2624. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2625. /* Setup default profile for this ring */
  2626. pring->iotag_max = 4096;
  2627. pring->num_mask = 1;
  2628. pring->prt[0].profile = 0; /* Mask 0 */
  2629. pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
  2630. pring->prt[0].type = phba->cfg_multi_ring_type;
  2631. pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
  2632. return 0;
  2633. }
  2634. static void
  2635. lpfc_sli_async_event_handler(struct lpfc_hba * phba,
  2636. struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
  2637. {
  2638. IOCB_t *icmd;
  2639. uint16_t evt_code;
  2640. uint16_t temp;
  2641. struct temp_event temp_event_data;
  2642. struct Scsi_Host *shost;
  2643. icmd = &iocbq->iocb;
  2644. evt_code = icmd->un.asyncstat.evt_code;
  2645. temp = icmd->ulpContext;
  2646. if ((evt_code != ASYNC_TEMP_WARN) &&
  2647. (evt_code != ASYNC_TEMP_SAFE)) {
  2648. lpfc_printf_log(phba,
  2649. KERN_ERR,
  2650. LOG_SLI,
  2651. "0346 Ring %d handler: unexpected ASYNC_STATUS"
  2652. " evt_code 0x%x\n",
  2653. pring->ringno,
  2654. icmd->un.asyncstat.evt_code);
  2655. return;
  2656. }
  2657. temp_event_data.data = (uint32_t)temp;
  2658. temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
  2659. if (evt_code == ASYNC_TEMP_WARN) {
  2660. temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
  2661. lpfc_printf_log(phba,
  2662. KERN_WARNING,
  2663. LOG_TEMP,
  2664. "0347 Adapter is very hot, please take "
  2665. "corrective action. temperature : %d Celsius\n",
  2666. temp);
  2667. }
  2668. if (evt_code == ASYNC_TEMP_SAFE) {
  2669. temp_event_data.event_code = LPFC_NORMAL_TEMP;
  2670. lpfc_printf_log(phba,
  2671. KERN_INFO,
  2672. LOG_TEMP,
  2673. "0340 Adapter temperature is OK now. "
  2674. "temperature : %d Celsius\n",
  2675. temp);
  2676. }
  2677. /* Send temperature change event to applications */
  2678. shost = lpfc_shost_from_vport(phba->pport);
  2679. fc_host_post_vendor_event(shost, fc_get_event_number(),
  2680. sizeof(temp_event_data), (char *) &temp_event_data,
  2681. SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
  2682. }
  2683. int
  2684. lpfc_sli_setup(struct lpfc_hba *phba)
  2685. {
  2686. int i, totiocbsize = 0;
  2687. struct lpfc_sli *psli = &phba->sli;
  2688. struct lpfc_sli_ring *pring;
  2689. psli->num_rings = MAX_CONFIGURED_RINGS;
  2690. psli->sli_flag = 0;
  2691. psli->fcp_ring = LPFC_FCP_RING;
  2692. psli->next_ring = LPFC_FCP_NEXT_RING;
  2693. psli->extra_ring = LPFC_EXTRA_RING;
  2694. psli->iocbq_lookup = NULL;
  2695. psli->iocbq_lookup_len = 0;
  2696. psli->last_iotag = 0;
  2697. for (i = 0; i < psli->num_rings; i++) {
  2698. pring = &psli->ring[i];
  2699. switch (i) {
  2700. case LPFC_FCP_RING: /* ring 0 - FCP */
  2701. /* numCiocb and numRiocb are used in config_port */
  2702. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  2703. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  2704. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2705. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2706. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2707. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2708. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2709. SLI3_IOCB_CMD_SIZE :
  2710. SLI2_IOCB_CMD_SIZE;
  2711. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2712. SLI3_IOCB_RSP_SIZE :
  2713. SLI2_IOCB_RSP_SIZE;
  2714. pring->iotag_ctr = 0;
  2715. pring->iotag_max =
  2716. (phba->cfg_hba_queue_depth * 2);
  2717. pring->fast_iotag = pring->iotag_max;
  2718. pring->num_mask = 0;
  2719. break;
  2720. case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
  2721. /* numCiocb and numRiocb are used in config_port */
  2722. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  2723. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  2724. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2725. SLI3_IOCB_CMD_SIZE :
  2726. SLI2_IOCB_CMD_SIZE;
  2727. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2728. SLI3_IOCB_RSP_SIZE :
  2729. SLI2_IOCB_RSP_SIZE;
  2730. pring->iotag_max = phba->cfg_hba_queue_depth;
  2731. pring->num_mask = 0;
  2732. break;
  2733. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  2734. /* numCiocb and numRiocb are used in config_port */
  2735. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  2736. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  2737. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2738. SLI3_IOCB_CMD_SIZE :
  2739. SLI2_IOCB_CMD_SIZE;
  2740. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2741. SLI3_IOCB_RSP_SIZE :
  2742. SLI2_IOCB_RSP_SIZE;
  2743. pring->fast_iotag = 0;
  2744. pring->iotag_ctr = 0;
  2745. pring->iotag_max = 4096;
  2746. pring->lpfc_sli_rcv_async_status =
  2747. lpfc_sli_async_event_handler;
  2748. pring->num_mask = 4;
  2749. pring->prt[0].profile = 0; /* Mask 0 */
  2750. pring->prt[0].rctl = FC_ELS_REQ;
  2751. pring->prt[0].type = FC_ELS_DATA;
  2752. pring->prt[0].lpfc_sli_rcv_unsol_event =
  2753. lpfc_els_unsol_event;
  2754. pring->prt[1].profile = 0; /* Mask 1 */
  2755. pring->prt[1].rctl = FC_ELS_RSP;
  2756. pring->prt[1].type = FC_ELS_DATA;
  2757. pring->prt[1].lpfc_sli_rcv_unsol_event =
  2758. lpfc_els_unsol_event;
  2759. pring->prt[2].profile = 0; /* Mask 2 */
  2760. /* NameServer Inquiry */
  2761. pring->prt[2].rctl = FC_UNSOL_CTL;
  2762. /* NameServer */
  2763. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  2764. pring->prt[2].lpfc_sli_rcv_unsol_event =
  2765. lpfc_ct_unsol_event;
  2766. pring->prt[3].profile = 0; /* Mask 3 */
  2767. /* NameServer response */
  2768. pring->prt[3].rctl = FC_SOL_CTL;
  2769. /* NameServer */
  2770. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  2771. pring->prt[3].lpfc_sli_rcv_unsol_event =
  2772. lpfc_ct_unsol_event;
  2773. break;
  2774. }
  2775. totiocbsize += (pring->numCiocb * pring->sizeCiocb) +
  2776. (pring->numRiocb * pring->sizeRiocb);
  2777. }
  2778. if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
  2779. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  2780. printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
  2781. "SLI2 SLIM Data: x%x x%lx\n",
  2782. phba->brd_no, totiocbsize,
  2783. (unsigned long) MAX_SLIM_IOCB_SIZE);
  2784. }
  2785. if (phba->cfg_multi_ring_support == 2)
  2786. lpfc_extra_ring_setup(phba);
  2787. return 0;
  2788. }
  2789. int
  2790. lpfc_sli_queue_setup(struct lpfc_hba *phba)
  2791. {
  2792. struct lpfc_sli *psli;
  2793. struct lpfc_sli_ring *pring;
  2794. int i;
  2795. psli = &phba->sli;
  2796. spin_lock_irq(&phba->hbalock);
  2797. INIT_LIST_HEAD(&psli->mboxq);
  2798. INIT_LIST_HEAD(&psli->mboxq_cmpl);
  2799. /* Initialize list headers for txq and txcmplq as double linked lists */
  2800. for (i = 0; i < psli->num_rings; i++) {
  2801. pring = &psli->ring[i];
  2802. pring->ringno = i;
  2803. pring->next_cmdidx = 0;
  2804. pring->local_getidx = 0;
  2805. pring->cmdidx = 0;
  2806. INIT_LIST_HEAD(&pring->txq);
  2807. INIT_LIST_HEAD(&pring->txcmplq);
  2808. INIT_LIST_HEAD(&pring->iocb_continueq);
  2809. INIT_LIST_HEAD(&pring->postbufq);
  2810. }
  2811. spin_unlock_irq(&phba->hbalock);
  2812. return 1;
  2813. }
  2814. int
  2815. lpfc_sli_host_down(struct lpfc_vport *vport)
  2816. {
  2817. LIST_HEAD(completions);
  2818. struct lpfc_hba *phba = vport->phba;
  2819. struct lpfc_sli *psli = &phba->sli;
  2820. struct lpfc_sli_ring *pring;
  2821. struct lpfc_iocbq *iocb, *next_iocb;
  2822. int i;
  2823. unsigned long flags = 0;
  2824. uint16_t prev_pring_flag;
  2825. lpfc_cleanup_discovery_resources(vport);
  2826. spin_lock_irqsave(&phba->hbalock, flags);
  2827. for (i = 0; i < psli->num_rings; i++) {
  2828. pring = &psli->ring[i];
  2829. prev_pring_flag = pring->flag;
  2830. if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
  2831. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2832. /*
  2833. * Error everything on the txq since these iocbs have not been
  2834. * given to the FW yet.
  2835. */
  2836. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  2837. if (iocb->vport != vport)
  2838. continue;
  2839. list_move_tail(&iocb->list, &completions);
  2840. pring->txq_cnt--;
  2841. }
  2842. /* Next issue ABTS for everything on the txcmplq */
  2843. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
  2844. list) {
  2845. if (iocb->vport != vport)
  2846. continue;
  2847. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  2848. }
  2849. pring->flag = prev_pring_flag;
  2850. }
  2851. spin_unlock_irqrestore(&phba->hbalock, flags);
  2852. while (!list_empty(&completions)) {
  2853. list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
  2854. if (!iocb->iocb_cmpl)
  2855. lpfc_sli_release_iocbq(phba, iocb);
  2856. else {
  2857. iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
  2858. iocb->iocb.un.ulpWord[4] = IOERR_SLI_DOWN;
  2859. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2860. }
  2861. }
  2862. return 1;
  2863. }
  2864. int
  2865. lpfc_sli_hba_down(struct lpfc_hba *phba)
  2866. {
  2867. LIST_HEAD(completions);
  2868. struct lpfc_sli *psli = &phba->sli;
  2869. struct lpfc_sli_ring *pring;
  2870. LPFC_MBOXQ_t *pmb;
  2871. struct lpfc_iocbq *iocb;
  2872. IOCB_t *cmd = NULL;
  2873. int i;
  2874. unsigned long flags = 0;
  2875. lpfc_hba_down_prep(phba);
  2876. lpfc_fabric_abort_hba(phba);
  2877. spin_lock_irqsave(&phba->hbalock, flags);
  2878. for (i = 0; i < psli->num_rings; i++) {
  2879. pring = &psli->ring[i];
  2880. if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
  2881. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2882. /*
  2883. * Error everything on the txq since these iocbs have not been
  2884. * given to the FW yet.
  2885. */
  2886. list_splice_init(&pring->txq, &completions);
  2887. pring->txq_cnt = 0;
  2888. }
  2889. spin_unlock_irqrestore(&phba->hbalock, flags);
  2890. while (!list_empty(&completions)) {
  2891. list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
  2892. cmd = &iocb->iocb;
  2893. if (!iocb->iocb_cmpl)
  2894. lpfc_sli_release_iocbq(phba, iocb);
  2895. else {
  2896. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2897. cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  2898. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2899. }
  2900. }
  2901. /* Return any active mbox cmds */
  2902. del_timer_sync(&psli->mbox_tmo);
  2903. spin_lock_irqsave(&phba->hbalock, flags);
  2904. spin_lock(&phba->pport->work_port_lock);
  2905. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  2906. spin_unlock(&phba->pport->work_port_lock);
  2907. if (psli->mbox_active) {
  2908. list_add_tail(&psli->mbox_active->list, &completions);
  2909. psli->mbox_active = NULL;
  2910. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2911. }
  2912. /* Return any pending or completed mbox cmds */
  2913. list_splice_init(&phba->sli.mboxq, &completions);
  2914. list_splice_init(&phba->sli.mboxq_cmpl, &completions);
  2915. INIT_LIST_HEAD(&psli->mboxq);
  2916. INIT_LIST_HEAD(&psli->mboxq_cmpl);
  2917. spin_unlock_irqrestore(&phba->hbalock, flags);
  2918. while (!list_empty(&completions)) {
  2919. list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
  2920. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2921. if (pmb->mbox_cmpl) {
  2922. pmb->mbox_cmpl(phba,pmb);
  2923. }
  2924. }
  2925. return 1;
  2926. }
  2927. void
  2928. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2929. {
  2930. uint32_t *src = srcp;
  2931. uint32_t *dest = destp;
  2932. uint32_t ldata;
  2933. int i;
  2934. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2935. ldata = *src;
  2936. ldata = le32_to_cpu(ldata);
  2937. *dest = ldata;
  2938. src++;
  2939. dest++;
  2940. }
  2941. }
  2942. int
  2943. lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2944. struct lpfc_dmabuf *mp)
  2945. {
  2946. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2947. later */
  2948. spin_lock_irq(&phba->hbalock);
  2949. list_add_tail(&mp->list, &pring->postbufq);
  2950. pring->postbufq_cnt++;
  2951. spin_unlock_irq(&phba->hbalock);
  2952. return 0;
  2953. }
  2954. uint32_t
  2955. lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
  2956. {
  2957. spin_lock_irq(&phba->hbalock);
  2958. phba->buffer_tag_count++;
  2959. /*
  2960. * Always set the QUE_BUFTAG_BIT to distiguish between
  2961. * a tag assigned by HBQ.
  2962. */
  2963. phba->buffer_tag_count |= QUE_BUFTAG_BIT;
  2964. spin_unlock_irq(&phba->hbalock);
  2965. return phba->buffer_tag_count;
  2966. }
  2967. struct lpfc_dmabuf *
  2968. lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2969. uint32_t tag)
  2970. {
  2971. struct lpfc_dmabuf *mp, *next_mp;
  2972. struct list_head *slp = &pring->postbufq;
  2973. /* Search postbufq, from the begining, looking for a match on tag */
  2974. spin_lock_irq(&phba->hbalock);
  2975. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2976. if (mp->buffer_tag == tag) {
  2977. list_del_init(&mp->list);
  2978. pring->postbufq_cnt--;
  2979. spin_unlock_irq(&phba->hbalock);
  2980. return mp;
  2981. }
  2982. }
  2983. spin_unlock_irq(&phba->hbalock);
  2984. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2985. "0410 Cannot find virtual addr for buffer tag on "
  2986. "ring %d Data x%lx x%p x%p x%x\n",
  2987. pring->ringno, (unsigned long) tag,
  2988. slp->next, slp->prev, pring->postbufq_cnt);
  2989. return NULL;
  2990. }
  2991. struct lpfc_dmabuf *
  2992. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2993. dma_addr_t phys)
  2994. {
  2995. struct lpfc_dmabuf *mp, *next_mp;
  2996. struct list_head *slp = &pring->postbufq;
  2997. /* Search postbufq, from the begining, looking for a match on phys */
  2998. spin_lock_irq(&phba->hbalock);
  2999. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  3000. if (mp->phys == phys) {
  3001. list_del_init(&mp->list);
  3002. pring->postbufq_cnt--;
  3003. spin_unlock_irq(&phba->hbalock);
  3004. return mp;
  3005. }
  3006. }
  3007. spin_unlock_irq(&phba->hbalock);
  3008. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  3009. "0410 Cannot find virtual addr for mapped buf on "
  3010. "ring %d Data x%llx x%p x%p x%x\n",
  3011. pring->ringno, (unsigned long long)phys,
  3012. slp->next, slp->prev, pring->postbufq_cnt);
  3013. return NULL;
  3014. }
  3015. static void
  3016. lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  3017. struct lpfc_iocbq *rspiocb)
  3018. {
  3019. IOCB_t *irsp = &rspiocb->iocb;
  3020. uint16_t abort_iotag, abort_context;
  3021. struct lpfc_iocbq *abort_iocb;
  3022. struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
  3023. abort_iocb = NULL;
  3024. if (irsp->ulpStatus) {
  3025. abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
  3026. abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
  3027. spin_lock_irq(&phba->hbalock);
  3028. if (abort_iotag != 0 && abort_iotag <= phba->sli.last_iotag)
  3029. abort_iocb = phba->sli.iocbq_lookup[abort_iotag];
  3030. lpfc_printf_log(phba, KERN_INFO, LOG_ELS | LOG_SLI,
  3031. "0327 Cannot abort els iocb %p "
  3032. "with tag %x context %x, abort status %x, "
  3033. "abort code %x\n",
  3034. abort_iocb, abort_iotag, abort_context,
  3035. irsp->ulpStatus, irsp->un.ulpWord[4]);
  3036. /*
  3037. * make sure we have the right iocbq before taking it
  3038. * off the txcmplq and try to call completion routine.
  3039. */
  3040. if (!abort_iocb ||
  3041. abort_iocb->iocb.ulpContext != abort_context ||
  3042. (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0)
  3043. spin_unlock_irq(&phba->hbalock);
  3044. else {
  3045. list_del_init(&abort_iocb->list);
  3046. pring->txcmplq_cnt--;
  3047. spin_unlock_irq(&phba->hbalock);
  3048. abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED;
  3049. abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
  3050. abort_iocb->iocb.un.ulpWord[4] = IOERR_SLI_ABORTED;
  3051. (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb);
  3052. }
  3053. }
  3054. lpfc_sli_release_iocbq(phba, cmdiocb);
  3055. return;
  3056. }
  3057. static void
  3058. lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  3059. struct lpfc_iocbq *rspiocb)
  3060. {
  3061. IOCB_t *irsp = &rspiocb->iocb;
  3062. /* ELS cmd tag <ulpIoTag> completes */
  3063. lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
  3064. "0133 Ignoring ELS cmd tag x%x completion Data: "
  3065. "x%x x%x x%x\n",
  3066. irsp->ulpIoTag, irsp->ulpStatus,
  3067. irsp->un.ulpWord[4], irsp->ulpTimeout);
  3068. if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
  3069. lpfc_ct_free_iocb(phba, cmdiocb);
  3070. else
  3071. lpfc_els_free_iocb(phba, cmdiocb);
  3072. return;
  3073. }
  3074. int
  3075. lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  3076. struct lpfc_iocbq *cmdiocb)
  3077. {
  3078. struct lpfc_vport *vport = cmdiocb->vport;
  3079. struct lpfc_iocbq *abtsiocbp;
  3080. IOCB_t *icmd = NULL;
  3081. IOCB_t *iabt = NULL;
  3082. int retval = IOCB_ERROR;
  3083. /*
  3084. * There are certain command types we don't want to abort. And we
  3085. * don't want to abort commands that are already in the process of
  3086. * being aborted.
  3087. */
  3088. icmd = &cmdiocb->iocb;
  3089. if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
  3090. icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
  3091. (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
  3092. return 0;
  3093. /* If we're unloading, don't abort iocb on the ELS ring, but change the
  3094. * callback so that nothing happens when it finishes.
  3095. */
  3096. if ((vport->load_flag & FC_UNLOADING) &&
  3097. (pring->ringno == LPFC_ELS_RING)) {
  3098. if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
  3099. cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
  3100. else
  3101. cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
  3102. goto abort_iotag_exit;
  3103. }
  3104. /* issue ABTS for this IOCB based on iotag */
  3105. abtsiocbp = __lpfc_sli_get_iocbq(phba);
  3106. if (abtsiocbp == NULL)
  3107. return 0;
  3108. /* This signals the response to set the correct status
  3109. * before calling the completion handler.
  3110. */
  3111. cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
  3112. iabt = &abtsiocbp->iocb;
  3113. iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
  3114. iabt->un.acxri.abortContextTag = icmd->ulpContext;
  3115. iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
  3116. iabt->ulpLe = 1;
  3117. iabt->ulpClass = icmd->ulpClass;
  3118. if (phba->link_state >= LPFC_LINK_UP)
  3119. iabt->ulpCommand = CMD_ABORT_XRI_CN;
  3120. else
  3121. iabt->ulpCommand = CMD_CLOSE_XRI_CN;
  3122. abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
  3123. lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
  3124. "0339 Abort xri x%x, original iotag x%x, "
  3125. "abort cmd iotag x%x\n",
  3126. iabt->un.acxri.abortContextTag,
  3127. iabt->un.acxri.abortIoTag, abtsiocbp->iotag);
  3128. retval = __lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
  3129. abort_iotag_exit:
  3130. /*
  3131. * Caller to this routine should check for IOCB_ERROR
  3132. * and handle it properly. This routine no longer removes
  3133. * iocb off txcmplq and call compl in case of IOCB_ERROR.
  3134. */
  3135. return retval;
  3136. }
  3137. static int
  3138. lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
  3139. uint16_t tgt_id, uint64_t lun_id,
  3140. lpfc_ctx_cmd ctx_cmd)
  3141. {
  3142. struct lpfc_scsi_buf *lpfc_cmd;
  3143. struct scsi_cmnd *cmnd;
  3144. int rc = 1;
  3145. if (!(iocbq->iocb_flag & LPFC_IO_FCP))
  3146. return rc;
  3147. if (iocbq->vport != vport)
  3148. return rc;
  3149. lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
  3150. cmnd = lpfc_cmd->pCmd;
  3151. if (cmnd == NULL)
  3152. return rc;
  3153. switch (ctx_cmd) {
  3154. case LPFC_CTX_LUN:
  3155. if ((cmnd->device->id == tgt_id) &&
  3156. (cmnd->device->lun == lun_id))
  3157. rc = 0;
  3158. break;
  3159. case LPFC_CTX_TGT:
  3160. if (cmnd->device->id == tgt_id)
  3161. rc = 0;
  3162. break;
  3163. case LPFC_CTX_HOST:
  3164. rc = 0;
  3165. break;
  3166. default:
  3167. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  3168. __FUNCTION__, ctx_cmd);
  3169. break;
  3170. }
  3171. return rc;
  3172. }
  3173. int
  3174. lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
  3175. lpfc_ctx_cmd ctx_cmd)
  3176. {
  3177. struct lpfc_hba *phba = vport->phba;
  3178. struct lpfc_iocbq *iocbq;
  3179. int sum, i;
  3180. for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
  3181. iocbq = phba->sli.iocbq_lookup[i];
  3182. if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
  3183. ctx_cmd) == 0)
  3184. sum++;
  3185. }
  3186. return sum;
  3187. }
  3188. void
  3189. lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  3190. struct lpfc_iocbq *rspiocb)
  3191. {
  3192. lpfc_sli_release_iocbq(phba, cmdiocb);
  3193. return;
  3194. }
  3195. int
  3196. lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
  3197. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
  3198. {
  3199. struct lpfc_hba *phba = vport->phba;
  3200. struct lpfc_iocbq *iocbq;
  3201. struct lpfc_iocbq *abtsiocb;
  3202. IOCB_t *cmd = NULL;
  3203. int errcnt = 0, ret_val = 0;
  3204. int i;
  3205. for (i = 1; i <= phba->sli.last_iotag; i++) {
  3206. iocbq = phba->sli.iocbq_lookup[i];
  3207. if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
  3208. abort_cmd) != 0)
  3209. continue;
  3210. /* issue ABTS for this IOCB based on iotag */
  3211. abtsiocb = lpfc_sli_get_iocbq(phba);
  3212. if (abtsiocb == NULL) {
  3213. errcnt++;
  3214. continue;
  3215. }
  3216. cmd = &iocbq->iocb;
  3217. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  3218. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  3219. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  3220. abtsiocb->iocb.ulpLe = 1;
  3221. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  3222. abtsiocb->vport = phba->pport;
  3223. if (lpfc_is_link_up(phba))
  3224. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  3225. else
  3226. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  3227. /* Setup callback routine and issue the command. */
  3228. abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
  3229. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  3230. if (ret_val == IOCB_ERROR) {
  3231. lpfc_sli_release_iocbq(phba, abtsiocb);
  3232. errcnt++;
  3233. continue;
  3234. }
  3235. }
  3236. return errcnt;
  3237. }
  3238. static void
  3239. lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
  3240. struct lpfc_iocbq *cmdiocbq,
  3241. struct lpfc_iocbq *rspiocbq)
  3242. {
  3243. wait_queue_head_t *pdone_q;
  3244. unsigned long iflags;
  3245. spin_lock_irqsave(&phba->hbalock, iflags);
  3246. cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
  3247. if (cmdiocbq->context2 && rspiocbq)
  3248. memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
  3249. &rspiocbq->iocb, sizeof(IOCB_t));
  3250. pdone_q = cmdiocbq->context_un.wait_queue;
  3251. if (pdone_q)
  3252. wake_up(pdone_q);
  3253. spin_unlock_irqrestore(&phba->hbalock, iflags);
  3254. return;
  3255. }
  3256. /*
  3257. * Issue the caller's iocb and wait for its completion, but no longer than the
  3258. * caller's timeout. Note that iocb_flags is cleared before the
  3259. * lpfc_sli_issue_call since the wake routine sets a unique value and by
  3260. * definition this is a wait function.
  3261. */
  3262. int
  3263. lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
  3264. struct lpfc_sli_ring *pring,
  3265. struct lpfc_iocbq *piocb,
  3266. struct lpfc_iocbq *prspiocbq,
  3267. uint32_t timeout)
  3268. {
  3269. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  3270. long timeleft, timeout_req = 0;
  3271. int retval = IOCB_SUCCESS;
  3272. uint32_t creg_val;
  3273. /*
  3274. * If the caller has provided a response iocbq buffer, then context2
  3275. * is NULL or its an error.
  3276. */
  3277. if (prspiocbq) {
  3278. if (piocb->context2)
  3279. return IOCB_ERROR;
  3280. piocb->context2 = prspiocbq;
  3281. }
  3282. piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
  3283. piocb->context_un.wait_queue = &done_q;
  3284. piocb->iocb_flag &= ~LPFC_IO_WAKE;
  3285. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  3286. creg_val = readl(phba->HCregaddr);
  3287. creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
  3288. writel(creg_val, phba->HCregaddr);
  3289. readl(phba->HCregaddr); /* flush */
  3290. }
  3291. retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
  3292. if (retval == IOCB_SUCCESS) {
  3293. timeout_req = timeout * HZ;
  3294. timeleft = wait_event_timeout(done_q,
  3295. piocb->iocb_flag & LPFC_IO_WAKE,
  3296. timeout_req);
  3297. if (piocb->iocb_flag & LPFC_IO_WAKE) {
  3298. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3299. "0331 IOCB wake signaled\n");
  3300. } else if (timeleft == 0) {
  3301. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  3302. "0338 IOCB wait timeout error - no "
  3303. "wake response Data x%x\n", timeout);
  3304. retval = IOCB_TIMEDOUT;
  3305. } else {
  3306. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  3307. "0330 IOCB wake NOT set, "
  3308. "Data x%x x%lx\n",
  3309. timeout, (timeleft / jiffies));
  3310. retval = IOCB_TIMEDOUT;
  3311. }
  3312. } else {
  3313. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3314. ":0332 IOCB wait issue failed, Data x%x\n",
  3315. retval);
  3316. retval = IOCB_ERROR;
  3317. }
  3318. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  3319. creg_val = readl(phba->HCregaddr);
  3320. creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
  3321. writel(creg_val, phba->HCregaddr);
  3322. readl(phba->HCregaddr); /* flush */
  3323. }
  3324. if (prspiocbq)
  3325. piocb->context2 = NULL;
  3326. piocb->context_un.wait_queue = NULL;
  3327. piocb->iocb_cmpl = NULL;
  3328. return retval;
  3329. }
  3330. int
  3331. lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
  3332. uint32_t timeout)
  3333. {
  3334. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  3335. int retval;
  3336. unsigned long flag;
  3337. /* The caller must leave context1 empty. */
  3338. if (pmboxq->context1)
  3339. return MBX_NOT_FINISHED;
  3340. /* setup wake call as IOCB callback */
  3341. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  3342. /* setup context field to pass wait_queue pointer to wake function */
  3343. pmboxq->context1 = &done_q;
  3344. /* now issue the command */
  3345. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  3346. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  3347. wait_event_interruptible_timeout(done_q,
  3348. pmboxq->mbox_flag & LPFC_MBX_WAKE,
  3349. timeout * HZ);
  3350. spin_lock_irqsave(&phba->hbalock, flag);
  3351. pmboxq->context1 = NULL;
  3352. /*
  3353. * if LPFC_MBX_WAKE flag is set the mailbox is completed
  3354. * else do not free the resources.
  3355. */
  3356. if (pmboxq->mbox_flag & LPFC_MBX_WAKE)
  3357. retval = MBX_SUCCESS;
  3358. else {
  3359. retval = MBX_TIMEOUT;
  3360. pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  3361. }
  3362. spin_unlock_irqrestore(&phba->hbalock, flag);
  3363. }
  3364. return retval;
  3365. }
  3366. int
  3367. lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
  3368. {
  3369. struct lpfc_vport *vport = phba->pport;
  3370. int i = 0;
  3371. uint32_t ha_copy;
  3372. while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !vport->stopped) {
  3373. if (i++ > LPFC_MBOX_TMO * 1000)
  3374. return 1;
  3375. /*
  3376. * Call lpfc_sli_handle_mb_event only if a mailbox cmd
  3377. * did finish. This way we won't get the misleading
  3378. * "Stray Mailbox Interrupt" message.
  3379. */
  3380. spin_lock_irq(&phba->hbalock);
  3381. ha_copy = phba->work_ha;
  3382. phba->work_ha &= ~HA_MBATT;
  3383. spin_unlock_irq(&phba->hbalock);
  3384. if (ha_copy & HA_MBATT)
  3385. if (lpfc_sli_handle_mb_event(phba) == 0)
  3386. i = 0;
  3387. msleep(1);
  3388. }
  3389. return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
  3390. }
  3391. irqreturn_t
  3392. lpfc_intr_handler(int irq, void *dev_id)
  3393. {
  3394. struct lpfc_hba *phba;
  3395. uint32_t ha_copy;
  3396. uint32_t work_ha_copy;
  3397. unsigned long status;
  3398. uint32_t control;
  3399. MAILBOX_t *mbox, *pmbox;
  3400. struct lpfc_vport *vport;
  3401. struct lpfc_nodelist *ndlp;
  3402. struct lpfc_dmabuf *mp;
  3403. LPFC_MBOXQ_t *pmb;
  3404. int rc;
  3405. /*
  3406. * Get the driver's phba structure from the dev_id and
  3407. * assume the HBA is not interrupting.
  3408. */
  3409. phba = (struct lpfc_hba *) dev_id;
  3410. if (unlikely(!phba))
  3411. return IRQ_NONE;
  3412. /* If the pci channel is offline, ignore all the interrupts. */
  3413. if (unlikely(pci_channel_offline(phba->pcidev)))
  3414. return IRQ_NONE;
  3415. phba->sli.slistat.sli_intr++;
  3416. /*
  3417. * Call the HBA to see if it is interrupting. If not, don't claim
  3418. * the interrupt
  3419. */
  3420. /* Ignore all interrupts during initialization. */
  3421. if (unlikely(phba->link_state < LPFC_LINK_DOWN))
  3422. return IRQ_NONE;
  3423. /*
  3424. * Read host attention register to determine interrupt source
  3425. * Clear Attention Sources, except Error Attention (to
  3426. * preserve status) and Link Attention
  3427. */
  3428. spin_lock(&phba->hbalock);
  3429. ha_copy = readl(phba->HAregaddr);
  3430. /* If somebody is waiting to handle an eratt don't process it
  3431. * here. The brdkill function will do this.
  3432. */
  3433. if (phba->link_flag & LS_IGNORE_ERATT)
  3434. ha_copy &= ~HA_ERATT;
  3435. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  3436. readl(phba->HAregaddr); /* flush */
  3437. spin_unlock(&phba->hbalock);
  3438. if (unlikely(!ha_copy))
  3439. return IRQ_NONE;
  3440. work_ha_copy = ha_copy & phba->work_ha_mask;
  3441. if (unlikely(work_ha_copy)) {
  3442. if (work_ha_copy & HA_LATT) {
  3443. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  3444. /*
  3445. * Turn off Link Attention interrupts
  3446. * until CLEAR_LA done
  3447. */
  3448. spin_lock(&phba->hbalock);
  3449. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  3450. control = readl(phba->HCregaddr);
  3451. control &= ~HC_LAINT_ENA;
  3452. writel(control, phba->HCregaddr);
  3453. readl(phba->HCregaddr); /* flush */
  3454. spin_unlock(&phba->hbalock);
  3455. }
  3456. else
  3457. work_ha_copy &= ~HA_LATT;
  3458. }
  3459. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  3460. /*
  3461. * Turn off Slow Rings interrupts, LPFC_ELS_RING is
  3462. * the only slow ring.
  3463. */
  3464. status = (work_ha_copy &
  3465. (HA_RXMASK << (4*LPFC_ELS_RING)));
  3466. status >>= (4*LPFC_ELS_RING);
  3467. if (status & HA_RXMASK) {
  3468. spin_lock(&phba->hbalock);
  3469. control = readl(phba->HCregaddr);
  3470. lpfc_debugfs_slow_ring_trc(phba,
  3471. "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
  3472. control, status,
  3473. (uint32_t)phba->sli.slistat.sli_intr);
  3474. if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
  3475. lpfc_debugfs_slow_ring_trc(phba,
  3476. "ISR Disable ring:"
  3477. "pwork:x%x hawork:x%x wait:x%x",
  3478. phba->work_ha, work_ha_copy,
  3479. (uint32_t)((unsigned long)
  3480. phba->work_wait));
  3481. control &=
  3482. ~(HC_R0INT_ENA << LPFC_ELS_RING);
  3483. writel(control, phba->HCregaddr);
  3484. readl(phba->HCregaddr); /* flush */
  3485. }
  3486. else {
  3487. lpfc_debugfs_slow_ring_trc(phba,
  3488. "ISR slow ring: pwork:"
  3489. "x%x hawork:x%x wait:x%x",
  3490. phba->work_ha, work_ha_copy,
  3491. (uint32_t)((unsigned long)
  3492. phba->work_wait));
  3493. }
  3494. spin_unlock(&phba->hbalock);
  3495. }
  3496. }
  3497. if (work_ha_copy & HA_ERATT) {
  3498. phba->link_state = LPFC_HBA_ERROR;
  3499. /*
  3500. * There was a link/board error. Read the
  3501. * status register to retrieve the error event
  3502. * and process it.
  3503. */
  3504. phba->sli.slistat.err_attn_event++;
  3505. /* Save status info */
  3506. phba->work_hs = readl(phba->HSregaddr);
  3507. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  3508. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  3509. /* Clear Chip error bit */
  3510. writel(HA_ERATT, phba->HAregaddr);
  3511. readl(phba->HAregaddr); /* flush */
  3512. phba->pport->stopped = 1;
  3513. }
  3514. if ((work_ha_copy & HA_MBATT) &&
  3515. (phba->sli.mbox_active)) {
  3516. pmb = phba->sli.mbox_active;
  3517. pmbox = &pmb->mb;
  3518. mbox = &phba->slim2p->mbx;
  3519. vport = pmb->vport;
  3520. /* First check out the status word */
  3521. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
  3522. if (pmbox->mbxOwner != OWN_HOST) {
  3523. /*
  3524. * Stray Mailbox Interrupt, mbxCommand <cmd>
  3525. * mbxStatus <status>
  3526. */
  3527. lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX |
  3528. LOG_SLI,
  3529. "(%d):0304 Stray Mailbox "
  3530. "Interrupt mbxCommand x%x "
  3531. "mbxStatus x%x\n",
  3532. (vport ? vport->vpi : 0),
  3533. pmbox->mbxCommand,
  3534. pmbox->mbxStatus);
  3535. }
  3536. phba->last_completion_time = jiffies;
  3537. del_timer_sync(&phba->sli.mbox_tmo);
  3538. phba->sli.mbox_active = NULL;
  3539. if (pmb->mbox_cmpl) {
  3540. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  3541. MAILBOX_CMD_SIZE);
  3542. }
  3543. if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
  3544. pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
  3545. lpfc_debugfs_disc_trc(vport,
  3546. LPFC_DISC_TRC_MBOX_VPORT,
  3547. "MBOX dflt rpi: : status:x%x rpi:x%x",
  3548. (uint32_t)pmbox->mbxStatus,
  3549. pmbox->un.varWords[0], 0);
  3550. if ( !pmbox->mbxStatus) {
  3551. mp = (struct lpfc_dmabuf *)
  3552. (pmb->context1);
  3553. ndlp = (struct lpfc_nodelist *)
  3554. pmb->context2;
  3555. /* Reg_LOGIN of dflt RPI was successful.
  3556. * new lets get rid of the RPI using the
  3557. * same mbox buffer.
  3558. */
  3559. lpfc_unreg_login(phba, vport->vpi,
  3560. pmbox->un.varWords[0], pmb);
  3561. pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
  3562. pmb->context1 = mp;
  3563. pmb->context2 = ndlp;
  3564. pmb->vport = vport;
  3565. spin_lock(&phba->hbalock);
  3566. phba->sli.sli_flag &=
  3567. ~LPFC_SLI_MBOX_ACTIVE;
  3568. spin_unlock(&phba->hbalock);
  3569. goto send_current_mbox;
  3570. }
  3571. }
  3572. spin_lock(&phba->pport->work_port_lock);
  3573. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  3574. spin_unlock(&phba->pport->work_port_lock);
  3575. lpfc_mbox_cmpl_put(phba, pmb);
  3576. }
  3577. if ((work_ha_copy & HA_MBATT) &&
  3578. (phba->sli.mbox_active == NULL)) {
  3579. send_next_mbox:
  3580. spin_lock(&phba->hbalock);
  3581. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  3582. pmb = lpfc_mbox_get(phba);
  3583. spin_unlock(&phba->hbalock);
  3584. send_current_mbox:
  3585. /* Process next mailbox command if there is one */
  3586. if (pmb != NULL) {
  3587. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  3588. if (rc == MBX_NOT_FINISHED) {
  3589. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  3590. lpfc_mbox_cmpl_put(phba, pmb);
  3591. goto send_next_mbox;
  3592. }
  3593. }
  3594. }
  3595. spin_lock(&phba->hbalock);
  3596. phba->work_ha |= work_ha_copy;
  3597. if (phba->work_wait)
  3598. lpfc_worker_wake_up(phba);
  3599. spin_unlock(&phba->hbalock);
  3600. }
  3601. ha_copy &= ~(phba->work_ha_mask);
  3602. /*
  3603. * Process all events on FCP ring. Take the optimized path for
  3604. * FCP IO. Any other IO is slow path and is handled by
  3605. * the worker thread.
  3606. */
  3607. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  3608. status >>= (4*LPFC_FCP_RING);
  3609. if (status & HA_RXMASK)
  3610. lpfc_sli_handle_fast_ring_event(phba,
  3611. &phba->sli.ring[LPFC_FCP_RING],
  3612. status);
  3613. if (phba->cfg_multi_ring_support == 2) {
  3614. /*
  3615. * Process all events on extra ring. Take the optimized path
  3616. * for extra ring IO. Any other IO is slow path and is handled
  3617. * by the worker thread.
  3618. */
  3619. status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
  3620. status >>= (4*LPFC_EXTRA_RING);
  3621. if (status & HA_RXMASK) {
  3622. lpfc_sli_handle_fast_ring_event(phba,
  3623. &phba->sli.ring[LPFC_EXTRA_RING],
  3624. status);
  3625. }
  3626. }
  3627. return IRQ_HANDLED;
  3628. } /* lpfc_intr_handler */