init.c 35 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/mmc/sdio_func.h>
  17. #include "core.h"
  18. #include "cfg80211.h"
  19. #include "target.h"
  20. #include "debug.h"
  21. #include "hif-ops.h"
  22. unsigned int debug_mask;
  23. static unsigned int testmode;
  24. module_param(debug_mask, uint, 0644);
  25. module_param(testmode, uint, 0644);
  26. /*
  27. * Include definitions here that can be used to tune the WLAN module
  28. * behavior. Different customers can tune the behavior as per their needs,
  29. * here.
  30. */
  31. /*
  32. * This configuration item enable/disable keepalive support.
  33. * Keepalive support: In the absence of any data traffic to AP, null
  34. * frames will be sent to the AP at periodic interval, to keep the association
  35. * active. This configuration item defines the periodic interval.
  36. * Use value of zero to disable keepalive support
  37. * Default: 60 seconds
  38. */
  39. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  40. /*
  41. * This configuration item sets the value of disconnect timeout
  42. * Firmware delays sending the disconnec event to the host for this
  43. * timeout after is gets disconnected from the current AP.
  44. * If the firmware successly roams within the disconnect timeout
  45. * it sends a new connect event
  46. */
  47. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  48. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  49. enum addr_type {
  50. DATASET_PATCH_ADDR,
  51. APP_LOAD_ADDR,
  52. APP_START_OVERRIDE_ADDR,
  53. };
  54. #define ATH6KL_DATA_OFFSET 64
  55. struct sk_buff *ath6kl_buf_alloc(int size)
  56. {
  57. struct sk_buff *skb;
  58. u16 reserved;
  59. /* Add chacheline space at front and back of buffer */
  60. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  61. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  62. skb = dev_alloc_skb(size + reserved);
  63. if (skb)
  64. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  65. return skb;
  66. }
  67. void ath6kl_init_profile_info(struct ath6kl *ar)
  68. {
  69. ar->ssid_len = 0;
  70. memset(ar->ssid, 0, sizeof(ar->ssid));
  71. ar->dot11_auth_mode = OPEN_AUTH;
  72. ar->auth_mode = NONE_AUTH;
  73. ar->prwise_crypto = NONE_CRYPT;
  74. ar->prwise_crypto_len = 0;
  75. ar->grp_crypto = NONE_CRYPT;
  76. ar->grp_crypto_len = 0;
  77. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  78. memset(ar->req_bssid, 0, sizeof(ar->req_bssid));
  79. memset(ar->bssid, 0, sizeof(ar->bssid));
  80. ar->bss_ch = 0;
  81. ar->nw_type = ar->next_mode = INFRA_NETWORK;
  82. }
  83. static u8 ath6kl_get_fw_iftype(struct ath6kl *ar)
  84. {
  85. switch (ar->nw_type) {
  86. case INFRA_NETWORK:
  87. return HI_OPTION_FW_MODE_BSS_STA;
  88. case ADHOC_NETWORK:
  89. return HI_OPTION_FW_MODE_IBSS;
  90. case AP_NETWORK:
  91. return HI_OPTION_FW_MODE_AP;
  92. default:
  93. ath6kl_err("Unsupported interface type :%d\n", ar->nw_type);
  94. return 0xff;
  95. }
  96. }
  97. static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar,
  98. u32 item_offset)
  99. {
  100. u32 addr = 0;
  101. if (ar->target_type == TARGET_TYPE_AR6003)
  102. addr = ATH6KL_AR6003_HI_START_ADDR + item_offset;
  103. else if (ar->target_type == TARGET_TYPE_AR6004)
  104. addr = ATH6KL_AR6004_HI_START_ADDR + item_offset;
  105. return addr;
  106. }
  107. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  108. {
  109. u32 address, data;
  110. struct host_app_area host_app_area;
  111. /* Fetch the address of the host_app_area_s
  112. * instance in the host interest area */
  113. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  114. address = TARG_VTOP(ar->target_type, address);
  115. if (ath6kl_read_reg_diag(ar, &address, &data))
  116. return -EIO;
  117. address = TARG_VTOP(ar->target_type, data);
  118. host_app_area.wmi_protocol_ver = WMI_PROTOCOL_VERSION;
  119. if (ath6kl_access_datadiag(ar, address,
  120. (u8 *)&host_app_area,
  121. sizeof(struct host_app_area), false))
  122. return -EIO;
  123. return 0;
  124. }
  125. static inline void set_ac2_ep_map(struct ath6kl *ar,
  126. u8 ac,
  127. enum htc_endpoint_id ep)
  128. {
  129. ar->ac2ep_map[ac] = ep;
  130. ar->ep2ac_map[ep] = ac;
  131. }
  132. /* connect to a service */
  133. static int ath6kl_connectservice(struct ath6kl *ar,
  134. struct htc_service_connect_req *con_req,
  135. char *desc)
  136. {
  137. int status;
  138. struct htc_service_connect_resp response;
  139. memset(&response, 0, sizeof(response));
  140. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  141. if (status) {
  142. ath6kl_err("failed to connect to %s service status:%d\n",
  143. desc, status);
  144. return status;
  145. }
  146. switch (con_req->svc_id) {
  147. case WMI_CONTROL_SVC:
  148. if (test_bit(WMI_ENABLED, &ar->flag))
  149. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  150. ar->ctrl_ep = response.endpoint;
  151. break;
  152. case WMI_DATA_BE_SVC:
  153. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  154. break;
  155. case WMI_DATA_BK_SVC:
  156. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  157. break;
  158. case WMI_DATA_VI_SVC:
  159. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  160. break;
  161. case WMI_DATA_VO_SVC:
  162. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  163. break;
  164. default:
  165. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  166. return -EINVAL;
  167. }
  168. return 0;
  169. }
  170. static int ath6kl_init_service_ep(struct ath6kl *ar)
  171. {
  172. struct htc_service_connect_req connect;
  173. memset(&connect, 0, sizeof(connect));
  174. /* these fields are the same for all service endpoints */
  175. connect.ep_cb.rx = ath6kl_rx;
  176. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  177. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  178. /*
  179. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  180. * gets called.
  181. */
  182. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  183. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  184. if (!connect.ep_cb.rx_refill_thresh)
  185. connect.ep_cb.rx_refill_thresh++;
  186. /* connect to control service */
  187. connect.svc_id = WMI_CONTROL_SVC;
  188. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  189. return -EIO;
  190. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  191. /*
  192. * Limit the HTC message size on the send path, although e can
  193. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  194. * (802.3) frames on the send path.
  195. */
  196. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  197. /*
  198. * To reduce the amount of committed memory for larger A_MSDU
  199. * frames, use the recv-alloc threshold mechanism for larger
  200. * packets.
  201. */
  202. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  203. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  204. /*
  205. * For the remaining data services set the connection flag to
  206. * reduce dribbling, if configured to do so.
  207. */
  208. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  209. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  210. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  211. connect.svc_id = WMI_DATA_BE_SVC;
  212. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  213. return -EIO;
  214. /* connect to back-ground map this to WMI LOW_PRI */
  215. connect.svc_id = WMI_DATA_BK_SVC;
  216. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  217. return -EIO;
  218. /* connect to Video service, map this to to HI PRI */
  219. connect.svc_id = WMI_DATA_VI_SVC;
  220. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  221. return -EIO;
  222. /*
  223. * Connect to VO service, this is currently not mapped to a WMI
  224. * priority stream due to historical reasons. WMI originally
  225. * defined 3 priorities over 3 mailboxes We can change this when
  226. * WMI is reworked so that priorities are not dependent on
  227. * mailboxes.
  228. */
  229. connect.svc_id = WMI_DATA_VO_SVC;
  230. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  231. return -EIO;
  232. return 0;
  233. }
  234. static void ath6kl_init_control_info(struct ath6kl *ar)
  235. {
  236. u8 ctr;
  237. clear_bit(WMI_ENABLED, &ar->flag);
  238. ath6kl_init_profile_info(ar);
  239. ar->def_txkey_index = 0;
  240. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  241. ar->ch_hint = 0;
  242. ar->listen_intvl_t = A_DEFAULT_LISTEN_INTERVAL;
  243. ar->listen_intvl_b = 0;
  244. ar->tx_pwr = 0;
  245. clear_bit(SKIP_SCAN, &ar->flag);
  246. set_bit(WMM_ENABLED, &ar->flag);
  247. ar->intra_bss = 1;
  248. memset(&ar->sc_params, 0, sizeof(ar->sc_params));
  249. ar->sc_params.short_scan_ratio = WMI_SHORTSCANRATIO_DEFAULT;
  250. ar->sc_params.scan_ctrl_flags = DEFAULT_SCAN_CTRL_FLAGS;
  251. memset((u8 *)ar->sta_list, 0,
  252. AP_MAX_NUM_STA * sizeof(struct ath6kl_sta));
  253. spin_lock_init(&ar->mcastpsq_lock);
  254. /* Init the PS queues */
  255. for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) {
  256. spin_lock_init(&ar->sta_list[ctr].psq_lock);
  257. skb_queue_head_init(&ar->sta_list[ctr].psq);
  258. }
  259. skb_queue_head_init(&ar->mcastpsq);
  260. memcpy(ar->ap_country_code, DEF_AP_COUNTRY_CODE, 3);
  261. }
  262. /*
  263. * Set HTC/Mbox operational parameters, this can only be called when the
  264. * target is in the BMI phase.
  265. */
  266. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  267. u8 htc_ctrl_buf)
  268. {
  269. int status;
  270. u32 blk_size;
  271. blk_size = ar->mbox_info.block_size;
  272. if (htc_ctrl_buf)
  273. blk_size |= ((u32)htc_ctrl_buf) << 16;
  274. /* set the host interest area for the block size */
  275. status = ath6kl_bmi_write(ar,
  276. ath6kl_get_hi_item_addr(ar,
  277. HI_ITEM(hi_mbox_io_block_sz)),
  278. (u8 *)&blk_size,
  279. 4);
  280. if (status) {
  281. ath6kl_err("bmi_write_memory for IO block size failed\n");
  282. goto out;
  283. }
  284. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  285. blk_size,
  286. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  287. if (mbox_isr_yield_val) {
  288. /* set the host interest area for the mbox ISR yield limit */
  289. status = ath6kl_bmi_write(ar,
  290. ath6kl_get_hi_item_addr(ar,
  291. HI_ITEM(hi_mbox_isr_yield_limit)),
  292. (u8 *)&mbox_isr_yield_val,
  293. 4);
  294. if (status) {
  295. ath6kl_err("bmi_write_memory for yield limit failed\n");
  296. goto out;
  297. }
  298. }
  299. out:
  300. return status;
  301. }
  302. #define REG_DUMP_COUNT_AR6003 60
  303. #define REGISTER_DUMP_LEN_MAX 60
  304. static void ath6kl_dump_target_assert_info(struct ath6kl *ar)
  305. {
  306. u32 address;
  307. u32 regdump_loc = 0;
  308. int status;
  309. u32 regdump_val[REGISTER_DUMP_LEN_MAX];
  310. u32 i;
  311. if (ar->target_type != TARGET_TYPE_AR6003)
  312. return;
  313. /* the reg dump pointer is copied to the host interest area */
  314. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state));
  315. address = TARG_VTOP(ar->target_type, address);
  316. /* read RAM location through diagnostic window */
  317. status = ath6kl_read_reg_diag(ar, &address, &regdump_loc);
  318. if (status || !regdump_loc) {
  319. ath6kl_err("failed to get ptr to register dump area\n");
  320. return;
  321. }
  322. ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n",
  323. regdump_loc);
  324. regdump_loc = TARG_VTOP(ar->target_type, regdump_loc);
  325. /* fetch register dump data */
  326. status = ath6kl_access_datadiag(ar,
  327. regdump_loc,
  328. (u8 *)&regdump_val[0],
  329. REG_DUMP_COUNT_AR6003 * (sizeof(u32)),
  330. true);
  331. if (status) {
  332. ath6kl_err("failed to get register dump\n");
  333. return;
  334. }
  335. ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n");
  336. for (i = 0; i < REG_DUMP_COUNT_AR6003; i++)
  337. ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n",
  338. i, regdump_val[i]);
  339. }
  340. void ath6kl_target_failure(struct ath6kl *ar)
  341. {
  342. ath6kl_err("target asserted\n");
  343. /* try dumping target assertion information (if any) */
  344. ath6kl_dump_target_assert_info(ar);
  345. }
  346. static int ath6kl_target_config_wlan_params(struct ath6kl *ar)
  347. {
  348. int status = 0;
  349. int ret;
  350. /*
  351. * Configure the device for rx dot11 header rules. "0,0" are the
  352. * default values. Required if checksum offload is needed. Set
  353. * RxMetaVersion to 2.
  354. */
  355. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi,
  356. ar->rx_meta_ver, 0, 0)) {
  357. ath6kl_err("unable to set the rx frame format\n");
  358. status = -EIO;
  359. }
  360. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  361. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1,
  362. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  363. ath6kl_err("unable to set power save fail event policy\n");
  364. status = -EIO;
  365. }
  366. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  367. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0,
  368. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  369. ath6kl_err("unable to set barker preamble policy\n");
  370. status = -EIO;
  371. }
  372. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi,
  373. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  374. ath6kl_err("unable to set keep alive interval\n");
  375. status = -EIO;
  376. }
  377. if (ath6kl_wmi_disctimeout_cmd(ar->wmi,
  378. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  379. ath6kl_err("unable to set disconnect timeout\n");
  380. status = -EIO;
  381. }
  382. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  383. if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) {
  384. ath6kl_err("unable to set txop bursting\n");
  385. status = -EIO;
  386. }
  387. ret = ath6kl_wmi_info_req_cmd(ar->wmi, P2P_FLAG_CAPABILITIES_REQ |
  388. P2P_FLAG_MACADDR_REQ |
  389. P2P_FLAG_HMODEL_REQ);
  390. if (ret) {
  391. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  392. "capabilities (%d) - assuming P2P not supported\n",
  393. ret);
  394. }
  395. /* Enable Probe Request reporting for P2P */
  396. ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, true);
  397. if (ret) {
  398. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe Request "
  399. "reporting (%d)\n", ret);
  400. }
  401. return status;
  402. }
  403. int ath6kl_configure_target(struct ath6kl *ar)
  404. {
  405. u32 param, ram_reserved_size;
  406. u8 fw_iftype;
  407. fw_iftype = ath6kl_get_fw_iftype(ar);
  408. if (fw_iftype == 0xff)
  409. return -EINVAL;
  410. /* Tell target which HTC version it is used*/
  411. param = HTC_PROTOCOL_VERSION;
  412. if (ath6kl_bmi_write(ar,
  413. ath6kl_get_hi_item_addr(ar,
  414. HI_ITEM(hi_app_host_interest)),
  415. (u8 *)&param, 4) != 0) {
  416. ath6kl_err("bmi_write_memory for htc version failed\n");
  417. return -EIO;
  418. }
  419. /* set the firmware mode to STA/IBSS/AP */
  420. param = 0;
  421. if (ath6kl_bmi_read(ar,
  422. ath6kl_get_hi_item_addr(ar,
  423. HI_ITEM(hi_option_flag)),
  424. (u8 *)&param, 4) != 0) {
  425. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  426. return -EIO;
  427. }
  428. param |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  429. param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT);
  430. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  431. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  432. if (ath6kl_bmi_write(ar,
  433. ath6kl_get_hi_item_addr(ar,
  434. HI_ITEM(hi_option_flag)),
  435. (u8 *)&param,
  436. 4) != 0) {
  437. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  438. return -EIO;
  439. }
  440. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  441. /*
  442. * Hardcode the address use for the extended board data
  443. * Ideally this should be pre-allocate by the OS at boot time
  444. * But since it is a new feature and board data is loaded
  445. * at init time, we have to workaround this from host.
  446. * It is difficult to patch the firmware boot code,
  447. * but possible in theory.
  448. */
  449. if (ar->target_type == TARGET_TYPE_AR6003 ||
  450. ar->target_type == TARGET_TYPE_AR6004) {
  451. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  452. param = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
  453. ram_reserved_size = AR6003_REV2_RAM_RESERVE_SIZE;
  454. } else if (ar->version.target_ver == AR6004_REV1_VERSION) {
  455. param = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
  456. ram_reserved_size = AR6004_REV1_RAM_RESERVE_SIZE;
  457. } else {
  458. param = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
  459. ram_reserved_size = AR6003_REV3_RAM_RESERVE_SIZE;
  460. }
  461. if (ath6kl_bmi_write(ar,
  462. ath6kl_get_hi_item_addr(ar,
  463. HI_ITEM(hi_board_ext_data)),
  464. (u8 *)&param, 4) != 0) {
  465. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  466. return -EIO;
  467. }
  468. if (ath6kl_bmi_write(ar,
  469. ath6kl_get_hi_item_addr(ar,
  470. HI_ITEM(hi_end_ram_reserve_sz)),
  471. (u8 *)&ram_reserved_size, 4) != 0) {
  472. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  473. return -EIO;
  474. }
  475. }
  476. /* set the block size for the target */
  477. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  478. /* use default number of control buffers */
  479. return -EIO;
  480. return 0;
  481. }
  482. struct ath6kl *ath6kl_core_alloc(struct device *sdev)
  483. {
  484. struct net_device *dev;
  485. struct ath6kl *ar;
  486. struct wireless_dev *wdev;
  487. wdev = ath6kl_cfg80211_init(sdev);
  488. if (!wdev) {
  489. ath6kl_err("ath6kl_cfg80211_init failed\n");
  490. return NULL;
  491. }
  492. ar = wdev_priv(wdev);
  493. ar->dev = sdev;
  494. ar->wdev = wdev;
  495. wdev->iftype = NL80211_IFTYPE_STATION;
  496. if (ath6kl_debug_init(ar)) {
  497. ath6kl_err("Failed to initialize debugfs\n");
  498. ath6kl_cfg80211_deinit(ar);
  499. return NULL;
  500. }
  501. dev = alloc_netdev(0, "wlan%d", ether_setup);
  502. if (!dev) {
  503. ath6kl_err("no memory for network device instance\n");
  504. ath6kl_cfg80211_deinit(ar);
  505. return NULL;
  506. }
  507. dev->ieee80211_ptr = wdev;
  508. SET_NETDEV_DEV(dev, wiphy_dev(wdev->wiphy));
  509. wdev->netdev = dev;
  510. ar->sme_state = SME_DISCONNECTED;
  511. ar->auto_auth_stage = AUTH_IDLE;
  512. init_netdev(dev);
  513. ar->net_dev = dev;
  514. set_bit(WLAN_ENABLED, &ar->flag);
  515. ar->wlan_pwr_state = WLAN_POWER_STATE_ON;
  516. spin_lock_init(&ar->lock);
  517. ath6kl_init_control_info(ar);
  518. init_waitqueue_head(&ar->event_wq);
  519. sema_init(&ar->sem, 1);
  520. clear_bit(DESTROY_IN_PROGRESS, &ar->flag);
  521. INIT_LIST_HEAD(&ar->amsdu_rx_buffer_queue);
  522. setup_timer(&ar->disconnect_timer, disconnect_timer_handler,
  523. (unsigned long) dev);
  524. return ar;
  525. }
  526. int ath6kl_unavail_ev(struct ath6kl *ar)
  527. {
  528. ath6kl_destroy(ar->net_dev, 1);
  529. return 0;
  530. }
  531. /* firmware upload */
  532. static u32 ath6kl_get_load_address(u32 target_ver, enum addr_type type)
  533. {
  534. WARN_ON(target_ver != AR6003_REV2_VERSION &&
  535. target_ver != AR6003_REV3_VERSION &&
  536. target_ver != AR6004_REV1_VERSION);
  537. switch (type) {
  538. case DATASET_PATCH_ADDR:
  539. return (target_ver == AR6003_REV2_VERSION) ?
  540. AR6003_REV2_DATASET_PATCH_ADDRESS :
  541. AR6003_REV3_DATASET_PATCH_ADDRESS;
  542. case APP_LOAD_ADDR:
  543. return (target_ver == AR6003_REV2_VERSION) ?
  544. AR6003_REV2_APP_LOAD_ADDRESS :
  545. 0x1234;
  546. case APP_START_OVERRIDE_ADDR:
  547. return (target_ver == AR6003_REV2_VERSION) ?
  548. AR6003_REV2_APP_START_OVERRIDE :
  549. AR6003_REV3_APP_START_OVERRIDE;
  550. default:
  551. return 0;
  552. }
  553. }
  554. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  555. u8 **fw, size_t *fw_len)
  556. {
  557. const struct firmware *fw_entry;
  558. int ret;
  559. ret = request_firmware(&fw_entry, filename, ar->dev);
  560. if (ret)
  561. return ret;
  562. *fw_len = fw_entry->size;
  563. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  564. if (*fw == NULL)
  565. ret = -ENOMEM;
  566. release_firmware(fw_entry);
  567. return ret;
  568. }
  569. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  570. {
  571. const char *filename;
  572. int ret;
  573. switch (ar->version.target_ver) {
  574. case AR6003_REV2_VERSION:
  575. filename = AR6003_REV2_BOARD_DATA_FILE;
  576. break;
  577. case AR6004_REV1_VERSION:
  578. filename = AR6004_REV1_BOARD_DATA_FILE;
  579. break;
  580. default:
  581. filename = AR6003_REV3_BOARD_DATA_FILE;
  582. break;
  583. }
  584. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  585. &ar->fw_board_len);
  586. if (ret == 0) {
  587. /* managed to get proper board file */
  588. return 0;
  589. }
  590. /* there was no proper board file, try to use default instead */
  591. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  592. filename, ret);
  593. switch (ar->version.target_ver) {
  594. case AR6003_REV2_VERSION:
  595. filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
  596. break;
  597. case AR6004_REV1_VERSION:
  598. filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
  599. break;
  600. default:
  601. filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
  602. break;
  603. }
  604. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  605. &ar->fw_board_len);
  606. if (ret) {
  607. ath6kl_err("Failed to get default board file %s: %d\n",
  608. filename, ret);
  609. return ret;
  610. }
  611. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  612. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  613. return 0;
  614. }
  615. static int ath6kl_upload_board_file(struct ath6kl *ar)
  616. {
  617. u32 board_address, board_ext_address, param;
  618. u32 board_data_size, board_ext_data_size;
  619. int ret;
  620. if (ar->fw_board == NULL) {
  621. ret = ath6kl_fetch_board_file(ar);
  622. if (ret)
  623. return ret;
  624. }
  625. /*
  626. * Determine where in Target RAM to write Board Data.
  627. * For AR6004, host determine Target RAM address for
  628. * writing board data.
  629. */
  630. if (ar->target_type == TARGET_TYPE_AR6004) {
  631. board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
  632. ath6kl_bmi_write(ar,
  633. ath6kl_get_hi_item_addr(ar,
  634. HI_ITEM(hi_board_data)),
  635. (u8 *) &board_address, 4);
  636. } else {
  637. ath6kl_bmi_read(ar,
  638. ath6kl_get_hi_item_addr(ar,
  639. HI_ITEM(hi_board_data)),
  640. (u8 *) &board_address, 4);
  641. }
  642. ath6kl_dbg(ATH6KL_DBG_TRC, "board data download addr: 0x%x\n",
  643. board_address);
  644. /* determine where in target ram to write extended board data */
  645. ath6kl_bmi_read(ar,
  646. ath6kl_get_hi_item_addr(ar,
  647. HI_ITEM(hi_board_ext_data)),
  648. (u8 *) &board_ext_address, 4);
  649. ath6kl_dbg(ATH6KL_DBG_TRC, "board file download addr: 0x%x\n",
  650. board_ext_address);
  651. if (board_ext_address == 0) {
  652. ath6kl_err("Failed to get board file target address.\n");
  653. return -EINVAL;
  654. }
  655. switch (ar->target_type) {
  656. case TARGET_TYPE_AR6003:
  657. board_data_size = AR6003_BOARD_DATA_SZ;
  658. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  659. break;
  660. case TARGET_TYPE_AR6004:
  661. board_data_size = AR6004_BOARD_DATA_SZ;
  662. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  663. break;
  664. default:
  665. WARN_ON(1);
  666. return -EINVAL;
  667. break;
  668. }
  669. if (ar->fw_board_len == (board_data_size +
  670. board_ext_data_size)) {
  671. /* write extended board data */
  672. ret = ath6kl_bmi_write(ar, board_ext_address,
  673. ar->fw_board + board_data_size,
  674. board_ext_data_size);
  675. if (ret) {
  676. ath6kl_err("Failed to write extended board data: %d\n",
  677. ret);
  678. return ret;
  679. }
  680. /* record that extended board data is initialized */
  681. param = (board_ext_data_size << 16) | 1;
  682. ath6kl_bmi_write(ar,
  683. ath6kl_get_hi_item_addr(ar,
  684. HI_ITEM(hi_board_ext_data_config)),
  685. (unsigned char *) &param, 4);
  686. }
  687. if (ar->fw_board_len < board_data_size) {
  688. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  689. ret = -EINVAL;
  690. return ret;
  691. }
  692. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  693. board_data_size);
  694. if (ret) {
  695. ath6kl_err("Board file bmi write failed: %d\n", ret);
  696. return ret;
  697. }
  698. /* record the fact that Board Data IS initialized */
  699. param = 1;
  700. ath6kl_bmi_write(ar,
  701. ath6kl_get_hi_item_addr(ar,
  702. HI_ITEM(hi_board_data_initialized)),
  703. (u8 *)&param, 4);
  704. return ret;
  705. }
  706. static int ath6kl_upload_otp(struct ath6kl *ar)
  707. {
  708. const char *filename;
  709. u32 address, param;
  710. int ret;
  711. switch (ar->version.target_ver) {
  712. case AR6003_REV2_VERSION:
  713. filename = AR6003_REV2_OTP_FILE;
  714. break;
  715. case AR6004_REV1_VERSION:
  716. ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
  717. return 0;
  718. break;
  719. default:
  720. filename = AR6003_REV3_OTP_FILE;
  721. break;
  722. }
  723. if (ar->fw_otp == NULL) {
  724. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  725. &ar->fw_otp_len);
  726. if (ret) {
  727. ath6kl_err("Failed to get OTP file %s: %d\n",
  728. filename, ret);
  729. return ret;
  730. }
  731. }
  732. address = ath6kl_get_load_address(ar->version.target_ver,
  733. APP_LOAD_ADDR);
  734. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  735. ar->fw_otp_len);
  736. if (ret) {
  737. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  738. return ret;
  739. }
  740. /* execute the OTP code */
  741. param = 0;
  742. address = ath6kl_get_load_address(ar->version.target_ver,
  743. APP_START_OVERRIDE_ADDR);
  744. ath6kl_bmi_execute(ar, address, &param);
  745. return ret;
  746. }
  747. static int ath6kl_upload_firmware(struct ath6kl *ar)
  748. {
  749. const char *filename;
  750. u32 address;
  751. int ret;
  752. if (testmode) {
  753. switch (ar->version.target_ver) {
  754. case AR6003_REV2_VERSION:
  755. filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
  756. break;
  757. case AR6003_REV3_VERSION:
  758. filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
  759. break;
  760. case AR6004_REV1_VERSION:
  761. ath6kl_warn("testmode not supported with ar6004\n");
  762. return -EOPNOTSUPP;
  763. default:
  764. ath6kl_warn("unknown target version: 0x%x\n",
  765. ar->version.target_ver);
  766. return -EINVAL;
  767. }
  768. set_bit(TESTMODE, &ar->flag);
  769. goto get_fw;
  770. }
  771. switch (ar->version.target_ver) {
  772. case AR6003_REV2_VERSION:
  773. filename = AR6003_REV2_FIRMWARE_FILE;
  774. break;
  775. case AR6004_REV1_VERSION:
  776. filename = AR6004_REV1_FIRMWARE_FILE;
  777. break;
  778. default:
  779. filename = AR6003_REV3_FIRMWARE_FILE;
  780. break;
  781. }
  782. get_fw:
  783. if (ar->fw == NULL) {
  784. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  785. if (ret) {
  786. ath6kl_err("Failed to get firmware file %s: %d\n",
  787. filename, ret);
  788. return ret;
  789. }
  790. }
  791. address = ath6kl_get_load_address(ar->version.target_ver,
  792. APP_LOAD_ADDR);
  793. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  794. if (ret) {
  795. ath6kl_err("Failed to write firmware: %d\n", ret);
  796. return ret;
  797. }
  798. /*
  799. * Set starting address for firmware
  800. * Don't need to setup app_start override addr on AR6004
  801. */
  802. if (ar->target_type != TARGET_TYPE_AR6004) {
  803. address = ath6kl_get_load_address(ar->version.target_ver,
  804. APP_START_OVERRIDE_ADDR);
  805. ath6kl_bmi_set_app_start(ar, address);
  806. }
  807. return ret;
  808. }
  809. static int ath6kl_upload_patch(struct ath6kl *ar)
  810. {
  811. const char *filename;
  812. u32 address, param;
  813. int ret;
  814. switch (ar->version.target_ver) {
  815. case AR6003_REV2_VERSION:
  816. filename = AR6003_REV2_PATCH_FILE;
  817. break;
  818. case AR6004_REV1_VERSION:
  819. /* FIXME: implement for AR6004 */
  820. return 0;
  821. break;
  822. default:
  823. filename = AR6003_REV3_PATCH_FILE;
  824. break;
  825. }
  826. if (ar->fw_patch == NULL) {
  827. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  828. &ar->fw_patch_len);
  829. if (ret) {
  830. ath6kl_err("Failed to get patch file %s: %d\n",
  831. filename, ret);
  832. return ret;
  833. }
  834. }
  835. address = ath6kl_get_load_address(ar->version.target_ver,
  836. DATASET_PATCH_ADDR);
  837. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  838. if (ret) {
  839. ath6kl_err("Failed to write patch file: %d\n", ret);
  840. return ret;
  841. }
  842. param = address;
  843. ath6kl_bmi_write(ar,
  844. ath6kl_get_hi_item_addr(ar,
  845. HI_ITEM(hi_dset_list_head)),
  846. (unsigned char *) &param, 4);
  847. return 0;
  848. }
  849. static int ath6kl_init_upload(struct ath6kl *ar)
  850. {
  851. u32 param, options, sleep, address;
  852. int status = 0;
  853. if (ar->target_type != TARGET_TYPE_AR6003 &&
  854. ar->target_type != TARGET_TYPE_AR6004)
  855. return -EINVAL;
  856. /* temporarily disable system sleep */
  857. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  858. status = ath6kl_bmi_reg_read(ar, address, &param);
  859. if (status)
  860. return status;
  861. options = param;
  862. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  863. status = ath6kl_bmi_reg_write(ar, address, param);
  864. if (status)
  865. return status;
  866. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  867. status = ath6kl_bmi_reg_read(ar, address, &param);
  868. if (status)
  869. return status;
  870. sleep = param;
  871. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  872. status = ath6kl_bmi_reg_write(ar, address, param);
  873. if (status)
  874. return status;
  875. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  876. options, sleep);
  877. /* program analog PLL register */
  878. /* no need to control 40/44MHz clock on AR6004 */
  879. if (ar->target_type != TARGET_TYPE_AR6004) {
  880. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  881. 0xF9104001);
  882. if (status)
  883. return status;
  884. /* Run at 80/88MHz by default */
  885. param = SM(CPU_CLOCK_STANDARD, 1);
  886. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  887. status = ath6kl_bmi_reg_write(ar, address, param);
  888. if (status)
  889. return status;
  890. }
  891. param = 0;
  892. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  893. param = SM(LPO_CAL_ENABLE, 1);
  894. status = ath6kl_bmi_reg_write(ar, address, param);
  895. if (status)
  896. return status;
  897. /* WAR to avoid SDIO CRC err */
  898. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  899. ath6kl_err("temporary war to avoid sdio crc error\n");
  900. param = 0x20;
  901. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  902. status = ath6kl_bmi_reg_write(ar, address, param);
  903. if (status)
  904. return status;
  905. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  906. status = ath6kl_bmi_reg_write(ar, address, param);
  907. if (status)
  908. return status;
  909. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  910. status = ath6kl_bmi_reg_write(ar, address, param);
  911. if (status)
  912. return status;
  913. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  914. status = ath6kl_bmi_reg_write(ar, address, param);
  915. if (status)
  916. return status;
  917. }
  918. /* write EEPROM data to Target RAM */
  919. status = ath6kl_upload_board_file(ar);
  920. if (status)
  921. return status;
  922. /* transfer One time Programmable data */
  923. status = ath6kl_upload_otp(ar);
  924. if (status)
  925. return status;
  926. /* Download Target firmware */
  927. status = ath6kl_upload_firmware(ar);
  928. if (status)
  929. return status;
  930. status = ath6kl_upload_patch(ar);
  931. if (status)
  932. return status;
  933. /* Restore system sleep */
  934. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  935. status = ath6kl_bmi_reg_write(ar, address, sleep);
  936. if (status)
  937. return status;
  938. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  939. param = options | 0x20;
  940. status = ath6kl_bmi_reg_write(ar, address, param);
  941. if (status)
  942. return status;
  943. /* Configure GPIO AR6003 UART */
  944. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  945. status = ath6kl_bmi_write(ar,
  946. ath6kl_get_hi_item_addr(ar,
  947. HI_ITEM(hi_dbg_uart_txpin)),
  948. (u8 *)&param, 4);
  949. return status;
  950. }
  951. static int ath6kl_init(struct net_device *dev)
  952. {
  953. struct ath6kl *ar = ath6kl_priv(dev);
  954. int status = 0;
  955. s32 timeleft;
  956. if (!ar)
  957. return -EIO;
  958. /* Do we need to finish the BMI phase */
  959. if (ath6kl_bmi_done(ar)) {
  960. status = -EIO;
  961. goto ath6kl_init_done;
  962. }
  963. /* Indicate that WMI is enabled (although not ready yet) */
  964. set_bit(WMI_ENABLED, &ar->flag);
  965. ar->wmi = ath6kl_wmi_init(ar);
  966. if (!ar->wmi) {
  967. ath6kl_err("failed to initialize wmi\n");
  968. status = -EIO;
  969. goto ath6kl_init_done;
  970. }
  971. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  972. wlan_node_table_init(&ar->scan_table);
  973. /*
  974. * The reason we have to wait for the target here is that the
  975. * driver layer has to init BMI in order to set the host block
  976. * size.
  977. */
  978. if (ath6kl_htc_wait_target(ar->htc_target)) {
  979. status = -EIO;
  980. goto err_node_cleanup;
  981. }
  982. if (ath6kl_init_service_ep(ar)) {
  983. status = -EIO;
  984. goto err_cleanup_scatter;
  985. }
  986. /* setup access class priority mappings */
  987. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  988. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  989. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  990. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  991. /* give our connected endpoints some buffers */
  992. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  993. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  994. /* allocate some buffers that handle larger AMSDU frames */
  995. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  996. /* setup credit distribution */
  997. ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info);
  998. ath6kl_cookie_init(ar);
  999. /* start HTC */
  1000. status = ath6kl_htc_start(ar->htc_target);
  1001. if (status) {
  1002. ath6kl_cookie_cleanup(ar);
  1003. goto err_rxbuf_cleanup;
  1004. }
  1005. /* Wait for Wmi event to be ready */
  1006. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  1007. test_bit(WMI_READY,
  1008. &ar->flag),
  1009. WMI_TIMEOUT);
  1010. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  1011. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  1012. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  1013. status = -EIO;
  1014. goto err_htc_stop;
  1015. }
  1016. if (!timeleft || signal_pending(current)) {
  1017. ath6kl_err("wmi is not ready or wait was interrupted\n");
  1018. status = -EIO;
  1019. goto err_htc_stop;
  1020. }
  1021. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1022. /* communicate the wmi protocol verision to the target */
  1023. if ((ath6kl_set_host_app_area(ar)) != 0)
  1024. ath6kl_err("unable to set the host app area\n");
  1025. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  1026. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  1027. status = ath6kl_target_config_wlan_params(ar);
  1028. if (!status)
  1029. goto ath6kl_init_done;
  1030. err_htc_stop:
  1031. ath6kl_htc_stop(ar->htc_target);
  1032. err_rxbuf_cleanup:
  1033. ath6kl_htc_flush_rx_buf(ar->htc_target);
  1034. ath6kl_cleanup_amsdu_rxbufs(ar);
  1035. err_cleanup_scatter:
  1036. ath6kl_hif_cleanup_scatter(ar);
  1037. err_node_cleanup:
  1038. wlan_node_table_cleanup(&ar->scan_table);
  1039. ath6kl_wmi_shutdown(ar->wmi);
  1040. clear_bit(WMI_ENABLED, &ar->flag);
  1041. ar->wmi = NULL;
  1042. ath6kl_init_done:
  1043. return status;
  1044. }
  1045. int ath6kl_core_init(struct ath6kl *ar)
  1046. {
  1047. int ret = 0;
  1048. struct ath6kl_bmi_target_info targ_info;
  1049. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1050. if (!ar->ath6kl_wq)
  1051. return -ENOMEM;
  1052. ret = ath6kl_bmi_init(ar);
  1053. if (ret)
  1054. goto err_wq;
  1055. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1056. if (ret)
  1057. goto err_bmi_cleanup;
  1058. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1059. ar->target_type = le32_to_cpu(targ_info.type);
  1060. ar->wdev->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1061. ret = ath6kl_configure_target(ar);
  1062. if (ret)
  1063. goto err_bmi_cleanup;
  1064. ar->htc_target = ath6kl_htc_create(ar);
  1065. if (!ar->htc_target) {
  1066. ret = -ENOMEM;
  1067. goto err_bmi_cleanup;
  1068. }
  1069. ar->aggr_cntxt = aggr_init(ar->net_dev);
  1070. if (!ar->aggr_cntxt) {
  1071. ath6kl_err("failed to initialize aggr\n");
  1072. ret = -ENOMEM;
  1073. goto err_htc_cleanup;
  1074. }
  1075. ret = ath6kl_init_upload(ar);
  1076. if (ret)
  1077. goto err_htc_cleanup;
  1078. ret = ath6kl_init(ar->net_dev);
  1079. if (ret)
  1080. goto err_htc_cleanup;
  1081. /* This runs the init function if registered */
  1082. ret = register_netdev(ar->net_dev);
  1083. if (ret) {
  1084. ath6kl_err("register_netdev failed\n");
  1085. ath6kl_destroy(ar->net_dev, 0);
  1086. return ret;
  1087. }
  1088. set_bit(NETDEV_REGISTERED, &ar->flag);
  1089. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1090. __func__, ar->net_dev->name, ar->net_dev, ar);
  1091. return ret;
  1092. err_htc_cleanup:
  1093. ath6kl_htc_cleanup(ar->htc_target);
  1094. err_bmi_cleanup:
  1095. ath6kl_bmi_cleanup(ar);
  1096. err_wq:
  1097. destroy_workqueue(ar->ath6kl_wq);
  1098. return ret;
  1099. }
  1100. void ath6kl_stop_txrx(struct ath6kl *ar)
  1101. {
  1102. struct net_device *ndev = ar->net_dev;
  1103. if (!ndev)
  1104. return;
  1105. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1106. if (down_interruptible(&ar->sem)) {
  1107. ath6kl_err("down_interruptible failed\n");
  1108. return;
  1109. }
  1110. if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR)
  1111. ath6kl_stop_endpoint(ndev, false, true);
  1112. clear_bit(WLAN_ENABLED, &ar->flag);
  1113. }
  1114. /*
  1115. * We need to differentiate between the surprise and planned removal of the
  1116. * device because of the following consideration:
  1117. *
  1118. * - In case of surprise removal, the hcd already frees up the pending
  1119. * for the device and hence there is no need to unregister the function
  1120. * driver inorder to get these requests. For planned removal, the function
  1121. * driver has to explicitly unregister itself to have the hcd return all the
  1122. * pending requests before the data structures for the devices are freed up.
  1123. * Note that as per the current implementation, the function driver will
  1124. * end up releasing all the devices since there is no API to selectively
  1125. * release a particular device.
  1126. *
  1127. * - Certain commands issued to the target can be skipped for surprise
  1128. * removal since they will anyway not go through.
  1129. */
  1130. void ath6kl_destroy(struct net_device *dev, unsigned int unregister)
  1131. {
  1132. struct ath6kl *ar;
  1133. if (!dev || !ath6kl_priv(dev)) {
  1134. ath6kl_err("failed to get device structure\n");
  1135. return;
  1136. }
  1137. ar = ath6kl_priv(dev);
  1138. destroy_workqueue(ar->ath6kl_wq);
  1139. if (ar->htc_target)
  1140. ath6kl_htc_cleanup(ar->htc_target);
  1141. aggr_module_destroy(ar->aggr_cntxt);
  1142. ath6kl_cookie_cleanup(ar);
  1143. ath6kl_cleanup_amsdu_rxbufs(ar);
  1144. ath6kl_bmi_cleanup(ar);
  1145. if (unregister && test_bit(NETDEV_REGISTERED, &ar->flag)) {
  1146. unregister_netdev(dev);
  1147. clear_bit(NETDEV_REGISTERED, &ar->flag);
  1148. }
  1149. free_netdev(dev);
  1150. wlan_node_table_cleanup(&ar->scan_table);
  1151. kfree(ar->fw_board);
  1152. kfree(ar->fw_otp);
  1153. kfree(ar->fw);
  1154. kfree(ar->fw_patch);
  1155. ath6kl_cfg80211_deinit(ar);
  1156. }