s5m8767.c 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832
  1. /*
  2. * s5m8767.c
  3. *
  4. * Copyright (c) 2011 Samsung Electronics Co., Ltd
  5. * http://www.samsung.com
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. *
  12. */
  13. #include <linux/bug.h>
  14. #include <linux/err.h>
  15. #include <linux/gpio.h>
  16. #include <linux/slab.h>
  17. #include <linux/module.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/regulator/driver.h>
  20. #include <linux/regulator/machine.h>
  21. #include <linux/mfd/samsung/core.h>
  22. #include <linux/mfd/samsung/s5m8767.h>
  23. struct s5m8767_info {
  24. struct device *dev;
  25. struct sec_pmic_dev *iodev;
  26. int num_regulators;
  27. struct regulator_dev **rdev;
  28. struct sec_opmode_data *opmode;
  29. int ramp_delay;
  30. bool buck2_ramp;
  31. bool buck3_ramp;
  32. bool buck4_ramp;
  33. bool buck2_gpiodvs;
  34. bool buck3_gpiodvs;
  35. bool buck4_gpiodvs;
  36. u8 buck2_vol[8];
  37. u8 buck3_vol[8];
  38. u8 buck4_vol[8];
  39. int buck_gpios[3];
  40. int buck_ds[3];
  41. int buck_gpioindex;
  42. };
  43. struct sec_voltage_desc {
  44. int max;
  45. int min;
  46. int step;
  47. };
  48. static const struct sec_voltage_desc buck_voltage_val1 = {
  49. .max = 2225000,
  50. .min = 650000,
  51. .step = 6250,
  52. };
  53. static const struct sec_voltage_desc buck_voltage_val2 = {
  54. .max = 1600000,
  55. .min = 600000,
  56. .step = 6250,
  57. };
  58. static const struct sec_voltage_desc buck_voltage_val3 = {
  59. .max = 3000000,
  60. .min = 750000,
  61. .step = 12500,
  62. };
  63. static const struct sec_voltage_desc ldo_voltage_val1 = {
  64. .max = 3950000,
  65. .min = 800000,
  66. .step = 50000,
  67. };
  68. static const struct sec_voltage_desc ldo_voltage_val2 = {
  69. .max = 2375000,
  70. .min = 800000,
  71. .step = 25000,
  72. };
  73. static const struct sec_voltage_desc *reg_voltage_map[] = {
  74. [S5M8767_LDO1] = &ldo_voltage_val2,
  75. [S5M8767_LDO2] = &ldo_voltage_val2,
  76. [S5M8767_LDO3] = &ldo_voltage_val1,
  77. [S5M8767_LDO4] = &ldo_voltage_val1,
  78. [S5M8767_LDO5] = &ldo_voltage_val1,
  79. [S5M8767_LDO6] = &ldo_voltage_val2,
  80. [S5M8767_LDO7] = &ldo_voltage_val2,
  81. [S5M8767_LDO8] = &ldo_voltage_val2,
  82. [S5M8767_LDO9] = &ldo_voltage_val1,
  83. [S5M8767_LDO10] = &ldo_voltage_val1,
  84. [S5M8767_LDO11] = &ldo_voltage_val1,
  85. [S5M8767_LDO12] = &ldo_voltage_val1,
  86. [S5M8767_LDO13] = &ldo_voltage_val1,
  87. [S5M8767_LDO14] = &ldo_voltage_val1,
  88. [S5M8767_LDO15] = &ldo_voltage_val2,
  89. [S5M8767_LDO16] = &ldo_voltage_val1,
  90. [S5M8767_LDO17] = &ldo_voltage_val1,
  91. [S5M8767_LDO18] = &ldo_voltage_val1,
  92. [S5M8767_LDO19] = &ldo_voltage_val1,
  93. [S5M8767_LDO20] = &ldo_voltage_val1,
  94. [S5M8767_LDO21] = &ldo_voltage_val1,
  95. [S5M8767_LDO22] = &ldo_voltage_val1,
  96. [S5M8767_LDO23] = &ldo_voltage_val1,
  97. [S5M8767_LDO24] = &ldo_voltage_val1,
  98. [S5M8767_LDO25] = &ldo_voltage_val1,
  99. [S5M8767_LDO26] = &ldo_voltage_val1,
  100. [S5M8767_LDO27] = &ldo_voltage_val1,
  101. [S5M8767_LDO28] = &ldo_voltage_val1,
  102. [S5M8767_BUCK1] = &buck_voltage_val1,
  103. [S5M8767_BUCK2] = &buck_voltage_val2,
  104. [S5M8767_BUCK3] = &buck_voltage_val2,
  105. [S5M8767_BUCK4] = &buck_voltage_val2,
  106. [S5M8767_BUCK5] = &buck_voltage_val1,
  107. [S5M8767_BUCK6] = &buck_voltage_val1,
  108. [S5M8767_BUCK7] = NULL,
  109. [S5M8767_BUCK8] = NULL,
  110. [S5M8767_BUCK9] = &buck_voltage_val3,
  111. };
  112. static unsigned int s5m8767_opmode_reg[][4] = {
  113. /* {OFF, ON, LOWPOWER, SUSPEND} */
  114. /* LDO1 ... LDO28 */
  115. {0x0, 0x3, 0x2, 0x1}, /* LDO1 */
  116. {0x0, 0x3, 0x2, 0x1},
  117. {0x0, 0x3, 0x2, 0x1},
  118. {0x0, 0x0, 0x0, 0x0},
  119. {0x0, 0x3, 0x2, 0x1}, /* LDO5 */
  120. {0x0, 0x3, 0x2, 0x1},
  121. {0x0, 0x3, 0x2, 0x1},
  122. {0x0, 0x3, 0x2, 0x1},
  123. {0x0, 0x3, 0x2, 0x1},
  124. {0x0, 0x3, 0x2, 0x1}, /* LDO10 */
  125. {0x0, 0x3, 0x2, 0x1},
  126. {0x0, 0x3, 0x2, 0x1},
  127. {0x0, 0x3, 0x2, 0x1},
  128. {0x0, 0x3, 0x2, 0x1},
  129. {0x0, 0x3, 0x2, 0x1}, /* LDO15 */
  130. {0x0, 0x3, 0x2, 0x1},
  131. {0x0, 0x3, 0x2, 0x1},
  132. {0x0, 0x0, 0x0, 0x0},
  133. {0x0, 0x3, 0x2, 0x1},
  134. {0x0, 0x3, 0x2, 0x1}, /* LDO20 */
  135. {0x0, 0x3, 0x2, 0x1},
  136. {0x0, 0x3, 0x2, 0x1},
  137. {0x0, 0x0, 0x0, 0x0},
  138. {0x0, 0x3, 0x2, 0x1},
  139. {0x0, 0x3, 0x2, 0x1}, /* LDO25 */
  140. {0x0, 0x3, 0x2, 0x1},
  141. {0x0, 0x3, 0x2, 0x1},
  142. {0x0, 0x3, 0x2, 0x1}, /* LDO28 */
  143. /* BUCK1 ... BUCK9 */
  144. {0x0, 0x3, 0x1, 0x1}, /* BUCK1 */
  145. {0x0, 0x3, 0x1, 0x1},
  146. {0x0, 0x3, 0x1, 0x1},
  147. {0x0, 0x3, 0x1, 0x1},
  148. {0x0, 0x3, 0x2, 0x1}, /* BUCK5 */
  149. {0x0, 0x3, 0x1, 0x1},
  150. {0x0, 0x3, 0x1, 0x1},
  151. {0x0, 0x3, 0x1, 0x1},
  152. {0x0, 0x3, 0x1, 0x1}, /* BUCK9 */
  153. };
  154. static int s5m8767_get_register(struct regulator_dev *rdev, int *reg,
  155. int *enable_ctrl)
  156. {
  157. int i, reg_id = rdev_get_id(rdev);
  158. unsigned int mode;
  159. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  160. switch (reg_id) {
  161. case S5M8767_LDO1 ... S5M8767_LDO2:
  162. *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
  163. break;
  164. case S5M8767_LDO3 ... S5M8767_LDO28:
  165. *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
  166. break;
  167. case S5M8767_BUCK1:
  168. *reg = S5M8767_REG_BUCK1CTRL1;
  169. break;
  170. case S5M8767_BUCK2 ... S5M8767_BUCK4:
  171. *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9;
  172. break;
  173. case S5M8767_BUCK5:
  174. *reg = S5M8767_REG_BUCK5CTRL1;
  175. break;
  176. case S5M8767_BUCK6 ... S5M8767_BUCK9:
  177. *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2;
  178. break;
  179. default:
  180. return -EINVAL;
  181. }
  182. for (i = 0; i < s5m8767->num_regulators; i++) {
  183. if (s5m8767->opmode[i].id == reg_id) {
  184. mode = s5m8767->opmode[i].mode;
  185. break;
  186. }
  187. }
  188. if (i < s5m8767->num_regulators)
  189. *enable_ctrl =
  190. s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT;
  191. return 0;
  192. }
  193. static int s5m8767_reg_is_enabled(struct regulator_dev *rdev)
  194. {
  195. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  196. int ret, reg;
  197. int mask = 0xc0, enable_ctrl;
  198. u8 val;
  199. ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
  200. if (ret == -EINVAL)
  201. return 1;
  202. else if (ret)
  203. return ret;
  204. ret = sec_reg_read(s5m8767->iodev, reg, &val);
  205. if (ret)
  206. return ret;
  207. return (val & mask) == enable_ctrl;
  208. }
  209. static int s5m8767_reg_enable(struct regulator_dev *rdev)
  210. {
  211. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  212. int ret, reg;
  213. int mask = 0xc0, enable_ctrl;
  214. ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
  215. if (ret)
  216. return ret;
  217. return sec_reg_update(s5m8767->iodev, reg, enable_ctrl, mask);
  218. }
  219. static int s5m8767_reg_disable(struct regulator_dev *rdev)
  220. {
  221. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  222. int ret, reg;
  223. int mask = 0xc0, enable_ctrl;
  224. ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
  225. if (ret)
  226. return ret;
  227. return sec_reg_update(s5m8767->iodev, reg, ~mask, mask);
  228. }
  229. static int s5m8767_get_voltage_register(struct regulator_dev *rdev, int *_reg)
  230. {
  231. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  232. int reg_id = rdev_get_id(rdev);
  233. int reg;
  234. switch (reg_id) {
  235. case S5M8767_LDO1 ... S5M8767_LDO2:
  236. reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
  237. break;
  238. case S5M8767_LDO3 ... S5M8767_LDO28:
  239. reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
  240. break;
  241. case S5M8767_BUCK1:
  242. reg = S5M8767_REG_BUCK1CTRL2;
  243. break;
  244. case S5M8767_BUCK2:
  245. reg = S5M8767_REG_BUCK2DVS1;
  246. if (s5m8767->buck2_gpiodvs)
  247. reg += s5m8767->buck_gpioindex;
  248. break;
  249. case S5M8767_BUCK3:
  250. reg = S5M8767_REG_BUCK3DVS1;
  251. if (s5m8767->buck3_gpiodvs)
  252. reg += s5m8767->buck_gpioindex;
  253. break;
  254. case S5M8767_BUCK4:
  255. reg = S5M8767_REG_BUCK4DVS1;
  256. if (s5m8767->buck4_gpiodvs)
  257. reg += s5m8767->buck_gpioindex;
  258. break;
  259. case S5M8767_BUCK5:
  260. reg = S5M8767_REG_BUCK5CTRL2;
  261. break;
  262. case S5M8767_BUCK6 ... S5M8767_BUCK9:
  263. reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2;
  264. break;
  265. default:
  266. return -EINVAL;
  267. }
  268. *_reg = reg;
  269. return 0;
  270. }
  271. static int s5m8767_get_voltage_sel(struct regulator_dev *rdev)
  272. {
  273. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  274. int reg, mask, ret;
  275. int reg_id = rdev_get_id(rdev);
  276. u8 val;
  277. ret = s5m8767_get_voltage_register(rdev, &reg);
  278. if (ret)
  279. return ret;
  280. mask = (reg_id < S5M8767_BUCK1) ? 0x3f : 0xff;
  281. ret = sec_reg_read(s5m8767->iodev, reg, &val);
  282. if (ret)
  283. return ret;
  284. val &= mask;
  285. return val;
  286. }
  287. static int s5m8767_convert_voltage_to_sel(
  288. const struct sec_voltage_desc *desc,
  289. int min_vol, int max_vol)
  290. {
  291. int selector = 0;
  292. if (desc == NULL)
  293. return -EINVAL;
  294. if (max_vol < desc->min || min_vol > desc->max)
  295. return -EINVAL;
  296. if (min_vol < desc->min)
  297. min_vol = desc->min;
  298. selector = DIV_ROUND_UP(min_vol - desc->min, desc->step);
  299. if (desc->min + desc->step * selector > max_vol)
  300. return -EINVAL;
  301. return selector;
  302. }
  303. static inline int s5m8767_set_high(struct s5m8767_info *s5m8767)
  304. {
  305. int temp_index = s5m8767->buck_gpioindex;
  306. gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
  307. gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
  308. gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
  309. return 0;
  310. }
  311. static inline int s5m8767_set_low(struct s5m8767_info *s5m8767)
  312. {
  313. int temp_index = s5m8767->buck_gpioindex;
  314. gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
  315. gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
  316. gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
  317. return 0;
  318. }
  319. static int s5m8767_set_voltage_sel(struct regulator_dev *rdev,
  320. unsigned selector)
  321. {
  322. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  323. int reg_id = rdev_get_id(rdev);
  324. int reg, mask, ret = 0, old_index, index = 0;
  325. u8 *buck234_vol = NULL;
  326. switch (reg_id) {
  327. case S5M8767_LDO1 ... S5M8767_LDO28:
  328. mask = 0x3f;
  329. break;
  330. case S5M8767_BUCK1 ... S5M8767_BUCK6:
  331. mask = 0xff;
  332. if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs)
  333. buck234_vol = &s5m8767->buck2_vol[0];
  334. else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs)
  335. buck234_vol = &s5m8767->buck3_vol[0];
  336. else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs)
  337. buck234_vol = &s5m8767->buck4_vol[0];
  338. break;
  339. case S5M8767_BUCK7 ... S5M8767_BUCK8:
  340. return -EINVAL;
  341. case S5M8767_BUCK9:
  342. mask = 0xff;
  343. break;
  344. default:
  345. return -EINVAL;
  346. }
  347. /* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */
  348. if (buck234_vol) {
  349. while (*buck234_vol != selector) {
  350. buck234_vol++;
  351. index++;
  352. }
  353. old_index = s5m8767->buck_gpioindex;
  354. s5m8767->buck_gpioindex = index;
  355. if (index > old_index)
  356. return s5m8767_set_high(s5m8767);
  357. else
  358. return s5m8767_set_low(s5m8767);
  359. } else {
  360. ret = s5m8767_get_voltage_register(rdev, &reg);
  361. if (ret)
  362. return ret;
  363. return sec_reg_update(s5m8767->iodev, reg, selector, mask);
  364. }
  365. }
  366. static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev,
  367. unsigned int old_sel,
  368. unsigned int new_sel)
  369. {
  370. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  371. const struct sec_voltage_desc *desc;
  372. int reg_id = rdev_get_id(rdev);
  373. desc = reg_voltage_map[reg_id];
  374. if ((old_sel < new_sel) && s5m8767->ramp_delay)
  375. return DIV_ROUND_UP(desc->step * (new_sel - old_sel),
  376. s5m8767->ramp_delay * 1000);
  377. return 0;
  378. }
  379. static struct regulator_ops s5m8767_ops = {
  380. .list_voltage = regulator_list_voltage_linear,
  381. .is_enabled = s5m8767_reg_is_enabled,
  382. .enable = s5m8767_reg_enable,
  383. .disable = s5m8767_reg_disable,
  384. .get_voltage_sel = s5m8767_get_voltage_sel,
  385. .set_voltage_sel = s5m8767_set_voltage_sel,
  386. .set_voltage_time_sel = s5m8767_set_voltage_time_sel,
  387. };
  388. static struct regulator_ops s5m8767_buck78_ops = {
  389. .is_enabled = s5m8767_reg_is_enabled,
  390. .enable = s5m8767_reg_enable,
  391. .disable = s5m8767_reg_disable,
  392. };
  393. #define s5m8767_regulator_desc(_name) { \
  394. .name = #_name, \
  395. .id = S5M8767_##_name, \
  396. .ops = &s5m8767_ops, \
  397. .type = REGULATOR_VOLTAGE, \
  398. .owner = THIS_MODULE, \
  399. }
  400. #define s5m8767_regulator_buck78_desc(_name) { \
  401. .name = #_name, \
  402. .id = S5M8767_##_name, \
  403. .ops = &s5m8767_buck78_ops, \
  404. .type = REGULATOR_VOLTAGE, \
  405. .owner = THIS_MODULE, \
  406. }
  407. static struct regulator_desc regulators[] = {
  408. s5m8767_regulator_desc(LDO1),
  409. s5m8767_regulator_desc(LDO2),
  410. s5m8767_regulator_desc(LDO3),
  411. s5m8767_regulator_desc(LDO4),
  412. s5m8767_regulator_desc(LDO5),
  413. s5m8767_regulator_desc(LDO6),
  414. s5m8767_regulator_desc(LDO7),
  415. s5m8767_regulator_desc(LDO8),
  416. s5m8767_regulator_desc(LDO9),
  417. s5m8767_regulator_desc(LDO10),
  418. s5m8767_regulator_desc(LDO11),
  419. s5m8767_regulator_desc(LDO12),
  420. s5m8767_regulator_desc(LDO13),
  421. s5m8767_regulator_desc(LDO14),
  422. s5m8767_regulator_desc(LDO15),
  423. s5m8767_regulator_desc(LDO16),
  424. s5m8767_regulator_desc(LDO17),
  425. s5m8767_regulator_desc(LDO18),
  426. s5m8767_regulator_desc(LDO19),
  427. s5m8767_regulator_desc(LDO20),
  428. s5m8767_regulator_desc(LDO21),
  429. s5m8767_regulator_desc(LDO22),
  430. s5m8767_regulator_desc(LDO23),
  431. s5m8767_regulator_desc(LDO24),
  432. s5m8767_regulator_desc(LDO25),
  433. s5m8767_regulator_desc(LDO26),
  434. s5m8767_regulator_desc(LDO27),
  435. s5m8767_regulator_desc(LDO28),
  436. s5m8767_regulator_desc(BUCK1),
  437. s5m8767_regulator_desc(BUCK2),
  438. s5m8767_regulator_desc(BUCK3),
  439. s5m8767_regulator_desc(BUCK4),
  440. s5m8767_regulator_desc(BUCK5),
  441. s5m8767_regulator_desc(BUCK6),
  442. s5m8767_regulator_buck78_desc(BUCK7),
  443. s5m8767_regulator_buck78_desc(BUCK8),
  444. s5m8767_regulator_desc(BUCK9),
  445. };
  446. static int s5m8767_pmic_probe(struct platform_device *pdev)
  447. {
  448. struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  449. struct sec_platform_data *pdata = dev_get_platdata(iodev->dev);
  450. struct regulator_config config = { };
  451. struct regulator_dev **rdev;
  452. struct s5m8767_info *s5m8767;
  453. int i, ret, size, buck_init;
  454. if (!pdata) {
  455. dev_err(pdev->dev.parent, "Platform data not supplied\n");
  456. return -ENODEV;
  457. }
  458. if (pdata->buck2_gpiodvs) {
  459. if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) {
  460. dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
  461. return -EINVAL;
  462. }
  463. }
  464. if (pdata->buck3_gpiodvs) {
  465. if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) {
  466. dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
  467. return -EINVAL;
  468. }
  469. }
  470. if (pdata->buck4_gpiodvs) {
  471. if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) {
  472. dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
  473. return -EINVAL;
  474. }
  475. }
  476. s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info),
  477. GFP_KERNEL);
  478. if (!s5m8767)
  479. return -ENOMEM;
  480. size = sizeof(struct regulator_dev *) * (S5M8767_REG_MAX - 2);
  481. s5m8767->rdev = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
  482. if (!s5m8767->rdev)
  483. return -ENOMEM;
  484. rdev = s5m8767->rdev;
  485. s5m8767->dev = &pdev->dev;
  486. s5m8767->iodev = iodev;
  487. s5m8767->num_regulators = pdata->num_regulators;
  488. platform_set_drvdata(pdev, s5m8767);
  489. s5m8767->buck_gpioindex = pdata->buck_default_idx;
  490. s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs;
  491. s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs;
  492. s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs;
  493. s5m8767->buck_gpios[0] = pdata->buck_gpios[0];
  494. s5m8767->buck_gpios[1] = pdata->buck_gpios[1];
  495. s5m8767->buck_gpios[2] = pdata->buck_gpios[2];
  496. s5m8767->buck_ds[0] = pdata->buck_ds[0];
  497. s5m8767->buck_ds[1] = pdata->buck_ds[1];
  498. s5m8767->buck_ds[2] = pdata->buck_ds[2];
  499. s5m8767->ramp_delay = pdata->buck_ramp_delay;
  500. s5m8767->buck2_ramp = pdata->buck2_ramp_enable;
  501. s5m8767->buck3_ramp = pdata->buck3_ramp_enable;
  502. s5m8767->buck4_ramp = pdata->buck4_ramp_enable;
  503. s5m8767->opmode = pdata->opmode;
  504. buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
  505. pdata->buck2_init,
  506. pdata->buck2_init +
  507. buck_voltage_val2.step);
  508. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS2, buck_init);
  509. buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
  510. pdata->buck3_init,
  511. pdata->buck3_init +
  512. buck_voltage_val2.step);
  513. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS2, buck_init);
  514. buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
  515. pdata->buck4_init,
  516. pdata->buck4_init +
  517. buck_voltage_val2.step);
  518. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS2, buck_init);
  519. for (i = 0; i < 8; i++) {
  520. if (s5m8767->buck2_gpiodvs) {
  521. s5m8767->buck2_vol[i] =
  522. s5m8767_convert_voltage_to_sel(
  523. &buck_voltage_val2,
  524. pdata->buck2_voltage[i],
  525. pdata->buck2_voltage[i] +
  526. buck_voltage_val2.step);
  527. }
  528. if (s5m8767->buck3_gpiodvs) {
  529. s5m8767->buck3_vol[i] =
  530. s5m8767_convert_voltage_to_sel(
  531. &buck_voltage_val2,
  532. pdata->buck3_voltage[i],
  533. pdata->buck3_voltage[i] +
  534. buck_voltage_val2.step);
  535. }
  536. if (s5m8767->buck4_gpiodvs) {
  537. s5m8767->buck4_vol[i] =
  538. s5m8767_convert_voltage_to_sel(
  539. &buck_voltage_val2,
  540. pdata->buck4_voltage[i],
  541. pdata->buck4_voltage[i] +
  542. buck_voltage_val2.step);
  543. }
  544. }
  545. if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
  546. pdata->buck4_gpiodvs) {
  547. if (!gpio_is_valid(pdata->buck_gpios[0]) ||
  548. !gpio_is_valid(pdata->buck_gpios[1]) ||
  549. !gpio_is_valid(pdata->buck_gpios[2])) {
  550. dev_err(&pdev->dev, "GPIO NOT VALID\n");
  551. return -EINVAL;
  552. }
  553. ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[0],
  554. "S5M8767 SET1");
  555. if (ret)
  556. return ret;
  557. ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[1],
  558. "S5M8767 SET2");
  559. if (ret)
  560. return ret;
  561. ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[2],
  562. "S5M8767 SET3");
  563. if (ret)
  564. return ret;
  565. /* SET1 GPIO */
  566. gpio_direction_output(pdata->buck_gpios[0],
  567. (s5m8767->buck_gpioindex >> 2) & 0x1);
  568. /* SET2 GPIO */
  569. gpio_direction_output(pdata->buck_gpios[1],
  570. (s5m8767->buck_gpioindex >> 1) & 0x1);
  571. /* SET3 GPIO */
  572. gpio_direction_output(pdata->buck_gpios[2],
  573. (s5m8767->buck_gpioindex >> 0) & 0x1);
  574. }
  575. ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[0], "S5M8767 DS2");
  576. if (ret)
  577. return ret;
  578. ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[1], "S5M8767 DS3");
  579. if (ret)
  580. return ret;
  581. ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[2], "S5M8767 DS4");
  582. if (ret)
  583. return ret;
  584. /* DS2 GPIO */
  585. gpio_direction_output(pdata->buck_ds[0], 0x0);
  586. /* DS3 GPIO */
  587. gpio_direction_output(pdata->buck_ds[1], 0x0);
  588. /* DS4 GPIO */
  589. gpio_direction_output(pdata->buck_ds[2], 0x0);
  590. if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
  591. pdata->buck4_gpiodvs) {
  592. sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL,
  593. (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1),
  594. 1 << 1);
  595. sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL,
  596. (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1),
  597. 1 << 1);
  598. sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL,
  599. (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1),
  600. 1 << 1);
  601. }
  602. /* Initialize GPIO DVS registers */
  603. for (i = 0; i < 8; i++) {
  604. if (s5m8767->buck2_gpiodvs) {
  605. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS1 + i,
  606. s5m8767->buck2_vol[i]);
  607. }
  608. if (s5m8767->buck3_gpiodvs) {
  609. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS1 + i,
  610. s5m8767->buck3_vol[i]);
  611. }
  612. if (s5m8767->buck4_gpiodvs) {
  613. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS1 + i,
  614. s5m8767->buck4_vol[i]);
  615. }
  616. }
  617. if (s5m8767->buck2_ramp)
  618. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x08, 0x08);
  619. if (s5m8767->buck3_ramp)
  620. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x04, 0x04);
  621. if (s5m8767->buck4_ramp)
  622. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x02, 0x02);
  623. if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
  624. || s5m8767->buck4_ramp) {
  625. switch (s5m8767->ramp_delay) {
  626. case 5:
  627. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  628. 0x40, 0xf0);
  629. break;
  630. case 10:
  631. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  632. 0x90, 0xf0);
  633. break;
  634. case 25:
  635. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  636. 0xd0, 0xf0);
  637. break;
  638. case 50:
  639. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  640. 0xe0, 0xf0);
  641. break;
  642. case 100:
  643. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  644. 0xf0, 0xf0);
  645. break;
  646. default:
  647. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  648. 0x90, 0xf0);
  649. }
  650. }
  651. for (i = 0; i < pdata->num_regulators; i++) {
  652. const struct sec_voltage_desc *desc;
  653. int id = pdata->regulators[i].id;
  654. desc = reg_voltage_map[id];
  655. if (desc) {
  656. regulators[id].n_voltages =
  657. (desc->max - desc->min) / desc->step + 1;
  658. regulators[id].min_uV = desc->min;
  659. regulators[id].uV_step = desc->step;
  660. }
  661. config.dev = s5m8767->dev;
  662. config.init_data = pdata->regulators[i].initdata;
  663. config.driver_data = s5m8767;
  664. rdev[i] = regulator_register(&regulators[id], &config);
  665. if (IS_ERR(rdev[i])) {
  666. ret = PTR_ERR(rdev[i]);
  667. dev_err(s5m8767->dev, "regulator init failed for %d\n",
  668. id);
  669. rdev[i] = NULL;
  670. goto err;
  671. }
  672. }
  673. return 0;
  674. err:
  675. for (i = 0; i < s5m8767->num_regulators; i++)
  676. if (rdev[i])
  677. regulator_unregister(rdev[i]);
  678. return ret;
  679. }
  680. static int s5m8767_pmic_remove(struct platform_device *pdev)
  681. {
  682. struct s5m8767_info *s5m8767 = platform_get_drvdata(pdev);
  683. struct regulator_dev **rdev = s5m8767->rdev;
  684. int i;
  685. for (i = 0; i < s5m8767->num_regulators; i++)
  686. if (rdev[i])
  687. regulator_unregister(rdev[i]);
  688. return 0;
  689. }
  690. static const struct platform_device_id s5m8767_pmic_id[] = {
  691. { "s5m8767-pmic", 0},
  692. { },
  693. };
  694. MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id);
  695. static struct platform_driver s5m8767_pmic_driver = {
  696. .driver = {
  697. .name = "s5m8767-pmic",
  698. .owner = THIS_MODULE,
  699. },
  700. .probe = s5m8767_pmic_probe,
  701. .remove = s5m8767_pmic_remove,
  702. .id_table = s5m8767_pmic_id,
  703. };
  704. static int __init s5m8767_pmic_init(void)
  705. {
  706. return platform_driver_register(&s5m8767_pmic_driver);
  707. }
  708. subsys_initcall(s5m8767_pmic_init);
  709. static void __exit s5m8767_pmic_exit(void)
  710. {
  711. platform_driver_unregister(&s5m8767_pmic_driver);
  712. }
  713. module_exit(s5m8767_pmic_exit);
  714. /* Module information */
  715. MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
  716. MODULE_DESCRIPTION("SAMSUNG S5M8767 Regulator Driver");
  717. MODULE_LICENSE("GPL");