fimc-lite.c 41 KB

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  1. /*
  2. * Samsung EXYNOS FIMC-LITE (camera host interface) driver
  3. *
  4. * Copyright (C) 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
  12. #include <linux/bug.h>
  13. #include <linux/device.h>
  14. #include <linux/errno.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel.h>
  17. #include <linux/list.h>
  18. #include <linux/module.h>
  19. #include <linux/types.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/pm_runtime.h>
  22. #include <linux/slab.h>
  23. #include <linux/videodev2.h>
  24. #include <media/v4l2-device.h>
  25. #include <media/v4l2-ioctl.h>
  26. #include <media/v4l2-mem2mem.h>
  27. #include <media/videobuf2-core.h>
  28. #include <media/videobuf2-dma-contig.h>
  29. #include <media/s5p_fimc.h>
  30. #include "fimc-mdevice.h"
  31. #include "fimc-core.h"
  32. #include "fimc-lite.h"
  33. #include "fimc-lite-reg.h"
  34. static int debug;
  35. module_param(debug, int, 0644);
  36. static const struct fimc_fmt fimc_lite_formats[] = {
  37. {
  38. .name = "YUV 4:2:2 packed, YCbYCr",
  39. .fourcc = V4L2_PIX_FMT_YUYV,
  40. .depth = { 16 },
  41. .color = FIMC_FMT_YCBYCR422,
  42. .memplanes = 1,
  43. .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
  44. }, {
  45. .name = "YUV 4:2:2 packed, CbYCrY",
  46. .fourcc = V4L2_PIX_FMT_UYVY,
  47. .depth = { 16 },
  48. .color = FIMC_FMT_CBYCRY422,
  49. .memplanes = 1,
  50. .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
  51. }, {
  52. .name = "YUV 4:2:2 packed, CrYCbY",
  53. .fourcc = V4L2_PIX_FMT_VYUY,
  54. .depth = { 16 },
  55. .color = FIMC_FMT_CRYCBY422,
  56. .memplanes = 1,
  57. .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8,
  58. }, {
  59. .name = "YUV 4:2:2 packed, YCrYCb",
  60. .fourcc = V4L2_PIX_FMT_YVYU,
  61. .depth = { 16 },
  62. .color = FIMC_FMT_YCRYCB422,
  63. .memplanes = 1,
  64. .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8,
  65. }, {
  66. .name = "RAW8 (GRBG)",
  67. .fourcc = V4L2_PIX_FMT_SGRBG8,
  68. .depth = { 8 },
  69. .color = FIMC_FMT_RAW8,
  70. .memplanes = 1,
  71. .mbus_code = V4L2_MBUS_FMT_SGRBG8_1X8,
  72. }, {
  73. .name = "RAW10 (GRBG)",
  74. .fourcc = V4L2_PIX_FMT_SGRBG10,
  75. .depth = { 10 },
  76. .color = FIMC_FMT_RAW10,
  77. .memplanes = 1,
  78. .mbus_code = V4L2_MBUS_FMT_SGRBG10_1X10,
  79. }, {
  80. .name = "RAW12 (GRBG)",
  81. .fourcc = V4L2_PIX_FMT_SGRBG12,
  82. .depth = { 12 },
  83. .color = FIMC_FMT_RAW12,
  84. .memplanes = 1,
  85. .mbus_code = V4L2_MBUS_FMT_SGRBG12_1X12,
  86. },
  87. };
  88. /**
  89. * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
  90. * @pixelformat: fourcc to match, ignored if null
  91. * @mbus_code: media bus code to match, ignored if null
  92. * @index: index to the fimc_lite_formats array, ignored if negative
  93. */
  94. static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
  95. const u32 *mbus_code, int index)
  96. {
  97. const struct fimc_fmt *fmt, *def_fmt = NULL;
  98. unsigned int i;
  99. int id = 0;
  100. if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
  101. return NULL;
  102. for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
  103. fmt = &fimc_lite_formats[i];
  104. if (pixelformat && fmt->fourcc == *pixelformat)
  105. return fmt;
  106. if (mbus_code && fmt->mbus_code == *mbus_code)
  107. return fmt;
  108. if (index == id)
  109. def_fmt = fmt;
  110. id++;
  111. }
  112. return def_fmt;
  113. }
  114. static int fimc_lite_hw_init(struct fimc_lite *fimc)
  115. {
  116. struct fimc_pipeline *pipeline = &fimc->pipeline;
  117. struct fimc_sensor_info *sensor;
  118. unsigned long flags;
  119. if (pipeline->subdevs[IDX_SENSOR] == NULL)
  120. return -ENXIO;
  121. if (fimc->fmt == NULL)
  122. return -EINVAL;
  123. sensor = v4l2_get_subdev_hostdata(pipeline->subdevs[IDX_SENSOR]);
  124. spin_lock_irqsave(&fimc->slock, flags);
  125. flite_hw_set_camera_bus(fimc, &sensor->pdata);
  126. flite_hw_set_source_format(fimc, &fimc->inp_frame);
  127. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  128. flite_hw_set_output_dma(fimc, &fimc->out_frame, true);
  129. flite_hw_set_interrupt_mask(fimc);
  130. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  131. if (debug > 0)
  132. flite_hw_dump_regs(fimc, __func__);
  133. spin_unlock_irqrestore(&fimc->slock, flags);
  134. return 0;
  135. }
  136. /*
  137. * Reinitialize the driver so it is ready to start the streaming again.
  138. * Set fimc->state to indicate stream off and the hardware shut down state.
  139. * If not suspending (@suspend is false), return any buffers to videobuf2.
  140. * Otherwise put any owned buffers onto the pending buffers queue, so they
  141. * can be re-spun when the device is being resumed. Also perform FIMC
  142. * software reset and disable streaming on the whole pipeline if required.
  143. */
  144. static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
  145. {
  146. struct flite_buffer *buf;
  147. unsigned long flags;
  148. bool streaming;
  149. spin_lock_irqsave(&fimc->slock, flags);
  150. streaming = fimc->state & (1 << ST_SENSOR_STREAM);
  151. fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
  152. 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
  153. if (suspend)
  154. fimc->state |= (1 << ST_FLITE_SUSPENDED);
  155. else
  156. fimc->state &= ~(1 << ST_FLITE_PENDING |
  157. 1 << ST_FLITE_SUSPENDED);
  158. /* Release unused buffers */
  159. while (!suspend && !list_empty(&fimc->pending_buf_q)) {
  160. buf = fimc_lite_pending_queue_pop(fimc);
  161. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  162. }
  163. /* If suspending put unused buffers onto pending queue */
  164. while (!list_empty(&fimc->active_buf_q)) {
  165. buf = fimc_lite_active_queue_pop(fimc);
  166. if (suspend)
  167. fimc_lite_pending_queue_add(fimc, buf);
  168. else
  169. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  170. }
  171. spin_unlock_irqrestore(&fimc->slock, flags);
  172. flite_hw_reset(fimc);
  173. if (!streaming)
  174. return 0;
  175. return fimc_pipeline_call(fimc, set_stream, &fimc->pipeline, 0);
  176. }
  177. static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
  178. {
  179. unsigned long flags;
  180. if (!fimc_lite_active(fimc))
  181. return 0;
  182. spin_lock_irqsave(&fimc->slock, flags);
  183. set_bit(ST_FLITE_OFF, &fimc->state);
  184. flite_hw_capture_stop(fimc);
  185. spin_unlock_irqrestore(&fimc->slock, flags);
  186. wait_event_timeout(fimc->irq_queue,
  187. !test_bit(ST_FLITE_OFF, &fimc->state),
  188. (2*HZ/10)); /* 200 ms */
  189. return fimc_lite_reinit(fimc, suspend);
  190. }
  191. /* Must be called with fimc.slock spinlock held. */
  192. static void fimc_lite_config_update(struct fimc_lite *fimc)
  193. {
  194. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  195. flite_hw_set_dma_window(fimc, &fimc->out_frame);
  196. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  197. clear_bit(ST_FLITE_CONFIG, &fimc->state);
  198. }
  199. static irqreturn_t flite_irq_handler(int irq, void *priv)
  200. {
  201. struct fimc_lite *fimc = priv;
  202. struct flite_buffer *vbuf;
  203. unsigned long flags;
  204. struct timeval *tv;
  205. struct timespec ts;
  206. u32 intsrc;
  207. spin_lock_irqsave(&fimc->slock, flags);
  208. intsrc = flite_hw_get_interrupt_source(fimc);
  209. flite_hw_clear_pending_irq(fimc);
  210. if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
  211. wake_up(&fimc->irq_queue);
  212. goto done;
  213. }
  214. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
  215. clear_bit(ST_FLITE_RUN, &fimc->state);
  216. fimc->events.data_overflow++;
  217. }
  218. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
  219. flite_hw_clear_last_capture_end(fimc);
  220. clear_bit(ST_FLITE_STREAM, &fimc->state);
  221. wake_up(&fimc->irq_queue);
  222. }
  223. if (fimc->out_path != FIMC_IO_DMA)
  224. goto done;
  225. if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
  226. test_bit(ST_FLITE_RUN, &fimc->state) &&
  227. !list_empty(&fimc->active_buf_q) &&
  228. !list_empty(&fimc->pending_buf_q)) {
  229. vbuf = fimc_lite_active_queue_pop(fimc);
  230. ktime_get_ts(&ts);
  231. tv = &vbuf->vb.v4l2_buf.timestamp;
  232. tv->tv_sec = ts.tv_sec;
  233. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  234. vbuf->vb.v4l2_buf.sequence = fimc->frame_count++;
  235. vb2_buffer_done(&vbuf->vb, VB2_BUF_STATE_DONE);
  236. vbuf = fimc_lite_pending_queue_pop(fimc);
  237. flite_hw_set_output_addr(fimc, vbuf->paddr);
  238. fimc_lite_active_queue_add(fimc, vbuf);
  239. }
  240. if (test_bit(ST_FLITE_CONFIG, &fimc->state))
  241. fimc_lite_config_update(fimc);
  242. if (list_empty(&fimc->pending_buf_q)) {
  243. flite_hw_capture_stop(fimc);
  244. clear_bit(ST_FLITE_STREAM, &fimc->state);
  245. }
  246. done:
  247. set_bit(ST_FLITE_RUN, &fimc->state);
  248. spin_unlock_irqrestore(&fimc->slock, flags);
  249. return IRQ_HANDLED;
  250. }
  251. static int start_streaming(struct vb2_queue *q, unsigned int count)
  252. {
  253. struct fimc_lite *fimc = q->drv_priv;
  254. int ret;
  255. fimc->frame_count = 0;
  256. ret = fimc_lite_hw_init(fimc);
  257. if (ret) {
  258. fimc_lite_reinit(fimc, false);
  259. return ret;
  260. }
  261. set_bit(ST_FLITE_PENDING, &fimc->state);
  262. if (!list_empty(&fimc->active_buf_q) &&
  263. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  264. flite_hw_capture_start(fimc);
  265. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  266. fimc_pipeline_call(fimc, set_stream,
  267. &fimc->pipeline, 1);
  268. }
  269. if (debug > 0)
  270. flite_hw_dump_regs(fimc, __func__);
  271. return 0;
  272. }
  273. static int stop_streaming(struct vb2_queue *q)
  274. {
  275. struct fimc_lite *fimc = q->drv_priv;
  276. if (!fimc_lite_active(fimc))
  277. return -EINVAL;
  278. return fimc_lite_stop_capture(fimc, false);
  279. }
  280. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  281. unsigned int *num_buffers, unsigned int *num_planes,
  282. unsigned int sizes[], void *allocators[])
  283. {
  284. const struct v4l2_pix_format_mplane *pixm = NULL;
  285. struct fimc_lite *fimc = vq->drv_priv;
  286. struct flite_frame *frame = &fimc->out_frame;
  287. const struct fimc_fmt *fmt = fimc->fmt;
  288. unsigned long wh;
  289. int i;
  290. if (pfmt) {
  291. pixm = &pfmt->fmt.pix_mp;
  292. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, -1);
  293. wh = pixm->width * pixm->height;
  294. } else {
  295. wh = frame->f_width * frame->f_height;
  296. }
  297. if (fmt == NULL)
  298. return -EINVAL;
  299. *num_planes = fmt->memplanes;
  300. for (i = 0; i < fmt->memplanes; i++) {
  301. unsigned int size = (wh * fmt->depth[i]) / 8;
  302. if (pixm)
  303. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  304. else
  305. sizes[i] = size;
  306. allocators[i] = fimc->alloc_ctx;
  307. }
  308. return 0;
  309. }
  310. static int buffer_prepare(struct vb2_buffer *vb)
  311. {
  312. struct vb2_queue *vq = vb->vb2_queue;
  313. struct fimc_lite *fimc = vq->drv_priv;
  314. int i;
  315. if (fimc->fmt == NULL)
  316. return -EINVAL;
  317. for (i = 0; i < fimc->fmt->memplanes; i++) {
  318. unsigned long size = fimc->payload[i];
  319. if (vb2_plane_size(vb, i) < size) {
  320. v4l2_err(&fimc->vfd,
  321. "User buffer too small (%ld < %ld)\n",
  322. vb2_plane_size(vb, i), size);
  323. return -EINVAL;
  324. }
  325. vb2_set_plane_payload(vb, i, size);
  326. }
  327. return 0;
  328. }
  329. static void buffer_queue(struct vb2_buffer *vb)
  330. {
  331. struct flite_buffer *buf
  332. = container_of(vb, struct flite_buffer, vb);
  333. struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
  334. unsigned long flags;
  335. spin_lock_irqsave(&fimc->slock, flags);
  336. buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0);
  337. if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
  338. !test_bit(ST_FLITE_STREAM, &fimc->state) &&
  339. list_empty(&fimc->active_buf_q)) {
  340. flite_hw_set_output_addr(fimc, buf->paddr);
  341. fimc_lite_active_queue_add(fimc, buf);
  342. } else {
  343. fimc_lite_pending_queue_add(fimc, buf);
  344. }
  345. if (vb2_is_streaming(&fimc->vb_queue) &&
  346. !list_empty(&fimc->pending_buf_q) &&
  347. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  348. flite_hw_capture_start(fimc);
  349. spin_unlock_irqrestore(&fimc->slock, flags);
  350. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  351. fimc_pipeline_call(fimc, set_stream,
  352. &fimc->pipeline, 1);
  353. return;
  354. }
  355. spin_unlock_irqrestore(&fimc->slock, flags);
  356. }
  357. static void fimc_lock(struct vb2_queue *vq)
  358. {
  359. struct fimc_lite *fimc = vb2_get_drv_priv(vq);
  360. mutex_lock(&fimc->lock);
  361. }
  362. static void fimc_unlock(struct vb2_queue *vq)
  363. {
  364. struct fimc_lite *fimc = vb2_get_drv_priv(vq);
  365. mutex_unlock(&fimc->lock);
  366. }
  367. static const struct vb2_ops fimc_lite_qops = {
  368. .queue_setup = queue_setup,
  369. .buf_prepare = buffer_prepare,
  370. .buf_queue = buffer_queue,
  371. .wait_prepare = fimc_unlock,
  372. .wait_finish = fimc_lock,
  373. .start_streaming = start_streaming,
  374. .stop_streaming = stop_streaming,
  375. };
  376. static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
  377. {
  378. unsigned long flags;
  379. spin_lock_irqsave(&fimc->slock, flags);
  380. memset(&fimc->events, 0, sizeof(fimc->events));
  381. spin_unlock_irqrestore(&fimc->slock, flags);
  382. }
  383. static int fimc_lite_open(struct file *file)
  384. {
  385. struct fimc_lite *fimc = video_drvdata(file);
  386. int ret;
  387. if (mutex_lock_interruptible(&fimc->lock))
  388. return -ERESTARTSYS;
  389. set_bit(ST_FLITE_IN_USE, &fimc->state);
  390. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  391. if (ret < 0)
  392. goto done;
  393. ret = v4l2_fh_open(file);
  394. if (ret < 0)
  395. goto done;
  396. if (++fimc->ref_count == 1 && fimc->out_path == FIMC_IO_DMA) {
  397. ret = fimc_pipeline_call(fimc, open, &fimc->pipeline,
  398. &fimc->vfd.entity, true);
  399. if (ret < 0) {
  400. pm_runtime_put_sync(&fimc->pdev->dev);
  401. fimc->ref_count--;
  402. v4l2_fh_release(file);
  403. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  404. }
  405. fimc_lite_clear_event_counters(fimc);
  406. }
  407. done:
  408. mutex_unlock(&fimc->lock);
  409. return ret;
  410. }
  411. static int fimc_lite_close(struct file *file)
  412. {
  413. struct fimc_lite *fimc = video_drvdata(file);
  414. int ret;
  415. mutex_lock(&fimc->lock);
  416. if (--fimc->ref_count == 0 && fimc->out_path == FIMC_IO_DMA) {
  417. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  418. fimc_lite_stop_capture(fimc, false);
  419. fimc_pipeline_call(fimc, close, &fimc->pipeline);
  420. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  421. }
  422. pm_runtime_put(&fimc->pdev->dev);
  423. if (fimc->ref_count == 0)
  424. vb2_queue_release(&fimc->vb_queue);
  425. ret = v4l2_fh_release(file);
  426. mutex_unlock(&fimc->lock);
  427. return ret;
  428. }
  429. static unsigned int fimc_lite_poll(struct file *file,
  430. struct poll_table_struct *wait)
  431. {
  432. struct fimc_lite *fimc = video_drvdata(file);
  433. int ret;
  434. if (mutex_lock_interruptible(&fimc->lock))
  435. return POLL_ERR;
  436. ret = vb2_poll(&fimc->vb_queue, file, wait);
  437. mutex_unlock(&fimc->lock);
  438. return ret;
  439. }
  440. static int fimc_lite_mmap(struct file *file, struct vm_area_struct *vma)
  441. {
  442. struct fimc_lite *fimc = video_drvdata(file);
  443. int ret;
  444. if (mutex_lock_interruptible(&fimc->lock))
  445. return -ERESTARTSYS;
  446. ret = vb2_mmap(&fimc->vb_queue, vma);
  447. mutex_unlock(&fimc->lock);
  448. return ret;
  449. }
  450. static const struct v4l2_file_operations fimc_lite_fops = {
  451. .owner = THIS_MODULE,
  452. .open = fimc_lite_open,
  453. .release = fimc_lite_close,
  454. .poll = fimc_lite_poll,
  455. .unlocked_ioctl = video_ioctl2,
  456. .mmap = fimc_lite_mmap,
  457. };
  458. /*
  459. * Format and crop negotiation helpers
  460. */
  461. static const struct fimc_fmt *fimc_lite_try_format(struct fimc_lite *fimc,
  462. u32 *width, u32 *height,
  463. u32 *code, u32 *fourcc, int pad)
  464. {
  465. struct flite_variant *variant = fimc->variant;
  466. const struct fimc_fmt *fmt;
  467. fmt = fimc_lite_find_format(fourcc, code, 0);
  468. if (WARN_ON(!fmt))
  469. return NULL;
  470. if (code)
  471. *code = fmt->mbus_code;
  472. if (fourcc)
  473. *fourcc = fmt->fourcc;
  474. if (pad == FLITE_SD_PAD_SINK) {
  475. v4l_bound_align_image(width, 8, variant->max_width,
  476. ffs(variant->out_width_align) - 1,
  477. height, 0, variant->max_height, 0, 0);
  478. } else {
  479. v4l_bound_align_image(width, 8, fimc->inp_frame.rect.width,
  480. ffs(variant->out_width_align) - 1,
  481. height, 0, fimc->inp_frame.rect.height,
  482. 0, 0);
  483. }
  484. v4l2_dbg(1, debug, &fimc->subdev, "code: 0x%x, %dx%d\n",
  485. code ? *code : 0, *width, *height);
  486. return fmt;
  487. }
  488. static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
  489. {
  490. struct flite_frame *frame = &fimc->inp_frame;
  491. v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
  492. &r->height, 0, frame->f_height, 0, 0);
  493. /* Adjust left/top if cropping rectangle got out of bounds */
  494. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  495. r->left = round_down(r->left, fimc->variant->win_hor_offs_align);
  496. r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height);
  497. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d",
  498. r->left, r->top, r->width, r->height,
  499. frame->f_width, frame->f_height);
  500. }
  501. static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
  502. {
  503. struct flite_frame *frame = &fimc->out_frame;
  504. struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
  505. /* Scaling is not supported so we enforce compose rectangle size
  506. same as size of the sink crop rectangle. */
  507. r->width = crop_rect->width;
  508. r->height = crop_rect->height;
  509. /* Adjust left/top if the composing rectangle got out of bounds */
  510. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  511. r->left = round_down(r->left, fimc->variant->out_hor_offs_align);
  512. r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
  513. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d",
  514. r->left, r->top, r->width, r->height,
  515. frame->f_width, frame->f_height);
  516. }
  517. /*
  518. * Video node ioctl operations
  519. */
  520. static int fimc_vidioc_querycap_capture(struct file *file, void *priv,
  521. struct v4l2_capability *cap)
  522. {
  523. strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
  524. cap->bus_info[0] = 0;
  525. cap->card[0] = 0;
  526. cap->capabilities = V4L2_CAP_STREAMING;
  527. return 0;
  528. }
  529. static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv,
  530. struct v4l2_fmtdesc *f)
  531. {
  532. const struct fimc_fmt *fmt;
  533. if (f->index >= ARRAY_SIZE(fimc_lite_formats))
  534. return -EINVAL;
  535. fmt = &fimc_lite_formats[f->index];
  536. strlcpy(f->description, fmt->name, sizeof(f->description));
  537. f->pixelformat = fmt->fourcc;
  538. return 0;
  539. }
  540. static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
  541. struct v4l2_format *f)
  542. {
  543. struct fimc_lite *fimc = video_drvdata(file);
  544. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  545. struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
  546. struct flite_frame *frame = &fimc->out_frame;
  547. const struct fimc_fmt *fmt = fimc->fmt;
  548. plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
  549. plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
  550. pixm->num_planes = fmt->memplanes;
  551. pixm->pixelformat = fmt->fourcc;
  552. pixm->width = frame->f_width;
  553. pixm->height = frame->f_height;
  554. pixm->field = V4L2_FIELD_NONE;
  555. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  556. return 0;
  557. }
  558. static int fimc_lite_try_fmt(struct fimc_lite *fimc,
  559. struct v4l2_pix_format_mplane *pixm,
  560. const struct fimc_fmt **ffmt)
  561. {
  562. struct flite_variant *variant = fimc->variant;
  563. u32 bpl = pixm->plane_fmt[0].bytesperline;
  564. const struct fimc_fmt *fmt;
  565. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, 0);
  566. if (WARN_ON(fmt == NULL))
  567. return -EINVAL;
  568. if (ffmt)
  569. *ffmt = fmt;
  570. v4l_bound_align_image(&pixm->width, 8, variant->max_width,
  571. ffs(variant->out_width_align) - 1,
  572. &pixm->height, 0, variant->max_height, 0, 0);
  573. if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
  574. pixm->plane_fmt[0].bytesperline = (pixm->width *
  575. fmt->depth[0]) / 8;
  576. if (pixm->plane_fmt[0].sizeimage == 0)
  577. pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
  578. fmt->depth[0]) / 8;
  579. pixm->num_planes = fmt->memplanes;
  580. pixm->pixelformat = fmt->fourcc;
  581. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  582. pixm->field = V4L2_FIELD_NONE;
  583. return 0;
  584. }
  585. static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
  586. struct v4l2_format *f)
  587. {
  588. struct fimc_lite *fimc = video_drvdata(file);
  589. return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
  590. }
  591. static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
  592. struct v4l2_format *f)
  593. {
  594. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  595. struct fimc_lite *fimc = video_drvdata(file);
  596. struct flite_frame *frame = &fimc->out_frame;
  597. const struct fimc_fmt *fmt = NULL;
  598. int ret;
  599. if (vb2_is_busy(&fimc->vb_queue))
  600. return -EBUSY;
  601. ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
  602. if (ret < 0)
  603. return ret;
  604. fimc->fmt = fmt;
  605. fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
  606. pixm->plane_fmt[0].sizeimage);
  607. frame->f_width = pixm->width;
  608. frame->f_height = pixm->height;
  609. return 0;
  610. }
  611. static int fimc_pipeline_validate(struct fimc_lite *fimc)
  612. {
  613. struct v4l2_subdev *sd = &fimc->subdev;
  614. struct v4l2_subdev_format sink_fmt, src_fmt;
  615. struct media_pad *pad;
  616. int ret;
  617. while (1) {
  618. /* Retrieve format at the sink pad */
  619. pad = &sd->entity.pads[0];
  620. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  621. break;
  622. /* Don't call FIMC subdev operation to avoid nested locking */
  623. if (sd == &fimc->subdev) {
  624. struct flite_frame *ff = &fimc->out_frame;
  625. sink_fmt.format.width = ff->f_width;
  626. sink_fmt.format.height = ff->f_height;
  627. sink_fmt.format.code = fimc->fmt->mbus_code;
  628. } else {
  629. sink_fmt.pad = pad->index;
  630. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  631. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
  632. &sink_fmt);
  633. if (ret < 0 && ret != -ENOIOCTLCMD)
  634. return -EPIPE;
  635. }
  636. /* Retrieve format at the source pad */
  637. pad = media_entity_remote_source(pad);
  638. if (pad == NULL ||
  639. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  640. break;
  641. sd = media_entity_to_v4l2_subdev(pad->entity);
  642. src_fmt.pad = pad->index;
  643. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  644. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  645. if (ret < 0 && ret != -ENOIOCTLCMD)
  646. return -EPIPE;
  647. if (src_fmt.format.width != sink_fmt.format.width ||
  648. src_fmt.format.height != sink_fmt.format.height ||
  649. src_fmt.format.code != sink_fmt.format.code)
  650. return -EPIPE;
  651. }
  652. return 0;
  653. }
  654. static int fimc_lite_streamon(struct file *file, void *priv,
  655. enum v4l2_buf_type type)
  656. {
  657. struct fimc_lite *fimc = video_drvdata(file);
  658. struct v4l2_subdev *sensor = fimc->pipeline.subdevs[IDX_SENSOR];
  659. struct fimc_pipeline *p = &fimc->pipeline;
  660. int ret;
  661. if (fimc_lite_active(fimc))
  662. return -EBUSY;
  663. ret = media_entity_pipeline_start(&sensor->entity, p->m_pipeline);
  664. if (ret < 0)
  665. return ret;
  666. ret = fimc_pipeline_validate(fimc);
  667. if (ret) {
  668. media_entity_pipeline_stop(&sensor->entity);
  669. return ret;
  670. }
  671. return vb2_streamon(&fimc->vb_queue, type);
  672. }
  673. static int fimc_lite_streamoff(struct file *file, void *priv,
  674. enum v4l2_buf_type type)
  675. {
  676. struct fimc_lite *fimc = video_drvdata(file);
  677. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  678. int ret;
  679. ret = vb2_streamoff(&fimc->vb_queue, type);
  680. if (ret == 0)
  681. media_entity_pipeline_stop(&sd->entity);
  682. return ret;
  683. }
  684. static int fimc_lite_reqbufs(struct file *file, void *priv,
  685. struct v4l2_requestbuffers *reqbufs)
  686. {
  687. struct fimc_lite *fimc = video_drvdata(file);
  688. int ret;
  689. reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
  690. ret = vb2_reqbufs(&fimc->vb_queue, reqbufs);
  691. if (!ret)
  692. fimc->reqbufs_count = reqbufs->count;
  693. return ret;
  694. }
  695. static int fimc_lite_querybuf(struct file *file, void *priv,
  696. struct v4l2_buffer *buf)
  697. {
  698. struct fimc_lite *fimc = video_drvdata(file);
  699. return vb2_querybuf(&fimc->vb_queue, buf);
  700. }
  701. static int fimc_lite_qbuf(struct file *file, void *priv,
  702. struct v4l2_buffer *buf)
  703. {
  704. struct fimc_lite *fimc = video_drvdata(file);
  705. return vb2_qbuf(&fimc->vb_queue, buf);
  706. }
  707. static int fimc_lite_dqbuf(struct file *file, void *priv,
  708. struct v4l2_buffer *buf)
  709. {
  710. struct fimc_lite *fimc = video_drvdata(file);
  711. return vb2_dqbuf(&fimc->vb_queue, buf, file->f_flags & O_NONBLOCK);
  712. }
  713. static int fimc_lite_create_bufs(struct file *file, void *priv,
  714. struct v4l2_create_buffers *create)
  715. {
  716. struct fimc_lite *fimc = video_drvdata(file);
  717. return vb2_create_bufs(&fimc->vb_queue, create);
  718. }
  719. static int fimc_lite_prepare_buf(struct file *file, void *priv,
  720. struct v4l2_buffer *b)
  721. {
  722. struct fimc_lite *fimc = video_drvdata(file);
  723. return vb2_prepare_buf(&fimc->vb_queue, b);
  724. }
  725. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  726. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  727. {
  728. if (a->left < b->left || a->top < b->top)
  729. return 0;
  730. if (a->left + a->width > b->left + b->width)
  731. return 0;
  732. if (a->top + a->height > b->top + b->height)
  733. return 0;
  734. return 1;
  735. }
  736. static int fimc_lite_g_selection(struct file *file, void *fh,
  737. struct v4l2_selection *sel)
  738. {
  739. struct fimc_lite *fimc = video_drvdata(file);
  740. struct flite_frame *f = &fimc->out_frame;
  741. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  742. return -EINVAL;
  743. switch (sel->target) {
  744. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  745. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  746. sel->r.left = 0;
  747. sel->r.top = 0;
  748. sel->r.width = f->f_width;
  749. sel->r.height = f->f_height;
  750. return 0;
  751. case V4L2_SEL_TGT_COMPOSE:
  752. sel->r = f->rect;
  753. return 0;
  754. }
  755. return -EINVAL;
  756. }
  757. static int fimc_lite_s_selection(struct file *file, void *fh,
  758. struct v4l2_selection *sel)
  759. {
  760. struct fimc_lite *fimc = video_drvdata(file);
  761. struct flite_frame *f = &fimc->out_frame;
  762. struct v4l2_rect rect = sel->r;
  763. unsigned long flags;
  764. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE ||
  765. sel->target != V4L2_SEL_TGT_COMPOSE)
  766. return -EINVAL;
  767. fimc_lite_try_compose(fimc, &rect);
  768. if ((sel->flags & V4L2_SEL_FLAG_LE) &&
  769. !enclosed_rectangle(&rect, &sel->r))
  770. return -ERANGE;
  771. if ((sel->flags & V4L2_SEL_FLAG_GE) &&
  772. !enclosed_rectangle(&sel->r, &rect))
  773. return -ERANGE;
  774. sel->r = rect;
  775. spin_lock_irqsave(&fimc->slock, flags);
  776. f->rect = rect;
  777. set_bit(ST_FLITE_CONFIG, &fimc->state);
  778. spin_unlock_irqrestore(&fimc->slock, flags);
  779. return 0;
  780. }
  781. static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
  782. .vidioc_querycap = fimc_vidioc_querycap_capture,
  783. .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane,
  784. .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane,
  785. .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane,
  786. .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane,
  787. .vidioc_g_selection = fimc_lite_g_selection,
  788. .vidioc_s_selection = fimc_lite_s_selection,
  789. .vidioc_reqbufs = fimc_lite_reqbufs,
  790. .vidioc_querybuf = fimc_lite_querybuf,
  791. .vidioc_prepare_buf = fimc_lite_prepare_buf,
  792. .vidioc_create_bufs = fimc_lite_create_bufs,
  793. .vidioc_qbuf = fimc_lite_qbuf,
  794. .vidioc_dqbuf = fimc_lite_dqbuf,
  795. .vidioc_streamon = fimc_lite_streamon,
  796. .vidioc_streamoff = fimc_lite_streamoff,
  797. };
  798. /* Capture subdev media entity operations */
  799. static int fimc_lite_link_setup(struct media_entity *entity,
  800. const struct media_pad *local,
  801. const struct media_pad *remote, u32 flags)
  802. {
  803. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  804. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  805. unsigned int remote_ent_type = media_entity_type(remote->entity);
  806. if (WARN_ON(fimc == NULL))
  807. return 0;
  808. v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x",
  809. __func__, local->entity->name, remote->entity->name,
  810. flags, fimc->source_subdev_grp_id);
  811. switch (local->index) {
  812. case FIMC_SD_PAD_SINK:
  813. if (remote_ent_type != MEDIA_ENT_T_V4L2_SUBDEV)
  814. return -EINVAL;
  815. if (flags & MEDIA_LNK_FL_ENABLED) {
  816. if (fimc->source_subdev_grp_id != 0)
  817. return -EBUSY;
  818. fimc->source_subdev_grp_id = sd->grp_id;
  819. return 0;
  820. }
  821. fimc->source_subdev_grp_id = 0;
  822. break;
  823. case FIMC_SD_PAD_SOURCE:
  824. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  825. fimc->out_path = FIMC_IO_NONE;
  826. return 0;
  827. }
  828. if (remote_ent_type == MEDIA_ENT_T_V4L2_SUBDEV)
  829. fimc->out_path = FIMC_IO_ISP;
  830. else
  831. fimc->out_path = FIMC_IO_DMA;
  832. break;
  833. default:
  834. v4l2_err(sd, "Invalid pad index\n");
  835. return -EINVAL;
  836. }
  837. return 0;
  838. }
  839. static const struct media_entity_operations fimc_lite_subdev_media_ops = {
  840. .link_setup = fimc_lite_link_setup,
  841. };
  842. static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  843. struct v4l2_subdev_fh *fh,
  844. struct v4l2_subdev_mbus_code_enum *code)
  845. {
  846. const struct fimc_fmt *fmt;
  847. fmt = fimc_lite_find_format(NULL, NULL, code->index);
  848. if (!fmt)
  849. return -EINVAL;
  850. code->code = fmt->mbus_code;
  851. return 0;
  852. }
  853. static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
  854. struct v4l2_subdev_fh *fh,
  855. struct v4l2_subdev_format *fmt)
  856. {
  857. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  858. struct v4l2_mbus_framefmt *mf = &fmt->format;
  859. struct flite_frame *f = &fimc->out_frame;
  860. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  861. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  862. fmt->format = *mf;
  863. return 0;
  864. }
  865. mf->colorspace = V4L2_COLORSPACE_JPEG;
  866. mutex_lock(&fimc->lock);
  867. mf->code = fimc->fmt->mbus_code;
  868. if (fmt->pad == FLITE_SD_PAD_SINK) {
  869. /* full camera input frame size */
  870. mf->width = f->f_width;
  871. mf->height = f->f_height;
  872. } else {
  873. /* crop size */
  874. mf->width = f->rect.width;
  875. mf->height = f->rect.height;
  876. }
  877. mutex_unlock(&fimc->lock);
  878. return 0;
  879. }
  880. static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
  881. struct v4l2_subdev_fh *fh,
  882. struct v4l2_subdev_format *fmt)
  883. {
  884. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  885. struct v4l2_mbus_framefmt *mf = &fmt->format;
  886. struct flite_frame *sink = &fimc->inp_frame;
  887. struct flite_frame *source = &fimc->out_frame;
  888. const struct fimc_fmt *ffmt;
  889. v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d",
  890. fmt->pad, mf->code, mf->width, mf->height);
  891. mf->colorspace = V4L2_COLORSPACE_JPEG;
  892. mutex_lock(&fimc->lock);
  893. if ((fimc->out_path == FIMC_IO_ISP && sd->entity.stream_count > 0) ||
  894. (fimc->out_path == FIMC_IO_DMA && vb2_is_busy(&fimc->vb_queue))) {
  895. mutex_unlock(&fimc->lock);
  896. return -EBUSY;
  897. }
  898. ffmt = fimc_lite_try_format(fimc, &mf->width, &mf->height,
  899. &mf->code, NULL, fmt->pad);
  900. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  901. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  902. *mf = fmt->format;
  903. mutex_unlock(&fimc->lock);
  904. return 0;
  905. }
  906. if (fmt->pad == FLITE_SD_PAD_SINK) {
  907. sink->f_width = mf->width;
  908. sink->f_height = mf->height;
  909. fimc->fmt = ffmt;
  910. /* Set sink crop rectangle */
  911. sink->rect.width = mf->width;
  912. sink->rect.height = mf->height;
  913. sink->rect.left = 0;
  914. sink->rect.top = 0;
  915. /* Reset source format and crop rectangle */
  916. source->rect = sink->rect;
  917. source->f_width = mf->width;
  918. source->f_height = mf->height;
  919. } else {
  920. /* Allow changing format only on sink pad */
  921. mf->code = fimc->fmt->mbus_code;
  922. mf->width = sink->rect.width;
  923. mf->height = sink->rect.height;
  924. }
  925. mutex_unlock(&fimc->lock);
  926. return 0;
  927. }
  928. static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
  929. struct v4l2_subdev_fh *fh,
  930. struct v4l2_subdev_selection *sel)
  931. {
  932. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  933. struct flite_frame *f = &fimc->inp_frame;
  934. if ((sel->target != V4L2_SEL_TGT_CROP &&
  935. sel->target != V4L2_SEL_TGT_CROP_BOUNDS) ||
  936. sel->pad != FLITE_SD_PAD_SINK)
  937. return -EINVAL;
  938. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  939. sel->r = *v4l2_subdev_get_try_crop(fh, sel->pad);
  940. return 0;
  941. }
  942. mutex_lock(&fimc->lock);
  943. if (sel->target == V4L2_SEL_TGT_CROP) {
  944. sel->r = f->rect;
  945. } else {
  946. sel->r.left = 0;
  947. sel->r.top = 0;
  948. sel->r.width = f->f_width;
  949. sel->r.height = f->f_height;
  950. }
  951. mutex_unlock(&fimc->lock);
  952. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d",
  953. __func__, f->rect.left, f->rect.top, f->rect.width,
  954. f->rect.height, f->f_width, f->f_height);
  955. return 0;
  956. }
  957. static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
  958. struct v4l2_subdev_fh *fh,
  959. struct v4l2_subdev_selection *sel)
  960. {
  961. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  962. struct flite_frame *f = &fimc->inp_frame;
  963. int ret = 0;
  964. if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK)
  965. return -EINVAL;
  966. mutex_lock(&fimc->lock);
  967. fimc_lite_try_crop(fimc, &sel->r);
  968. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  969. *v4l2_subdev_get_try_crop(fh, sel->pad) = sel->r;
  970. } else {
  971. unsigned long flags;
  972. spin_lock_irqsave(&fimc->slock, flags);
  973. f->rect = sel->r;
  974. /* Same crop rectangle on the source pad */
  975. fimc->out_frame.rect = sel->r;
  976. set_bit(ST_FLITE_CONFIG, &fimc->state);
  977. spin_unlock_irqrestore(&fimc->slock, flags);
  978. }
  979. mutex_unlock(&fimc->lock);
  980. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d",
  981. __func__, f->rect.left, f->rect.top, f->rect.width,
  982. f->rect.height, f->f_width, f->f_height);
  983. return ret;
  984. }
  985. static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
  986. {
  987. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  988. if (fimc->out_path == FIMC_IO_DMA)
  989. return -ENOIOCTLCMD;
  990. /* TODO: */
  991. return 0;
  992. }
  993. static int fimc_lite_subdev_s_power(struct v4l2_subdev *sd, int on)
  994. {
  995. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  996. if (fimc->out_path == FIMC_IO_DMA)
  997. return -ENOIOCTLCMD;
  998. /* TODO: */
  999. return 0;
  1000. }
  1001. static int fimc_lite_log_status(struct v4l2_subdev *sd)
  1002. {
  1003. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1004. flite_hw_dump_regs(fimc, __func__);
  1005. return 0;
  1006. }
  1007. static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
  1008. {
  1009. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1010. struct vb2_queue *q = &fimc->vb_queue;
  1011. struct video_device *vfd = &fimc->vfd;
  1012. int ret;
  1013. memset(vfd, 0, sizeof(*vfd));
  1014. fimc->fmt = &fimc_lite_formats[0];
  1015. fimc->out_path = FIMC_IO_DMA;
  1016. snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
  1017. fimc->index);
  1018. vfd->fops = &fimc_lite_fops;
  1019. vfd->ioctl_ops = &fimc_lite_ioctl_ops;
  1020. vfd->v4l2_dev = sd->v4l2_dev;
  1021. vfd->minor = -1;
  1022. vfd->release = video_device_release_empty;
  1023. vfd->lock = &fimc->lock;
  1024. fimc->ref_count = 0;
  1025. fimc->reqbufs_count = 0;
  1026. INIT_LIST_HEAD(&fimc->pending_buf_q);
  1027. INIT_LIST_HEAD(&fimc->active_buf_q);
  1028. memset(q, 0, sizeof(*q));
  1029. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1030. q->io_modes = VB2_MMAP | VB2_USERPTR;
  1031. q->ops = &fimc_lite_qops;
  1032. q->mem_ops = &vb2_dma_contig_memops;
  1033. q->buf_struct_size = sizeof(struct flite_buffer);
  1034. q->drv_priv = fimc;
  1035. ret = vb2_queue_init(q);
  1036. if (ret < 0)
  1037. return ret;
  1038. fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1039. ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad, 0);
  1040. if (ret < 0)
  1041. return ret;
  1042. video_set_drvdata(vfd, fimc);
  1043. fimc->pipeline_ops = v4l2_get_subdev_hostdata(sd);
  1044. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1045. if (ret < 0) {
  1046. media_entity_cleanup(&vfd->entity);
  1047. fimc->pipeline_ops = NULL;
  1048. return ret;
  1049. }
  1050. v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
  1051. vfd->name, video_device_node_name(vfd));
  1052. return 0;
  1053. }
  1054. static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
  1055. {
  1056. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1057. if (fimc == NULL)
  1058. return;
  1059. if (video_is_registered(&fimc->vfd)) {
  1060. video_unregister_device(&fimc->vfd);
  1061. media_entity_cleanup(&fimc->vfd.entity);
  1062. fimc->pipeline_ops = NULL;
  1063. }
  1064. }
  1065. static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
  1066. .registered = fimc_lite_subdev_registered,
  1067. .unregistered = fimc_lite_subdev_unregistered,
  1068. };
  1069. static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
  1070. .enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
  1071. .get_selection = fimc_lite_subdev_get_selection,
  1072. .set_selection = fimc_lite_subdev_set_selection,
  1073. .get_fmt = fimc_lite_subdev_get_fmt,
  1074. .set_fmt = fimc_lite_subdev_set_fmt,
  1075. };
  1076. static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
  1077. .s_stream = fimc_lite_subdev_s_stream,
  1078. };
  1079. static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
  1080. .s_power = fimc_lite_subdev_s_power,
  1081. .log_status = fimc_lite_log_status,
  1082. };
  1083. static struct v4l2_subdev_ops fimc_lite_subdev_ops = {
  1084. .core = &fimc_lite_core_ops,
  1085. .video = &fimc_lite_subdev_video_ops,
  1086. .pad = &fimc_lite_subdev_pad_ops,
  1087. };
  1088. static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
  1089. {
  1090. struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
  1091. ctrl_handler);
  1092. set_bit(ST_FLITE_CONFIG, &fimc->state);
  1093. return 0;
  1094. }
  1095. static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
  1096. .s_ctrl = fimc_lite_s_ctrl,
  1097. };
  1098. static const struct v4l2_ctrl_config fimc_lite_ctrl = {
  1099. .ops = &fimc_lite_ctrl_ops,
  1100. .id = V4L2_CTRL_CLASS_USER | 0x1001,
  1101. .type = V4L2_CTRL_TYPE_BOOLEAN,
  1102. .name = "Test Pattern 640x480",
  1103. };
  1104. static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
  1105. {
  1106. struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
  1107. struct v4l2_subdev *sd = &fimc->subdev;
  1108. int ret;
  1109. v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
  1110. sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
  1111. snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
  1112. fimc->subdev_pads[FIMC_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1113. fimc->subdev_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1114. ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
  1115. fimc->subdev_pads, 0);
  1116. if (ret)
  1117. return ret;
  1118. v4l2_ctrl_handler_init(handler, 1);
  1119. fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
  1120. NULL);
  1121. if (handler->error) {
  1122. media_entity_cleanup(&sd->entity);
  1123. return handler->error;
  1124. }
  1125. sd->ctrl_handler = handler;
  1126. sd->internal_ops = &fimc_lite_subdev_internal_ops;
  1127. sd->entity.ops = &fimc_lite_subdev_media_ops;
  1128. v4l2_set_subdevdata(sd, fimc);
  1129. return 0;
  1130. }
  1131. static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
  1132. {
  1133. struct v4l2_subdev *sd = &fimc->subdev;
  1134. v4l2_device_unregister_subdev(sd);
  1135. media_entity_cleanup(&sd->entity);
  1136. v4l2_ctrl_handler_free(&fimc->ctrl_handler);
  1137. v4l2_set_subdevdata(sd, NULL);
  1138. }
  1139. static void fimc_lite_clk_put(struct fimc_lite *fimc)
  1140. {
  1141. if (IS_ERR_OR_NULL(fimc->clock))
  1142. return;
  1143. clk_unprepare(fimc->clock);
  1144. clk_put(fimc->clock);
  1145. fimc->clock = NULL;
  1146. }
  1147. static int fimc_lite_clk_get(struct fimc_lite *fimc)
  1148. {
  1149. int ret;
  1150. fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
  1151. if (IS_ERR(fimc->clock))
  1152. return PTR_ERR(fimc->clock);
  1153. ret = clk_prepare(fimc->clock);
  1154. if (ret < 0) {
  1155. clk_put(fimc->clock);
  1156. fimc->clock = NULL;
  1157. }
  1158. return ret;
  1159. }
  1160. static int fimc_lite_probe(struct platform_device *pdev)
  1161. {
  1162. struct flite_drvdata *drv_data = fimc_lite_get_drvdata(pdev);
  1163. struct fimc_lite *fimc;
  1164. struct resource *res;
  1165. int ret;
  1166. fimc = devm_kzalloc(&pdev->dev, sizeof(*fimc), GFP_KERNEL);
  1167. if (!fimc)
  1168. return -ENOMEM;
  1169. fimc->index = pdev->id;
  1170. fimc->variant = drv_data->variant[fimc->index];
  1171. fimc->pdev = pdev;
  1172. init_waitqueue_head(&fimc->irq_queue);
  1173. spin_lock_init(&fimc->slock);
  1174. mutex_init(&fimc->lock);
  1175. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1176. fimc->regs = devm_request_and_ioremap(&pdev->dev, res);
  1177. if (fimc->regs == NULL) {
  1178. dev_err(&pdev->dev, "Failed to obtain io memory\n");
  1179. return -ENOENT;
  1180. }
  1181. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1182. if (res == NULL) {
  1183. dev_err(&pdev->dev, "Failed to get IRQ resource\n");
  1184. return -ENXIO;
  1185. }
  1186. ret = fimc_lite_clk_get(fimc);
  1187. if (ret)
  1188. return ret;
  1189. ret = devm_request_irq(&pdev->dev, res->start, flite_irq_handler,
  1190. 0, dev_name(&pdev->dev), fimc);
  1191. if (ret) {
  1192. dev_err(&pdev->dev, "Failed to install irq (%d)\n", ret);
  1193. goto err_clk;
  1194. }
  1195. /* The video node will be created within the subdev's registered() op */
  1196. ret = fimc_lite_create_capture_subdev(fimc);
  1197. if (ret)
  1198. goto err_clk;
  1199. platform_set_drvdata(pdev, fimc);
  1200. pm_runtime_enable(&pdev->dev);
  1201. ret = pm_runtime_get_sync(&pdev->dev);
  1202. if (ret < 0)
  1203. goto err_sd;
  1204. fimc->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
  1205. if (IS_ERR(fimc->alloc_ctx)) {
  1206. ret = PTR_ERR(fimc->alloc_ctx);
  1207. goto err_pm;
  1208. }
  1209. pm_runtime_put(&pdev->dev);
  1210. dev_dbg(&pdev->dev, "FIMC-LITE.%d registered successfully\n",
  1211. fimc->index);
  1212. return 0;
  1213. err_pm:
  1214. pm_runtime_put(&pdev->dev);
  1215. err_sd:
  1216. fimc_lite_unregister_capture_subdev(fimc);
  1217. err_clk:
  1218. fimc_lite_clk_put(fimc);
  1219. return ret;
  1220. }
  1221. static int fimc_lite_runtime_resume(struct device *dev)
  1222. {
  1223. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1224. clk_enable(fimc->clock);
  1225. return 0;
  1226. }
  1227. static int fimc_lite_runtime_suspend(struct device *dev)
  1228. {
  1229. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1230. clk_disable(fimc->clock);
  1231. return 0;
  1232. }
  1233. #ifdef CONFIG_PM_SLEEP
  1234. static int fimc_lite_resume(struct device *dev)
  1235. {
  1236. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1237. struct flite_buffer *buf;
  1238. unsigned long flags;
  1239. int i;
  1240. spin_lock_irqsave(&fimc->slock, flags);
  1241. if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
  1242. !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
  1243. spin_unlock_irqrestore(&fimc->slock, flags);
  1244. return 0;
  1245. }
  1246. flite_hw_reset(fimc);
  1247. spin_unlock_irqrestore(&fimc->slock, flags);
  1248. if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
  1249. return 0;
  1250. INIT_LIST_HEAD(&fimc->active_buf_q);
  1251. fimc_pipeline_call(fimc, open, &fimc->pipeline,
  1252. &fimc->vfd.entity, false);
  1253. fimc_lite_hw_init(fimc);
  1254. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  1255. for (i = 0; i < fimc->reqbufs_count; i++) {
  1256. if (list_empty(&fimc->pending_buf_q))
  1257. break;
  1258. buf = fimc_lite_pending_queue_pop(fimc);
  1259. buffer_queue(&buf->vb);
  1260. }
  1261. return 0;
  1262. }
  1263. static int fimc_lite_suspend(struct device *dev)
  1264. {
  1265. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1266. bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
  1267. int ret;
  1268. if (test_and_set_bit(ST_LPM, &fimc->state))
  1269. return 0;
  1270. ret = fimc_lite_stop_capture(fimc, suspend);
  1271. if (ret < 0 || !fimc_lite_active(fimc))
  1272. return ret;
  1273. return fimc_pipeline_call(fimc, close, &fimc->pipeline);
  1274. }
  1275. #endif /* CONFIG_PM_SLEEP */
  1276. static int fimc_lite_remove(struct platform_device *pdev)
  1277. {
  1278. struct fimc_lite *fimc = platform_get_drvdata(pdev);
  1279. struct device *dev = &pdev->dev;
  1280. pm_runtime_disable(dev);
  1281. pm_runtime_set_suspended(dev);
  1282. fimc_lite_unregister_capture_subdev(fimc);
  1283. vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx);
  1284. fimc_lite_clk_put(fimc);
  1285. dev_info(dev, "Driver unloaded\n");
  1286. return 0;
  1287. }
  1288. static struct flite_variant fimc_lite0_variant_exynos4 = {
  1289. .max_width = 8192,
  1290. .max_height = 8192,
  1291. .out_width_align = 8,
  1292. .win_hor_offs_align = 2,
  1293. .out_hor_offs_align = 8,
  1294. };
  1295. /* EXYNOS4212, EXYNOS4412 */
  1296. static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
  1297. .variant = {
  1298. [0] = &fimc_lite0_variant_exynos4,
  1299. [1] = &fimc_lite0_variant_exynos4,
  1300. },
  1301. };
  1302. static struct platform_device_id fimc_lite_driver_ids[] = {
  1303. {
  1304. .name = "exynos-fimc-lite",
  1305. .driver_data = (unsigned long)&fimc_lite_drvdata_exynos4,
  1306. },
  1307. { /* sentinel */ },
  1308. };
  1309. MODULE_DEVICE_TABLE(platform, fimc_lite_driver_ids);
  1310. static const struct dev_pm_ops fimc_lite_pm_ops = {
  1311. SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
  1312. SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
  1313. NULL)
  1314. };
  1315. static struct platform_driver fimc_lite_driver = {
  1316. .probe = fimc_lite_probe,
  1317. .remove = fimc_lite_remove,
  1318. .id_table = fimc_lite_driver_ids,
  1319. .driver = {
  1320. .name = FIMC_LITE_DRV_NAME,
  1321. .owner = THIS_MODULE,
  1322. .pm = &fimc_lite_pm_ops,
  1323. }
  1324. };
  1325. module_platform_driver(fimc_lite_driver);
  1326. MODULE_LICENSE("GPL");
  1327. MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);