fimc-capture.c 49 KB

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  1. /*
  2. * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
  3. *
  4. * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/errno.h>
  15. #include <linux/bug.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/device.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/list.h>
  20. #include <linux/slab.h>
  21. #include <linux/videodev2.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-ioctl.h>
  24. #include <media/v4l2-mem2mem.h>
  25. #include <media/videobuf2-core.h>
  26. #include <media/videobuf2-dma-contig.h>
  27. #include "fimc-mdevice.h"
  28. #include "fimc-core.h"
  29. #include "fimc-reg.h"
  30. static int fimc_capture_hw_init(struct fimc_dev *fimc)
  31. {
  32. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  33. struct fimc_pipeline *p = &fimc->pipeline;
  34. struct fimc_sensor_info *sensor;
  35. unsigned long flags;
  36. int ret = 0;
  37. if (p->subdevs[IDX_SENSOR] == NULL || ctx == NULL)
  38. return -ENXIO;
  39. if (ctx->s_frame.fmt == NULL)
  40. return -EINVAL;
  41. sensor = v4l2_get_subdev_hostdata(p->subdevs[IDX_SENSOR]);
  42. spin_lock_irqsave(&fimc->slock, flags);
  43. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  44. fimc_set_yuv_order(ctx);
  45. fimc_hw_set_camera_polarity(fimc, &sensor->pdata);
  46. fimc_hw_set_camera_type(fimc, &sensor->pdata);
  47. fimc_hw_set_camera_source(fimc, &sensor->pdata);
  48. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  49. ret = fimc_set_scaler_info(ctx);
  50. if (!ret) {
  51. fimc_hw_set_input_path(ctx);
  52. fimc_hw_set_prescaler(ctx);
  53. fimc_hw_set_mainscaler(ctx);
  54. fimc_hw_set_target_format(ctx);
  55. fimc_hw_set_rotation(ctx);
  56. fimc_hw_set_effect(ctx);
  57. fimc_hw_set_output_path(ctx);
  58. fimc_hw_set_out_dma(ctx);
  59. if (fimc->variant->has_alpha)
  60. fimc_hw_set_rgb_alpha(ctx);
  61. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  62. }
  63. spin_unlock_irqrestore(&fimc->slock, flags);
  64. return ret;
  65. }
  66. /*
  67. * Reinitialize the driver so it is ready to start the streaming again.
  68. * Set fimc->state to indicate stream off and the hardware shut down state.
  69. * If not suspending (@suspend is false), return any buffers to videobuf2.
  70. * Otherwise put any owned buffers onto the pending buffers queue, so they
  71. * can be re-spun when the device is being resumed. Also perform FIMC
  72. * software reset and disable streaming on the whole pipeline if required.
  73. */
  74. static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
  75. {
  76. struct fimc_vid_cap *cap = &fimc->vid_cap;
  77. struct fimc_vid_buffer *buf;
  78. unsigned long flags;
  79. bool streaming;
  80. spin_lock_irqsave(&fimc->slock, flags);
  81. streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
  82. fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
  83. 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
  84. if (suspend)
  85. fimc->state |= (1 << ST_CAPT_SUSPENDED);
  86. else
  87. fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
  88. /* Release unused buffers */
  89. while (!suspend && !list_empty(&cap->pending_buf_q)) {
  90. buf = fimc_pending_queue_pop(cap);
  91. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  92. }
  93. /* If suspending put unused buffers onto pending queue */
  94. while (!list_empty(&cap->active_buf_q)) {
  95. buf = fimc_active_queue_pop(cap);
  96. if (suspend)
  97. fimc_pending_queue_add(cap, buf);
  98. else
  99. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  100. }
  101. fimc_hw_reset(fimc);
  102. cap->buf_index = 0;
  103. spin_unlock_irqrestore(&fimc->slock, flags);
  104. if (streaming)
  105. return fimc_pipeline_call(fimc, set_stream,
  106. &fimc->pipeline, 0);
  107. else
  108. return 0;
  109. }
  110. static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
  111. {
  112. unsigned long flags;
  113. if (!fimc_capture_active(fimc))
  114. return 0;
  115. spin_lock_irqsave(&fimc->slock, flags);
  116. set_bit(ST_CAPT_SHUT, &fimc->state);
  117. fimc_deactivate_capture(fimc);
  118. spin_unlock_irqrestore(&fimc->slock, flags);
  119. wait_event_timeout(fimc->irq_queue,
  120. !test_bit(ST_CAPT_SHUT, &fimc->state),
  121. (2*HZ/10)); /* 200 ms */
  122. return fimc_capture_state_cleanup(fimc, suspend);
  123. }
  124. /**
  125. * fimc_capture_config_update - apply the camera interface configuration
  126. *
  127. * To be called from within the interrupt handler with fimc.slock
  128. * spinlock held. It updates the camera pixel crop, rotation and
  129. * image flip in H/W.
  130. */
  131. static int fimc_capture_config_update(struct fimc_ctx *ctx)
  132. {
  133. struct fimc_dev *fimc = ctx->fimc_dev;
  134. int ret;
  135. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  136. ret = fimc_set_scaler_info(ctx);
  137. if (ret)
  138. return ret;
  139. fimc_hw_set_prescaler(ctx);
  140. fimc_hw_set_mainscaler(ctx);
  141. fimc_hw_set_target_format(ctx);
  142. fimc_hw_set_rotation(ctx);
  143. fimc_hw_set_effect(ctx);
  144. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  145. fimc_hw_set_out_dma(ctx);
  146. if (fimc->variant->has_alpha)
  147. fimc_hw_set_rgb_alpha(ctx);
  148. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  149. return ret;
  150. }
  151. void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
  152. {
  153. struct v4l2_subdev *csis = fimc->pipeline.subdevs[IDX_CSIS];
  154. struct fimc_vid_cap *cap = &fimc->vid_cap;
  155. struct fimc_frame *f = &cap->ctx->d_frame;
  156. struct fimc_vid_buffer *v_buf;
  157. struct timeval *tv;
  158. struct timespec ts;
  159. if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
  160. wake_up(&fimc->irq_queue);
  161. goto done;
  162. }
  163. if (!list_empty(&cap->active_buf_q) &&
  164. test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
  165. ktime_get_real_ts(&ts);
  166. v_buf = fimc_active_queue_pop(cap);
  167. tv = &v_buf->vb.v4l2_buf.timestamp;
  168. tv->tv_sec = ts.tv_sec;
  169. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  170. v_buf->vb.v4l2_buf.sequence = cap->frame_count++;
  171. vb2_buffer_done(&v_buf->vb, VB2_BUF_STATE_DONE);
  172. }
  173. if (!list_empty(&cap->pending_buf_q)) {
  174. v_buf = fimc_pending_queue_pop(cap);
  175. fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
  176. v_buf->index = cap->buf_index;
  177. /* Move the buffer to the capture active queue */
  178. fimc_active_queue_add(cap, v_buf);
  179. dbg("next frame: %d, done frame: %d",
  180. fimc_hw_get_frame_index(fimc), v_buf->index);
  181. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  182. cap->buf_index = 0;
  183. }
  184. /*
  185. * Set up a buffer at MIPI-CSIS if current image format
  186. * requires the frame embedded data capture.
  187. */
  188. if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
  189. unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
  190. unsigned int size = f->payload[plane];
  191. s32 index = fimc_hw_get_frame_index(fimc);
  192. void *vaddr;
  193. list_for_each_entry(v_buf, &cap->active_buf_q, list) {
  194. if (v_buf->index != index)
  195. continue;
  196. vaddr = vb2_plane_vaddr(&v_buf->vb, plane);
  197. v4l2_subdev_call(csis, video, s_rx_buffer,
  198. vaddr, &size);
  199. break;
  200. }
  201. }
  202. if (cap->active_buf_cnt == 0) {
  203. if (deq_buf)
  204. clear_bit(ST_CAPT_RUN, &fimc->state);
  205. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  206. cap->buf_index = 0;
  207. } else {
  208. set_bit(ST_CAPT_RUN, &fimc->state);
  209. }
  210. if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
  211. fimc_capture_config_update(cap->ctx);
  212. done:
  213. if (cap->active_buf_cnt == 1) {
  214. fimc_deactivate_capture(fimc);
  215. clear_bit(ST_CAPT_STREAM, &fimc->state);
  216. }
  217. dbg("frame: %d, active_buf_cnt: %d",
  218. fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
  219. }
  220. static int start_streaming(struct vb2_queue *q, unsigned int count)
  221. {
  222. struct fimc_ctx *ctx = q->drv_priv;
  223. struct fimc_dev *fimc = ctx->fimc_dev;
  224. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  225. int min_bufs;
  226. int ret;
  227. vid_cap->frame_count = 0;
  228. ret = fimc_capture_hw_init(fimc);
  229. if (ret) {
  230. fimc_capture_state_cleanup(fimc, false);
  231. return ret;
  232. }
  233. set_bit(ST_CAPT_PEND, &fimc->state);
  234. min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
  235. if (vid_cap->active_buf_cnt >= min_bufs &&
  236. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  237. fimc_activate_capture(ctx);
  238. if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  239. fimc_pipeline_call(fimc, set_stream,
  240. &fimc->pipeline, 1);
  241. }
  242. return 0;
  243. }
  244. static int stop_streaming(struct vb2_queue *q)
  245. {
  246. struct fimc_ctx *ctx = q->drv_priv;
  247. struct fimc_dev *fimc = ctx->fimc_dev;
  248. if (!fimc_capture_active(fimc))
  249. return -EINVAL;
  250. return fimc_stop_capture(fimc, false);
  251. }
  252. int fimc_capture_suspend(struct fimc_dev *fimc)
  253. {
  254. bool suspend = fimc_capture_busy(fimc);
  255. int ret = fimc_stop_capture(fimc, suspend);
  256. if (ret)
  257. return ret;
  258. return fimc_pipeline_call(fimc, close, &fimc->pipeline);
  259. }
  260. static void buffer_queue(struct vb2_buffer *vb);
  261. int fimc_capture_resume(struct fimc_dev *fimc)
  262. {
  263. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  264. struct fimc_vid_buffer *buf;
  265. int i;
  266. if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
  267. return 0;
  268. INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
  269. vid_cap->buf_index = 0;
  270. fimc_pipeline_call(fimc, open, &fimc->pipeline,
  271. &vid_cap->vfd.entity, false);
  272. fimc_capture_hw_init(fimc);
  273. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  274. for (i = 0; i < vid_cap->reqbufs_count; i++) {
  275. if (list_empty(&vid_cap->pending_buf_q))
  276. break;
  277. buf = fimc_pending_queue_pop(vid_cap);
  278. buffer_queue(&buf->vb);
  279. }
  280. return 0;
  281. }
  282. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  283. unsigned int *num_buffers, unsigned int *num_planes,
  284. unsigned int sizes[], void *allocators[])
  285. {
  286. const struct v4l2_pix_format_mplane *pixm = NULL;
  287. struct fimc_ctx *ctx = vq->drv_priv;
  288. struct fimc_frame *frame = &ctx->d_frame;
  289. struct fimc_fmt *fmt = frame->fmt;
  290. unsigned long wh;
  291. int i;
  292. if (pfmt) {
  293. pixm = &pfmt->fmt.pix_mp;
  294. fmt = fimc_find_format(&pixm->pixelformat, NULL,
  295. FMT_FLAGS_CAM | FMT_FLAGS_M2M, -1);
  296. wh = pixm->width * pixm->height;
  297. } else {
  298. wh = frame->f_width * frame->f_height;
  299. }
  300. if (fmt == NULL)
  301. return -EINVAL;
  302. *num_planes = fmt->memplanes;
  303. for (i = 0; i < fmt->memplanes; i++) {
  304. unsigned int size = (wh * fmt->depth[i]) / 8;
  305. if (pixm)
  306. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  307. else if (fimc_fmt_is_user_defined(fmt->color))
  308. sizes[i] = frame->payload[i];
  309. else
  310. sizes[i] = max_t(u32, size, frame->payload[i]);
  311. allocators[i] = ctx->fimc_dev->alloc_ctx;
  312. }
  313. return 0;
  314. }
  315. static int buffer_prepare(struct vb2_buffer *vb)
  316. {
  317. struct vb2_queue *vq = vb->vb2_queue;
  318. struct fimc_ctx *ctx = vq->drv_priv;
  319. int i;
  320. if (ctx->d_frame.fmt == NULL)
  321. return -EINVAL;
  322. for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
  323. unsigned long size = ctx->d_frame.payload[i];
  324. if (vb2_plane_size(vb, i) < size) {
  325. v4l2_err(&ctx->fimc_dev->vid_cap.vfd,
  326. "User buffer too small (%ld < %ld)\n",
  327. vb2_plane_size(vb, i), size);
  328. return -EINVAL;
  329. }
  330. vb2_set_plane_payload(vb, i, size);
  331. }
  332. return 0;
  333. }
  334. static void buffer_queue(struct vb2_buffer *vb)
  335. {
  336. struct fimc_vid_buffer *buf
  337. = container_of(vb, struct fimc_vid_buffer, vb);
  338. struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  339. struct fimc_dev *fimc = ctx->fimc_dev;
  340. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  341. unsigned long flags;
  342. int min_bufs;
  343. spin_lock_irqsave(&fimc->slock, flags);
  344. fimc_prepare_addr(ctx, &buf->vb, &ctx->d_frame, &buf->paddr);
  345. if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
  346. !test_bit(ST_CAPT_STREAM, &fimc->state) &&
  347. vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
  348. /* Setup the buffer directly for processing. */
  349. int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
  350. vid_cap->buf_index;
  351. fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
  352. buf->index = vid_cap->buf_index;
  353. fimc_active_queue_add(vid_cap, buf);
  354. if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
  355. vid_cap->buf_index = 0;
  356. } else {
  357. fimc_pending_queue_add(vid_cap, buf);
  358. }
  359. min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
  360. if (vb2_is_streaming(&vid_cap->vbq) &&
  361. vid_cap->active_buf_cnt >= min_bufs &&
  362. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  363. fimc_activate_capture(ctx);
  364. spin_unlock_irqrestore(&fimc->slock, flags);
  365. if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  366. fimc_pipeline_call(fimc, set_stream,
  367. &fimc->pipeline, 1);
  368. return;
  369. }
  370. spin_unlock_irqrestore(&fimc->slock, flags);
  371. }
  372. static void fimc_lock(struct vb2_queue *vq)
  373. {
  374. struct fimc_ctx *ctx = vb2_get_drv_priv(vq);
  375. mutex_lock(&ctx->fimc_dev->lock);
  376. }
  377. static void fimc_unlock(struct vb2_queue *vq)
  378. {
  379. struct fimc_ctx *ctx = vb2_get_drv_priv(vq);
  380. mutex_unlock(&ctx->fimc_dev->lock);
  381. }
  382. static struct vb2_ops fimc_capture_qops = {
  383. .queue_setup = queue_setup,
  384. .buf_prepare = buffer_prepare,
  385. .buf_queue = buffer_queue,
  386. .wait_prepare = fimc_unlock,
  387. .wait_finish = fimc_lock,
  388. .start_streaming = start_streaming,
  389. .stop_streaming = stop_streaming,
  390. };
  391. /**
  392. * fimc_capture_ctrls_create - initialize the control handler
  393. * Initialize the capture video node control handler and fill it
  394. * with the FIMC controls. Inherit any sensor's controls if the
  395. * 'user_subdev_api' flag is false (default behaviour).
  396. * This function need to be called with the graph mutex held.
  397. */
  398. int fimc_capture_ctrls_create(struct fimc_dev *fimc)
  399. {
  400. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  401. int ret;
  402. if (WARN_ON(vid_cap->ctx == NULL))
  403. return -ENXIO;
  404. if (vid_cap->ctx->ctrls.ready)
  405. return 0;
  406. ret = fimc_ctrls_create(vid_cap->ctx);
  407. if (ret || vid_cap->user_subdev_api || !vid_cap->ctx->ctrls.ready)
  408. return ret;
  409. return v4l2_ctrl_add_handler(&vid_cap->ctx->ctrls.handler,
  410. fimc->pipeline.subdevs[IDX_SENSOR]->ctrl_handler, NULL);
  411. }
  412. static int fimc_capture_set_default_format(struct fimc_dev *fimc);
  413. static int fimc_capture_open(struct file *file)
  414. {
  415. struct fimc_dev *fimc = video_drvdata(file);
  416. int ret = -EBUSY;
  417. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  418. if (mutex_lock_interruptible(&fimc->lock))
  419. return -ERESTARTSYS;
  420. if (fimc_m2m_active(fimc))
  421. goto unlock;
  422. set_bit(ST_CAPT_BUSY, &fimc->state);
  423. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  424. if (ret < 0)
  425. goto unlock;
  426. ret = v4l2_fh_open(file);
  427. if (ret) {
  428. pm_runtime_put(&fimc->pdev->dev);
  429. goto unlock;
  430. }
  431. if (++fimc->vid_cap.refcnt == 1) {
  432. ret = fimc_pipeline_call(fimc, open, &fimc->pipeline,
  433. &fimc->vid_cap.vfd.entity, true);
  434. if (!ret && !fimc->vid_cap.user_subdev_api)
  435. ret = fimc_capture_set_default_format(fimc);
  436. if (!ret)
  437. ret = fimc_capture_ctrls_create(fimc);
  438. if (ret < 0) {
  439. clear_bit(ST_CAPT_BUSY, &fimc->state);
  440. pm_runtime_put_sync(&fimc->pdev->dev);
  441. fimc->vid_cap.refcnt--;
  442. v4l2_fh_release(file);
  443. }
  444. }
  445. unlock:
  446. mutex_unlock(&fimc->lock);
  447. return ret;
  448. }
  449. static int fimc_capture_close(struct file *file)
  450. {
  451. struct fimc_dev *fimc = video_drvdata(file);
  452. int ret;
  453. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  454. mutex_lock(&fimc->lock);
  455. if (--fimc->vid_cap.refcnt == 0) {
  456. clear_bit(ST_CAPT_BUSY, &fimc->state);
  457. fimc_stop_capture(fimc, false);
  458. fimc_pipeline_call(fimc, close, &fimc->pipeline);
  459. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  460. }
  461. pm_runtime_put(&fimc->pdev->dev);
  462. if (fimc->vid_cap.refcnt == 0) {
  463. vb2_queue_release(&fimc->vid_cap.vbq);
  464. fimc_ctrls_delete(fimc->vid_cap.ctx);
  465. }
  466. ret = v4l2_fh_release(file);
  467. mutex_unlock(&fimc->lock);
  468. return ret;
  469. }
  470. static unsigned int fimc_capture_poll(struct file *file,
  471. struct poll_table_struct *wait)
  472. {
  473. struct fimc_dev *fimc = video_drvdata(file);
  474. int ret;
  475. if (mutex_lock_interruptible(&fimc->lock))
  476. return POLL_ERR;
  477. ret = vb2_poll(&fimc->vid_cap.vbq, file, wait);
  478. mutex_unlock(&fimc->lock);
  479. return ret;
  480. }
  481. static int fimc_capture_mmap(struct file *file, struct vm_area_struct *vma)
  482. {
  483. struct fimc_dev *fimc = video_drvdata(file);
  484. int ret;
  485. if (mutex_lock_interruptible(&fimc->lock))
  486. return -ERESTARTSYS;
  487. ret = vb2_mmap(&fimc->vid_cap.vbq, vma);
  488. mutex_unlock(&fimc->lock);
  489. return ret;
  490. }
  491. static const struct v4l2_file_operations fimc_capture_fops = {
  492. .owner = THIS_MODULE,
  493. .open = fimc_capture_open,
  494. .release = fimc_capture_close,
  495. .poll = fimc_capture_poll,
  496. .unlocked_ioctl = video_ioctl2,
  497. .mmap = fimc_capture_mmap,
  498. };
  499. /*
  500. * Format and crop negotiation helpers
  501. */
  502. static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
  503. u32 *width, u32 *height,
  504. u32 *code, u32 *fourcc, int pad)
  505. {
  506. bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
  507. struct fimc_dev *fimc = ctx->fimc_dev;
  508. struct fimc_variant *var = fimc->variant;
  509. struct fimc_pix_limit *pl = var->pix_limit;
  510. struct fimc_frame *dst = &ctx->d_frame;
  511. u32 depth, min_w, max_w, min_h, align_h = 3;
  512. u32 mask = FMT_FLAGS_CAM;
  513. struct fimc_fmt *ffmt;
  514. /* Conversion from/to JPEG or User Defined format is not supported */
  515. if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
  516. fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
  517. *code = ctx->s_frame.fmt->mbus_code;
  518. if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad != FIMC_SD_PAD_SINK)
  519. mask |= FMT_FLAGS_M2M;
  520. ffmt = fimc_find_format(fourcc, code, mask, 0);
  521. if (WARN_ON(!ffmt))
  522. return NULL;
  523. if (code)
  524. *code = ffmt->mbus_code;
  525. if (fourcc)
  526. *fourcc = ffmt->fourcc;
  527. if (pad == FIMC_SD_PAD_SINK) {
  528. max_w = fimc_fmt_is_user_defined(ffmt->color) ?
  529. pl->scaler_dis_w : pl->scaler_en_w;
  530. /* Apply the camera input interface pixel constraints */
  531. v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
  532. height, max_t(u32, *height, 32),
  533. FIMC_CAMIF_MAX_HEIGHT,
  534. fimc_fmt_is_user_defined(ffmt->color) ?
  535. 3 : 1,
  536. 0);
  537. return ffmt;
  538. }
  539. /* Can't scale or crop in transparent (JPEG) transfer mode */
  540. if (fimc_fmt_is_user_defined(ffmt->color)) {
  541. *width = ctx->s_frame.f_width;
  542. *height = ctx->s_frame.f_height;
  543. return ffmt;
  544. }
  545. /* Apply the scaler and the output DMA constraints */
  546. max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
  547. if (ctx->state & FIMC_COMPOSE) {
  548. min_w = dst->offs_h + dst->width;
  549. min_h = dst->offs_v + dst->height;
  550. } else {
  551. min_w = var->min_out_pixsize;
  552. min_h = var->min_out_pixsize;
  553. }
  554. if (var->min_vsize_align == 1 && !rotation)
  555. align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
  556. depth = fimc_get_format_depth(ffmt);
  557. v4l_bound_align_image(width, min_w, max_w,
  558. ffs(var->min_out_pixsize) - 1,
  559. height, min_h, FIMC_CAMIF_MAX_HEIGHT,
  560. align_h,
  561. 64/(ALIGN(depth, 8)));
  562. dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
  563. pad, code ? *code : 0, *width, *height,
  564. dst->f_width, dst->f_height);
  565. return ffmt;
  566. }
  567. static void fimc_capture_try_selection(struct fimc_ctx *ctx,
  568. struct v4l2_rect *r,
  569. int target)
  570. {
  571. bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
  572. struct fimc_dev *fimc = ctx->fimc_dev;
  573. struct fimc_variant *var = fimc->variant;
  574. struct fimc_pix_limit *pl = var->pix_limit;
  575. struct fimc_frame *sink = &ctx->s_frame;
  576. u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
  577. u32 align_sz = 0, align_h = 4;
  578. u32 max_sc_h, max_sc_v;
  579. /* In JPEG transparent transfer mode cropping is not supported */
  580. if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
  581. r->width = sink->f_width;
  582. r->height = sink->f_height;
  583. r->left = r->top = 0;
  584. return;
  585. }
  586. if (target == V4L2_SEL_TGT_COMPOSE) {
  587. if (ctx->rotation != 90 && ctx->rotation != 270)
  588. align_h = 1;
  589. max_sc_h = min(SCALER_MAX_HRATIO, 1 << (ffs(sink->width) - 3));
  590. max_sc_v = min(SCALER_MAX_VRATIO, 1 << (ffs(sink->height) - 1));
  591. min_sz = var->min_out_pixsize;
  592. } else {
  593. u32 depth = fimc_get_format_depth(sink->fmt);
  594. align_sz = 64/ALIGN(depth, 8);
  595. min_sz = var->min_inp_pixsize;
  596. min_w = min_h = min_sz;
  597. max_sc_h = max_sc_v = 1;
  598. }
  599. /*
  600. * For the compose rectangle the following constraints must be met:
  601. * - it must fit in the sink pad format rectangle (f_width/f_height);
  602. * - maximum downscaling ratio is 64;
  603. * - maximum crop size depends if the rotator is used or not;
  604. * - the sink pad format width/height must be 4 multiple of the
  605. * prescaler ratios determined by sink pad size and source pad crop,
  606. * the prescaler ratio is returned by fimc_get_scaler_factor().
  607. */
  608. max_w = min_t(u32,
  609. rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
  610. rotate ? sink->f_height : sink->f_width);
  611. max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
  612. if (target == V4L2_SEL_TGT_COMPOSE) {
  613. min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
  614. min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
  615. if (rotate) {
  616. swap(max_sc_h, max_sc_v);
  617. swap(min_w, min_h);
  618. }
  619. }
  620. v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
  621. &r->height, min_h, max_h, align_h,
  622. align_sz);
  623. /* Adjust left/top if crop/compose rectangle is out of bounds */
  624. r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
  625. r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
  626. r->left = round_down(r->left, var->hor_offs_align);
  627. dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
  628. target, r->left, r->top, r->width, r->height,
  629. sink->f_width, sink->f_height);
  630. }
  631. /*
  632. * The video node ioctl operations
  633. */
  634. static int fimc_vidioc_querycap_capture(struct file *file, void *priv,
  635. struct v4l2_capability *cap)
  636. {
  637. struct fimc_dev *fimc = video_drvdata(file);
  638. strncpy(cap->driver, fimc->pdev->name, sizeof(cap->driver) - 1);
  639. strncpy(cap->card, fimc->pdev->name, sizeof(cap->card) - 1);
  640. cap->bus_info[0] = 0;
  641. cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
  642. return 0;
  643. }
  644. static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv,
  645. struct v4l2_fmtdesc *f)
  646. {
  647. struct fimc_fmt *fmt;
  648. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
  649. f->index);
  650. if (!fmt)
  651. return -EINVAL;
  652. strncpy(f->description, fmt->name, sizeof(f->description) - 1);
  653. f->pixelformat = fmt->fourcc;
  654. if (fmt->fourcc == V4L2_MBUS_FMT_JPEG_1X8)
  655. f->flags |= V4L2_FMT_FLAG_COMPRESSED;
  656. return 0;
  657. }
  658. /**
  659. * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
  660. * elements
  661. * @ctx: FIMC capture context
  662. * @tfmt: media bus format to try/set on subdevs
  663. * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
  664. * @set: true to set format on subdevs, false to try only
  665. */
  666. static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
  667. struct v4l2_mbus_framefmt *tfmt,
  668. struct fimc_fmt **fmt_id,
  669. bool set)
  670. {
  671. struct fimc_dev *fimc = ctx->fimc_dev;
  672. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  673. struct v4l2_subdev *csis = fimc->pipeline.subdevs[IDX_CSIS];
  674. struct v4l2_subdev_format sfmt;
  675. struct v4l2_mbus_framefmt *mf = &sfmt.format;
  676. struct fimc_fmt *ffmt = NULL;
  677. int ret, i = 0;
  678. if (WARN_ON(!sd || !tfmt))
  679. return -EINVAL;
  680. memset(&sfmt, 0, sizeof(sfmt));
  681. sfmt.format = *tfmt;
  682. sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
  683. while (1) {
  684. ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
  685. FMT_FLAGS_CAM, i++);
  686. if (ffmt == NULL) {
  687. /*
  688. * Notify user-space if common pixel code for
  689. * host and sensor does not exist.
  690. */
  691. return -EINVAL;
  692. }
  693. mf->code = tfmt->code = ffmt->mbus_code;
  694. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
  695. if (ret)
  696. return ret;
  697. if (mf->code != tfmt->code) {
  698. mf->code = 0;
  699. continue;
  700. }
  701. if (mf->width != tfmt->width || mf->height != tfmt->height) {
  702. u32 fcc = ffmt->fourcc;
  703. tfmt->width = mf->width;
  704. tfmt->height = mf->height;
  705. ffmt = fimc_capture_try_format(ctx,
  706. &tfmt->width, &tfmt->height,
  707. NULL, &fcc, FIMC_SD_PAD_SOURCE);
  708. if (ffmt && ffmt->mbus_code)
  709. mf->code = ffmt->mbus_code;
  710. if (mf->width != tfmt->width ||
  711. mf->height != tfmt->height)
  712. continue;
  713. tfmt->code = mf->code;
  714. }
  715. if (csis)
  716. ret = v4l2_subdev_call(csis, pad, set_fmt, NULL, &sfmt);
  717. if (mf->code == tfmt->code &&
  718. mf->width == tfmt->width && mf->height == tfmt->height)
  719. break;
  720. }
  721. if (fmt_id && ffmt)
  722. *fmt_id = ffmt;
  723. *tfmt = *mf;
  724. dbg("code: 0x%x, %dx%d, %p", mf->code, mf->width, mf->height, ffmt);
  725. return 0;
  726. }
  727. /**
  728. * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters
  729. * @sensor: pointer to the sensor subdev
  730. * @plane_fmt: provides plane sizes corresponding to the frame layout entries
  731. * @try: true to set the frame parameters, false to query only
  732. *
  733. * This function is used by this driver only for compressed/blob data formats.
  734. */
  735. static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
  736. struct v4l2_plane_pix_format *plane_fmt,
  737. unsigned int num_planes, bool try)
  738. {
  739. struct v4l2_mbus_frame_desc fd;
  740. int i, ret;
  741. for (i = 0; i < num_planes; i++)
  742. fd.entry[i].length = plane_fmt[i].sizeimage;
  743. if (try)
  744. ret = v4l2_subdev_call(sensor, pad, set_frame_desc, 0, &fd);
  745. else
  746. ret = v4l2_subdev_call(sensor, pad, get_frame_desc, 0, &fd);
  747. if (ret < 0)
  748. return ret;
  749. if (num_planes != fd.num_entries)
  750. return -EINVAL;
  751. for (i = 0; i < num_planes; i++)
  752. plane_fmt[i].sizeimage = fd.entry[i].length;
  753. if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
  754. v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n",
  755. fd.entry[0].length);
  756. return -EINVAL;
  757. }
  758. return 0;
  759. }
  760. static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
  761. struct v4l2_format *f)
  762. {
  763. struct fimc_dev *fimc = video_drvdata(file);
  764. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  765. return fimc_fill_format(&ctx->d_frame, f);
  766. }
  767. static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
  768. struct v4l2_format *f)
  769. {
  770. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  771. struct fimc_dev *fimc = video_drvdata(file);
  772. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  773. struct v4l2_mbus_framefmt mf;
  774. struct fimc_fmt *ffmt = NULL;
  775. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  776. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  777. NULL, &pix->pixelformat,
  778. FIMC_SD_PAD_SINK);
  779. ctx->s_frame.f_width = pix->width;
  780. ctx->s_frame.f_height = pix->height;
  781. }
  782. ffmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  783. NULL, &pix->pixelformat,
  784. FIMC_SD_PAD_SOURCE);
  785. if (!ffmt)
  786. return -EINVAL;
  787. if (!fimc->vid_cap.user_subdev_api) {
  788. mf.width = pix->width;
  789. mf.height = pix->height;
  790. mf.code = ffmt->mbus_code;
  791. fimc_md_graph_lock(fimc);
  792. fimc_pipeline_try_format(ctx, &mf, &ffmt, false);
  793. fimc_md_graph_unlock(fimc);
  794. pix->width = mf.width;
  795. pix->height = mf.height;
  796. if (ffmt)
  797. pix->pixelformat = ffmt->fourcc;
  798. }
  799. fimc_adjust_mplane_format(ffmt, pix->width, pix->height, pix);
  800. if (ffmt->flags & FMT_FLAGS_COMPRESSED)
  801. fimc_get_sensor_frame_desc(fimc->pipeline.subdevs[IDX_SENSOR],
  802. pix->plane_fmt, ffmt->memplanes, true);
  803. return 0;
  804. }
  805. static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
  806. enum fimc_color_fmt color)
  807. {
  808. bool jpeg = fimc_fmt_is_user_defined(color);
  809. ctx->scaler.enabled = !jpeg;
  810. fimc_ctrls_activate(ctx, !jpeg);
  811. if (jpeg)
  812. set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  813. else
  814. clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  815. }
  816. static int fimc_capture_set_format(struct fimc_dev *fimc, struct v4l2_format *f)
  817. {
  818. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  819. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  820. struct v4l2_mbus_framefmt *mf = &fimc->vid_cap.mf;
  821. struct fimc_frame *ff = &ctx->d_frame;
  822. struct fimc_fmt *s_fmt = NULL;
  823. int ret, i;
  824. if (vb2_is_busy(&fimc->vid_cap.vbq))
  825. return -EBUSY;
  826. /* Pre-configure format at camera interface input, for JPEG only */
  827. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  828. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  829. NULL, &pix->pixelformat,
  830. FIMC_SD_PAD_SINK);
  831. ctx->s_frame.f_width = pix->width;
  832. ctx->s_frame.f_height = pix->height;
  833. }
  834. /* Try the format at the scaler and the DMA output */
  835. ff->fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  836. NULL, &pix->pixelformat,
  837. FIMC_SD_PAD_SOURCE);
  838. if (!ff->fmt)
  839. return -EINVAL;
  840. /* Update RGB Alpha control state and value range */
  841. fimc_alpha_ctrl_update(ctx);
  842. /* Try to match format at the host and the sensor */
  843. if (!fimc->vid_cap.user_subdev_api) {
  844. mf->code = ff->fmt->mbus_code;
  845. mf->width = pix->width;
  846. mf->height = pix->height;
  847. fimc_md_graph_lock(fimc);
  848. ret = fimc_pipeline_try_format(ctx, mf, &s_fmt, true);
  849. fimc_md_graph_unlock(fimc);
  850. if (ret)
  851. return ret;
  852. pix->width = mf->width;
  853. pix->height = mf->height;
  854. }
  855. fimc_adjust_mplane_format(ff->fmt, pix->width, pix->height, pix);
  856. if (ff->fmt->flags & FMT_FLAGS_COMPRESSED) {
  857. ret = fimc_get_sensor_frame_desc(fimc->pipeline.subdevs[IDX_SENSOR],
  858. pix->plane_fmt, ff->fmt->memplanes,
  859. true);
  860. if (ret < 0)
  861. return ret;
  862. }
  863. for (i = 0; i < ff->fmt->memplanes; i++)
  864. ff->payload[i] = pix->plane_fmt[i].sizeimage;
  865. set_frame_bounds(ff, pix->width, pix->height);
  866. /* Reset the composition rectangle if not yet configured */
  867. if (!(ctx->state & FIMC_COMPOSE))
  868. set_frame_crop(ff, 0, 0, pix->width, pix->height);
  869. fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
  870. /* Reset cropping and set format at the camera interface input */
  871. if (!fimc->vid_cap.user_subdev_api) {
  872. ctx->s_frame.fmt = s_fmt;
  873. set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
  874. set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
  875. }
  876. return ret;
  877. }
  878. static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
  879. struct v4l2_format *f)
  880. {
  881. struct fimc_dev *fimc = video_drvdata(file);
  882. return fimc_capture_set_format(fimc, f);
  883. }
  884. static int fimc_cap_enum_input(struct file *file, void *priv,
  885. struct v4l2_input *i)
  886. {
  887. struct fimc_dev *fimc = video_drvdata(file);
  888. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  889. if (i->index != 0)
  890. return -EINVAL;
  891. i->type = V4L2_INPUT_TYPE_CAMERA;
  892. if (sd)
  893. strlcpy(i->name, sd->name, sizeof(i->name));
  894. return 0;
  895. }
  896. static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
  897. {
  898. return i == 0 ? i : -EINVAL;
  899. }
  900. static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
  901. {
  902. *i = 0;
  903. return 0;
  904. }
  905. /**
  906. * fimc_pipeline_validate - check for formats inconsistencies
  907. * between source and sink pad of each link
  908. *
  909. * Return 0 if all formats match or -EPIPE otherwise.
  910. */
  911. static int fimc_pipeline_validate(struct fimc_dev *fimc)
  912. {
  913. struct v4l2_subdev_format sink_fmt, src_fmt;
  914. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  915. struct v4l2_subdev *sd;
  916. struct media_pad *pad;
  917. int ret;
  918. /* Start with the video capture node pad */
  919. pad = media_entity_remote_source(&vid_cap->vd_pad);
  920. if (pad == NULL)
  921. return -EPIPE;
  922. /* FIMC.{N} subdevice */
  923. sd = media_entity_to_v4l2_subdev(pad->entity);
  924. while (1) {
  925. /* Retrieve format at the sink pad */
  926. pad = &sd->entity.pads[0];
  927. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  928. break;
  929. /* Don't call FIMC subdev operation to avoid nested locking */
  930. if (sd == &fimc->vid_cap.subdev) {
  931. struct fimc_frame *ff = &vid_cap->ctx->s_frame;
  932. sink_fmt.format.width = ff->f_width;
  933. sink_fmt.format.height = ff->f_height;
  934. sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
  935. } else {
  936. sink_fmt.pad = pad->index;
  937. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  938. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
  939. if (ret < 0 && ret != -ENOIOCTLCMD)
  940. return -EPIPE;
  941. }
  942. /* Retrieve format at the source pad */
  943. pad = media_entity_remote_source(pad);
  944. if (pad == NULL ||
  945. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  946. break;
  947. sd = media_entity_to_v4l2_subdev(pad->entity);
  948. src_fmt.pad = pad->index;
  949. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  950. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  951. if (ret < 0 && ret != -ENOIOCTLCMD)
  952. return -EPIPE;
  953. if (src_fmt.format.width != sink_fmt.format.width ||
  954. src_fmt.format.height != sink_fmt.format.height ||
  955. src_fmt.format.code != sink_fmt.format.code)
  956. return -EPIPE;
  957. if (sd == fimc->pipeline.subdevs[IDX_SENSOR] &&
  958. fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
  959. struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
  960. struct fimc_frame *frame = &vid_cap->ctx->d_frame;
  961. unsigned int i;
  962. ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
  963. frame->fmt->memplanes,
  964. false);
  965. if (ret < 0)
  966. return -EPIPE;
  967. for (i = 0; i < frame->fmt->memplanes; i++)
  968. if (frame->payload[i] < plane_fmt[i].sizeimage)
  969. return -EPIPE;
  970. }
  971. }
  972. return 0;
  973. }
  974. static int fimc_cap_streamon(struct file *file, void *priv,
  975. enum v4l2_buf_type type)
  976. {
  977. struct fimc_dev *fimc = video_drvdata(file);
  978. struct fimc_pipeline *p = &fimc->pipeline;
  979. struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR];
  980. int ret;
  981. if (fimc_capture_active(fimc))
  982. return -EBUSY;
  983. ret = media_entity_pipeline_start(&sd->entity, p->m_pipeline);
  984. if (ret < 0)
  985. return ret;
  986. if (fimc->vid_cap.user_subdev_api) {
  987. ret = fimc_pipeline_validate(fimc);
  988. if (ret < 0) {
  989. media_entity_pipeline_stop(&sd->entity);
  990. return ret;
  991. }
  992. }
  993. return vb2_streamon(&fimc->vid_cap.vbq, type);
  994. }
  995. static int fimc_cap_streamoff(struct file *file, void *priv,
  996. enum v4l2_buf_type type)
  997. {
  998. struct fimc_dev *fimc = video_drvdata(file);
  999. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  1000. int ret;
  1001. ret = vb2_streamoff(&fimc->vid_cap.vbq, type);
  1002. if (ret == 0)
  1003. media_entity_pipeline_stop(&sd->entity);
  1004. return ret;
  1005. }
  1006. static int fimc_cap_reqbufs(struct file *file, void *priv,
  1007. struct v4l2_requestbuffers *reqbufs)
  1008. {
  1009. struct fimc_dev *fimc = video_drvdata(file);
  1010. int ret = vb2_reqbufs(&fimc->vid_cap.vbq, reqbufs);
  1011. if (!ret)
  1012. fimc->vid_cap.reqbufs_count = reqbufs->count;
  1013. return ret;
  1014. }
  1015. static int fimc_cap_querybuf(struct file *file, void *priv,
  1016. struct v4l2_buffer *buf)
  1017. {
  1018. struct fimc_dev *fimc = video_drvdata(file);
  1019. return vb2_querybuf(&fimc->vid_cap.vbq, buf);
  1020. }
  1021. static int fimc_cap_qbuf(struct file *file, void *priv,
  1022. struct v4l2_buffer *buf)
  1023. {
  1024. struct fimc_dev *fimc = video_drvdata(file);
  1025. return vb2_qbuf(&fimc->vid_cap.vbq, buf);
  1026. }
  1027. static int fimc_cap_expbuf(struct file *file, void *priv,
  1028. struct v4l2_exportbuffer *eb)
  1029. {
  1030. struct fimc_dev *fimc = video_drvdata(file);
  1031. return vb2_expbuf(&fimc->vid_cap.vbq, eb);
  1032. }
  1033. static int fimc_cap_dqbuf(struct file *file, void *priv,
  1034. struct v4l2_buffer *buf)
  1035. {
  1036. struct fimc_dev *fimc = video_drvdata(file);
  1037. return vb2_dqbuf(&fimc->vid_cap.vbq, buf, file->f_flags & O_NONBLOCK);
  1038. }
  1039. static int fimc_cap_create_bufs(struct file *file, void *priv,
  1040. struct v4l2_create_buffers *create)
  1041. {
  1042. struct fimc_dev *fimc = video_drvdata(file);
  1043. return vb2_create_bufs(&fimc->vid_cap.vbq, create);
  1044. }
  1045. static int fimc_cap_prepare_buf(struct file *file, void *priv,
  1046. struct v4l2_buffer *b)
  1047. {
  1048. struct fimc_dev *fimc = video_drvdata(file);
  1049. return vb2_prepare_buf(&fimc->vid_cap.vbq, b);
  1050. }
  1051. static int fimc_cap_g_selection(struct file *file, void *fh,
  1052. struct v4l2_selection *s)
  1053. {
  1054. struct fimc_dev *fimc = video_drvdata(file);
  1055. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1056. struct fimc_frame *f = &ctx->s_frame;
  1057. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1058. return -EINVAL;
  1059. switch (s->target) {
  1060. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  1061. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1062. f = &ctx->d_frame;
  1063. case V4L2_SEL_TGT_CROP_BOUNDS:
  1064. case V4L2_SEL_TGT_CROP_DEFAULT:
  1065. s->r.left = 0;
  1066. s->r.top = 0;
  1067. s->r.width = f->o_width;
  1068. s->r.height = f->o_height;
  1069. return 0;
  1070. case V4L2_SEL_TGT_COMPOSE:
  1071. f = &ctx->d_frame;
  1072. case V4L2_SEL_TGT_CROP:
  1073. s->r.left = f->offs_h;
  1074. s->r.top = f->offs_v;
  1075. s->r.width = f->width;
  1076. s->r.height = f->height;
  1077. return 0;
  1078. }
  1079. return -EINVAL;
  1080. }
  1081. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  1082. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  1083. {
  1084. if (a->left < b->left || a->top < b->top)
  1085. return 0;
  1086. if (a->left + a->width > b->left + b->width)
  1087. return 0;
  1088. if (a->top + a->height > b->top + b->height)
  1089. return 0;
  1090. return 1;
  1091. }
  1092. static int fimc_cap_s_selection(struct file *file, void *fh,
  1093. struct v4l2_selection *s)
  1094. {
  1095. struct fimc_dev *fimc = video_drvdata(file);
  1096. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1097. struct v4l2_rect rect = s->r;
  1098. struct fimc_frame *f;
  1099. unsigned long flags;
  1100. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1101. return -EINVAL;
  1102. if (s->target == V4L2_SEL_TGT_COMPOSE)
  1103. f = &ctx->d_frame;
  1104. else if (s->target == V4L2_SEL_TGT_CROP)
  1105. f = &ctx->s_frame;
  1106. else
  1107. return -EINVAL;
  1108. fimc_capture_try_selection(ctx, &rect, s->target);
  1109. if (s->flags & V4L2_SEL_FLAG_LE &&
  1110. !enclosed_rectangle(&rect, &s->r))
  1111. return -ERANGE;
  1112. if (s->flags & V4L2_SEL_FLAG_GE &&
  1113. !enclosed_rectangle(&s->r, &rect))
  1114. return -ERANGE;
  1115. s->r = rect;
  1116. spin_lock_irqsave(&fimc->slock, flags);
  1117. set_frame_crop(f, s->r.left, s->r.top, s->r.width,
  1118. s->r.height);
  1119. spin_unlock_irqrestore(&fimc->slock, flags);
  1120. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1121. return 0;
  1122. }
  1123. static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
  1124. .vidioc_querycap = fimc_vidioc_querycap_capture,
  1125. .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane,
  1126. .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
  1127. .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
  1128. .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
  1129. .vidioc_reqbufs = fimc_cap_reqbufs,
  1130. .vidioc_querybuf = fimc_cap_querybuf,
  1131. .vidioc_qbuf = fimc_cap_qbuf,
  1132. .vidioc_dqbuf = fimc_cap_dqbuf,
  1133. .vidioc_expbuf = fimc_cap_expbuf,
  1134. .vidioc_prepare_buf = fimc_cap_prepare_buf,
  1135. .vidioc_create_bufs = fimc_cap_create_bufs,
  1136. .vidioc_streamon = fimc_cap_streamon,
  1137. .vidioc_streamoff = fimc_cap_streamoff,
  1138. .vidioc_g_selection = fimc_cap_g_selection,
  1139. .vidioc_s_selection = fimc_cap_s_selection,
  1140. .vidioc_enum_input = fimc_cap_enum_input,
  1141. .vidioc_s_input = fimc_cap_s_input,
  1142. .vidioc_g_input = fimc_cap_g_input,
  1143. };
  1144. /* Capture subdev media entity operations */
  1145. static int fimc_link_setup(struct media_entity *entity,
  1146. const struct media_pad *local,
  1147. const struct media_pad *remote, u32 flags)
  1148. {
  1149. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1150. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1151. if (media_entity_type(remote->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  1152. return -EINVAL;
  1153. if (WARN_ON(fimc == NULL))
  1154. return 0;
  1155. dbg("%s --> %s, flags: 0x%x. input: 0x%x",
  1156. local->entity->name, remote->entity->name, flags,
  1157. fimc->vid_cap.input);
  1158. if (flags & MEDIA_LNK_FL_ENABLED) {
  1159. if (fimc->vid_cap.input != 0)
  1160. return -EBUSY;
  1161. fimc->vid_cap.input = sd->grp_id;
  1162. return 0;
  1163. }
  1164. fimc->vid_cap.input = 0;
  1165. return 0;
  1166. }
  1167. static const struct media_entity_operations fimc_sd_media_ops = {
  1168. .link_setup = fimc_link_setup,
  1169. };
  1170. /**
  1171. * fimc_sensor_notify - v4l2_device notification from a sensor subdev
  1172. * @sd: pointer to a subdev generating the notification
  1173. * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
  1174. * @arg: pointer to an u32 type integer that stores the frame payload value
  1175. *
  1176. * The End Of Frame notification sent by sensor subdev in its still capture
  1177. * mode. If there is only a single VSYNC generated by the sensor at the
  1178. * beginning of a frame transmission, FIMC does not issue the LastIrq
  1179. * (end of frame) interrupt. And this notification is used to complete the
  1180. * frame capture and returning a buffer to user-space. Subdev drivers should
  1181. * call this notification from their last 'End of frame capture' interrupt.
  1182. */
  1183. void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
  1184. void *arg)
  1185. {
  1186. struct fimc_sensor_info *sensor;
  1187. struct fimc_vid_buffer *buf;
  1188. struct fimc_md *fmd;
  1189. struct fimc_dev *fimc;
  1190. unsigned long flags;
  1191. if (sd == NULL)
  1192. return;
  1193. sensor = v4l2_get_subdev_hostdata(sd);
  1194. fmd = entity_to_fimc_mdev(&sd->entity);
  1195. spin_lock_irqsave(&fmd->slock, flags);
  1196. fimc = sensor ? sensor->host : NULL;
  1197. if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
  1198. test_bit(ST_CAPT_PEND, &fimc->state)) {
  1199. unsigned long irq_flags;
  1200. spin_lock_irqsave(&fimc->slock, irq_flags);
  1201. if (!list_empty(&fimc->vid_cap.active_buf_q)) {
  1202. buf = list_entry(fimc->vid_cap.active_buf_q.next,
  1203. struct fimc_vid_buffer, list);
  1204. vb2_set_plane_payload(&buf->vb, 0, *((u32 *)arg));
  1205. }
  1206. fimc_capture_irq_handler(fimc, 1);
  1207. fimc_deactivate_capture(fimc);
  1208. spin_unlock_irqrestore(&fimc->slock, irq_flags);
  1209. }
  1210. spin_unlock_irqrestore(&fmd->slock, flags);
  1211. }
  1212. static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  1213. struct v4l2_subdev_fh *fh,
  1214. struct v4l2_subdev_mbus_code_enum *code)
  1215. {
  1216. struct fimc_fmt *fmt;
  1217. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
  1218. if (!fmt)
  1219. return -EINVAL;
  1220. code->code = fmt->mbus_code;
  1221. return 0;
  1222. }
  1223. static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
  1224. struct v4l2_subdev_fh *fh,
  1225. struct v4l2_subdev_format *fmt)
  1226. {
  1227. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1228. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1229. struct v4l2_mbus_framefmt *mf;
  1230. struct fimc_frame *ff;
  1231. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1232. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  1233. fmt->format = *mf;
  1234. return 0;
  1235. }
  1236. mf = &fmt->format;
  1237. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1238. ff = fmt->pad == FIMC_SD_PAD_SINK ? &ctx->s_frame : &ctx->d_frame;
  1239. mutex_lock(&fimc->lock);
  1240. /* The pixel code is same on both input and output pad */
  1241. if (!WARN_ON(ctx->s_frame.fmt == NULL))
  1242. mf->code = ctx->s_frame.fmt->mbus_code;
  1243. mf->width = ff->f_width;
  1244. mf->height = ff->f_height;
  1245. mutex_unlock(&fimc->lock);
  1246. return 0;
  1247. }
  1248. static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
  1249. struct v4l2_subdev_fh *fh,
  1250. struct v4l2_subdev_format *fmt)
  1251. {
  1252. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1253. struct v4l2_mbus_framefmt *mf = &fmt->format;
  1254. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1255. struct fimc_frame *ff;
  1256. struct fimc_fmt *ffmt;
  1257. dbg("pad%d: code: 0x%x, %dx%d",
  1258. fmt->pad, mf->code, mf->width, mf->height);
  1259. if (fmt->pad == FIMC_SD_PAD_SOURCE &&
  1260. vb2_is_busy(&fimc->vid_cap.vbq))
  1261. return -EBUSY;
  1262. mutex_lock(&fimc->lock);
  1263. ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
  1264. &mf->code, NULL, fmt->pad);
  1265. mutex_unlock(&fimc->lock);
  1266. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1267. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1268. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  1269. *mf = fmt->format;
  1270. return 0;
  1271. }
  1272. /* Update RGB Alpha control state and value range */
  1273. fimc_alpha_ctrl_update(ctx);
  1274. fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
  1275. ff = fmt->pad == FIMC_SD_PAD_SINK ?
  1276. &ctx->s_frame : &ctx->d_frame;
  1277. mutex_lock(&fimc->lock);
  1278. set_frame_bounds(ff, mf->width, mf->height);
  1279. fimc->vid_cap.mf = *mf;
  1280. ff->fmt = ffmt;
  1281. /* Reset the crop rectangle if required. */
  1282. if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
  1283. set_frame_crop(ff, 0, 0, mf->width, mf->height);
  1284. if (fmt->pad == FIMC_SD_PAD_SINK)
  1285. ctx->state &= ~FIMC_COMPOSE;
  1286. mutex_unlock(&fimc->lock);
  1287. return 0;
  1288. }
  1289. static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
  1290. struct v4l2_subdev_fh *fh,
  1291. struct v4l2_subdev_selection *sel)
  1292. {
  1293. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1294. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1295. struct fimc_frame *f = &ctx->s_frame;
  1296. struct v4l2_rect *r = &sel->r;
  1297. struct v4l2_rect *try_sel;
  1298. if (sel->pad != FIMC_SD_PAD_SINK)
  1299. return -EINVAL;
  1300. mutex_lock(&fimc->lock);
  1301. switch (sel->target) {
  1302. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1303. f = &ctx->d_frame;
  1304. case V4L2_SEL_TGT_CROP_BOUNDS:
  1305. r->width = f->o_width;
  1306. r->height = f->o_height;
  1307. r->left = 0;
  1308. r->top = 0;
  1309. mutex_unlock(&fimc->lock);
  1310. return 0;
  1311. case V4L2_SEL_TGT_CROP:
  1312. try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
  1313. break;
  1314. case V4L2_SEL_TGT_COMPOSE:
  1315. try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
  1316. f = &ctx->d_frame;
  1317. break;
  1318. default:
  1319. mutex_unlock(&fimc->lock);
  1320. return -EINVAL;
  1321. }
  1322. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1323. sel->r = *try_sel;
  1324. } else {
  1325. r->left = f->offs_h;
  1326. r->top = f->offs_v;
  1327. r->width = f->width;
  1328. r->height = f->height;
  1329. }
  1330. dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
  1331. sel->pad, r->left, r->top, r->width, r->height,
  1332. f->f_width, f->f_height);
  1333. mutex_unlock(&fimc->lock);
  1334. return 0;
  1335. }
  1336. static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
  1337. struct v4l2_subdev_fh *fh,
  1338. struct v4l2_subdev_selection *sel)
  1339. {
  1340. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1341. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1342. struct fimc_frame *f = &ctx->s_frame;
  1343. struct v4l2_rect *r = &sel->r;
  1344. struct v4l2_rect *try_sel;
  1345. unsigned long flags;
  1346. if (sel->pad != FIMC_SD_PAD_SINK)
  1347. return -EINVAL;
  1348. mutex_lock(&fimc->lock);
  1349. fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
  1350. switch (sel->target) {
  1351. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1352. f = &ctx->d_frame;
  1353. case V4L2_SEL_TGT_CROP_BOUNDS:
  1354. r->width = f->o_width;
  1355. r->height = f->o_height;
  1356. r->left = 0;
  1357. r->top = 0;
  1358. mutex_unlock(&fimc->lock);
  1359. return 0;
  1360. case V4L2_SEL_TGT_CROP:
  1361. try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
  1362. break;
  1363. case V4L2_SEL_TGT_COMPOSE:
  1364. try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
  1365. f = &ctx->d_frame;
  1366. break;
  1367. default:
  1368. mutex_unlock(&fimc->lock);
  1369. return -EINVAL;
  1370. }
  1371. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1372. *try_sel = sel->r;
  1373. } else {
  1374. spin_lock_irqsave(&fimc->slock, flags);
  1375. set_frame_crop(f, r->left, r->top, r->width, r->height);
  1376. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1377. spin_unlock_irqrestore(&fimc->slock, flags);
  1378. if (sel->target == V4L2_SEL_TGT_COMPOSE)
  1379. ctx->state |= FIMC_COMPOSE;
  1380. }
  1381. dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
  1382. r->width, r->height);
  1383. mutex_unlock(&fimc->lock);
  1384. return 0;
  1385. }
  1386. static struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
  1387. .enum_mbus_code = fimc_subdev_enum_mbus_code,
  1388. .get_selection = fimc_subdev_get_selection,
  1389. .set_selection = fimc_subdev_set_selection,
  1390. .get_fmt = fimc_subdev_get_fmt,
  1391. .set_fmt = fimc_subdev_set_fmt,
  1392. };
  1393. static struct v4l2_subdev_ops fimc_subdev_ops = {
  1394. .pad = &fimc_subdev_pad_ops,
  1395. };
  1396. /* Set default format at the sensor and host interface */
  1397. static int fimc_capture_set_default_format(struct fimc_dev *fimc)
  1398. {
  1399. struct v4l2_format fmt = {
  1400. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  1401. .fmt.pix_mp = {
  1402. .width = 640,
  1403. .height = 480,
  1404. .pixelformat = V4L2_PIX_FMT_YUYV,
  1405. .field = V4L2_FIELD_NONE,
  1406. .colorspace = V4L2_COLORSPACE_JPEG,
  1407. },
  1408. };
  1409. return fimc_capture_set_format(fimc, &fmt);
  1410. }
  1411. /* fimc->lock must be already initialized */
  1412. static int fimc_register_capture_device(struct fimc_dev *fimc,
  1413. struct v4l2_device *v4l2_dev)
  1414. {
  1415. struct video_device *vfd = &fimc->vid_cap.vfd;
  1416. struct fimc_vid_cap *vid_cap;
  1417. struct fimc_ctx *ctx;
  1418. struct vb2_queue *q;
  1419. int ret = -ENOMEM;
  1420. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  1421. if (!ctx)
  1422. return -ENOMEM;
  1423. ctx->fimc_dev = fimc;
  1424. ctx->in_path = FIMC_IO_CAMERA;
  1425. ctx->out_path = FIMC_IO_DMA;
  1426. ctx->state = FIMC_CTX_CAP;
  1427. ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1428. ctx->d_frame.fmt = ctx->s_frame.fmt;
  1429. memset(vfd, 0, sizeof(*vfd));
  1430. snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
  1431. vfd->fops = &fimc_capture_fops;
  1432. vfd->ioctl_ops = &fimc_capture_ioctl_ops;
  1433. vfd->v4l2_dev = v4l2_dev;
  1434. vfd->minor = -1;
  1435. vfd->release = video_device_release_empty;
  1436. vfd->lock = &fimc->lock;
  1437. video_set_drvdata(vfd, fimc);
  1438. vid_cap = &fimc->vid_cap;
  1439. vid_cap->active_buf_cnt = 0;
  1440. vid_cap->reqbufs_count = 0;
  1441. vid_cap->refcnt = 0;
  1442. INIT_LIST_HEAD(&vid_cap->pending_buf_q);
  1443. INIT_LIST_HEAD(&vid_cap->active_buf_q);
  1444. vid_cap->ctx = ctx;
  1445. q = &fimc->vid_cap.vbq;
  1446. memset(q, 0, sizeof(*q));
  1447. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1448. q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
  1449. q->drv_priv = fimc->vid_cap.ctx;
  1450. q->ops = &fimc_capture_qops;
  1451. q->mem_ops = &vb2_dma_contig_memops;
  1452. q->buf_struct_size = sizeof(struct fimc_vid_buffer);
  1453. ret = vb2_queue_init(q);
  1454. if (ret)
  1455. goto err_ent;
  1456. vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1457. ret = media_entity_init(&vfd->entity, 1, &vid_cap->vd_pad, 0);
  1458. if (ret)
  1459. goto err_ent;
  1460. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1461. if (ret)
  1462. goto err_vd;
  1463. v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
  1464. vfd->name, video_device_node_name(vfd));
  1465. vfd->ctrl_handler = &ctx->ctrls.handler;
  1466. return 0;
  1467. err_vd:
  1468. media_entity_cleanup(&vfd->entity);
  1469. err_ent:
  1470. kfree(ctx);
  1471. return ret;
  1472. }
  1473. static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
  1474. {
  1475. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1476. int ret;
  1477. if (fimc == NULL)
  1478. return -ENXIO;
  1479. ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
  1480. if (ret)
  1481. return ret;
  1482. fimc->pipeline_ops = v4l2_get_subdev_hostdata(sd);
  1483. ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
  1484. if (ret) {
  1485. fimc_unregister_m2m_device(fimc);
  1486. fimc->pipeline_ops = NULL;
  1487. }
  1488. return ret;
  1489. }
  1490. static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
  1491. {
  1492. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1493. if (fimc == NULL)
  1494. return;
  1495. fimc_unregister_m2m_device(fimc);
  1496. if (video_is_registered(&fimc->vid_cap.vfd)) {
  1497. video_unregister_device(&fimc->vid_cap.vfd);
  1498. media_entity_cleanup(&fimc->vid_cap.vfd.entity);
  1499. fimc->pipeline_ops = NULL;
  1500. }
  1501. kfree(fimc->vid_cap.ctx);
  1502. fimc->vid_cap.ctx = NULL;
  1503. }
  1504. static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
  1505. .registered = fimc_capture_subdev_registered,
  1506. .unregistered = fimc_capture_subdev_unregistered,
  1507. };
  1508. int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
  1509. {
  1510. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1511. int ret;
  1512. v4l2_subdev_init(sd, &fimc_subdev_ops);
  1513. sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
  1514. snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->pdev->id);
  1515. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1516. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1517. ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
  1518. fimc->vid_cap.sd_pads, 0);
  1519. if (ret)
  1520. return ret;
  1521. sd->entity.ops = &fimc_sd_media_ops;
  1522. sd->internal_ops = &fimc_capture_sd_internal_ops;
  1523. v4l2_set_subdevdata(sd, fimc);
  1524. return 0;
  1525. }
  1526. void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
  1527. {
  1528. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1529. v4l2_device_unregister_subdev(sd);
  1530. media_entity_cleanup(&sd->entity);
  1531. v4l2_set_subdevdata(sd, NULL);
  1532. }