vpbe_venc.c 18 KB

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  1. /*
  2. * Copyright (C) 2010 Texas Instruments Inc
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation version 2.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program; if not, write to the Free Software
  15. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/init.h>
  20. #include <linux/ctype.h>
  21. #include <linux/delay.h>
  22. #include <linux/device.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/videodev2.h>
  26. #include <linux/slab.h>
  27. #include <mach/hardware.h>
  28. #include <mach/mux.h>
  29. #include <linux/platform_data/i2c-davinci.h>
  30. #include <linux/io.h>
  31. #include <media/davinci/vpbe_types.h>
  32. #include <media/davinci/vpbe_venc.h>
  33. #include <media/davinci/vpss.h>
  34. #include <media/v4l2-device.h>
  35. #include "vpbe_venc_regs.h"
  36. #define MODULE_NAME VPBE_VENC_SUBDEV_NAME
  37. static int debug = 2;
  38. module_param(debug, int, 0644);
  39. MODULE_PARM_DESC(debug, "Debug level 0-2");
  40. struct venc_state {
  41. struct v4l2_subdev sd;
  42. struct venc_callback *callback;
  43. struct venc_platform_data *pdata;
  44. struct device *pdev;
  45. u32 output;
  46. v4l2_std_id std;
  47. spinlock_t lock;
  48. void __iomem *venc_base;
  49. void __iomem *vdaccfg_reg;
  50. };
  51. static inline struct venc_state *to_state(struct v4l2_subdev *sd)
  52. {
  53. return container_of(sd, struct venc_state, sd);
  54. }
  55. static inline u32 venc_read(struct v4l2_subdev *sd, u32 offset)
  56. {
  57. struct venc_state *venc = to_state(sd);
  58. return readl(venc->venc_base + offset);
  59. }
  60. static inline u32 venc_write(struct v4l2_subdev *sd, u32 offset, u32 val)
  61. {
  62. struct venc_state *venc = to_state(sd);
  63. writel(val, (venc->venc_base + offset));
  64. return val;
  65. }
  66. static inline u32 venc_modify(struct v4l2_subdev *sd, u32 offset,
  67. u32 val, u32 mask)
  68. {
  69. u32 new_val = (venc_read(sd, offset) & ~mask) | (val & mask);
  70. venc_write(sd, offset, new_val);
  71. return new_val;
  72. }
  73. static inline u32 vdaccfg_write(struct v4l2_subdev *sd, u32 val)
  74. {
  75. struct venc_state *venc = to_state(sd);
  76. writel(val, venc->vdaccfg_reg);
  77. val = readl(venc->vdaccfg_reg);
  78. return val;
  79. }
  80. #define VDAC_COMPONENT 0x543
  81. #define VDAC_S_VIDEO 0x210
  82. /* This function sets the dac of the VPBE for various outputs
  83. */
  84. static int venc_set_dac(struct v4l2_subdev *sd, u32 out_index)
  85. {
  86. switch (out_index) {
  87. case 0:
  88. v4l2_dbg(debug, 1, sd, "Setting output to Composite\n");
  89. venc_write(sd, VENC_DACSEL, 0);
  90. break;
  91. case 1:
  92. v4l2_dbg(debug, 1, sd, "Setting output to Component\n");
  93. venc_write(sd, VENC_DACSEL, VDAC_COMPONENT);
  94. break;
  95. case 2:
  96. v4l2_dbg(debug, 1, sd, "Setting output to S-video\n");
  97. venc_write(sd, VENC_DACSEL, VDAC_S_VIDEO);
  98. break;
  99. default:
  100. return -EINVAL;
  101. }
  102. return 0;
  103. }
  104. static void venc_enabledigitaloutput(struct v4l2_subdev *sd, int benable)
  105. {
  106. struct venc_state *venc = to_state(sd);
  107. struct venc_platform_data *pdata = venc->pdata;
  108. v4l2_dbg(debug, 2, sd, "venc_enabledigitaloutput\n");
  109. if (benable) {
  110. venc_write(sd, VENC_VMOD, 0);
  111. venc_write(sd, VENC_CVBS, 0);
  112. venc_write(sd, VENC_LCDOUT, 0);
  113. venc_write(sd, VENC_HSPLS, 0);
  114. venc_write(sd, VENC_HSTART, 0);
  115. venc_write(sd, VENC_HVALID, 0);
  116. venc_write(sd, VENC_HINT, 0);
  117. venc_write(sd, VENC_VSPLS, 0);
  118. venc_write(sd, VENC_VSTART, 0);
  119. venc_write(sd, VENC_VVALID, 0);
  120. venc_write(sd, VENC_VINT, 0);
  121. venc_write(sd, VENC_YCCCTL, 0);
  122. venc_write(sd, VENC_DACSEL, 0);
  123. } else {
  124. venc_write(sd, VENC_VMOD, 0);
  125. /* disable VCLK output pin enable */
  126. venc_write(sd, VENC_VIDCTL, 0x141);
  127. /* Disable output sync pins */
  128. venc_write(sd, VENC_SYNCCTL, 0);
  129. /* Disable DCLOCK */
  130. venc_write(sd, VENC_DCLKCTL, 0);
  131. venc_write(sd, VENC_DRGBX1, 0x0000057C);
  132. /* Disable LCD output control (accepting default polarity) */
  133. venc_write(sd, VENC_LCDOUT, 0);
  134. if (pdata->venc_type != VPBE_VERSION_3)
  135. venc_write(sd, VENC_CMPNT, 0x100);
  136. venc_write(sd, VENC_HSPLS, 0);
  137. venc_write(sd, VENC_HINT, 0);
  138. venc_write(sd, VENC_HSTART, 0);
  139. venc_write(sd, VENC_HVALID, 0);
  140. venc_write(sd, VENC_VSPLS, 0);
  141. venc_write(sd, VENC_VINT, 0);
  142. venc_write(sd, VENC_VSTART, 0);
  143. venc_write(sd, VENC_VVALID, 0);
  144. venc_write(sd, VENC_HSDLY, 0);
  145. venc_write(sd, VENC_VSDLY, 0);
  146. venc_write(sd, VENC_YCCCTL, 0);
  147. venc_write(sd, VENC_VSTARTA, 0);
  148. /* Set OSD clock and OSD Sync Adavance registers */
  149. venc_write(sd, VENC_OSDCLK0, 1);
  150. venc_write(sd, VENC_OSDCLK1, 2);
  151. }
  152. }
  153. #define VDAC_CONFIG_SD_V3 0x0E21A6B6
  154. #define VDAC_CONFIG_SD_V2 0x081141CF
  155. /*
  156. * setting NTSC mode
  157. */
  158. static int venc_set_ntsc(struct v4l2_subdev *sd)
  159. {
  160. u32 val;
  161. struct venc_state *venc = to_state(sd);
  162. struct venc_platform_data *pdata = venc->pdata;
  163. v4l2_dbg(debug, 2, sd, "venc_set_ntsc\n");
  164. /* Setup clock at VPSS & VENC for SD */
  165. vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
  166. if (pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_525_60) < 0)
  167. return -EINVAL;
  168. venc_enabledigitaloutput(sd, 0);
  169. if (pdata->venc_type == VPBE_VERSION_3) {
  170. venc_write(sd, VENC_CLKCTL, 0x01);
  171. venc_write(sd, VENC_VIDCTL, 0);
  172. val = vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
  173. } else if (pdata->venc_type == VPBE_VERSION_2) {
  174. venc_write(sd, VENC_CLKCTL, 0x01);
  175. venc_write(sd, VENC_VIDCTL, 0);
  176. vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
  177. } else {
  178. /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
  179. venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
  180. /* Set REC656 Mode */
  181. venc_write(sd, VENC_YCCCTL, 0x1);
  182. venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAFRQ);
  183. venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAUPS);
  184. }
  185. venc_write(sd, VENC_VMOD, 0);
  186. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  187. VENC_VMOD_VIE);
  188. venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
  189. venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_TVTYP_SHIFT),
  190. VENC_VMOD_TVTYP);
  191. venc_write(sd, VENC_DACTST, 0x0);
  192. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  193. return 0;
  194. }
  195. /*
  196. * setting PAL mode
  197. */
  198. static int venc_set_pal(struct v4l2_subdev *sd)
  199. {
  200. struct venc_state *venc = to_state(sd);
  201. struct venc_platform_data *pdata = venc->pdata;
  202. v4l2_dbg(debug, 2, sd, "venc_set_pal\n");
  203. /* Setup clock at VPSS & VENC for SD */
  204. vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
  205. if (venc->pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_625_50) < 0)
  206. return -EINVAL;
  207. venc_enabledigitaloutput(sd, 0);
  208. if (pdata->venc_type == VPBE_VERSION_3) {
  209. venc_write(sd, VENC_CLKCTL, 0x1);
  210. venc_write(sd, VENC_VIDCTL, 0);
  211. vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
  212. } else if (pdata->venc_type == VPBE_VERSION_2) {
  213. venc_write(sd, VENC_CLKCTL, 0x1);
  214. venc_write(sd, VENC_VIDCTL, 0);
  215. vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
  216. } else {
  217. /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
  218. venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
  219. /* Set REC656 Mode */
  220. venc_write(sd, VENC_YCCCTL, 0x1);
  221. }
  222. venc_modify(sd, VENC_SYNCCTL, 1 << VENC_SYNCCTL_OVD_SHIFT,
  223. VENC_SYNCCTL_OVD);
  224. venc_write(sd, VENC_VMOD, 0);
  225. venc_modify(sd, VENC_VMOD,
  226. (1 << VENC_VMOD_VIE_SHIFT),
  227. VENC_VMOD_VIE);
  228. venc_modify(sd, VENC_VMOD,
  229. (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
  230. venc_modify(sd, VENC_VMOD,
  231. (1 << VENC_VMOD_TVTYP_SHIFT),
  232. VENC_VMOD_TVTYP);
  233. venc_write(sd, VENC_DACTST, 0x0);
  234. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  235. return 0;
  236. }
  237. #define VDAC_CONFIG_HD_V2 0x081141EF
  238. /*
  239. * venc_set_480p59_94
  240. *
  241. * This function configures the video encoder to EDTV(525p) component setting.
  242. */
  243. static int venc_set_480p59_94(struct v4l2_subdev *sd)
  244. {
  245. struct venc_state *venc = to_state(sd);
  246. struct venc_platform_data *pdata = venc->pdata;
  247. v4l2_dbg(debug, 2, sd, "venc_set_480p59_94\n");
  248. if ((pdata->venc_type != VPBE_VERSION_1) &&
  249. (pdata->venc_type != VPBE_VERSION_2))
  250. return -EINVAL;
  251. /* Setup clock at VPSS & VENC for SD */
  252. if (pdata->setup_clock(VPBE_ENC_CUSTOM_TIMINGS, 27000000) < 0)
  253. return -EINVAL;
  254. venc_enabledigitaloutput(sd, 0);
  255. if (pdata->venc_type == VPBE_VERSION_2)
  256. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  257. venc_write(sd, VENC_OSDCLK0, 0);
  258. venc_write(sd, VENC_OSDCLK1, 1);
  259. if (pdata->venc_type == VPBE_VERSION_1) {
  260. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
  261. VENC_VDPRO_DAFRQ);
  262. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
  263. VENC_VDPRO_DAUPS);
  264. }
  265. venc_write(sd, VENC_VMOD, 0);
  266. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  267. VENC_VMOD_VIE);
  268. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  269. venc_modify(sd, VENC_VMOD, (HDTV_525P << VENC_VMOD_TVTYP_SHIFT),
  270. VENC_VMOD_TVTYP);
  271. venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 <<
  272. VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
  273. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  274. return 0;
  275. }
  276. /*
  277. * venc_set_625p
  278. *
  279. * This function configures the video encoder to HDTV(625p) component setting
  280. */
  281. static int venc_set_576p50(struct v4l2_subdev *sd)
  282. {
  283. struct venc_state *venc = to_state(sd);
  284. struct venc_platform_data *pdata = venc->pdata;
  285. v4l2_dbg(debug, 2, sd, "venc_set_576p50\n");
  286. if ((pdata->venc_type != VPBE_VERSION_1) &&
  287. (pdata->venc_type != VPBE_VERSION_2))
  288. return -EINVAL;
  289. /* Setup clock at VPSS & VENC for SD */
  290. if (pdata->setup_clock(VPBE_ENC_CUSTOM_TIMINGS, 27000000) < 0)
  291. return -EINVAL;
  292. venc_enabledigitaloutput(sd, 0);
  293. if (pdata->venc_type == VPBE_VERSION_2)
  294. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  295. venc_write(sd, VENC_OSDCLK0, 0);
  296. venc_write(sd, VENC_OSDCLK1, 1);
  297. if (pdata->venc_type == VPBE_VERSION_1) {
  298. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
  299. VENC_VDPRO_DAFRQ);
  300. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
  301. VENC_VDPRO_DAUPS);
  302. }
  303. venc_write(sd, VENC_VMOD, 0);
  304. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  305. VENC_VMOD_VIE);
  306. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  307. venc_modify(sd, VENC_VMOD, (HDTV_625P << VENC_VMOD_TVTYP_SHIFT),
  308. VENC_VMOD_TVTYP);
  309. venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 <<
  310. VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
  311. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  312. return 0;
  313. }
  314. /*
  315. * venc_set_720p60_internal - Setup 720p60 in venc for dm365 only
  316. */
  317. static int venc_set_720p60_internal(struct v4l2_subdev *sd)
  318. {
  319. struct venc_state *venc = to_state(sd);
  320. struct venc_platform_data *pdata = venc->pdata;
  321. if (pdata->setup_clock(VPBE_ENC_CUSTOM_TIMINGS, 74250000) < 0)
  322. return -EINVAL;
  323. venc_enabledigitaloutput(sd, 0);
  324. venc_write(sd, VENC_OSDCLK0, 0);
  325. venc_write(sd, VENC_OSDCLK1, 1);
  326. venc_write(sd, VENC_VMOD, 0);
  327. /* DM365 component HD mode */
  328. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  329. VENC_VMOD_VIE);
  330. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  331. venc_modify(sd, VENC_VMOD, (HDTV_720P << VENC_VMOD_TVTYP_SHIFT),
  332. VENC_VMOD_TVTYP);
  333. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  334. venc_write(sd, VENC_XHINTVL, 0);
  335. return 0;
  336. }
  337. /*
  338. * venc_set_1080i30_internal - Setup 1080i30 in venc for dm365 only
  339. */
  340. static int venc_set_1080i30_internal(struct v4l2_subdev *sd)
  341. {
  342. struct venc_state *venc = to_state(sd);
  343. struct venc_platform_data *pdata = venc->pdata;
  344. if (pdata->setup_clock(VPBE_ENC_CUSTOM_TIMINGS, 74250000) < 0)
  345. return -EINVAL;
  346. venc_enabledigitaloutput(sd, 0);
  347. venc_write(sd, VENC_OSDCLK0, 0);
  348. venc_write(sd, VENC_OSDCLK1, 1);
  349. venc_write(sd, VENC_VMOD, 0);
  350. /* DM365 component HD mode */
  351. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  352. VENC_VMOD_VIE);
  353. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  354. venc_modify(sd, VENC_VMOD, (HDTV_1080I << VENC_VMOD_TVTYP_SHIFT),
  355. VENC_VMOD_TVTYP);
  356. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  357. venc_write(sd, VENC_XHINTVL, 0);
  358. return 0;
  359. }
  360. static int venc_s_std_output(struct v4l2_subdev *sd, v4l2_std_id norm)
  361. {
  362. v4l2_dbg(debug, 1, sd, "venc_s_std_output\n");
  363. if (norm & V4L2_STD_525_60)
  364. return venc_set_ntsc(sd);
  365. else if (norm & V4L2_STD_625_50)
  366. return venc_set_pal(sd);
  367. return -EINVAL;
  368. }
  369. static int venc_s_dv_timings(struct v4l2_subdev *sd,
  370. struct v4l2_dv_timings *dv_timings)
  371. {
  372. struct venc_state *venc = to_state(sd);
  373. u32 height = dv_timings->bt.height;
  374. int ret;
  375. v4l2_dbg(debug, 1, sd, "venc_s_dv_timings\n");
  376. if (height == 576)
  377. return venc_set_576p50(sd);
  378. else if (height == 480)
  379. return venc_set_480p59_94(sd);
  380. else if ((height == 720) &&
  381. (venc->pdata->venc_type == VPBE_VERSION_2)) {
  382. /* TBD setup internal 720p mode here */
  383. ret = venc_set_720p60_internal(sd);
  384. /* for DM365 VPBE, there is DAC inside */
  385. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  386. return ret;
  387. } else if ((height == 1080) &&
  388. (venc->pdata->venc_type == VPBE_VERSION_2)) {
  389. /* TBD setup internal 1080i mode here */
  390. ret = venc_set_1080i30_internal(sd);
  391. /* for DM365 VPBE, there is DAC inside */
  392. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  393. return ret;
  394. }
  395. return -EINVAL;
  396. }
  397. static int venc_s_routing(struct v4l2_subdev *sd, u32 input, u32 output,
  398. u32 config)
  399. {
  400. struct venc_state *venc = to_state(sd);
  401. int ret;
  402. v4l2_dbg(debug, 1, sd, "venc_s_routing\n");
  403. ret = venc_set_dac(sd, output);
  404. if (!ret)
  405. venc->output = output;
  406. return ret;
  407. }
  408. static long venc_ioctl(struct v4l2_subdev *sd,
  409. unsigned int cmd,
  410. void *arg)
  411. {
  412. u32 val;
  413. switch (cmd) {
  414. case VENC_GET_FLD:
  415. val = venc_read(sd, VENC_VSTAT);
  416. *((int *)arg) = ((val & VENC_VSTAT_FIDST) ==
  417. VENC_VSTAT_FIDST);
  418. break;
  419. default:
  420. v4l2_err(sd, "Wrong IOCTL cmd\n");
  421. break;
  422. }
  423. return 0;
  424. }
  425. static const struct v4l2_subdev_core_ops venc_core_ops = {
  426. .ioctl = venc_ioctl,
  427. };
  428. static const struct v4l2_subdev_video_ops venc_video_ops = {
  429. .s_routing = venc_s_routing,
  430. .s_std_output = venc_s_std_output,
  431. .s_dv_timings = venc_s_dv_timings,
  432. };
  433. static const struct v4l2_subdev_ops venc_ops = {
  434. .core = &venc_core_ops,
  435. .video = &venc_video_ops,
  436. };
  437. static int venc_initialize(struct v4l2_subdev *sd)
  438. {
  439. struct venc_state *venc = to_state(sd);
  440. int ret;
  441. /* Set default to output to composite and std to NTSC */
  442. venc->output = 0;
  443. venc->std = V4L2_STD_525_60;
  444. ret = venc_s_routing(sd, 0, venc->output, 0);
  445. if (ret < 0) {
  446. v4l2_err(sd, "Error setting output during init\n");
  447. return -EINVAL;
  448. }
  449. ret = venc_s_std_output(sd, venc->std);
  450. if (ret < 0) {
  451. v4l2_err(sd, "Error setting std during init\n");
  452. return -EINVAL;
  453. }
  454. return ret;
  455. }
  456. static int venc_device_get(struct device *dev, void *data)
  457. {
  458. struct platform_device *pdev = to_platform_device(dev);
  459. struct venc_state **venc = data;
  460. if (strcmp(MODULE_NAME, pdev->name) == 0)
  461. *venc = platform_get_drvdata(pdev);
  462. return 0;
  463. }
  464. struct v4l2_subdev *venc_sub_dev_init(struct v4l2_device *v4l2_dev,
  465. const char *venc_name)
  466. {
  467. struct venc_state *venc;
  468. int err;
  469. err = bus_for_each_dev(&platform_bus_type, NULL, &venc,
  470. venc_device_get);
  471. if (venc == NULL)
  472. return NULL;
  473. v4l2_subdev_init(&venc->sd, &venc_ops);
  474. strcpy(venc->sd.name, venc_name);
  475. if (v4l2_device_register_subdev(v4l2_dev, &venc->sd) < 0) {
  476. v4l2_err(v4l2_dev,
  477. "vpbe unable to register venc sub device\n");
  478. return NULL;
  479. }
  480. if (venc_initialize(&venc->sd)) {
  481. v4l2_err(v4l2_dev,
  482. "vpbe venc initialization failed\n");
  483. return NULL;
  484. }
  485. return &venc->sd;
  486. }
  487. EXPORT_SYMBOL(venc_sub_dev_init);
  488. static int venc_probe(struct platform_device *pdev)
  489. {
  490. struct venc_state *venc;
  491. struct resource *res;
  492. int ret;
  493. venc = kzalloc(sizeof(struct venc_state), GFP_KERNEL);
  494. if (venc == NULL)
  495. return -ENOMEM;
  496. venc->pdev = &pdev->dev;
  497. venc->pdata = pdev->dev.platform_data;
  498. if (NULL == venc->pdata) {
  499. dev_err(venc->pdev, "Unable to get platform data for"
  500. " VENC sub device");
  501. ret = -ENOENT;
  502. goto free_mem;
  503. }
  504. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  505. if (!res) {
  506. dev_err(venc->pdev,
  507. "Unable to get VENC register address map\n");
  508. ret = -ENODEV;
  509. goto free_mem;
  510. }
  511. if (!request_mem_region(res->start, resource_size(res), "venc")) {
  512. dev_err(venc->pdev, "Unable to reserve VENC MMIO region\n");
  513. ret = -ENODEV;
  514. goto free_mem;
  515. }
  516. venc->venc_base = ioremap_nocache(res->start, resource_size(res));
  517. if (!venc->venc_base) {
  518. dev_err(venc->pdev, "Unable to map VENC IO space\n");
  519. ret = -ENODEV;
  520. goto release_venc_mem_region;
  521. }
  522. if (venc->pdata->venc_type != VPBE_VERSION_1) {
  523. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  524. if (!res) {
  525. dev_err(venc->pdev,
  526. "Unable to get VDAC_CONFIG address map\n");
  527. ret = -ENODEV;
  528. goto unmap_venc_io;
  529. }
  530. if (!request_mem_region(res->start,
  531. resource_size(res), "venc")) {
  532. dev_err(venc->pdev,
  533. "Unable to reserve VDAC_CONFIG MMIO region\n");
  534. ret = -ENODEV;
  535. goto unmap_venc_io;
  536. }
  537. venc->vdaccfg_reg = ioremap_nocache(res->start,
  538. resource_size(res));
  539. if (!venc->vdaccfg_reg) {
  540. dev_err(venc->pdev,
  541. "Unable to map VDAC_CONFIG IO space\n");
  542. ret = -ENODEV;
  543. goto release_vdaccfg_mem_region;
  544. }
  545. }
  546. spin_lock_init(&venc->lock);
  547. platform_set_drvdata(pdev, venc);
  548. dev_notice(venc->pdev, "VENC sub device probe success\n");
  549. return 0;
  550. release_vdaccfg_mem_region:
  551. release_mem_region(res->start, resource_size(res));
  552. unmap_venc_io:
  553. iounmap(venc->venc_base);
  554. release_venc_mem_region:
  555. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  556. release_mem_region(res->start, resource_size(res));
  557. free_mem:
  558. kfree(venc);
  559. return ret;
  560. }
  561. static int venc_remove(struct platform_device *pdev)
  562. {
  563. struct venc_state *venc = platform_get_drvdata(pdev);
  564. struct resource *res;
  565. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  566. iounmap((void *)venc->venc_base);
  567. release_mem_region(res->start, resource_size(res));
  568. if (venc->pdata->venc_type != VPBE_VERSION_1) {
  569. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  570. iounmap((void *)venc->vdaccfg_reg);
  571. release_mem_region(res->start, resource_size(res));
  572. }
  573. kfree(venc);
  574. return 0;
  575. }
  576. static struct platform_driver venc_driver = {
  577. .probe = venc_probe,
  578. .remove = venc_remove,
  579. .driver = {
  580. .name = MODULE_NAME,
  581. .owner = THIS_MODULE,
  582. },
  583. };
  584. module_platform_driver(venc_driver);
  585. MODULE_LICENSE("GPL");
  586. MODULE_DESCRIPTION("VPBE VENC Driver");
  587. MODULE_AUTHOR("Texas Instruments");