cx88-dvb.c 47 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc4000.h"
  42. #include "xc5000.h"
  43. #include "nxt200x.h"
  44. #include "cx24123.h"
  45. #include "isl6421.h"
  46. #include "tuner-simple.h"
  47. #include "tda9887.h"
  48. #include "s5h1411.h"
  49. #include "stv0299.h"
  50. #include "z0194a.h"
  51. #include "stv0288.h"
  52. #include "stb6000.h"
  53. #include "cx24116.h"
  54. #include "stv0900.h"
  55. #include "stb6100.h"
  56. #include "stb6100_proc.h"
  57. #include "mb86a16.h"
  58. #include "ds3000.h"
  59. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  60. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  61. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  62. MODULE_LICENSE("GPL");
  63. MODULE_VERSION(CX88_VERSION);
  64. static unsigned int debug;
  65. module_param(debug, int, 0644);
  66. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  67. static unsigned int dvb_buf_tscnt = 32;
  68. module_param(dvb_buf_tscnt, int, 0644);
  69. MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
  70. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  71. #define dprintk(level,fmt, arg...) if (debug >= level) \
  72. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  73. /* ------------------------------------------------------------------ */
  74. static int dvb_buf_setup(struct videobuf_queue *q,
  75. unsigned int *count, unsigned int *size)
  76. {
  77. struct cx8802_dev *dev = q->priv_data;
  78. dev->ts_packet_size = 188 * 4;
  79. dev->ts_packet_count = dvb_buf_tscnt;
  80. *size = dev->ts_packet_size * dev->ts_packet_count;
  81. *count = dvb_buf_tscnt;
  82. return 0;
  83. }
  84. static int dvb_buf_prepare(struct videobuf_queue *q,
  85. struct videobuf_buffer *vb, enum v4l2_field field)
  86. {
  87. struct cx8802_dev *dev = q->priv_data;
  88. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  89. }
  90. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  91. {
  92. struct cx8802_dev *dev = q->priv_data;
  93. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  94. }
  95. static void dvb_buf_release(struct videobuf_queue *q,
  96. struct videobuf_buffer *vb)
  97. {
  98. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  99. }
  100. static const struct videobuf_queue_ops dvb_qops = {
  101. .buf_setup = dvb_buf_setup,
  102. .buf_prepare = dvb_buf_prepare,
  103. .buf_queue = dvb_buf_queue,
  104. .buf_release = dvb_buf_release,
  105. };
  106. /* ------------------------------------------------------------------ */
  107. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  108. {
  109. struct cx8802_dev *dev= fe->dvb->priv;
  110. struct cx8802_driver *drv = NULL;
  111. int ret = 0;
  112. int fe_id;
  113. fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
  114. if (!fe_id) {
  115. printk(KERN_ERR "%s() No frontend found\n", __func__);
  116. return -EINVAL;
  117. }
  118. mutex_lock(&dev->core->lock);
  119. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  120. if (drv) {
  121. if (acquire){
  122. dev->frontends.active_fe_id = fe_id;
  123. ret = drv->request_acquire(drv);
  124. } else {
  125. ret = drv->request_release(drv);
  126. dev->frontends.active_fe_id = 0;
  127. }
  128. }
  129. mutex_unlock(&dev->core->lock);
  130. return ret;
  131. }
  132. static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
  133. {
  134. struct videobuf_dvb_frontends *f;
  135. struct videobuf_dvb_frontend *fe;
  136. if (!core->dvbdev)
  137. return;
  138. f = &core->dvbdev->frontends;
  139. if (!f)
  140. return;
  141. if (f->gate <= 1) /* undefined or fe0 */
  142. fe = videobuf_dvb_get_frontend(f, 1);
  143. else
  144. fe = videobuf_dvb_get_frontend(f, f->gate);
  145. if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
  146. fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
  147. }
  148. /* ------------------------------------------------------------------ */
  149. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  150. {
  151. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  152. static const u8 reset [] = { RESET, 0x80 };
  153. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  154. static const u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  155. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  156. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  157. mt352_write(fe, clock_config, sizeof(clock_config));
  158. udelay(200);
  159. mt352_write(fe, reset, sizeof(reset));
  160. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  161. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  162. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  163. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  164. return 0;
  165. }
  166. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  167. {
  168. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  169. static const u8 reset [] = { RESET, 0x80 };
  170. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  171. static const u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  172. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  173. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  174. mt352_write(fe, clock_config, sizeof(clock_config));
  175. udelay(200);
  176. mt352_write(fe, reset, sizeof(reset));
  177. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  178. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  179. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  180. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  181. return 0;
  182. }
  183. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  184. {
  185. static const u8 clock_config [] = { 0x89, 0x38, 0x39 };
  186. static const u8 reset [] = { 0x50, 0x80 };
  187. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  188. static const u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  189. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  190. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  191. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  192. mt352_write(fe, clock_config, sizeof(clock_config));
  193. udelay(2000);
  194. mt352_write(fe, reset, sizeof(reset));
  195. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  196. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  197. udelay(2000);
  198. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  199. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  200. return 0;
  201. }
  202. static const struct mt352_config dvico_fusionhdtv = {
  203. .demod_address = 0x0f,
  204. .demod_init = dvico_fusionhdtv_demod_init,
  205. };
  206. static const struct mt352_config dntv_live_dvbt_config = {
  207. .demod_address = 0x0f,
  208. .demod_init = dntv_live_dvbt_demod_init,
  209. };
  210. static const struct mt352_config dvico_fusionhdtv_dual = {
  211. .demod_address = 0x0f,
  212. .demod_init = dvico_dual_demod_init,
  213. };
  214. static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
  215. .demod_address = (0x1e >> 1),
  216. .no_tuner = 1,
  217. .if2 = 45600,
  218. };
  219. static struct mb86a16_config twinhan_vp1027 = {
  220. .demod_address = 0x08,
  221. };
  222. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  223. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  224. {
  225. static const u8 clock_config [] = { 0x89, 0x38, 0x38 };
  226. static const u8 reset [] = { 0x50, 0x80 };
  227. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  228. static const u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  229. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  230. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  231. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  232. mt352_write(fe, clock_config, sizeof(clock_config));
  233. udelay(2000);
  234. mt352_write(fe, reset, sizeof(reset));
  235. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  236. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  237. udelay(2000);
  238. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  239. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  240. return 0;
  241. }
  242. static const struct mt352_config dntv_live_dvbt_pro_config = {
  243. .demod_address = 0x0f,
  244. .no_tuner = 1,
  245. .demod_init = dntv_live_dvbt_pro_demod_init,
  246. };
  247. #endif
  248. static const struct zl10353_config dvico_fusionhdtv_hybrid = {
  249. .demod_address = 0x0f,
  250. .no_tuner = 1,
  251. };
  252. static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
  253. .demod_address = 0x0f,
  254. .if2 = 45600,
  255. .no_tuner = 1,
  256. };
  257. static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  258. .demod_address = 0x0f,
  259. .if2 = 4560,
  260. .no_tuner = 1,
  261. .demod_init = dvico_fusionhdtv_demod_init,
  262. };
  263. static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  264. .demod_address = 0x0f,
  265. };
  266. static const struct cx22702_config connexant_refboard_config = {
  267. .demod_address = 0x43,
  268. .output_mode = CX22702_SERIAL_OUTPUT,
  269. };
  270. static const struct cx22702_config hauppauge_hvr_config = {
  271. .demod_address = 0x63,
  272. .output_mode = CX22702_SERIAL_OUTPUT,
  273. };
  274. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  275. {
  276. struct cx8802_dev *dev= fe->dvb->priv;
  277. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  278. return 0;
  279. }
  280. static const struct or51132_config pchdtv_hd3000 = {
  281. .demod_address = 0x15,
  282. .set_ts_params = or51132_set_ts_param,
  283. };
  284. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  285. {
  286. struct cx8802_dev *dev= fe->dvb->priv;
  287. struct cx88_core *core = dev->core;
  288. dprintk(1, "%s: index = %d\n", __func__, index);
  289. if (index == 0)
  290. cx_clear(MO_GP0_IO, 8);
  291. else
  292. cx_set(MO_GP0_IO, 8);
  293. return 0;
  294. }
  295. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  296. {
  297. struct cx8802_dev *dev= fe->dvb->priv;
  298. if (is_punctured)
  299. dev->ts_gen_cntrl |= 0x04;
  300. else
  301. dev->ts_gen_cntrl &= ~0x04;
  302. return 0;
  303. }
  304. static struct lgdt330x_config fusionhdtv_3_gold = {
  305. .demod_address = 0x0e,
  306. .demod_chip = LGDT3302,
  307. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  308. .set_ts_params = lgdt330x_set_ts_param,
  309. };
  310. static const struct lgdt330x_config fusionhdtv_5_gold = {
  311. .demod_address = 0x0e,
  312. .demod_chip = LGDT3303,
  313. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  314. .set_ts_params = lgdt330x_set_ts_param,
  315. };
  316. static const struct lgdt330x_config pchdtv_hd5500 = {
  317. .demod_address = 0x59,
  318. .demod_chip = LGDT3303,
  319. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  320. .set_ts_params = lgdt330x_set_ts_param,
  321. };
  322. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  323. {
  324. struct cx8802_dev *dev= fe->dvb->priv;
  325. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  326. return 0;
  327. }
  328. static const struct nxt200x_config ati_hdtvwonder = {
  329. .demod_address = 0x0a,
  330. .set_ts_params = nxt200x_set_ts_param,
  331. };
  332. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  333. int is_punctured)
  334. {
  335. struct cx8802_dev *dev= fe->dvb->priv;
  336. dev->ts_gen_cntrl = 0x02;
  337. return 0;
  338. }
  339. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  340. fe_sec_voltage_t voltage)
  341. {
  342. struct cx8802_dev *dev= fe->dvb->priv;
  343. struct cx88_core *core = dev->core;
  344. if (voltage == SEC_VOLTAGE_OFF)
  345. cx_write(MO_GP0_IO, 0x000006fb);
  346. else
  347. cx_write(MO_GP0_IO, 0x000006f9);
  348. if (core->prev_set_voltage)
  349. return core->prev_set_voltage(fe, voltage);
  350. return 0;
  351. }
  352. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  353. fe_sec_voltage_t voltage)
  354. {
  355. struct cx8802_dev *dev= fe->dvb->priv;
  356. struct cx88_core *core = dev->core;
  357. if (voltage == SEC_VOLTAGE_OFF) {
  358. dprintk(1,"LNB Voltage OFF\n");
  359. cx_write(MO_GP0_IO, 0x0000efff);
  360. }
  361. if (core->prev_set_voltage)
  362. return core->prev_set_voltage(fe, voltage);
  363. return 0;
  364. }
  365. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  366. fe_sec_voltage_t voltage)
  367. {
  368. struct cx8802_dev *dev= fe->dvb->priv;
  369. struct cx88_core *core = dev->core;
  370. cx_set(MO_GP0_IO, 0x6040);
  371. switch (voltage) {
  372. case SEC_VOLTAGE_13:
  373. cx_clear(MO_GP0_IO, 0x20);
  374. break;
  375. case SEC_VOLTAGE_18:
  376. cx_set(MO_GP0_IO, 0x20);
  377. break;
  378. case SEC_VOLTAGE_OFF:
  379. cx_clear(MO_GP0_IO, 0x20);
  380. break;
  381. }
  382. if (core->prev_set_voltage)
  383. return core->prev_set_voltage(fe, voltage);
  384. return 0;
  385. }
  386. static int vp1027_set_voltage(struct dvb_frontend *fe,
  387. fe_sec_voltage_t voltage)
  388. {
  389. struct cx8802_dev *dev = fe->dvb->priv;
  390. struct cx88_core *core = dev->core;
  391. switch (voltage) {
  392. case SEC_VOLTAGE_13:
  393. dprintk(1, "LNB SEC Voltage=13\n");
  394. cx_write(MO_GP0_IO, 0x00001220);
  395. break;
  396. case SEC_VOLTAGE_18:
  397. dprintk(1, "LNB SEC Voltage=18\n");
  398. cx_write(MO_GP0_IO, 0x00001222);
  399. break;
  400. case SEC_VOLTAGE_OFF:
  401. dprintk(1, "LNB Voltage OFF\n");
  402. cx_write(MO_GP0_IO, 0x00001230);
  403. break;
  404. }
  405. if (core->prev_set_voltage)
  406. return core->prev_set_voltage(fe, voltage);
  407. return 0;
  408. }
  409. static const struct cx24123_config geniatech_dvbs_config = {
  410. .demod_address = 0x55,
  411. .set_ts_params = cx24123_set_ts_param,
  412. };
  413. static const struct cx24123_config hauppauge_novas_config = {
  414. .demod_address = 0x55,
  415. .set_ts_params = cx24123_set_ts_param,
  416. };
  417. static const struct cx24123_config kworld_dvbs_100_config = {
  418. .demod_address = 0x15,
  419. .set_ts_params = cx24123_set_ts_param,
  420. .lnb_polarity = 1,
  421. };
  422. static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  423. .demod_address = 0x32 >> 1,
  424. .output_mode = S5H1409_PARALLEL_OUTPUT,
  425. .gpio = S5H1409_GPIO_ON,
  426. .qam_if = 44000,
  427. .inversion = S5H1409_INVERSION_OFF,
  428. .status_mode = S5H1409_DEMODLOCKING,
  429. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  430. };
  431. static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  432. .demod_address = 0x32 >> 1,
  433. .output_mode = S5H1409_SERIAL_OUTPUT,
  434. .gpio = S5H1409_GPIO_OFF,
  435. .inversion = S5H1409_INVERSION_OFF,
  436. .status_mode = S5H1409_DEMODLOCKING,
  437. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  438. };
  439. static const struct s5h1409_config kworld_atsc_120_config = {
  440. .demod_address = 0x32 >> 1,
  441. .output_mode = S5H1409_SERIAL_OUTPUT,
  442. .gpio = S5H1409_GPIO_OFF,
  443. .inversion = S5H1409_INVERSION_OFF,
  444. .status_mode = S5H1409_DEMODLOCKING,
  445. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  446. };
  447. static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  448. .i2c_address = 0x64,
  449. .if_khz = 5380,
  450. };
  451. static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  452. .demod_address = (0x1e >> 1),
  453. .no_tuner = 1,
  454. .if2 = 45600,
  455. };
  456. static const struct zl10353_config cx88_geniatech_x8000_mt = {
  457. .demod_address = (0x1e >> 1),
  458. .no_tuner = 1,
  459. .disable_i2c_gate_ctrl = 1,
  460. };
  461. static const struct s5h1411_config dvico_fusionhdtv7_config = {
  462. .output_mode = S5H1411_SERIAL_OUTPUT,
  463. .gpio = S5H1411_GPIO_ON,
  464. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  465. .qam_if = S5H1411_IF_44000,
  466. .vsb_if = S5H1411_IF_44000,
  467. .inversion = S5H1411_INVERSION_OFF,
  468. .status_mode = S5H1411_DEMODLOCKING
  469. };
  470. static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  471. .i2c_address = 0xc2 >> 1,
  472. .if_khz = 5380,
  473. };
  474. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  475. {
  476. struct dvb_frontend *fe;
  477. struct videobuf_dvb_frontend *fe0 = NULL;
  478. struct xc2028_ctrl ctl;
  479. struct xc2028_config cfg = {
  480. .i2c_adap = &dev->core->i2c_adap,
  481. .i2c_addr = addr,
  482. .ctrl = &ctl,
  483. };
  484. /* Get the first frontend */
  485. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  486. if (!fe0)
  487. return -EINVAL;
  488. if (!fe0->dvb.frontend) {
  489. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  490. "Can't attach xc3028\n",
  491. dev->core->name);
  492. return -EINVAL;
  493. }
  494. /*
  495. * Some xc3028 devices may be hidden by an I2C gate. This is known
  496. * to happen with some s5h1409-based devices.
  497. * Now that I2C gate is open, sets up xc3028 configuration
  498. */
  499. cx88_setup_xc3028(dev->core, &ctl);
  500. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  501. if (!fe) {
  502. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  503. dev->core->name);
  504. dvb_frontend_detach(fe0->dvb.frontend);
  505. dvb_unregister_frontend(fe0->dvb.frontend);
  506. fe0->dvb.frontend = NULL;
  507. return -EINVAL;
  508. }
  509. printk(KERN_INFO "%s/2: xc3028 attached\n",
  510. dev->core->name);
  511. return 0;
  512. }
  513. static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg)
  514. {
  515. struct dvb_frontend *fe;
  516. struct videobuf_dvb_frontend *fe0 = NULL;
  517. /* Get the first frontend */
  518. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  519. if (!fe0)
  520. return -EINVAL;
  521. if (!fe0->dvb.frontend) {
  522. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  523. "Can't attach xc4000\n",
  524. dev->core->name);
  525. return -EINVAL;
  526. }
  527. fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap,
  528. cfg);
  529. if (!fe) {
  530. printk(KERN_ERR "%s/2: xc4000 attach failed\n",
  531. dev->core->name);
  532. dvb_frontend_detach(fe0->dvb.frontend);
  533. dvb_unregister_frontend(fe0->dvb.frontend);
  534. fe0->dvb.frontend = NULL;
  535. return -EINVAL;
  536. }
  537. printk(KERN_INFO "%s/2: xc4000 attached\n", dev->core->name);
  538. return 0;
  539. }
  540. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  541. int is_punctured)
  542. {
  543. struct cx8802_dev *dev = fe->dvb->priv;
  544. dev->ts_gen_cntrl = 0x2;
  545. return 0;
  546. }
  547. static int stv0900_set_ts_param(struct dvb_frontend *fe,
  548. int is_punctured)
  549. {
  550. struct cx8802_dev *dev = fe->dvb->priv;
  551. dev->ts_gen_cntrl = 0;
  552. return 0;
  553. }
  554. static int cx24116_reset_device(struct dvb_frontend *fe)
  555. {
  556. struct cx8802_dev *dev = fe->dvb->priv;
  557. struct cx88_core *core = dev->core;
  558. /* Reset the part */
  559. /* Put the cx24116 into reset */
  560. cx_write(MO_SRST_IO, 0);
  561. msleep(10);
  562. /* Take the cx24116 out of reset */
  563. cx_write(MO_SRST_IO, 1);
  564. msleep(10);
  565. return 0;
  566. }
  567. static const struct cx24116_config hauppauge_hvr4000_config = {
  568. .demod_address = 0x05,
  569. .set_ts_params = cx24116_set_ts_param,
  570. .reset_device = cx24116_reset_device,
  571. };
  572. static const struct cx24116_config tevii_s460_config = {
  573. .demod_address = 0x55,
  574. .set_ts_params = cx24116_set_ts_param,
  575. .reset_device = cx24116_reset_device,
  576. };
  577. static int ds3000_set_ts_param(struct dvb_frontend *fe,
  578. int is_punctured)
  579. {
  580. struct cx8802_dev *dev = fe->dvb->priv;
  581. dev->ts_gen_cntrl = 4;
  582. return 0;
  583. }
  584. static struct ds3000_config tevii_ds3000_config = {
  585. .demod_address = 0x68,
  586. .set_ts_params = ds3000_set_ts_param,
  587. };
  588. static const struct stv0900_config prof_7301_stv0900_config = {
  589. .demod_address = 0x6a,
  590. /* demod_mode = 0,*/
  591. .xtal = 27000000,
  592. .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
  593. .diseqc_mode = 2,/* 2/3 PWM */
  594. .tun1_maddress = 0,/* 0x60 */
  595. .tun1_adc = 0,/* 2 Vpp */
  596. .path1_mode = 3,
  597. .set_ts_params = stv0900_set_ts_param,
  598. };
  599. static const struct stb6100_config prof_7301_stb6100_config = {
  600. .tuner_address = 0x60,
  601. .refclock = 27000000,
  602. };
  603. static const struct stv0299_config tevii_tuner_sharp_config = {
  604. .demod_address = 0x68,
  605. .inittab = sharp_z0194a_inittab,
  606. .mclk = 88000000UL,
  607. .invert = 1,
  608. .skip_reinit = 0,
  609. .lock_output = 1,
  610. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  611. .min_delay_ms = 100,
  612. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  613. .set_ts_params = cx24116_set_ts_param,
  614. };
  615. static const struct stv0288_config tevii_tuner_earda_config = {
  616. .demod_address = 0x68,
  617. .min_delay_ms = 100,
  618. .set_ts_params = cx24116_set_ts_param,
  619. };
  620. static int cx8802_alloc_frontends(struct cx8802_dev *dev)
  621. {
  622. struct cx88_core *core = dev->core;
  623. struct videobuf_dvb_frontend *fe = NULL;
  624. int i;
  625. mutex_init(&dev->frontends.lock);
  626. INIT_LIST_HEAD(&dev->frontends.felist);
  627. if (!core->board.num_frontends)
  628. return -ENODEV;
  629. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  630. core->board.num_frontends);
  631. for (i = 1; i <= core->board.num_frontends; i++) {
  632. fe = videobuf_dvb_alloc_frontend(&dev->frontends, i);
  633. if (!fe) {
  634. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  635. videobuf_dvb_dealloc_frontends(&dev->frontends);
  636. return -ENOMEM;
  637. }
  638. }
  639. return 0;
  640. }
  641. static const u8 samsung_smt_7020_inittab[] = {
  642. 0x01, 0x15,
  643. 0x02, 0x00,
  644. 0x03, 0x00,
  645. 0x04, 0x7D,
  646. 0x05, 0x0F,
  647. 0x06, 0x02,
  648. 0x07, 0x00,
  649. 0x08, 0x60,
  650. 0x0A, 0xC2,
  651. 0x0B, 0x00,
  652. 0x0C, 0x01,
  653. 0x0D, 0x81,
  654. 0x0E, 0x44,
  655. 0x0F, 0x09,
  656. 0x10, 0x3C,
  657. 0x11, 0x84,
  658. 0x12, 0xDA,
  659. 0x13, 0x99,
  660. 0x14, 0x8D,
  661. 0x15, 0xCE,
  662. 0x16, 0xE8,
  663. 0x17, 0x43,
  664. 0x18, 0x1C,
  665. 0x19, 0x1B,
  666. 0x1A, 0x1D,
  667. 0x1C, 0x12,
  668. 0x1D, 0x00,
  669. 0x1E, 0x00,
  670. 0x1F, 0x00,
  671. 0x20, 0x00,
  672. 0x21, 0x00,
  673. 0x22, 0x00,
  674. 0x23, 0x00,
  675. 0x28, 0x02,
  676. 0x29, 0x28,
  677. 0x2A, 0x14,
  678. 0x2B, 0x0F,
  679. 0x2C, 0x09,
  680. 0x2D, 0x05,
  681. 0x31, 0x1F,
  682. 0x32, 0x19,
  683. 0x33, 0xFC,
  684. 0x34, 0x13,
  685. 0xff, 0xff,
  686. };
  687. static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe)
  688. {
  689. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  690. struct cx8802_dev *dev = fe->dvb->priv;
  691. u8 buf[4];
  692. u32 div;
  693. struct i2c_msg msg = {
  694. .addr = 0x61,
  695. .flags = 0,
  696. .buf = buf,
  697. .len = sizeof(buf) };
  698. div = c->frequency / 125;
  699. buf[0] = (div >> 8) & 0x7f;
  700. buf[1] = div & 0xff;
  701. buf[2] = 0x84; /* 0xC4 */
  702. buf[3] = 0x00;
  703. if (c->frequency < 1500000)
  704. buf[3] |= 0x10;
  705. if (fe->ops.i2c_gate_ctrl)
  706. fe->ops.i2c_gate_ctrl(fe, 1);
  707. if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
  708. return -EIO;
  709. return 0;
  710. }
  711. static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
  712. fe_sec_tone_mode_t tone)
  713. {
  714. struct cx8802_dev *dev = fe->dvb->priv;
  715. struct cx88_core *core = dev->core;
  716. cx_set(MO_GP0_IO, 0x0800);
  717. switch (tone) {
  718. case SEC_TONE_ON:
  719. cx_set(MO_GP0_IO, 0x08);
  720. break;
  721. case SEC_TONE_OFF:
  722. cx_clear(MO_GP0_IO, 0x08);
  723. break;
  724. default:
  725. return -EINVAL;
  726. }
  727. return 0;
  728. }
  729. static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
  730. fe_sec_voltage_t voltage)
  731. {
  732. struct cx8802_dev *dev = fe->dvb->priv;
  733. struct cx88_core *core = dev->core;
  734. u8 data;
  735. struct i2c_msg msg = {
  736. .addr = 8,
  737. .flags = 0,
  738. .buf = &data,
  739. .len = sizeof(data) };
  740. cx_set(MO_GP0_IO, 0x8000);
  741. switch (voltage) {
  742. case SEC_VOLTAGE_OFF:
  743. break;
  744. case SEC_VOLTAGE_13:
  745. data = ISL6421_EN1 | ISL6421_LLC1;
  746. cx_clear(MO_GP0_IO, 0x80);
  747. break;
  748. case SEC_VOLTAGE_18:
  749. data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
  750. cx_clear(MO_GP0_IO, 0x80);
  751. break;
  752. default:
  753. return -EINVAL;
  754. }
  755. return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
  756. }
  757. static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
  758. u32 srate, u32 ratio)
  759. {
  760. u8 aclk = 0;
  761. u8 bclk = 0;
  762. if (srate < 1500000) {
  763. aclk = 0xb7;
  764. bclk = 0x47;
  765. } else if (srate < 3000000) {
  766. aclk = 0xb7;
  767. bclk = 0x4b;
  768. } else if (srate < 7000000) {
  769. aclk = 0xb7;
  770. bclk = 0x4f;
  771. } else if (srate < 14000000) {
  772. aclk = 0xb7;
  773. bclk = 0x53;
  774. } else if (srate < 30000000) {
  775. aclk = 0xb6;
  776. bclk = 0x53;
  777. } else if (srate < 45000000) {
  778. aclk = 0xb4;
  779. bclk = 0x51;
  780. }
  781. stv0299_writereg(fe, 0x13, aclk);
  782. stv0299_writereg(fe, 0x14, bclk);
  783. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  784. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  785. stv0299_writereg(fe, 0x21, ratio & 0xf0);
  786. return 0;
  787. }
  788. static const struct stv0299_config samsung_stv0299_config = {
  789. .demod_address = 0x68,
  790. .inittab = samsung_smt_7020_inittab,
  791. .mclk = 88000000UL,
  792. .invert = 0,
  793. .skip_reinit = 0,
  794. .lock_output = STV0299_LOCKOUTPUT_LK,
  795. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  796. .min_delay_ms = 100,
  797. .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
  798. };
  799. static int dvb_register(struct cx8802_dev *dev)
  800. {
  801. struct cx88_core *core = dev->core;
  802. struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
  803. int mfe_shared = 0; /* bus not shared by default */
  804. int res = -EINVAL;
  805. if (0 != core->i2c_rc) {
  806. printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
  807. goto frontend_detach;
  808. }
  809. /* Get the first frontend */
  810. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  811. if (!fe0)
  812. goto frontend_detach;
  813. /* multi-frontend gate control is undefined or defaults to fe0 */
  814. dev->frontends.gate = 0;
  815. /* Sets the gate control callback to be used by i2c command calls */
  816. core->gate_ctrl = cx88_dvb_gate_ctrl;
  817. /* init frontend(s) */
  818. switch (core->boardnr) {
  819. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  820. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  821. &connexant_refboard_config,
  822. &core->i2c_adap);
  823. if (fe0->dvb.frontend != NULL) {
  824. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  825. 0x61, &core->i2c_adap,
  826. DVB_PLL_THOMSON_DTT759X))
  827. goto frontend_detach;
  828. }
  829. break;
  830. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  831. case CX88_BOARD_CONEXANT_DVB_T1:
  832. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  833. case CX88_BOARD_WINFAST_DTV1000:
  834. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  835. &connexant_refboard_config,
  836. &core->i2c_adap);
  837. if (fe0->dvb.frontend != NULL) {
  838. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  839. 0x60, &core->i2c_adap,
  840. DVB_PLL_THOMSON_DTT7579))
  841. goto frontend_detach;
  842. }
  843. break;
  844. case CX88_BOARD_WINFAST_DTV2000H:
  845. case CX88_BOARD_HAUPPAUGE_HVR1100:
  846. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  847. case CX88_BOARD_HAUPPAUGE_HVR1300:
  848. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  849. &hauppauge_hvr_config,
  850. &core->i2c_adap);
  851. if (fe0->dvb.frontend != NULL) {
  852. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  853. &core->i2c_adap, 0x61,
  854. TUNER_PHILIPS_FMD1216ME_MK3))
  855. goto frontend_detach;
  856. }
  857. break;
  858. case CX88_BOARD_WINFAST_DTV2000H_J:
  859. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  860. &hauppauge_hvr_config,
  861. &core->i2c_adap);
  862. if (fe0->dvb.frontend != NULL) {
  863. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  864. &core->i2c_adap, 0x61,
  865. TUNER_PHILIPS_FMD1216MEX_MK3))
  866. goto frontend_detach;
  867. }
  868. break;
  869. case CX88_BOARD_HAUPPAUGE_HVR3000:
  870. /* MFE frontend 1 */
  871. mfe_shared = 1;
  872. dev->frontends.gate = 2;
  873. /* DVB-S init */
  874. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  875. &hauppauge_novas_config,
  876. &dev->core->i2c_adap);
  877. if (fe0->dvb.frontend) {
  878. if (!dvb_attach(isl6421_attach,
  879. fe0->dvb.frontend,
  880. &dev->core->i2c_adap,
  881. 0x08, ISL6421_DCL, 0x00))
  882. goto frontend_detach;
  883. }
  884. /* MFE frontend 2 */
  885. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  886. if (!fe1)
  887. goto frontend_detach;
  888. /* DVB-T init */
  889. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  890. &hauppauge_hvr_config,
  891. &dev->core->i2c_adap);
  892. if (fe1->dvb.frontend) {
  893. fe1->dvb.frontend->id = 1;
  894. if (!dvb_attach(simple_tuner_attach,
  895. fe1->dvb.frontend,
  896. &dev->core->i2c_adap,
  897. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  898. goto frontend_detach;
  899. }
  900. break;
  901. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  902. fe0->dvb.frontend = dvb_attach(mt352_attach,
  903. &dvico_fusionhdtv,
  904. &core->i2c_adap);
  905. if (fe0->dvb.frontend != NULL) {
  906. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  907. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  908. goto frontend_detach;
  909. break;
  910. }
  911. /* ZL10353 replaces MT352 on later cards */
  912. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  913. &dvico_fusionhdtv_plus_v1_1,
  914. &core->i2c_adap);
  915. if (fe0->dvb.frontend != NULL) {
  916. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  917. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  918. goto frontend_detach;
  919. }
  920. break;
  921. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  922. /* The tin box says DEE1601, but it seems to be DTT7579
  923. * compatible, with a slightly different MT352 AGC gain. */
  924. fe0->dvb.frontend = dvb_attach(mt352_attach,
  925. &dvico_fusionhdtv_dual,
  926. &core->i2c_adap);
  927. if (fe0->dvb.frontend != NULL) {
  928. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  929. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  930. goto frontend_detach;
  931. break;
  932. }
  933. /* ZL10353 replaces MT352 on later cards */
  934. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  935. &dvico_fusionhdtv_plus_v1_1,
  936. &core->i2c_adap);
  937. if (fe0->dvb.frontend != NULL) {
  938. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  939. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  940. goto frontend_detach;
  941. }
  942. break;
  943. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  944. fe0->dvb.frontend = dvb_attach(mt352_attach,
  945. &dvico_fusionhdtv,
  946. &core->i2c_adap);
  947. if (fe0->dvb.frontend != NULL) {
  948. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  949. 0x61, NULL, DVB_PLL_LG_Z201))
  950. goto frontend_detach;
  951. }
  952. break;
  953. case CX88_BOARD_KWORLD_DVB_T:
  954. case CX88_BOARD_DNTV_LIVE_DVB_T:
  955. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  956. fe0->dvb.frontend = dvb_attach(mt352_attach,
  957. &dntv_live_dvbt_config,
  958. &core->i2c_adap);
  959. if (fe0->dvb.frontend != NULL) {
  960. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  961. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  962. goto frontend_detach;
  963. }
  964. break;
  965. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  966. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  967. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  968. fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  969. &dev->vp3054->adap);
  970. if (fe0->dvb.frontend != NULL) {
  971. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  972. &core->i2c_adap, 0x61,
  973. TUNER_PHILIPS_FMD1216ME_MK3))
  974. goto frontend_detach;
  975. }
  976. #else
  977. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  978. core->name);
  979. #endif
  980. break;
  981. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  982. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  983. &dvico_fusionhdtv_hybrid,
  984. &core->i2c_adap);
  985. if (fe0->dvb.frontend != NULL) {
  986. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  987. &core->i2c_adap, 0x61,
  988. TUNER_THOMSON_FE6600))
  989. goto frontend_detach;
  990. }
  991. break;
  992. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  993. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  994. &dvico_fusionhdtv_xc3028,
  995. &core->i2c_adap);
  996. if (fe0->dvb.frontend == NULL)
  997. fe0->dvb.frontend = dvb_attach(mt352_attach,
  998. &dvico_fusionhdtv_mt352_xc3028,
  999. &core->i2c_adap);
  1000. /*
  1001. * On this board, the demod provides the I2C bus pullup.
  1002. * We must not permit gate_ctrl to be performed, or
  1003. * the xc3028 cannot communicate on the bus.
  1004. */
  1005. if (fe0->dvb.frontend)
  1006. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1007. if (attach_xc3028(0x61, dev) < 0)
  1008. goto frontend_detach;
  1009. break;
  1010. case CX88_BOARD_PCHDTV_HD3000:
  1011. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  1012. &core->i2c_adap);
  1013. if (fe0->dvb.frontend != NULL) {
  1014. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1015. &core->i2c_adap, 0x61,
  1016. TUNER_THOMSON_DTT761X))
  1017. goto frontend_detach;
  1018. }
  1019. break;
  1020. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  1021. dev->ts_gen_cntrl = 0x08;
  1022. /* Do a hardware reset of chip before using it. */
  1023. cx_clear(MO_GP0_IO, 1);
  1024. mdelay(100);
  1025. cx_set(MO_GP0_IO, 1);
  1026. mdelay(200);
  1027. /* Select RF connector callback */
  1028. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  1029. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1030. &fusionhdtv_3_gold,
  1031. &core->i2c_adap);
  1032. if (fe0->dvb.frontend != NULL) {
  1033. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1034. &core->i2c_adap, 0x61,
  1035. TUNER_MICROTUNE_4042FI5))
  1036. goto frontend_detach;
  1037. }
  1038. break;
  1039. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  1040. dev->ts_gen_cntrl = 0x08;
  1041. /* Do a hardware reset of chip before using it. */
  1042. cx_clear(MO_GP0_IO, 1);
  1043. mdelay(100);
  1044. cx_set(MO_GP0_IO, 9);
  1045. mdelay(200);
  1046. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1047. &fusionhdtv_3_gold,
  1048. &core->i2c_adap);
  1049. if (fe0->dvb.frontend != NULL) {
  1050. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1051. &core->i2c_adap, 0x61,
  1052. TUNER_THOMSON_DTT761X))
  1053. goto frontend_detach;
  1054. }
  1055. break;
  1056. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1057. dev->ts_gen_cntrl = 0x08;
  1058. /* Do a hardware reset of chip before using it. */
  1059. cx_clear(MO_GP0_IO, 1);
  1060. mdelay(100);
  1061. cx_set(MO_GP0_IO, 1);
  1062. mdelay(200);
  1063. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1064. &fusionhdtv_5_gold,
  1065. &core->i2c_adap);
  1066. if (fe0->dvb.frontend != NULL) {
  1067. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1068. &core->i2c_adap, 0x61,
  1069. TUNER_LG_TDVS_H06XF))
  1070. goto frontend_detach;
  1071. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1072. &core->i2c_adap, 0x43))
  1073. goto frontend_detach;
  1074. }
  1075. break;
  1076. case CX88_BOARD_PCHDTV_HD5500:
  1077. dev->ts_gen_cntrl = 0x08;
  1078. /* Do a hardware reset of chip before using it. */
  1079. cx_clear(MO_GP0_IO, 1);
  1080. mdelay(100);
  1081. cx_set(MO_GP0_IO, 1);
  1082. mdelay(200);
  1083. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1084. &pchdtv_hd5500,
  1085. &core->i2c_adap);
  1086. if (fe0->dvb.frontend != NULL) {
  1087. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1088. &core->i2c_adap, 0x61,
  1089. TUNER_LG_TDVS_H06XF))
  1090. goto frontend_detach;
  1091. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1092. &core->i2c_adap, 0x43))
  1093. goto frontend_detach;
  1094. }
  1095. break;
  1096. case CX88_BOARD_ATI_HDTVWONDER:
  1097. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  1098. &ati_hdtvwonder,
  1099. &core->i2c_adap);
  1100. if (fe0->dvb.frontend != NULL) {
  1101. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1102. &core->i2c_adap, 0x61,
  1103. TUNER_PHILIPS_TUV1236D))
  1104. goto frontend_detach;
  1105. }
  1106. break;
  1107. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  1108. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  1109. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1110. &hauppauge_novas_config,
  1111. &core->i2c_adap);
  1112. if (fe0->dvb.frontend) {
  1113. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  1114. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
  1115. goto frontend_detach;
  1116. }
  1117. break;
  1118. case CX88_BOARD_KWORLD_DVBS_100:
  1119. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1120. &kworld_dvbs_100_config,
  1121. &core->i2c_adap);
  1122. if (fe0->dvb.frontend) {
  1123. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1124. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  1125. }
  1126. break;
  1127. case CX88_BOARD_GENIATECH_DVBS:
  1128. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1129. &geniatech_dvbs_config,
  1130. &core->i2c_adap);
  1131. if (fe0->dvb.frontend) {
  1132. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1133. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  1134. }
  1135. break;
  1136. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  1137. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1138. &pinnacle_pctv_hd_800i_config,
  1139. &core->i2c_adap);
  1140. if (fe0->dvb.frontend != NULL) {
  1141. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1142. &core->i2c_adap,
  1143. &pinnacle_pctv_hd_800i_tuner_config))
  1144. goto frontend_detach;
  1145. }
  1146. break;
  1147. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1148. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1149. &dvico_hdtv5_pci_nano_config,
  1150. &core->i2c_adap);
  1151. if (fe0->dvb.frontend != NULL) {
  1152. struct dvb_frontend *fe;
  1153. struct xc2028_config cfg = {
  1154. .i2c_adap = &core->i2c_adap,
  1155. .i2c_addr = 0x61,
  1156. };
  1157. static struct xc2028_ctrl ctl = {
  1158. .fname = XC2028_DEFAULT_FIRMWARE,
  1159. .max_len = 64,
  1160. .scode_table = XC3028_FE_OREN538,
  1161. };
  1162. fe = dvb_attach(xc2028_attach,
  1163. fe0->dvb.frontend, &cfg);
  1164. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  1165. fe->ops.tuner_ops.set_config(fe, &ctl);
  1166. }
  1167. break;
  1168. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  1169. case CX88_BOARD_WINFAST_DTV1800H:
  1170. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1171. &cx88_pinnacle_hybrid_pctv,
  1172. &core->i2c_adap);
  1173. if (fe0->dvb.frontend) {
  1174. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1175. if (attach_xc3028(0x61, dev) < 0)
  1176. goto frontend_detach;
  1177. }
  1178. break;
  1179. case CX88_BOARD_WINFAST_DTV1800H_XC4000:
  1180. case CX88_BOARD_WINFAST_DTV2000H_PLUS:
  1181. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1182. &cx88_pinnacle_hybrid_pctv,
  1183. &core->i2c_adap);
  1184. if (fe0->dvb.frontend) {
  1185. struct xc4000_config cfg = {
  1186. .i2c_address = 0x61,
  1187. .default_pm = 0,
  1188. .dvb_amplitude = 134,
  1189. .set_smoothedcvbs = 1,
  1190. .if_khz = 4560
  1191. };
  1192. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1193. if (attach_xc4000(dev, &cfg) < 0)
  1194. goto frontend_detach;
  1195. }
  1196. break;
  1197. case CX88_BOARD_GENIATECH_X8000_MT:
  1198. dev->ts_gen_cntrl = 0x00;
  1199. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1200. &cx88_geniatech_x8000_mt,
  1201. &core->i2c_adap);
  1202. if (attach_xc3028(0x61, dev) < 0)
  1203. goto frontend_detach;
  1204. break;
  1205. case CX88_BOARD_KWORLD_ATSC_120:
  1206. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1207. &kworld_atsc_120_config,
  1208. &core->i2c_adap);
  1209. if (attach_xc3028(0x61, dev) < 0)
  1210. goto frontend_detach;
  1211. break;
  1212. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  1213. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  1214. &dvico_fusionhdtv7_config,
  1215. &core->i2c_adap);
  1216. if (fe0->dvb.frontend != NULL) {
  1217. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1218. &core->i2c_adap,
  1219. &dvico_fusionhdtv7_tuner_config))
  1220. goto frontend_detach;
  1221. }
  1222. break;
  1223. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1224. /* MFE frontend 1 */
  1225. mfe_shared = 1;
  1226. dev->frontends.gate = 2;
  1227. /* DVB-S/S2 Init */
  1228. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1229. &hauppauge_hvr4000_config,
  1230. &dev->core->i2c_adap);
  1231. if (fe0->dvb.frontend) {
  1232. if (!dvb_attach(isl6421_attach,
  1233. fe0->dvb.frontend,
  1234. &dev->core->i2c_adap,
  1235. 0x08, ISL6421_DCL, 0x00))
  1236. goto frontend_detach;
  1237. }
  1238. /* MFE frontend 2 */
  1239. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  1240. if (!fe1)
  1241. goto frontend_detach;
  1242. /* DVB-T Init */
  1243. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  1244. &hauppauge_hvr_config,
  1245. &dev->core->i2c_adap);
  1246. if (fe1->dvb.frontend) {
  1247. fe1->dvb.frontend->id = 1;
  1248. if (!dvb_attach(simple_tuner_attach,
  1249. fe1->dvb.frontend,
  1250. &dev->core->i2c_adap,
  1251. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  1252. goto frontend_detach;
  1253. }
  1254. break;
  1255. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  1256. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1257. &hauppauge_hvr4000_config,
  1258. &dev->core->i2c_adap);
  1259. if (fe0->dvb.frontend) {
  1260. if (!dvb_attach(isl6421_attach,
  1261. fe0->dvb.frontend,
  1262. &dev->core->i2c_adap,
  1263. 0x08, ISL6421_DCL, 0x00))
  1264. goto frontend_detach;
  1265. }
  1266. break;
  1267. case CX88_BOARD_PROF_6200:
  1268. case CX88_BOARD_TBS_8910:
  1269. case CX88_BOARD_TEVII_S420:
  1270. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1271. &tevii_tuner_sharp_config,
  1272. &core->i2c_adap);
  1273. if (fe0->dvb.frontend != NULL) {
  1274. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  1275. &core->i2c_adap, DVB_PLL_OPERA1))
  1276. goto frontend_detach;
  1277. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1278. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1279. } else {
  1280. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  1281. &tevii_tuner_earda_config,
  1282. &core->i2c_adap);
  1283. if (fe0->dvb.frontend != NULL) {
  1284. if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
  1285. &core->i2c_adap))
  1286. goto frontend_detach;
  1287. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1288. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1289. }
  1290. }
  1291. break;
  1292. case CX88_BOARD_TEVII_S460:
  1293. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1294. &tevii_s460_config,
  1295. &core->i2c_adap);
  1296. if (fe0->dvb.frontend != NULL)
  1297. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1298. break;
  1299. case CX88_BOARD_TEVII_S464:
  1300. fe0->dvb.frontend = dvb_attach(ds3000_attach,
  1301. &tevii_ds3000_config,
  1302. &core->i2c_adap);
  1303. if (fe0->dvb.frontend != NULL)
  1304. fe0->dvb.frontend->ops.set_voltage =
  1305. tevii_dvbs_set_voltage;
  1306. break;
  1307. case CX88_BOARD_OMICOM_SS4_PCI:
  1308. case CX88_BOARD_TBS_8920:
  1309. case CX88_BOARD_PROF_7300:
  1310. case CX88_BOARD_SATTRADE_ST4200:
  1311. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1312. &hauppauge_hvr4000_config,
  1313. &core->i2c_adap);
  1314. if (fe0->dvb.frontend != NULL)
  1315. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1316. break;
  1317. case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
  1318. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1319. &cx88_terratec_cinergy_ht_pci_mkii_config,
  1320. &core->i2c_adap);
  1321. if (fe0->dvb.frontend) {
  1322. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1323. if (attach_xc3028(0x61, dev) < 0)
  1324. goto frontend_detach;
  1325. }
  1326. break;
  1327. case CX88_BOARD_PROF_7301:{
  1328. struct dvb_tuner_ops *tuner_ops = NULL;
  1329. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  1330. &prof_7301_stv0900_config,
  1331. &core->i2c_adap, 0);
  1332. if (fe0->dvb.frontend != NULL) {
  1333. if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
  1334. &prof_7301_stb6100_config,
  1335. &core->i2c_adap))
  1336. goto frontend_detach;
  1337. tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
  1338. tuner_ops->set_frequency = stb6100_set_freq;
  1339. tuner_ops->get_frequency = stb6100_get_freq;
  1340. tuner_ops->set_bandwidth = stb6100_set_bandw;
  1341. tuner_ops->get_bandwidth = stb6100_get_bandw;
  1342. core->prev_set_voltage =
  1343. fe0->dvb.frontend->ops.set_voltage;
  1344. fe0->dvb.frontend->ops.set_voltage =
  1345. tevii_dvbs_set_voltage;
  1346. }
  1347. break;
  1348. }
  1349. case CX88_BOARD_SAMSUNG_SMT_7020:
  1350. dev->ts_gen_cntrl = 0x08;
  1351. cx_set(MO_GP0_IO, 0x0101);
  1352. cx_clear(MO_GP0_IO, 0x01);
  1353. mdelay(100);
  1354. cx_set(MO_GP0_IO, 0x01);
  1355. mdelay(200);
  1356. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1357. &samsung_stv0299_config,
  1358. &dev->core->i2c_adap);
  1359. if (fe0->dvb.frontend) {
  1360. fe0->dvb.frontend->ops.tuner_ops.set_params =
  1361. samsung_smt_7020_tuner_set_params;
  1362. fe0->dvb.frontend->tuner_priv =
  1363. &dev->core->i2c_adap;
  1364. fe0->dvb.frontend->ops.set_voltage =
  1365. samsung_smt_7020_set_voltage;
  1366. fe0->dvb.frontend->ops.set_tone =
  1367. samsung_smt_7020_set_tone;
  1368. }
  1369. break;
  1370. case CX88_BOARD_TWINHAN_VP1027_DVBS:
  1371. dev->ts_gen_cntrl = 0x00;
  1372. fe0->dvb.frontend = dvb_attach(mb86a16_attach,
  1373. &twinhan_vp1027,
  1374. &core->i2c_adap);
  1375. if (fe0->dvb.frontend) {
  1376. core->prev_set_voltage =
  1377. fe0->dvb.frontend->ops.set_voltage;
  1378. fe0->dvb.frontend->ops.set_voltage =
  1379. vp1027_set_voltage;
  1380. }
  1381. break;
  1382. default:
  1383. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  1384. core->name);
  1385. break;
  1386. }
  1387. if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
  1388. printk(KERN_ERR
  1389. "%s/2: frontend initialization failed\n",
  1390. core->name);
  1391. goto frontend_detach;
  1392. }
  1393. /* define general-purpose callback pointer */
  1394. fe0->dvb.frontend->callback = cx88_tuner_callback;
  1395. /* Ensure all frontends negotiate bus access */
  1396. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1397. if (fe1)
  1398. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1399. /* Put the analog decoder in standby to keep it quiet */
  1400. call_all(core, core, s_power, 0);
  1401. /* register everything */
  1402. res = videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  1403. &dev->pci->dev, adapter_nr, mfe_shared);
  1404. if (res)
  1405. goto frontend_detach;
  1406. return res;
  1407. frontend_detach:
  1408. core->gate_ctrl = NULL;
  1409. videobuf_dvb_dealloc_frontends(&dev->frontends);
  1410. return res;
  1411. }
  1412. /* ----------------------------------------------------------- */
  1413. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1414. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1415. {
  1416. struct cx88_core *core = drv->core;
  1417. int err = 0;
  1418. dprintk( 1, "%s\n", __func__);
  1419. switch (core->boardnr) {
  1420. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1421. /* We arrive here with either the cx23416 or the cx22702
  1422. * on the bus. Take the bus from the cx23416 and enable the
  1423. * cx22702 demod
  1424. */
  1425. /* Toggle reset on cx22702 leaving i2c active */
  1426. cx_set(MO_GP0_IO, 0x00000080);
  1427. udelay(1000);
  1428. cx_clear(MO_GP0_IO, 0x00000080);
  1429. udelay(50);
  1430. cx_set(MO_GP0_IO, 0x00000080);
  1431. udelay(1000);
  1432. /* enable the cx22702 pins */
  1433. cx_clear(MO_GP0_IO, 0x00000004);
  1434. udelay(1000);
  1435. break;
  1436. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1437. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1438. /* Toggle reset on cx22702 leaving i2c active */
  1439. cx_set(MO_GP0_IO, 0x00000080);
  1440. udelay(1000);
  1441. cx_clear(MO_GP0_IO, 0x00000080);
  1442. udelay(50);
  1443. cx_set(MO_GP0_IO, 0x00000080);
  1444. udelay(1000);
  1445. switch (core->dvbdev->frontends.active_fe_id) {
  1446. case 1: /* DVB-S/S2 Enabled */
  1447. /* tri-state the cx22702 pins */
  1448. cx_set(MO_GP0_IO, 0x00000004);
  1449. /* Take the cx24116/cx24123 out of reset */
  1450. cx_write(MO_SRST_IO, 1);
  1451. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1452. break;
  1453. case 2: /* DVB-T Enabled */
  1454. /* Put the cx24116/cx24123 into reset */
  1455. cx_write(MO_SRST_IO, 0);
  1456. /* enable the cx22702 pins */
  1457. cx_clear(MO_GP0_IO, 0x00000004);
  1458. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1459. break;
  1460. }
  1461. udelay(1000);
  1462. break;
  1463. case CX88_BOARD_WINFAST_DTV2000H_PLUS:
  1464. /* set RF input to AIR for DVB-T (GPIO 16) */
  1465. cx_write(MO_GP2_IO, 0x0101);
  1466. break;
  1467. default:
  1468. err = -ENODEV;
  1469. }
  1470. return err;
  1471. }
  1472. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1473. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1474. {
  1475. struct cx88_core *core = drv->core;
  1476. int err = 0;
  1477. dprintk( 1, "%s\n", __func__);
  1478. switch (core->boardnr) {
  1479. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1480. /* Do Nothing, leave the cx22702 on the bus. */
  1481. break;
  1482. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1483. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1484. break;
  1485. default:
  1486. err = -ENODEV;
  1487. }
  1488. return err;
  1489. }
  1490. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1491. {
  1492. struct cx88_core *core = drv->core;
  1493. struct cx8802_dev *dev = drv->core->dvbdev;
  1494. int err;
  1495. struct videobuf_dvb_frontend *fe;
  1496. int i;
  1497. dprintk( 1, "%s\n", __func__);
  1498. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1499. core->boardnr,
  1500. core->name,
  1501. core->pci_bus,
  1502. core->pci_slot);
  1503. err = -ENODEV;
  1504. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1505. goto fail_core;
  1506. /* If vp3054 isn't enabled, a stub will just return 0 */
  1507. err = vp3054_i2c_probe(dev);
  1508. if (0 != err)
  1509. goto fail_core;
  1510. /* dvb stuff */
  1511. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  1512. dev->ts_gen_cntrl = 0x0c;
  1513. err = cx8802_alloc_frontends(dev);
  1514. if (err)
  1515. goto fail_core;
  1516. err = -ENODEV;
  1517. for (i = 1; i <= core->board.num_frontends; i++) {
  1518. fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
  1519. if (fe == NULL) {
  1520. printk(KERN_ERR "%s() failed to get frontend(%d)\n",
  1521. __func__, i);
  1522. goto fail_probe;
  1523. }
  1524. videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
  1525. &dev->pci->dev, &dev->slock,
  1526. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  1527. V4L2_FIELD_TOP,
  1528. sizeof(struct cx88_buffer),
  1529. dev, NULL);
  1530. /* init struct videobuf_dvb */
  1531. fe->dvb.name = dev->core->name;
  1532. }
  1533. err = dvb_register(dev);
  1534. if (err)
  1535. /* frontends/adapter de-allocated in dvb_register */
  1536. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  1537. core->name, err);
  1538. return err;
  1539. fail_probe:
  1540. videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends);
  1541. fail_core:
  1542. return err;
  1543. }
  1544. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1545. {
  1546. struct cx88_core *core = drv->core;
  1547. struct cx8802_dev *dev = drv->core->dvbdev;
  1548. dprintk( 1, "%s\n", __func__);
  1549. videobuf_dvb_unregister_bus(&dev->frontends);
  1550. vp3054_i2c_remove(dev);
  1551. core->gate_ctrl = NULL;
  1552. return 0;
  1553. }
  1554. static struct cx8802_driver cx8802_dvb_driver = {
  1555. .type_id = CX88_MPEG_DVB,
  1556. .hw_access = CX8802_DRVCTL_SHARED,
  1557. .probe = cx8802_dvb_probe,
  1558. .remove = cx8802_dvb_remove,
  1559. .advise_acquire = cx8802_dvb_advise_acquire,
  1560. .advise_release = cx8802_dvb_advise_release,
  1561. };
  1562. static int __init dvb_init(void)
  1563. {
  1564. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %s loaded\n",
  1565. CX88_VERSION);
  1566. return cx8802_register_driver(&cx8802_dvb_driver);
  1567. }
  1568. static void __exit dvb_fini(void)
  1569. {
  1570. cx8802_unregister_driver(&cx8802_dvb_driver);
  1571. }
  1572. module_init(dvb_init);
  1573. module_exit(dvb_fini);