i8254.c 19 KB

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  1. /*
  2. * 8253/8254 interval timer emulation
  3. *
  4. * Copyright (c) 2003-2004 Fabrice Bellard
  5. * Copyright (c) 2006 Intel Corporation
  6. * Copyright (c) 2007 Keir Fraser, XenSource Inc
  7. * Copyright (c) 2008 Intel Corporation
  8. * Copyright 2009 Red Hat, Inc. and/or its affiliates.
  9. *
  10. * Permission is hereby granted, free of charge, to any person obtaining a copy
  11. * of this software and associated documentation files (the "Software"), to deal
  12. * in the Software without restriction, including without limitation the rights
  13. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  14. * copies of the Software, and to permit persons to whom the Software is
  15. * furnished to do so, subject to the following conditions:
  16. *
  17. * The above copyright notice and this permission notice shall be included in
  18. * all copies or substantial portions of the Software.
  19. *
  20. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  21. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  22. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  23. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  24. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  25. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  26. * THE SOFTWARE.
  27. *
  28. * Authors:
  29. * Sheng Yang <sheng.yang@intel.com>
  30. * Based on QEMU and Xen.
  31. */
  32. #define pr_fmt(fmt) "pit: " fmt
  33. #include <linux/kvm_host.h>
  34. #include <linux/slab.h>
  35. #include "irq.h"
  36. #include "i8254.h"
  37. #ifndef CONFIG_X86_64
  38. #define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
  39. #else
  40. #define mod_64(x, y) ((x) % (y))
  41. #endif
  42. #define RW_STATE_LSB 1
  43. #define RW_STATE_MSB 2
  44. #define RW_STATE_WORD0 3
  45. #define RW_STATE_WORD1 4
  46. /* Compute with 96 bit intermediate result: (a*b)/c */
  47. static u64 muldiv64(u64 a, u32 b, u32 c)
  48. {
  49. union {
  50. u64 ll;
  51. struct {
  52. u32 low, high;
  53. } l;
  54. } u, res;
  55. u64 rl, rh;
  56. u.ll = a;
  57. rl = (u64)u.l.low * (u64)b;
  58. rh = (u64)u.l.high * (u64)b;
  59. rh += (rl >> 32);
  60. res.l.high = div64_u64(rh, c);
  61. res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c);
  62. return res.ll;
  63. }
  64. static void pit_set_gate(struct kvm *kvm, int channel, u32 val)
  65. {
  66. struct kvm_kpit_channel_state *c =
  67. &kvm->arch.vpit->pit_state.channels[channel];
  68. WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
  69. switch (c->mode) {
  70. default:
  71. case 0:
  72. case 4:
  73. /* XXX: just disable/enable counting */
  74. break;
  75. case 1:
  76. case 2:
  77. case 3:
  78. case 5:
  79. /* Restart counting on rising edge. */
  80. if (c->gate < val)
  81. c->count_load_time = ktime_get();
  82. break;
  83. }
  84. c->gate = val;
  85. }
  86. static int pit_get_gate(struct kvm *kvm, int channel)
  87. {
  88. WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
  89. return kvm->arch.vpit->pit_state.channels[channel].gate;
  90. }
  91. static s64 __kpit_elapsed(struct kvm *kvm)
  92. {
  93. s64 elapsed;
  94. ktime_t remaining;
  95. struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
  96. if (!ps->period)
  97. return 0;
  98. /*
  99. * The Counter does not stop when it reaches zero. In
  100. * Modes 0, 1, 4, and 5 the Counter ``wraps around'' to
  101. * the highest count, either FFFF hex for binary counting
  102. * or 9999 for BCD counting, and continues counting.
  103. * Modes 2 and 3 are periodic; the Counter reloads
  104. * itself with the initial count and continues counting
  105. * from there.
  106. */
  107. remaining = hrtimer_get_remaining(&ps->timer);
  108. elapsed = ps->period - ktime_to_ns(remaining);
  109. elapsed = mod_64(elapsed, ps->period);
  110. return elapsed;
  111. }
  112. static s64 kpit_elapsed(struct kvm *kvm, struct kvm_kpit_channel_state *c,
  113. int channel)
  114. {
  115. if (channel == 0)
  116. return __kpit_elapsed(kvm);
  117. return ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
  118. }
  119. static int pit_get_count(struct kvm *kvm, int channel)
  120. {
  121. struct kvm_kpit_channel_state *c =
  122. &kvm->arch.vpit->pit_state.channels[channel];
  123. s64 d, t;
  124. int counter;
  125. WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
  126. t = kpit_elapsed(kvm, c, channel);
  127. d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
  128. switch (c->mode) {
  129. case 0:
  130. case 1:
  131. case 4:
  132. case 5:
  133. counter = (c->count - d) & 0xffff;
  134. break;
  135. case 3:
  136. /* XXX: may be incorrect for odd counts */
  137. counter = c->count - (mod_64((2 * d), c->count));
  138. break;
  139. default:
  140. counter = c->count - mod_64(d, c->count);
  141. break;
  142. }
  143. return counter;
  144. }
  145. static int pit_get_out(struct kvm *kvm, int channel)
  146. {
  147. struct kvm_kpit_channel_state *c =
  148. &kvm->arch.vpit->pit_state.channels[channel];
  149. s64 d, t;
  150. int out;
  151. WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
  152. t = kpit_elapsed(kvm, c, channel);
  153. d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
  154. switch (c->mode) {
  155. default:
  156. case 0:
  157. out = (d >= c->count);
  158. break;
  159. case 1:
  160. out = (d < c->count);
  161. break;
  162. case 2:
  163. out = ((mod_64(d, c->count) == 0) && (d != 0));
  164. break;
  165. case 3:
  166. out = (mod_64(d, c->count) < ((c->count + 1) >> 1));
  167. break;
  168. case 4:
  169. case 5:
  170. out = (d == c->count);
  171. break;
  172. }
  173. return out;
  174. }
  175. static void pit_latch_count(struct kvm *kvm, int channel)
  176. {
  177. struct kvm_kpit_channel_state *c =
  178. &kvm->arch.vpit->pit_state.channels[channel];
  179. WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
  180. if (!c->count_latched) {
  181. c->latched_count = pit_get_count(kvm, channel);
  182. c->count_latched = c->rw_mode;
  183. }
  184. }
  185. static void pit_latch_status(struct kvm *kvm, int channel)
  186. {
  187. struct kvm_kpit_channel_state *c =
  188. &kvm->arch.vpit->pit_state.channels[channel];
  189. WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
  190. if (!c->status_latched) {
  191. /* TODO: Return NULL COUNT (bit 6). */
  192. c->status = ((pit_get_out(kvm, channel) << 7) |
  193. (c->rw_mode << 4) |
  194. (c->mode << 1) |
  195. c->bcd);
  196. c->status_latched = 1;
  197. }
  198. }
  199. static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian)
  200. {
  201. struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state,
  202. irq_ack_notifier);
  203. int value;
  204. spin_lock(&ps->inject_lock);
  205. value = atomic_dec_return(&ps->pending);
  206. if (value < 0)
  207. /* spurious acks can be generated if, for example, the
  208. * PIC is being reset. Handle it gracefully here
  209. */
  210. atomic_inc(&ps->pending);
  211. else if (value > 0)
  212. /* in this case, we had multiple outstanding pit interrupts
  213. * that we needed to inject. Reinject
  214. */
  215. queue_kthread_work(&ps->pit->worker, &ps->pit->expired);
  216. ps->irq_ack = 1;
  217. spin_unlock(&ps->inject_lock);
  218. }
  219. void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
  220. {
  221. struct kvm_pit *pit = vcpu->kvm->arch.vpit;
  222. struct hrtimer *timer;
  223. if (!kvm_vcpu_is_bsp(vcpu) || !pit)
  224. return;
  225. timer = &pit->pit_state.timer;
  226. if (hrtimer_cancel(timer))
  227. hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
  228. }
  229. static void destroy_pit_timer(struct kvm_pit *pit)
  230. {
  231. hrtimer_cancel(&pit->pit_state.timer);
  232. flush_kthread_work(&pit->expired);
  233. }
  234. static void pit_do_work(struct kthread_work *work)
  235. {
  236. struct kvm_pit *pit = container_of(work, struct kvm_pit, expired);
  237. struct kvm *kvm = pit->kvm;
  238. struct kvm_vcpu *vcpu;
  239. int i;
  240. struct kvm_kpit_state *ps = &pit->pit_state;
  241. int inject = 0;
  242. /* Try to inject pending interrupts when
  243. * last one has been acked.
  244. */
  245. spin_lock(&ps->inject_lock);
  246. if (ps->irq_ack) {
  247. ps->irq_ack = 0;
  248. inject = 1;
  249. }
  250. spin_unlock(&ps->inject_lock);
  251. if (inject) {
  252. kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1);
  253. kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0);
  254. /*
  255. * Provides NMI watchdog support via Virtual Wire mode.
  256. * The route is: PIT -> PIC -> LVT0 in NMI mode.
  257. *
  258. * Note: Our Virtual Wire implementation is simplified, only
  259. * propagating PIT interrupts to all VCPUs when they have set
  260. * LVT0 to NMI delivery. Other PIC interrupts are just sent to
  261. * VCPU0, and only if its LVT0 is in EXTINT mode.
  262. */
  263. if (kvm->arch.vapics_in_nmi_mode > 0)
  264. kvm_for_each_vcpu(i, vcpu, kvm)
  265. kvm_apic_nmi_wd_deliver(vcpu);
  266. }
  267. }
  268. static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
  269. {
  270. struct kvm_kpit_state *ps = container_of(data, struct kvm_kpit_state, timer);
  271. struct kvm_pit *pt = ps->kvm->arch.vpit;
  272. if (ps->reinject || !atomic_read(&ps->pending)) {
  273. atomic_inc(&ps->pending);
  274. queue_kthread_work(&pt->worker, &pt->expired);
  275. }
  276. if (ps->is_periodic) {
  277. hrtimer_add_expires_ns(&ps->timer, ps->period);
  278. return HRTIMER_RESTART;
  279. } else
  280. return HRTIMER_NORESTART;
  281. }
  282. static void create_pit_timer(struct kvm *kvm, u32 val, int is_period)
  283. {
  284. struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
  285. s64 interval;
  286. if (!irqchip_in_kernel(kvm) || ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)
  287. return;
  288. interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
  289. pr_debug("create pit timer, interval is %llu nsec\n", interval);
  290. /* TODO The new value only affected after the retriggered */
  291. hrtimer_cancel(&ps->timer);
  292. flush_kthread_work(&ps->pit->expired);
  293. ps->period = interval;
  294. ps->is_periodic = is_period;
  295. ps->timer.function = pit_timer_fn;
  296. ps->kvm = ps->pit->kvm;
  297. atomic_set(&ps->pending, 0);
  298. ps->irq_ack = 1;
  299. hrtimer_start(&ps->timer, ktime_add_ns(ktime_get(), interval),
  300. HRTIMER_MODE_ABS);
  301. }
  302. static void pit_load_count(struct kvm *kvm, int channel, u32 val)
  303. {
  304. struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
  305. WARN_ON(!mutex_is_locked(&ps->lock));
  306. pr_debug("load_count val is %d, channel is %d\n", val, channel);
  307. /*
  308. * The largest possible initial count is 0; this is equivalent
  309. * to 216 for binary counting and 104 for BCD counting.
  310. */
  311. if (val == 0)
  312. val = 0x10000;
  313. ps->channels[channel].count = val;
  314. if (channel != 0) {
  315. ps->channels[channel].count_load_time = ktime_get();
  316. return;
  317. }
  318. /* Two types of timer
  319. * mode 1 is one shot, mode 2 is period, otherwise del timer */
  320. switch (ps->channels[0].mode) {
  321. case 0:
  322. case 1:
  323. /* FIXME: enhance mode 4 precision */
  324. case 4:
  325. create_pit_timer(kvm, val, 0);
  326. break;
  327. case 2:
  328. case 3:
  329. create_pit_timer(kvm, val, 1);
  330. break;
  331. default:
  332. destroy_pit_timer(kvm->arch.vpit);
  333. }
  334. }
  335. void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val, int hpet_legacy_start)
  336. {
  337. u8 saved_mode;
  338. if (hpet_legacy_start) {
  339. /* save existing mode for later reenablement */
  340. saved_mode = kvm->arch.vpit->pit_state.channels[0].mode;
  341. kvm->arch.vpit->pit_state.channels[0].mode = 0xff; /* disable timer */
  342. pit_load_count(kvm, channel, val);
  343. kvm->arch.vpit->pit_state.channels[0].mode = saved_mode;
  344. } else {
  345. pit_load_count(kvm, channel, val);
  346. }
  347. }
  348. static inline struct kvm_pit *dev_to_pit(struct kvm_io_device *dev)
  349. {
  350. return container_of(dev, struct kvm_pit, dev);
  351. }
  352. static inline struct kvm_pit *speaker_to_pit(struct kvm_io_device *dev)
  353. {
  354. return container_of(dev, struct kvm_pit, speaker_dev);
  355. }
  356. static inline int pit_in_range(gpa_t addr)
  357. {
  358. return ((addr >= KVM_PIT_BASE_ADDRESS) &&
  359. (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH));
  360. }
  361. static int pit_ioport_write(struct kvm_io_device *this,
  362. gpa_t addr, int len, const void *data)
  363. {
  364. struct kvm_pit *pit = dev_to_pit(this);
  365. struct kvm_kpit_state *pit_state = &pit->pit_state;
  366. struct kvm *kvm = pit->kvm;
  367. int channel, access;
  368. struct kvm_kpit_channel_state *s;
  369. u32 val = *(u32 *) data;
  370. if (!pit_in_range(addr))
  371. return -EOPNOTSUPP;
  372. val &= 0xff;
  373. addr &= KVM_PIT_CHANNEL_MASK;
  374. mutex_lock(&pit_state->lock);
  375. if (val != 0)
  376. pr_debug("write addr is 0x%x, len is %d, val is 0x%x\n",
  377. (unsigned int)addr, len, val);
  378. if (addr == 3) {
  379. channel = val >> 6;
  380. if (channel == 3) {
  381. /* Read-Back Command. */
  382. for (channel = 0; channel < 3; channel++) {
  383. s = &pit_state->channels[channel];
  384. if (val & (2 << channel)) {
  385. if (!(val & 0x20))
  386. pit_latch_count(kvm, channel);
  387. if (!(val & 0x10))
  388. pit_latch_status(kvm, channel);
  389. }
  390. }
  391. } else {
  392. /* Select Counter <channel>. */
  393. s = &pit_state->channels[channel];
  394. access = (val >> 4) & KVM_PIT_CHANNEL_MASK;
  395. if (access == 0) {
  396. pit_latch_count(kvm, channel);
  397. } else {
  398. s->rw_mode = access;
  399. s->read_state = access;
  400. s->write_state = access;
  401. s->mode = (val >> 1) & 7;
  402. if (s->mode > 5)
  403. s->mode -= 4;
  404. s->bcd = val & 1;
  405. }
  406. }
  407. } else {
  408. /* Write Count. */
  409. s = &pit_state->channels[addr];
  410. switch (s->write_state) {
  411. default:
  412. case RW_STATE_LSB:
  413. pit_load_count(kvm, addr, val);
  414. break;
  415. case RW_STATE_MSB:
  416. pit_load_count(kvm, addr, val << 8);
  417. break;
  418. case RW_STATE_WORD0:
  419. s->write_latch = val;
  420. s->write_state = RW_STATE_WORD1;
  421. break;
  422. case RW_STATE_WORD1:
  423. pit_load_count(kvm, addr, s->write_latch | (val << 8));
  424. s->write_state = RW_STATE_WORD0;
  425. break;
  426. }
  427. }
  428. mutex_unlock(&pit_state->lock);
  429. return 0;
  430. }
  431. static int pit_ioport_read(struct kvm_io_device *this,
  432. gpa_t addr, int len, void *data)
  433. {
  434. struct kvm_pit *pit = dev_to_pit(this);
  435. struct kvm_kpit_state *pit_state = &pit->pit_state;
  436. struct kvm *kvm = pit->kvm;
  437. int ret, count;
  438. struct kvm_kpit_channel_state *s;
  439. if (!pit_in_range(addr))
  440. return -EOPNOTSUPP;
  441. addr &= KVM_PIT_CHANNEL_MASK;
  442. if (addr == 3)
  443. return 0;
  444. s = &pit_state->channels[addr];
  445. mutex_lock(&pit_state->lock);
  446. if (s->status_latched) {
  447. s->status_latched = 0;
  448. ret = s->status;
  449. } else if (s->count_latched) {
  450. switch (s->count_latched) {
  451. default:
  452. case RW_STATE_LSB:
  453. ret = s->latched_count & 0xff;
  454. s->count_latched = 0;
  455. break;
  456. case RW_STATE_MSB:
  457. ret = s->latched_count >> 8;
  458. s->count_latched = 0;
  459. break;
  460. case RW_STATE_WORD0:
  461. ret = s->latched_count & 0xff;
  462. s->count_latched = RW_STATE_MSB;
  463. break;
  464. }
  465. } else {
  466. switch (s->read_state) {
  467. default:
  468. case RW_STATE_LSB:
  469. count = pit_get_count(kvm, addr);
  470. ret = count & 0xff;
  471. break;
  472. case RW_STATE_MSB:
  473. count = pit_get_count(kvm, addr);
  474. ret = (count >> 8) & 0xff;
  475. break;
  476. case RW_STATE_WORD0:
  477. count = pit_get_count(kvm, addr);
  478. ret = count & 0xff;
  479. s->read_state = RW_STATE_WORD1;
  480. break;
  481. case RW_STATE_WORD1:
  482. count = pit_get_count(kvm, addr);
  483. ret = (count >> 8) & 0xff;
  484. s->read_state = RW_STATE_WORD0;
  485. break;
  486. }
  487. }
  488. if (len > sizeof(ret))
  489. len = sizeof(ret);
  490. memcpy(data, (char *)&ret, len);
  491. mutex_unlock(&pit_state->lock);
  492. return 0;
  493. }
  494. static int speaker_ioport_write(struct kvm_io_device *this,
  495. gpa_t addr, int len, const void *data)
  496. {
  497. struct kvm_pit *pit = speaker_to_pit(this);
  498. struct kvm_kpit_state *pit_state = &pit->pit_state;
  499. struct kvm *kvm = pit->kvm;
  500. u32 val = *(u32 *) data;
  501. if (addr != KVM_SPEAKER_BASE_ADDRESS)
  502. return -EOPNOTSUPP;
  503. mutex_lock(&pit_state->lock);
  504. pit_state->speaker_data_on = (val >> 1) & 1;
  505. pit_set_gate(kvm, 2, val & 1);
  506. mutex_unlock(&pit_state->lock);
  507. return 0;
  508. }
  509. static int speaker_ioport_read(struct kvm_io_device *this,
  510. gpa_t addr, int len, void *data)
  511. {
  512. struct kvm_pit *pit = speaker_to_pit(this);
  513. struct kvm_kpit_state *pit_state = &pit->pit_state;
  514. struct kvm *kvm = pit->kvm;
  515. unsigned int refresh_clock;
  516. int ret;
  517. if (addr != KVM_SPEAKER_BASE_ADDRESS)
  518. return -EOPNOTSUPP;
  519. /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */
  520. refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1;
  521. mutex_lock(&pit_state->lock);
  522. ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) |
  523. (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4));
  524. if (len > sizeof(ret))
  525. len = sizeof(ret);
  526. memcpy(data, (char *)&ret, len);
  527. mutex_unlock(&pit_state->lock);
  528. return 0;
  529. }
  530. void kvm_pit_reset(struct kvm_pit *pit)
  531. {
  532. int i;
  533. struct kvm_kpit_channel_state *c;
  534. mutex_lock(&pit->pit_state.lock);
  535. pit->pit_state.flags = 0;
  536. for (i = 0; i < 3; i++) {
  537. c = &pit->pit_state.channels[i];
  538. c->mode = 0xff;
  539. c->gate = (i != 2);
  540. pit_load_count(pit->kvm, i, 0);
  541. }
  542. mutex_unlock(&pit->pit_state.lock);
  543. atomic_set(&pit->pit_state.pending, 0);
  544. pit->pit_state.irq_ack = 1;
  545. }
  546. static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask)
  547. {
  548. struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier);
  549. if (!mask) {
  550. atomic_set(&pit->pit_state.pending, 0);
  551. pit->pit_state.irq_ack = 1;
  552. }
  553. }
  554. static const struct kvm_io_device_ops pit_dev_ops = {
  555. .read = pit_ioport_read,
  556. .write = pit_ioport_write,
  557. };
  558. static const struct kvm_io_device_ops speaker_dev_ops = {
  559. .read = speaker_ioport_read,
  560. .write = speaker_ioport_write,
  561. };
  562. /* Caller must hold slots_lock */
  563. struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags)
  564. {
  565. struct kvm_pit *pit;
  566. struct kvm_kpit_state *pit_state;
  567. struct pid *pid;
  568. pid_t pid_nr;
  569. int ret;
  570. pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL);
  571. if (!pit)
  572. return NULL;
  573. pit->irq_source_id = kvm_request_irq_source_id(kvm);
  574. if (pit->irq_source_id < 0) {
  575. kfree(pit);
  576. return NULL;
  577. }
  578. mutex_init(&pit->pit_state.lock);
  579. mutex_lock(&pit->pit_state.lock);
  580. spin_lock_init(&pit->pit_state.inject_lock);
  581. pid = get_pid(task_tgid(current));
  582. pid_nr = pid_vnr(pid);
  583. put_pid(pid);
  584. init_kthread_worker(&pit->worker);
  585. pit->worker_task = kthread_run(kthread_worker_fn, &pit->worker,
  586. "kvm-pit/%d", pid_nr);
  587. if (IS_ERR(pit->worker_task)) {
  588. mutex_unlock(&pit->pit_state.lock);
  589. kvm_free_irq_source_id(kvm, pit->irq_source_id);
  590. kfree(pit);
  591. return NULL;
  592. }
  593. init_kthread_work(&pit->expired, pit_do_work);
  594. kvm->arch.vpit = pit;
  595. pit->kvm = kvm;
  596. pit_state = &pit->pit_state;
  597. pit_state->pit = pit;
  598. hrtimer_init(&pit_state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
  599. pit_state->irq_ack_notifier.gsi = 0;
  600. pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq;
  601. kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
  602. pit_state->reinject = true;
  603. mutex_unlock(&pit->pit_state.lock);
  604. kvm_pit_reset(pit);
  605. pit->mask_notifier.func = pit_mask_notifer;
  606. kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
  607. kvm_iodevice_init(&pit->dev, &pit_dev_ops);
  608. ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, KVM_PIT_BASE_ADDRESS,
  609. KVM_PIT_MEM_LENGTH, &pit->dev);
  610. if (ret < 0)
  611. goto fail;
  612. if (flags & KVM_PIT_SPEAKER_DUMMY) {
  613. kvm_iodevice_init(&pit->speaker_dev, &speaker_dev_ops);
  614. ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS,
  615. KVM_SPEAKER_BASE_ADDRESS, 4,
  616. &pit->speaker_dev);
  617. if (ret < 0)
  618. goto fail_unregister;
  619. }
  620. return pit;
  621. fail_unregister:
  622. kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &pit->dev);
  623. fail:
  624. kvm_unregister_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
  625. kvm_unregister_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
  626. kvm_free_irq_source_id(kvm, pit->irq_source_id);
  627. kthread_stop(pit->worker_task);
  628. kfree(pit);
  629. return NULL;
  630. }
  631. void kvm_free_pit(struct kvm *kvm)
  632. {
  633. struct hrtimer *timer;
  634. if (kvm->arch.vpit) {
  635. kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &kvm->arch.vpit->dev);
  636. kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
  637. &kvm->arch.vpit->speaker_dev);
  638. kvm_unregister_irq_mask_notifier(kvm, 0,
  639. &kvm->arch.vpit->mask_notifier);
  640. kvm_unregister_irq_ack_notifier(kvm,
  641. &kvm->arch.vpit->pit_state.irq_ack_notifier);
  642. mutex_lock(&kvm->arch.vpit->pit_state.lock);
  643. timer = &kvm->arch.vpit->pit_state.timer;
  644. hrtimer_cancel(timer);
  645. flush_kthread_work(&kvm->arch.vpit->expired);
  646. kthread_stop(kvm->arch.vpit->worker_task);
  647. kvm_free_irq_source_id(kvm, kvm->arch.vpit->irq_source_id);
  648. mutex_unlock(&kvm->arch.vpit->pit_state.lock);
  649. kfree(kvm->arch.vpit);
  650. }
  651. }