aesni-intel_glue.c 37 KB

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  1. /*
  2. * Support for Intel AES-NI instructions. This file contains glue
  3. * code, the real AES implementation is in intel-aes_asm.S.
  4. *
  5. * Copyright (C) 2008, Intel Corp.
  6. * Author: Huang Ying <ying.huang@intel.com>
  7. *
  8. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  9. * interface for 64-bit kernels.
  10. * Authors: Adrian Hoban <adrian.hoban@intel.com>
  11. * Gabriele Paoloni <gabriele.paoloni@intel.com>
  12. * Tadeusz Struk (tadeusz.struk@intel.com)
  13. * Aidan O'Mahony (aidan.o.mahony@intel.com)
  14. * Copyright (c) 2010, Intel Corporation.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. */
  21. #include <linux/hardirq.h>
  22. #include <linux/types.h>
  23. #include <linux/crypto.h>
  24. #include <linux/module.h>
  25. #include <linux/err.h>
  26. #include <crypto/algapi.h>
  27. #include <crypto/aes.h>
  28. #include <crypto/cryptd.h>
  29. #include <crypto/ctr.h>
  30. #include <crypto/b128ops.h>
  31. #include <crypto/lrw.h>
  32. #include <crypto/xts.h>
  33. #include <asm/cpu_device_id.h>
  34. #include <asm/i387.h>
  35. #include <asm/crypto/aes.h>
  36. #include <asm/crypto/ablk_helper.h>
  37. #include <crypto/scatterwalk.h>
  38. #include <crypto/internal/aead.h>
  39. #include <linux/workqueue.h>
  40. #include <linux/spinlock.h>
  41. #if defined(CONFIG_CRYPTO_CTR) || defined(CONFIG_CRYPTO_CTR_MODULE)
  42. #define HAS_CTR
  43. #endif
  44. #if defined(CONFIG_CRYPTO_PCBC) || defined(CONFIG_CRYPTO_PCBC_MODULE)
  45. #define HAS_PCBC
  46. #endif
  47. /* This data is stored at the end of the crypto_tfm struct.
  48. * It's a type of per "session" data storage location.
  49. * This needs to be 16 byte aligned.
  50. */
  51. struct aesni_rfc4106_gcm_ctx {
  52. u8 hash_subkey[16];
  53. struct crypto_aes_ctx aes_key_expanded;
  54. u8 nonce[4];
  55. struct cryptd_aead *cryptd_tfm;
  56. };
  57. struct aesni_gcm_set_hash_subkey_result {
  58. int err;
  59. struct completion completion;
  60. };
  61. struct aesni_hash_subkey_req_data {
  62. u8 iv[16];
  63. struct aesni_gcm_set_hash_subkey_result result;
  64. struct scatterlist sg;
  65. };
  66. #define AESNI_ALIGN (16)
  67. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE-1))
  68. #define RFC4106_HASH_SUBKEY_SIZE 16
  69. struct aesni_lrw_ctx {
  70. struct lrw_table_ctx lrw_table;
  71. u8 raw_aes_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  72. };
  73. struct aesni_xts_ctx {
  74. u8 raw_tweak_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  75. u8 raw_crypt_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  76. };
  77. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  78. unsigned int key_len);
  79. asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
  80. const u8 *in);
  81. asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
  82. const u8 *in);
  83. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  84. const u8 *in, unsigned int len);
  85. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  86. const u8 *in, unsigned int len);
  87. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  88. const u8 *in, unsigned int len, u8 *iv);
  89. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  90. const u8 *in, unsigned int len, u8 *iv);
  91. int crypto_fpu_init(void);
  92. void crypto_fpu_exit(void);
  93. #ifdef CONFIG_X86_64
  94. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  95. const u8 *in, unsigned int len, u8 *iv);
  96. /* asmlinkage void aesni_gcm_enc()
  97. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  98. * u8 *out, Ciphertext output. Encrypt in-place is allowed.
  99. * const u8 *in, Plaintext input
  100. * unsigned long plaintext_len, Length of data in bytes for encryption.
  101. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  102. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  103. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  104. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  105. * const u8 *aad, Additional Authentication Data (AAD)
  106. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this
  107. * is going to be 8 or 12 bytes
  108. * u8 *auth_tag, Authenticated Tag output.
  109. * unsigned long auth_tag_len), Authenticated Tag Length in bytes.
  110. * Valid values are 16 (most likely), 12 or 8.
  111. */
  112. asmlinkage void aesni_gcm_enc(void *ctx, u8 *out,
  113. const u8 *in, unsigned long plaintext_len, u8 *iv,
  114. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  115. u8 *auth_tag, unsigned long auth_tag_len);
  116. /* asmlinkage void aesni_gcm_dec()
  117. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  118. * u8 *out, Plaintext output. Decrypt in-place is allowed.
  119. * const u8 *in, Ciphertext input
  120. * unsigned long ciphertext_len, Length of data in bytes for decryption.
  121. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  122. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  123. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  124. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  125. * const u8 *aad, Additional Authentication Data (AAD)
  126. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this is going
  127. * to be 8 or 12 bytes
  128. * u8 *auth_tag, Authenticated Tag output.
  129. * unsigned long auth_tag_len) Authenticated Tag Length in bytes.
  130. * Valid values are 16 (most likely), 12 or 8.
  131. */
  132. asmlinkage void aesni_gcm_dec(void *ctx, u8 *out,
  133. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  134. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  135. u8 *auth_tag, unsigned long auth_tag_len);
  136. static inline struct
  137. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  138. {
  139. return
  140. (struct aesni_rfc4106_gcm_ctx *)
  141. PTR_ALIGN((u8 *)
  142. crypto_tfm_ctx(crypto_aead_tfm(tfm)), AESNI_ALIGN);
  143. }
  144. #endif
  145. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  146. {
  147. unsigned long addr = (unsigned long)raw_ctx;
  148. unsigned long align = AESNI_ALIGN;
  149. if (align <= crypto_tfm_ctx_alignment())
  150. align = 1;
  151. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  152. }
  153. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  154. const u8 *in_key, unsigned int key_len)
  155. {
  156. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  157. u32 *flags = &tfm->crt_flags;
  158. int err;
  159. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  160. key_len != AES_KEYSIZE_256) {
  161. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  162. return -EINVAL;
  163. }
  164. if (!irq_fpu_usable())
  165. err = crypto_aes_expand_key(ctx, in_key, key_len);
  166. else {
  167. kernel_fpu_begin();
  168. err = aesni_set_key(ctx, in_key, key_len);
  169. kernel_fpu_end();
  170. }
  171. return err;
  172. }
  173. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  174. unsigned int key_len)
  175. {
  176. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  177. }
  178. static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  179. {
  180. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  181. if (!irq_fpu_usable())
  182. crypto_aes_encrypt_x86(ctx, dst, src);
  183. else {
  184. kernel_fpu_begin();
  185. aesni_enc(ctx, dst, src);
  186. kernel_fpu_end();
  187. }
  188. }
  189. static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  190. {
  191. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  192. if (!irq_fpu_usable())
  193. crypto_aes_decrypt_x86(ctx, dst, src);
  194. else {
  195. kernel_fpu_begin();
  196. aesni_dec(ctx, dst, src);
  197. kernel_fpu_end();
  198. }
  199. }
  200. static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  201. {
  202. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  203. aesni_enc(ctx, dst, src);
  204. }
  205. static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  206. {
  207. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  208. aesni_dec(ctx, dst, src);
  209. }
  210. static int ecb_encrypt(struct blkcipher_desc *desc,
  211. struct scatterlist *dst, struct scatterlist *src,
  212. unsigned int nbytes)
  213. {
  214. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  215. struct blkcipher_walk walk;
  216. int err;
  217. blkcipher_walk_init(&walk, dst, src, nbytes);
  218. err = blkcipher_walk_virt(desc, &walk);
  219. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  220. kernel_fpu_begin();
  221. while ((nbytes = walk.nbytes)) {
  222. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  223. nbytes & AES_BLOCK_MASK);
  224. nbytes &= AES_BLOCK_SIZE - 1;
  225. err = blkcipher_walk_done(desc, &walk, nbytes);
  226. }
  227. kernel_fpu_end();
  228. return err;
  229. }
  230. static int ecb_decrypt(struct blkcipher_desc *desc,
  231. struct scatterlist *dst, struct scatterlist *src,
  232. unsigned int nbytes)
  233. {
  234. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  235. struct blkcipher_walk walk;
  236. int err;
  237. blkcipher_walk_init(&walk, dst, src, nbytes);
  238. err = blkcipher_walk_virt(desc, &walk);
  239. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  240. kernel_fpu_begin();
  241. while ((nbytes = walk.nbytes)) {
  242. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  243. nbytes & AES_BLOCK_MASK);
  244. nbytes &= AES_BLOCK_SIZE - 1;
  245. err = blkcipher_walk_done(desc, &walk, nbytes);
  246. }
  247. kernel_fpu_end();
  248. return err;
  249. }
  250. static int cbc_encrypt(struct blkcipher_desc *desc,
  251. struct scatterlist *dst, struct scatterlist *src,
  252. unsigned int nbytes)
  253. {
  254. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  255. struct blkcipher_walk walk;
  256. int err;
  257. blkcipher_walk_init(&walk, dst, src, nbytes);
  258. err = blkcipher_walk_virt(desc, &walk);
  259. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  260. kernel_fpu_begin();
  261. while ((nbytes = walk.nbytes)) {
  262. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  263. nbytes & AES_BLOCK_MASK, walk.iv);
  264. nbytes &= AES_BLOCK_SIZE - 1;
  265. err = blkcipher_walk_done(desc, &walk, nbytes);
  266. }
  267. kernel_fpu_end();
  268. return err;
  269. }
  270. static int cbc_decrypt(struct blkcipher_desc *desc,
  271. struct scatterlist *dst, struct scatterlist *src,
  272. unsigned int nbytes)
  273. {
  274. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  275. struct blkcipher_walk walk;
  276. int err;
  277. blkcipher_walk_init(&walk, dst, src, nbytes);
  278. err = blkcipher_walk_virt(desc, &walk);
  279. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  280. kernel_fpu_begin();
  281. while ((nbytes = walk.nbytes)) {
  282. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  283. nbytes & AES_BLOCK_MASK, walk.iv);
  284. nbytes &= AES_BLOCK_SIZE - 1;
  285. err = blkcipher_walk_done(desc, &walk, nbytes);
  286. }
  287. kernel_fpu_end();
  288. return err;
  289. }
  290. #ifdef CONFIG_X86_64
  291. static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
  292. struct blkcipher_walk *walk)
  293. {
  294. u8 *ctrblk = walk->iv;
  295. u8 keystream[AES_BLOCK_SIZE];
  296. u8 *src = walk->src.virt.addr;
  297. u8 *dst = walk->dst.virt.addr;
  298. unsigned int nbytes = walk->nbytes;
  299. aesni_enc(ctx, keystream, ctrblk);
  300. crypto_xor(keystream, src, nbytes);
  301. memcpy(dst, keystream, nbytes);
  302. crypto_inc(ctrblk, AES_BLOCK_SIZE);
  303. }
  304. static int ctr_crypt(struct blkcipher_desc *desc,
  305. struct scatterlist *dst, struct scatterlist *src,
  306. unsigned int nbytes)
  307. {
  308. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  309. struct blkcipher_walk walk;
  310. int err;
  311. blkcipher_walk_init(&walk, dst, src, nbytes);
  312. err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE);
  313. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  314. kernel_fpu_begin();
  315. while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
  316. aesni_ctr_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  317. nbytes & AES_BLOCK_MASK, walk.iv);
  318. nbytes &= AES_BLOCK_SIZE - 1;
  319. err = blkcipher_walk_done(desc, &walk, nbytes);
  320. }
  321. if (walk.nbytes) {
  322. ctr_crypt_final(ctx, &walk);
  323. err = blkcipher_walk_done(desc, &walk, 0);
  324. }
  325. kernel_fpu_end();
  326. return err;
  327. }
  328. #endif
  329. static int ablk_ecb_init(struct crypto_tfm *tfm)
  330. {
  331. return ablk_init_common(tfm, "__driver-ecb-aes-aesni");
  332. }
  333. static int ablk_cbc_init(struct crypto_tfm *tfm)
  334. {
  335. return ablk_init_common(tfm, "__driver-cbc-aes-aesni");
  336. }
  337. #ifdef CONFIG_X86_64
  338. static int ablk_ctr_init(struct crypto_tfm *tfm)
  339. {
  340. return ablk_init_common(tfm, "__driver-ctr-aes-aesni");
  341. }
  342. #ifdef HAS_CTR
  343. static int ablk_rfc3686_ctr_init(struct crypto_tfm *tfm)
  344. {
  345. return ablk_init_common(tfm, "rfc3686(__driver-ctr-aes-aesni)");
  346. }
  347. #endif
  348. #endif
  349. #ifdef HAS_PCBC
  350. static int ablk_pcbc_init(struct crypto_tfm *tfm)
  351. {
  352. return ablk_init_common(tfm, "fpu(pcbc(__driver-aes-aesni))");
  353. }
  354. #endif
  355. static void lrw_xts_encrypt_callback(void *ctx, u8 *blks, unsigned int nbytes)
  356. {
  357. aesni_ecb_enc(ctx, blks, blks, nbytes);
  358. }
  359. static void lrw_xts_decrypt_callback(void *ctx, u8 *blks, unsigned int nbytes)
  360. {
  361. aesni_ecb_dec(ctx, blks, blks, nbytes);
  362. }
  363. static int lrw_aesni_setkey(struct crypto_tfm *tfm, const u8 *key,
  364. unsigned int keylen)
  365. {
  366. struct aesni_lrw_ctx *ctx = crypto_tfm_ctx(tfm);
  367. int err;
  368. err = aes_set_key_common(tfm, ctx->raw_aes_ctx, key,
  369. keylen - AES_BLOCK_SIZE);
  370. if (err)
  371. return err;
  372. return lrw_init_table(&ctx->lrw_table, key + keylen - AES_BLOCK_SIZE);
  373. }
  374. static void lrw_aesni_exit_tfm(struct crypto_tfm *tfm)
  375. {
  376. struct aesni_lrw_ctx *ctx = crypto_tfm_ctx(tfm);
  377. lrw_free_table(&ctx->lrw_table);
  378. }
  379. static int lrw_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  380. struct scatterlist *src, unsigned int nbytes)
  381. {
  382. struct aesni_lrw_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  383. be128 buf[8];
  384. struct lrw_crypt_req req = {
  385. .tbuf = buf,
  386. .tbuflen = sizeof(buf),
  387. .table_ctx = &ctx->lrw_table,
  388. .crypt_ctx = aes_ctx(ctx->raw_aes_ctx),
  389. .crypt_fn = lrw_xts_encrypt_callback,
  390. };
  391. int ret;
  392. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  393. kernel_fpu_begin();
  394. ret = lrw_crypt(desc, dst, src, nbytes, &req);
  395. kernel_fpu_end();
  396. return ret;
  397. }
  398. static int lrw_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  399. struct scatterlist *src, unsigned int nbytes)
  400. {
  401. struct aesni_lrw_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  402. be128 buf[8];
  403. struct lrw_crypt_req req = {
  404. .tbuf = buf,
  405. .tbuflen = sizeof(buf),
  406. .table_ctx = &ctx->lrw_table,
  407. .crypt_ctx = aes_ctx(ctx->raw_aes_ctx),
  408. .crypt_fn = lrw_xts_decrypt_callback,
  409. };
  410. int ret;
  411. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  412. kernel_fpu_begin();
  413. ret = lrw_crypt(desc, dst, src, nbytes, &req);
  414. kernel_fpu_end();
  415. return ret;
  416. }
  417. static int xts_aesni_setkey(struct crypto_tfm *tfm, const u8 *key,
  418. unsigned int keylen)
  419. {
  420. struct aesni_xts_ctx *ctx = crypto_tfm_ctx(tfm);
  421. u32 *flags = &tfm->crt_flags;
  422. int err;
  423. /* key consists of keys of equal size concatenated, therefore
  424. * the length must be even
  425. */
  426. if (keylen % 2) {
  427. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  428. return -EINVAL;
  429. }
  430. /* first half of xts-key is for crypt */
  431. err = aes_set_key_common(tfm, ctx->raw_crypt_ctx, key, keylen / 2);
  432. if (err)
  433. return err;
  434. /* second half of xts-key is for tweak */
  435. return aes_set_key_common(tfm, ctx->raw_tweak_ctx, key + keylen / 2,
  436. keylen / 2);
  437. }
  438. static void aesni_xts_tweak(void *ctx, u8 *out, const u8 *in)
  439. {
  440. aesni_enc(ctx, out, in);
  441. }
  442. static int xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  443. struct scatterlist *src, unsigned int nbytes)
  444. {
  445. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  446. be128 buf[8];
  447. struct xts_crypt_req req = {
  448. .tbuf = buf,
  449. .tbuflen = sizeof(buf),
  450. .tweak_ctx = aes_ctx(ctx->raw_tweak_ctx),
  451. .tweak_fn = aesni_xts_tweak,
  452. .crypt_ctx = aes_ctx(ctx->raw_crypt_ctx),
  453. .crypt_fn = lrw_xts_encrypt_callback,
  454. };
  455. int ret;
  456. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  457. kernel_fpu_begin();
  458. ret = xts_crypt(desc, dst, src, nbytes, &req);
  459. kernel_fpu_end();
  460. return ret;
  461. }
  462. static int xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  463. struct scatterlist *src, unsigned int nbytes)
  464. {
  465. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  466. be128 buf[8];
  467. struct xts_crypt_req req = {
  468. .tbuf = buf,
  469. .tbuflen = sizeof(buf),
  470. .tweak_ctx = aes_ctx(ctx->raw_tweak_ctx),
  471. .tweak_fn = aesni_xts_tweak,
  472. .crypt_ctx = aes_ctx(ctx->raw_crypt_ctx),
  473. .crypt_fn = lrw_xts_decrypt_callback,
  474. };
  475. int ret;
  476. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  477. kernel_fpu_begin();
  478. ret = xts_crypt(desc, dst, src, nbytes, &req);
  479. kernel_fpu_end();
  480. return ret;
  481. }
  482. #ifdef CONFIG_X86_64
  483. static int rfc4106_init(struct crypto_tfm *tfm)
  484. {
  485. struct cryptd_aead *cryptd_tfm;
  486. struct aesni_rfc4106_gcm_ctx *ctx = (struct aesni_rfc4106_gcm_ctx *)
  487. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  488. struct crypto_aead *cryptd_child;
  489. struct aesni_rfc4106_gcm_ctx *child_ctx;
  490. cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni", 0, 0);
  491. if (IS_ERR(cryptd_tfm))
  492. return PTR_ERR(cryptd_tfm);
  493. cryptd_child = cryptd_aead_child(cryptd_tfm);
  494. child_ctx = aesni_rfc4106_gcm_ctx_get(cryptd_child);
  495. memcpy(child_ctx, ctx, sizeof(*ctx));
  496. ctx->cryptd_tfm = cryptd_tfm;
  497. tfm->crt_aead.reqsize = sizeof(struct aead_request)
  498. + crypto_aead_reqsize(&cryptd_tfm->base);
  499. return 0;
  500. }
  501. static void rfc4106_exit(struct crypto_tfm *tfm)
  502. {
  503. struct aesni_rfc4106_gcm_ctx *ctx =
  504. (struct aesni_rfc4106_gcm_ctx *)
  505. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  506. if (!IS_ERR(ctx->cryptd_tfm))
  507. cryptd_free_aead(ctx->cryptd_tfm);
  508. return;
  509. }
  510. static void
  511. rfc4106_set_hash_subkey_done(struct crypto_async_request *req, int err)
  512. {
  513. struct aesni_gcm_set_hash_subkey_result *result = req->data;
  514. if (err == -EINPROGRESS)
  515. return;
  516. result->err = err;
  517. complete(&result->completion);
  518. }
  519. static int
  520. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  521. {
  522. struct crypto_ablkcipher *ctr_tfm;
  523. struct ablkcipher_request *req;
  524. int ret = -EINVAL;
  525. struct aesni_hash_subkey_req_data *req_data;
  526. ctr_tfm = crypto_alloc_ablkcipher("ctr(aes)", 0, 0);
  527. if (IS_ERR(ctr_tfm))
  528. return PTR_ERR(ctr_tfm);
  529. crypto_ablkcipher_clear_flags(ctr_tfm, ~0);
  530. ret = crypto_ablkcipher_setkey(ctr_tfm, key, key_len);
  531. if (ret)
  532. goto out_free_ablkcipher;
  533. ret = -ENOMEM;
  534. req = ablkcipher_request_alloc(ctr_tfm, GFP_KERNEL);
  535. if (!req)
  536. goto out_free_ablkcipher;
  537. req_data = kmalloc(sizeof(*req_data), GFP_KERNEL);
  538. if (!req_data)
  539. goto out_free_request;
  540. memset(req_data->iv, 0, sizeof(req_data->iv));
  541. /* Clear the data in the hash sub key container to zero.*/
  542. /* We want to cipher all zeros to create the hash sub key. */
  543. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  544. init_completion(&req_data->result.completion);
  545. sg_init_one(&req_data->sg, hash_subkey, RFC4106_HASH_SUBKEY_SIZE);
  546. ablkcipher_request_set_tfm(req, ctr_tfm);
  547. ablkcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_SLEEP |
  548. CRYPTO_TFM_REQ_MAY_BACKLOG,
  549. rfc4106_set_hash_subkey_done,
  550. &req_data->result);
  551. ablkcipher_request_set_crypt(req, &req_data->sg,
  552. &req_data->sg, RFC4106_HASH_SUBKEY_SIZE, req_data->iv);
  553. ret = crypto_ablkcipher_encrypt(req);
  554. if (ret == -EINPROGRESS || ret == -EBUSY) {
  555. ret = wait_for_completion_interruptible
  556. (&req_data->result.completion);
  557. if (!ret)
  558. ret = req_data->result.err;
  559. }
  560. kfree(req_data);
  561. out_free_request:
  562. ablkcipher_request_free(req);
  563. out_free_ablkcipher:
  564. crypto_free_ablkcipher(ctr_tfm);
  565. return ret;
  566. }
  567. static int rfc4106_set_key(struct crypto_aead *parent, const u8 *key,
  568. unsigned int key_len)
  569. {
  570. int ret = 0;
  571. struct crypto_tfm *tfm = crypto_aead_tfm(parent);
  572. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  573. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  574. struct aesni_rfc4106_gcm_ctx *child_ctx =
  575. aesni_rfc4106_gcm_ctx_get(cryptd_child);
  576. u8 *new_key_align, *new_key_mem = NULL;
  577. if (key_len < 4) {
  578. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  579. return -EINVAL;
  580. }
  581. /*Account for 4 byte nonce at the end.*/
  582. key_len -= 4;
  583. if (key_len != AES_KEYSIZE_128) {
  584. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  585. return -EINVAL;
  586. }
  587. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  588. /*This must be on a 16 byte boundary!*/
  589. if ((unsigned long)(&(ctx->aes_key_expanded.key_enc[0])) % AESNI_ALIGN)
  590. return -EINVAL;
  591. if ((unsigned long)key % AESNI_ALIGN) {
  592. /*key is not aligned: use an auxuliar aligned pointer*/
  593. new_key_mem = kmalloc(key_len+AESNI_ALIGN, GFP_KERNEL);
  594. if (!new_key_mem)
  595. return -ENOMEM;
  596. new_key_align = PTR_ALIGN(new_key_mem, AESNI_ALIGN);
  597. memcpy(new_key_align, key, key_len);
  598. key = new_key_align;
  599. }
  600. if (!irq_fpu_usable())
  601. ret = crypto_aes_expand_key(&(ctx->aes_key_expanded),
  602. key, key_len);
  603. else {
  604. kernel_fpu_begin();
  605. ret = aesni_set_key(&(ctx->aes_key_expanded), key, key_len);
  606. kernel_fpu_end();
  607. }
  608. /*This must be on a 16 byte boundary!*/
  609. if ((unsigned long)(&(ctx->hash_subkey[0])) % AESNI_ALIGN) {
  610. ret = -EINVAL;
  611. goto exit;
  612. }
  613. ret = rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  614. memcpy(child_ctx, ctx, sizeof(*ctx));
  615. exit:
  616. kfree(new_key_mem);
  617. return ret;
  618. }
  619. /* This is the Integrity Check Value (aka the authentication tag length and can
  620. * be 8, 12 or 16 bytes long. */
  621. static int rfc4106_set_authsize(struct crypto_aead *parent,
  622. unsigned int authsize)
  623. {
  624. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  625. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  626. switch (authsize) {
  627. case 8:
  628. case 12:
  629. case 16:
  630. break;
  631. default:
  632. return -EINVAL;
  633. }
  634. crypto_aead_crt(parent)->authsize = authsize;
  635. crypto_aead_crt(cryptd_child)->authsize = authsize;
  636. return 0;
  637. }
  638. static int rfc4106_encrypt(struct aead_request *req)
  639. {
  640. int ret;
  641. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  642. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  643. if (!irq_fpu_usable()) {
  644. struct aead_request *cryptd_req =
  645. (struct aead_request *) aead_request_ctx(req);
  646. memcpy(cryptd_req, req, sizeof(*req));
  647. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  648. return crypto_aead_encrypt(cryptd_req);
  649. } else {
  650. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  651. kernel_fpu_begin();
  652. ret = cryptd_child->base.crt_aead.encrypt(req);
  653. kernel_fpu_end();
  654. return ret;
  655. }
  656. }
  657. static int rfc4106_decrypt(struct aead_request *req)
  658. {
  659. int ret;
  660. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  661. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  662. if (!irq_fpu_usable()) {
  663. struct aead_request *cryptd_req =
  664. (struct aead_request *) aead_request_ctx(req);
  665. memcpy(cryptd_req, req, sizeof(*req));
  666. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  667. return crypto_aead_decrypt(cryptd_req);
  668. } else {
  669. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  670. kernel_fpu_begin();
  671. ret = cryptd_child->base.crt_aead.decrypt(req);
  672. kernel_fpu_end();
  673. return ret;
  674. }
  675. }
  676. static int __driver_rfc4106_encrypt(struct aead_request *req)
  677. {
  678. u8 one_entry_in_sg = 0;
  679. u8 *src, *dst, *assoc;
  680. __be32 counter = cpu_to_be32(1);
  681. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  682. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  683. void *aes_ctx = &(ctx->aes_key_expanded);
  684. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  685. u8 iv_tab[16+AESNI_ALIGN];
  686. u8* iv = (u8 *) PTR_ALIGN((u8 *)iv_tab, AESNI_ALIGN);
  687. struct scatter_walk src_sg_walk;
  688. struct scatter_walk assoc_sg_walk;
  689. struct scatter_walk dst_sg_walk;
  690. unsigned int i;
  691. /* Assuming we are supporting rfc4106 64-bit extended */
  692. /* sequence numbers We need to have the AAD length equal */
  693. /* to 8 or 12 bytes */
  694. if (unlikely(req->assoclen != 8 && req->assoclen != 12))
  695. return -EINVAL;
  696. /* IV below built */
  697. for (i = 0; i < 4; i++)
  698. *(iv+i) = ctx->nonce[i];
  699. for (i = 0; i < 8; i++)
  700. *(iv+4+i) = req->iv[i];
  701. *((__be32 *)(iv+12)) = counter;
  702. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  703. one_entry_in_sg = 1;
  704. scatterwalk_start(&src_sg_walk, req->src);
  705. scatterwalk_start(&assoc_sg_walk, req->assoc);
  706. src = scatterwalk_map(&src_sg_walk);
  707. assoc = scatterwalk_map(&assoc_sg_walk);
  708. dst = src;
  709. if (unlikely(req->src != req->dst)) {
  710. scatterwalk_start(&dst_sg_walk, req->dst);
  711. dst = scatterwalk_map(&dst_sg_walk);
  712. }
  713. } else {
  714. /* Allocate memory for src, dst, assoc */
  715. src = kmalloc(req->cryptlen + auth_tag_len + req->assoclen,
  716. GFP_ATOMIC);
  717. if (unlikely(!src))
  718. return -ENOMEM;
  719. assoc = (src + req->cryptlen + auth_tag_len);
  720. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  721. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  722. req->assoclen, 0);
  723. dst = src;
  724. }
  725. aesni_gcm_enc(aes_ctx, dst, src, (unsigned long)req->cryptlen, iv,
  726. ctx->hash_subkey, assoc, (unsigned long)req->assoclen, dst
  727. + ((unsigned long)req->cryptlen), auth_tag_len);
  728. /* The authTag (aka the Integrity Check Value) needs to be written
  729. * back to the packet. */
  730. if (one_entry_in_sg) {
  731. if (unlikely(req->src != req->dst)) {
  732. scatterwalk_unmap(dst);
  733. scatterwalk_done(&dst_sg_walk, 0, 0);
  734. }
  735. scatterwalk_unmap(src);
  736. scatterwalk_unmap(assoc);
  737. scatterwalk_done(&src_sg_walk, 0, 0);
  738. scatterwalk_done(&assoc_sg_walk, 0, 0);
  739. } else {
  740. scatterwalk_map_and_copy(dst, req->dst, 0,
  741. req->cryptlen + auth_tag_len, 1);
  742. kfree(src);
  743. }
  744. return 0;
  745. }
  746. static int __driver_rfc4106_decrypt(struct aead_request *req)
  747. {
  748. u8 one_entry_in_sg = 0;
  749. u8 *src, *dst, *assoc;
  750. unsigned long tempCipherLen = 0;
  751. __be32 counter = cpu_to_be32(1);
  752. int retval = 0;
  753. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  754. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  755. void *aes_ctx = &(ctx->aes_key_expanded);
  756. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  757. u8 iv_and_authTag[32+AESNI_ALIGN];
  758. u8 *iv = (u8 *) PTR_ALIGN((u8 *)iv_and_authTag, AESNI_ALIGN);
  759. u8 *authTag = iv + 16;
  760. struct scatter_walk src_sg_walk;
  761. struct scatter_walk assoc_sg_walk;
  762. struct scatter_walk dst_sg_walk;
  763. unsigned int i;
  764. if (unlikely((req->cryptlen < auth_tag_len) ||
  765. (req->assoclen != 8 && req->assoclen != 12)))
  766. return -EINVAL;
  767. /* Assuming we are supporting rfc4106 64-bit extended */
  768. /* sequence numbers We need to have the AAD length */
  769. /* equal to 8 or 12 bytes */
  770. tempCipherLen = (unsigned long)(req->cryptlen - auth_tag_len);
  771. /* IV below built */
  772. for (i = 0; i < 4; i++)
  773. *(iv+i) = ctx->nonce[i];
  774. for (i = 0; i < 8; i++)
  775. *(iv+4+i) = req->iv[i];
  776. *((__be32 *)(iv+12)) = counter;
  777. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  778. one_entry_in_sg = 1;
  779. scatterwalk_start(&src_sg_walk, req->src);
  780. scatterwalk_start(&assoc_sg_walk, req->assoc);
  781. src = scatterwalk_map(&src_sg_walk);
  782. assoc = scatterwalk_map(&assoc_sg_walk);
  783. dst = src;
  784. if (unlikely(req->src != req->dst)) {
  785. scatterwalk_start(&dst_sg_walk, req->dst);
  786. dst = scatterwalk_map(&dst_sg_walk);
  787. }
  788. } else {
  789. /* Allocate memory for src, dst, assoc */
  790. src = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
  791. if (!src)
  792. return -ENOMEM;
  793. assoc = (src + req->cryptlen + auth_tag_len);
  794. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  795. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  796. req->assoclen, 0);
  797. dst = src;
  798. }
  799. aesni_gcm_dec(aes_ctx, dst, src, tempCipherLen, iv,
  800. ctx->hash_subkey, assoc, (unsigned long)req->assoclen,
  801. authTag, auth_tag_len);
  802. /* Compare generated tag with passed in tag. */
  803. retval = memcmp(src + tempCipherLen, authTag, auth_tag_len) ?
  804. -EBADMSG : 0;
  805. if (one_entry_in_sg) {
  806. if (unlikely(req->src != req->dst)) {
  807. scatterwalk_unmap(dst);
  808. scatterwalk_done(&dst_sg_walk, 0, 0);
  809. }
  810. scatterwalk_unmap(src);
  811. scatterwalk_unmap(assoc);
  812. scatterwalk_done(&src_sg_walk, 0, 0);
  813. scatterwalk_done(&assoc_sg_walk, 0, 0);
  814. } else {
  815. scatterwalk_map_and_copy(dst, req->dst, 0, req->cryptlen, 1);
  816. kfree(src);
  817. }
  818. return retval;
  819. }
  820. #endif
  821. static struct crypto_alg aesni_algs[] = { {
  822. .cra_name = "aes",
  823. .cra_driver_name = "aes-aesni",
  824. .cra_priority = 300,
  825. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  826. .cra_blocksize = AES_BLOCK_SIZE,
  827. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  828. AESNI_ALIGN - 1,
  829. .cra_alignmask = 0,
  830. .cra_module = THIS_MODULE,
  831. .cra_u = {
  832. .cipher = {
  833. .cia_min_keysize = AES_MIN_KEY_SIZE,
  834. .cia_max_keysize = AES_MAX_KEY_SIZE,
  835. .cia_setkey = aes_set_key,
  836. .cia_encrypt = aes_encrypt,
  837. .cia_decrypt = aes_decrypt
  838. }
  839. }
  840. }, {
  841. .cra_name = "__aes-aesni",
  842. .cra_driver_name = "__driver-aes-aesni",
  843. .cra_priority = 0,
  844. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  845. .cra_blocksize = AES_BLOCK_SIZE,
  846. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  847. AESNI_ALIGN - 1,
  848. .cra_alignmask = 0,
  849. .cra_module = THIS_MODULE,
  850. .cra_u = {
  851. .cipher = {
  852. .cia_min_keysize = AES_MIN_KEY_SIZE,
  853. .cia_max_keysize = AES_MAX_KEY_SIZE,
  854. .cia_setkey = aes_set_key,
  855. .cia_encrypt = __aes_encrypt,
  856. .cia_decrypt = __aes_decrypt
  857. }
  858. }
  859. }, {
  860. .cra_name = "__ecb-aes-aesni",
  861. .cra_driver_name = "__driver-ecb-aes-aesni",
  862. .cra_priority = 0,
  863. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  864. .cra_blocksize = AES_BLOCK_SIZE,
  865. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  866. AESNI_ALIGN - 1,
  867. .cra_alignmask = 0,
  868. .cra_type = &crypto_blkcipher_type,
  869. .cra_module = THIS_MODULE,
  870. .cra_u = {
  871. .blkcipher = {
  872. .min_keysize = AES_MIN_KEY_SIZE,
  873. .max_keysize = AES_MAX_KEY_SIZE,
  874. .setkey = aes_set_key,
  875. .encrypt = ecb_encrypt,
  876. .decrypt = ecb_decrypt,
  877. },
  878. },
  879. }, {
  880. .cra_name = "__cbc-aes-aesni",
  881. .cra_driver_name = "__driver-cbc-aes-aesni",
  882. .cra_priority = 0,
  883. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  884. .cra_blocksize = AES_BLOCK_SIZE,
  885. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  886. AESNI_ALIGN - 1,
  887. .cra_alignmask = 0,
  888. .cra_type = &crypto_blkcipher_type,
  889. .cra_module = THIS_MODULE,
  890. .cra_u = {
  891. .blkcipher = {
  892. .min_keysize = AES_MIN_KEY_SIZE,
  893. .max_keysize = AES_MAX_KEY_SIZE,
  894. .setkey = aes_set_key,
  895. .encrypt = cbc_encrypt,
  896. .decrypt = cbc_decrypt,
  897. },
  898. },
  899. }, {
  900. .cra_name = "ecb(aes)",
  901. .cra_driver_name = "ecb-aes-aesni",
  902. .cra_priority = 400,
  903. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  904. .cra_blocksize = AES_BLOCK_SIZE,
  905. .cra_ctxsize = sizeof(struct async_helper_ctx),
  906. .cra_alignmask = 0,
  907. .cra_type = &crypto_ablkcipher_type,
  908. .cra_module = THIS_MODULE,
  909. .cra_init = ablk_ecb_init,
  910. .cra_exit = ablk_exit,
  911. .cra_u = {
  912. .ablkcipher = {
  913. .min_keysize = AES_MIN_KEY_SIZE,
  914. .max_keysize = AES_MAX_KEY_SIZE,
  915. .setkey = ablk_set_key,
  916. .encrypt = ablk_encrypt,
  917. .decrypt = ablk_decrypt,
  918. },
  919. },
  920. }, {
  921. .cra_name = "cbc(aes)",
  922. .cra_driver_name = "cbc-aes-aesni",
  923. .cra_priority = 400,
  924. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  925. .cra_blocksize = AES_BLOCK_SIZE,
  926. .cra_ctxsize = sizeof(struct async_helper_ctx),
  927. .cra_alignmask = 0,
  928. .cra_type = &crypto_ablkcipher_type,
  929. .cra_module = THIS_MODULE,
  930. .cra_init = ablk_cbc_init,
  931. .cra_exit = ablk_exit,
  932. .cra_u = {
  933. .ablkcipher = {
  934. .min_keysize = AES_MIN_KEY_SIZE,
  935. .max_keysize = AES_MAX_KEY_SIZE,
  936. .ivsize = AES_BLOCK_SIZE,
  937. .setkey = ablk_set_key,
  938. .encrypt = ablk_encrypt,
  939. .decrypt = ablk_decrypt,
  940. },
  941. },
  942. #ifdef CONFIG_X86_64
  943. }, {
  944. .cra_name = "__ctr-aes-aesni",
  945. .cra_driver_name = "__driver-ctr-aes-aesni",
  946. .cra_priority = 0,
  947. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  948. .cra_blocksize = 1,
  949. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  950. AESNI_ALIGN - 1,
  951. .cra_alignmask = 0,
  952. .cra_type = &crypto_blkcipher_type,
  953. .cra_module = THIS_MODULE,
  954. .cra_u = {
  955. .blkcipher = {
  956. .min_keysize = AES_MIN_KEY_SIZE,
  957. .max_keysize = AES_MAX_KEY_SIZE,
  958. .ivsize = AES_BLOCK_SIZE,
  959. .setkey = aes_set_key,
  960. .encrypt = ctr_crypt,
  961. .decrypt = ctr_crypt,
  962. },
  963. },
  964. }, {
  965. .cra_name = "ctr(aes)",
  966. .cra_driver_name = "ctr-aes-aesni",
  967. .cra_priority = 400,
  968. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  969. .cra_blocksize = 1,
  970. .cra_ctxsize = sizeof(struct async_helper_ctx),
  971. .cra_alignmask = 0,
  972. .cra_type = &crypto_ablkcipher_type,
  973. .cra_module = THIS_MODULE,
  974. .cra_init = ablk_ctr_init,
  975. .cra_exit = ablk_exit,
  976. .cra_u = {
  977. .ablkcipher = {
  978. .min_keysize = AES_MIN_KEY_SIZE,
  979. .max_keysize = AES_MAX_KEY_SIZE,
  980. .ivsize = AES_BLOCK_SIZE,
  981. .setkey = ablk_set_key,
  982. .encrypt = ablk_encrypt,
  983. .decrypt = ablk_encrypt,
  984. .geniv = "chainiv",
  985. },
  986. },
  987. }, {
  988. .cra_name = "__gcm-aes-aesni",
  989. .cra_driver_name = "__driver-gcm-aes-aesni",
  990. .cra_priority = 0,
  991. .cra_flags = CRYPTO_ALG_TYPE_AEAD,
  992. .cra_blocksize = 1,
  993. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) +
  994. AESNI_ALIGN,
  995. .cra_alignmask = 0,
  996. .cra_type = &crypto_aead_type,
  997. .cra_module = THIS_MODULE,
  998. .cra_u = {
  999. .aead = {
  1000. .encrypt = __driver_rfc4106_encrypt,
  1001. .decrypt = __driver_rfc4106_decrypt,
  1002. },
  1003. },
  1004. }, {
  1005. .cra_name = "rfc4106(gcm(aes))",
  1006. .cra_driver_name = "rfc4106-gcm-aesni",
  1007. .cra_priority = 400,
  1008. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  1009. .cra_blocksize = 1,
  1010. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) +
  1011. AESNI_ALIGN,
  1012. .cra_alignmask = 0,
  1013. .cra_type = &crypto_nivaead_type,
  1014. .cra_module = THIS_MODULE,
  1015. .cra_init = rfc4106_init,
  1016. .cra_exit = rfc4106_exit,
  1017. .cra_u = {
  1018. .aead = {
  1019. .setkey = rfc4106_set_key,
  1020. .setauthsize = rfc4106_set_authsize,
  1021. .encrypt = rfc4106_encrypt,
  1022. .decrypt = rfc4106_decrypt,
  1023. .geniv = "seqiv",
  1024. .ivsize = 8,
  1025. .maxauthsize = 16,
  1026. },
  1027. },
  1028. #ifdef HAS_CTR
  1029. }, {
  1030. .cra_name = "rfc3686(ctr(aes))",
  1031. .cra_driver_name = "rfc3686-ctr-aes-aesni",
  1032. .cra_priority = 400,
  1033. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1034. .cra_blocksize = 1,
  1035. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1036. .cra_alignmask = 0,
  1037. .cra_type = &crypto_ablkcipher_type,
  1038. .cra_module = THIS_MODULE,
  1039. .cra_init = ablk_rfc3686_ctr_init,
  1040. .cra_exit = ablk_exit,
  1041. .cra_u = {
  1042. .ablkcipher = {
  1043. .min_keysize = AES_MIN_KEY_SIZE +
  1044. CTR_RFC3686_NONCE_SIZE,
  1045. .max_keysize = AES_MAX_KEY_SIZE +
  1046. CTR_RFC3686_NONCE_SIZE,
  1047. .ivsize = CTR_RFC3686_IV_SIZE,
  1048. .setkey = ablk_set_key,
  1049. .encrypt = ablk_encrypt,
  1050. .decrypt = ablk_decrypt,
  1051. .geniv = "seqiv",
  1052. },
  1053. },
  1054. #endif
  1055. #endif
  1056. #ifdef HAS_PCBC
  1057. }, {
  1058. .cra_name = "pcbc(aes)",
  1059. .cra_driver_name = "pcbc-aes-aesni",
  1060. .cra_priority = 400,
  1061. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1062. .cra_blocksize = AES_BLOCK_SIZE,
  1063. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1064. .cra_alignmask = 0,
  1065. .cra_type = &crypto_ablkcipher_type,
  1066. .cra_module = THIS_MODULE,
  1067. .cra_init = ablk_pcbc_init,
  1068. .cra_exit = ablk_exit,
  1069. .cra_u = {
  1070. .ablkcipher = {
  1071. .min_keysize = AES_MIN_KEY_SIZE,
  1072. .max_keysize = AES_MAX_KEY_SIZE,
  1073. .ivsize = AES_BLOCK_SIZE,
  1074. .setkey = ablk_set_key,
  1075. .encrypt = ablk_encrypt,
  1076. .decrypt = ablk_decrypt,
  1077. },
  1078. },
  1079. #endif
  1080. }, {
  1081. .cra_name = "__lrw-aes-aesni",
  1082. .cra_driver_name = "__driver-lrw-aes-aesni",
  1083. .cra_priority = 0,
  1084. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1085. .cra_blocksize = AES_BLOCK_SIZE,
  1086. .cra_ctxsize = sizeof(struct aesni_lrw_ctx),
  1087. .cra_alignmask = 0,
  1088. .cra_type = &crypto_blkcipher_type,
  1089. .cra_module = THIS_MODULE,
  1090. .cra_exit = lrw_aesni_exit_tfm,
  1091. .cra_u = {
  1092. .blkcipher = {
  1093. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  1094. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  1095. .ivsize = AES_BLOCK_SIZE,
  1096. .setkey = lrw_aesni_setkey,
  1097. .encrypt = lrw_encrypt,
  1098. .decrypt = lrw_decrypt,
  1099. },
  1100. },
  1101. }, {
  1102. .cra_name = "__xts-aes-aesni",
  1103. .cra_driver_name = "__driver-xts-aes-aesni",
  1104. .cra_priority = 0,
  1105. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1106. .cra_blocksize = AES_BLOCK_SIZE,
  1107. .cra_ctxsize = sizeof(struct aesni_xts_ctx),
  1108. .cra_alignmask = 0,
  1109. .cra_type = &crypto_blkcipher_type,
  1110. .cra_module = THIS_MODULE,
  1111. .cra_u = {
  1112. .blkcipher = {
  1113. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  1114. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  1115. .ivsize = AES_BLOCK_SIZE,
  1116. .setkey = xts_aesni_setkey,
  1117. .encrypt = xts_encrypt,
  1118. .decrypt = xts_decrypt,
  1119. },
  1120. },
  1121. }, {
  1122. .cra_name = "lrw(aes)",
  1123. .cra_driver_name = "lrw-aes-aesni",
  1124. .cra_priority = 400,
  1125. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1126. .cra_blocksize = AES_BLOCK_SIZE,
  1127. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1128. .cra_alignmask = 0,
  1129. .cra_type = &crypto_ablkcipher_type,
  1130. .cra_module = THIS_MODULE,
  1131. .cra_init = ablk_init,
  1132. .cra_exit = ablk_exit,
  1133. .cra_u = {
  1134. .ablkcipher = {
  1135. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  1136. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  1137. .ivsize = AES_BLOCK_SIZE,
  1138. .setkey = ablk_set_key,
  1139. .encrypt = ablk_encrypt,
  1140. .decrypt = ablk_decrypt,
  1141. },
  1142. },
  1143. }, {
  1144. .cra_name = "xts(aes)",
  1145. .cra_driver_name = "xts-aes-aesni",
  1146. .cra_priority = 400,
  1147. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1148. .cra_blocksize = AES_BLOCK_SIZE,
  1149. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1150. .cra_alignmask = 0,
  1151. .cra_type = &crypto_ablkcipher_type,
  1152. .cra_module = THIS_MODULE,
  1153. .cra_init = ablk_init,
  1154. .cra_exit = ablk_exit,
  1155. .cra_u = {
  1156. .ablkcipher = {
  1157. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  1158. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  1159. .ivsize = AES_BLOCK_SIZE,
  1160. .setkey = ablk_set_key,
  1161. .encrypt = ablk_encrypt,
  1162. .decrypt = ablk_decrypt,
  1163. },
  1164. },
  1165. } };
  1166. static const struct x86_cpu_id aesni_cpu_id[] = {
  1167. X86_FEATURE_MATCH(X86_FEATURE_AES),
  1168. {}
  1169. };
  1170. MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);
  1171. static int __init aesni_init(void)
  1172. {
  1173. int err;
  1174. if (!x86_match_cpu(aesni_cpu_id))
  1175. return -ENODEV;
  1176. err = crypto_fpu_init();
  1177. if (err)
  1178. return err;
  1179. return crypto_register_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1180. }
  1181. static void __exit aesni_exit(void)
  1182. {
  1183. crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1184. crypto_fpu_exit();
  1185. }
  1186. module_init(aesni_init);
  1187. module_exit(aesni_exit);
  1188. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1189. MODULE_LICENSE("GPL");
  1190. MODULE_ALIAS("aes");