tegra20_speedo.c 3.0 KB

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  1. /*
  2. * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/bug.h>
  18. #include "fuse.h"
  19. #define CPU_SPEEDO_LSBIT 20
  20. #define CPU_SPEEDO_MSBIT 29
  21. #define CPU_SPEEDO_REDUND_LSBIT 30
  22. #define CPU_SPEEDO_REDUND_MSBIT 39
  23. #define CPU_SPEEDO_REDUND_OFFS (CPU_SPEEDO_REDUND_MSBIT - CPU_SPEEDO_MSBIT)
  24. #define CORE_SPEEDO_LSBIT 40
  25. #define CORE_SPEEDO_MSBIT 47
  26. #define CORE_SPEEDO_REDUND_LSBIT 48
  27. #define CORE_SPEEDO_REDUND_MSBIT 55
  28. #define CORE_SPEEDO_REDUND_OFFS (CORE_SPEEDO_REDUND_MSBIT - CORE_SPEEDO_MSBIT)
  29. #define SPEEDO_MULT 4
  30. #define PROCESS_CORNERS_NUM 4
  31. #define SPEEDO_ID_SELECT_0(rev) ((rev) <= 2)
  32. #define SPEEDO_ID_SELECT_1(sku) \
  33. (((sku) != 20) && ((sku) != 23) && ((sku) != 24) && \
  34. ((sku) != 27) && ((sku) != 28))
  35. enum {
  36. SPEEDO_ID_0,
  37. SPEEDO_ID_1,
  38. SPEEDO_ID_2,
  39. SPEEDO_ID_COUNT,
  40. };
  41. static const u32 cpu_process_speedos[][PROCESS_CORNERS_NUM] = {
  42. {315, 366, 420, UINT_MAX},
  43. {303, 368, 419, UINT_MAX},
  44. {316, 331, 383, UINT_MAX},
  45. };
  46. static const u32 core_process_speedos[][PROCESS_CORNERS_NUM] = {
  47. {165, 195, 224, UINT_MAX},
  48. {165, 195, 224, UINT_MAX},
  49. {165, 195, 224, UINT_MAX},
  50. };
  51. void tegra20_init_speedo_data(void)
  52. {
  53. u32 reg;
  54. u32 val;
  55. int i;
  56. BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) != SPEEDO_ID_COUNT);
  57. BUILD_BUG_ON(ARRAY_SIZE(core_process_speedos) != SPEEDO_ID_COUNT);
  58. if (SPEEDO_ID_SELECT_0(tegra_revision))
  59. tegra_soc_speedo_id = SPEEDO_ID_0;
  60. else if (SPEEDO_ID_SELECT_1(tegra_sku_id))
  61. tegra_soc_speedo_id = SPEEDO_ID_1;
  62. else
  63. tegra_soc_speedo_id = SPEEDO_ID_2;
  64. val = 0;
  65. for (i = CPU_SPEEDO_MSBIT; i >= CPU_SPEEDO_LSBIT; i--) {
  66. reg = tegra_spare_fuse(i) |
  67. tegra_spare_fuse(i + CPU_SPEEDO_REDUND_OFFS);
  68. val = (val << 1) | (reg & 0x1);
  69. }
  70. val = val * SPEEDO_MULT;
  71. pr_debug("%s CPU speedo value %u\n", __func__, val);
  72. for (i = 0; i < (PROCESS_CORNERS_NUM - 1); i++) {
  73. if (val <= cpu_process_speedos[tegra_soc_speedo_id][i])
  74. break;
  75. }
  76. tegra_cpu_process_id = i;
  77. val = 0;
  78. for (i = CORE_SPEEDO_MSBIT; i >= CORE_SPEEDO_LSBIT; i--) {
  79. reg = tegra_spare_fuse(i) |
  80. tegra_spare_fuse(i + CORE_SPEEDO_REDUND_OFFS);
  81. val = (val << 1) | (reg & 0x1);
  82. }
  83. val = val * SPEEDO_MULT;
  84. pr_debug("%s Core speedo value %u\n", __func__, val);
  85. for (i = 0; i < (PROCESS_CORNERS_NUM - 1); i++) {
  86. if (val <= core_process_speedos[tegra_soc_speedo_id][i])
  87. break;
  88. }
  89. tegra_core_process_id = i;
  90. pr_info("Tegra20 Soc Speedo ID %d", tegra_soc_speedo_id);
  91. }