swiotlb.c 24 KB

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  1. /*
  2. * Dynamic DMA mapping support.
  3. *
  4. * This implementation is a fallback for platforms that do not support
  5. * I/O TLBs (aka DMA address translation hardware).
  6. * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
  7. * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
  8. * Copyright (C) 2000, 2003 Hewlett-Packard Co
  9. * David Mosberger-Tang <davidm@hpl.hp.com>
  10. *
  11. * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
  12. * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
  13. * unnecessary i-cache flushing.
  14. * 04/07/.. ak Better overflow handling. Assorted fixes.
  15. * 05/09/10 linville Add support for syncing ranges, support syncing for
  16. * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
  17. */
  18. #include <linux/cache.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/mm.h>
  21. #include <linux/module.h>
  22. #include <linux/spinlock.h>
  23. #include <linux/swiotlb.h>
  24. #include <linux/string.h>
  25. #include <linux/swiotlb.h>
  26. #include <linux/types.h>
  27. #include <linux/ctype.h>
  28. #include <asm/io.h>
  29. #include <asm/dma.h>
  30. #include <asm/scatterlist.h>
  31. #include <linux/init.h>
  32. #include <linux/bootmem.h>
  33. #include <linux/iommu-helper.h>
  34. #define OFFSET(val,align) ((unsigned long) \
  35. ( (val) & ( (align) - 1)))
  36. #define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg)))
  37. #define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
  38. #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
  39. /*
  40. * Minimum IO TLB size to bother booting with. Systems with mainly
  41. * 64bit capable cards will only lightly use the swiotlb. If we can't
  42. * allocate a contiguous 1MB, we're probably in trouble anyway.
  43. */
  44. #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
  45. /*
  46. * Enumeration for sync targets
  47. */
  48. enum dma_sync_target {
  49. SYNC_FOR_CPU = 0,
  50. SYNC_FOR_DEVICE = 1,
  51. };
  52. int swiotlb_force;
  53. /*
  54. * Used to do a quick range check in swiotlb_unmap_single and
  55. * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
  56. * API.
  57. */
  58. static char *io_tlb_start, *io_tlb_end;
  59. /*
  60. * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
  61. * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
  62. */
  63. static unsigned long io_tlb_nslabs;
  64. /*
  65. * When the IOMMU overflows we return a fallback buffer. This sets the size.
  66. */
  67. static unsigned long io_tlb_overflow = 32*1024;
  68. void *io_tlb_overflow_buffer;
  69. /*
  70. * This is a free list describing the number of free entries available from
  71. * each index
  72. */
  73. static unsigned int *io_tlb_list;
  74. static unsigned int io_tlb_index;
  75. /*
  76. * We need to save away the original address corresponding to a mapped entry
  77. * for the sync operations.
  78. */
  79. static unsigned char **io_tlb_orig_addr;
  80. /*
  81. * Protect the above data structures in the map and unmap calls
  82. */
  83. static DEFINE_SPINLOCK(io_tlb_lock);
  84. static int __init
  85. setup_io_tlb_npages(char *str)
  86. {
  87. if (isdigit(*str)) {
  88. io_tlb_nslabs = simple_strtoul(str, &str, 0);
  89. /* avoid tail segment of size < IO_TLB_SEGSIZE */
  90. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  91. }
  92. if (*str == ',')
  93. ++str;
  94. if (!strcmp(str, "force"))
  95. swiotlb_force = 1;
  96. return 1;
  97. }
  98. __setup("swiotlb=", setup_io_tlb_npages);
  99. /* make io_tlb_overflow tunable too? */
  100. void * __weak swiotlb_alloc_boot(size_t size, unsigned long nslabs)
  101. {
  102. return alloc_bootmem_low_pages(size);
  103. }
  104. void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs)
  105. {
  106. return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
  107. }
  108. /*
  109. * Statically reserve bounce buffer space and initialize bounce buffer data
  110. * structures for the software IO TLB used to implement the DMA API.
  111. */
  112. void __init
  113. swiotlb_init_with_default_size(size_t default_size)
  114. {
  115. unsigned long i, bytes;
  116. if (!io_tlb_nslabs) {
  117. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  118. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  119. }
  120. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  121. /*
  122. * Get IO TLB memory from the low pages
  123. */
  124. io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs);
  125. if (!io_tlb_start)
  126. panic("Cannot allocate SWIOTLB buffer");
  127. io_tlb_end = io_tlb_start + bytes;
  128. /*
  129. * Allocate and initialize the free list array. This array is used
  130. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  131. * between io_tlb_start and io_tlb_end.
  132. */
  133. io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
  134. for (i = 0; i < io_tlb_nslabs; i++)
  135. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  136. io_tlb_index = 0;
  137. io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
  138. /*
  139. * Get the overflow emergency buffer
  140. */
  141. io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
  142. if (!io_tlb_overflow_buffer)
  143. panic("Cannot allocate SWIOTLB overflow buffer!\n");
  144. printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
  145. virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
  146. }
  147. void __init
  148. swiotlb_init(void)
  149. {
  150. swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
  151. }
  152. /*
  153. * Systems with larger DMA zones (those that don't support ISA) can
  154. * initialize the swiotlb later using the slab allocator if needed.
  155. * This should be just like above, but with some error catching.
  156. */
  157. int
  158. swiotlb_late_init_with_default_size(size_t default_size)
  159. {
  160. unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
  161. unsigned int order;
  162. if (!io_tlb_nslabs) {
  163. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  164. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  165. }
  166. /*
  167. * Get IO TLB memory from the low pages
  168. */
  169. order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
  170. io_tlb_nslabs = SLABS_PER_PAGE << order;
  171. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  172. while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
  173. io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs);
  174. if (io_tlb_start)
  175. break;
  176. order--;
  177. }
  178. if (!io_tlb_start)
  179. goto cleanup1;
  180. if (order != get_order(bytes)) {
  181. printk(KERN_WARNING "Warning: only able to allocate %ld MB "
  182. "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
  183. io_tlb_nslabs = SLABS_PER_PAGE << order;
  184. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  185. }
  186. io_tlb_end = io_tlb_start + bytes;
  187. memset(io_tlb_start, 0, bytes);
  188. /*
  189. * Allocate and initialize the free list array. This array is used
  190. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  191. * between io_tlb_start and io_tlb_end.
  192. */
  193. io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
  194. get_order(io_tlb_nslabs * sizeof(int)));
  195. if (!io_tlb_list)
  196. goto cleanup2;
  197. for (i = 0; i < io_tlb_nslabs; i++)
  198. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  199. io_tlb_index = 0;
  200. io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL,
  201. get_order(io_tlb_nslabs * sizeof(char *)));
  202. if (!io_tlb_orig_addr)
  203. goto cleanup3;
  204. memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *));
  205. /*
  206. * Get the overflow emergency buffer
  207. */
  208. io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
  209. get_order(io_tlb_overflow));
  210. if (!io_tlb_overflow_buffer)
  211. goto cleanup4;
  212. printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - "
  213. "0x%lx\n", bytes >> 20,
  214. virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
  215. return 0;
  216. cleanup4:
  217. free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
  218. sizeof(char *)));
  219. io_tlb_orig_addr = NULL;
  220. cleanup3:
  221. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  222. sizeof(int)));
  223. io_tlb_list = NULL;
  224. cleanup2:
  225. io_tlb_end = NULL;
  226. free_pages((unsigned long)io_tlb_start, order);
  227. io_tlb_start = NULL;
  228. cleanup1:
  229. io_tlb_nslabs = req_nslabs;
  230. return -ENOMEM;
  231. }
  232. static int
  233. address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
  234. {
  235. return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
  236. }
  237. static int is_swiotlb_buffer(char *addr)
  238. {
  239. return addr >= io_tlb_start && addr < io_tlb_end;
  240. }
  241. /*
  242. * Allocates bounce buffer and returns its kernel virtual address.
  243. */
  244. static void *
  245. map_single(struct device *hwdev, char *buffer, size_t size, int dir)
  246. {
  247. unsigned long flags;
  248. char *dma_addr;
  249. unsigned int nslots, stride, index, wrap;
  250. int i;
  251. unsigned long start_dma_addr;
  252. unsigned long mask;
  253. unsigned long offset_slots;
  254. unsigned long max_slots;
  255. mask = dma_get_seg_boundary(hwdev);
  256. start_dma_addr = virt_to_bus(io_tlb_start) & mask;
  257. offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  258. max_slots = mask + 1
  259. ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
  260. : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
  261. /*
  262. * For mappings greater than a page, we limit the stride (and
  263. * hence alignment) to a page size.
  264. */
  265. nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  266. if (size > PAGE_SIZE)
  267. stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
  268. else
  269. stride = 1;
  270. BUG_ON(!nslots);
  271. /*
  272. * Find suitable number of IO TLB entries size that will fit this
  273. * request and allocate a buffer from that IO TLB pool.
  274. */
  275. spin_lock_irqsave(&io_tlb_lock, flags);
  276. index = ALIGN(io_tlb_index, stride);
  277. if (index >= io_tlb_nslabs)
  278. index = 0;
  279. wrap = index;
  280. do {
  281. while (iommu_is_span_boundary(index, nslots, offset_slots,
  282. max_slots)) {
  283. index += stride;
  284. if (index >= io_tlb_nslabs)
  285. index = 0;
  286. if (index == wrap)
  287. goto not_found;
  288. }
  289. /*
  290. * If we find a slot that indicates we have 'nslots' number of
  291. * contiguous buffers, we allocate the buffers from that slot
  292. * and mark the entries as '0' indicating unavailable.
  293. */
  294. if (io_tlb_list[index] >= nslots) {
  295. int count = 0;
  296. for (i = index; i < (int) (index + nslots); i++)
  297. io_tlb_list[i] = 0;
  298. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
  299. io_tlb_list[i] = ++count;
  300. dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
  301. /*
  302. * Update the indices to avoid searching in the next
  303. * round.
  304. */
  305. io_tlb_index = ((index + nslots) < io_tlb_nslabs
  306. ? (index + nslots) : 0);
  307. goto found;
  308. }
  309. index += stride;
  310. if (index >= io_tlb_nslabs)
  311. index = 0;
  312. } while (index != wrap);
  313. not_found:
  314. spin_unlock_irqrestore(&io_tlb_lock, flags);
  315. return NULL;
  316. found:
  317. spin_unlock_irqrestore(&io_tlb_lock, flags);
  318. /*
  319. * Save away the mapping from the original address to the DMA address.
  320. * This is needed when we sync the memory. Then we sync the buffer if
  321. * needed.
  322. */
  323. for (i = 0; i < nslots; i++)
  324. io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT);
  325. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  326. memcpy(dma_addr, buffer, size);
  327. return dma_addr;
  328. }
  329. /*
  330. * dma_addr is the kernel virtual address of the bounce buffer to unmap.
  331. */
  332. static void
  333. unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
  334. {
  335. unsigned long flags;
  336. int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  337. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  338. char *buffer = io_tlb_orig_addr[index];
  339. /*
  340. * First, sync the memory before unmapping the entry
  341. */
  342. if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
  343. /*
  344. * bounce... copy the data back into the original buffer * and
  345. * delete the bounce buffer.
  346. */
  347. memcpy(buffer, dma_addr, size);
  348. /*
  349. * Return the buffer to the free list by setting the corresponding
  350. * entries to indicate the number of contigous entries available.
  351. * While returning the entries to the free list, we merge the entries
  352. * with slots below and above the pool being returned.
  353. */
  354. spin_lock_irqsave(&io_tlb_lock, flags);
  355. {
  356. count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
  357. io_tlb_list[index + nslots] : 0);
  358. /*
  359. * Step 1: return the slots to the free list, merging the
  360. * slots with superceeding slots
  361. */
  362. for (i = index + nslots - 1; i >= index; i--)
  363. io_tlb_list[i] = ++count;
  364. /*
  365. * Step 2: merge the returned slots with the preceding slots,
  366. * if available (non zero)
  367. */
  368. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  369. io_tlb_list[i] = ++count;
  370. }
  371. spin_unlock_irqrestore(&io_tlb_lock, flags);
  372. }
  373. static void
  374. sync_single(struct device *hwdev, char *dma_addr, size_t size,
  375. int dir, int target)
  376. {
  377. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  378. char *buffer = io_tlb_orig_addr[index];
  379. buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
  380. switch (target) {
  381. case SYNC_FOR_CPU:
  382. if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
  383. memcpy(buffer, dma_addr, size);
  384. else
  385. BUG_ON(dir != DMA_TO_DEVICE);
  386. break;
  387. case SYNC_FOR_DEVICE:
  388. if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
  389. memcpy(dma_addr, buffer, size);
  390. else
  391. BUG_ON(dir != DMA_FROM_DEVICE);
  392. break;
  393. default:
  394. BUG();
  395. }
  396. }
  397. void *
  398. swiotlb_alloc_coherent(struct device *hwdev, size_t size,
  399. dma_addr_t *dma_handle, gfp_t flags)
  400. {
  401. dma_addr_t dev_addr;
  402. void *ret;
  403. int order = get_order(size);
  404. u64 dma_mask = DMA_32BIT_MASK;
  405. if (hwdev && hwdev->coherent_dma_mask)
  406. dma_mask = hwdev->coherent_dma_mask;
  407. ret = (void *)__get_free_pages(flags, order);
  408. if (ret && !is_buffer_dma_capable(dma_mask, virt_to_bus(ret), size)) {
  409. /*
  410. * The allocated memory isn't reachable by the device.
  411. * Fall back on swiotlb_map_single().
  412. */
  413. free_pages((unsigned long) ret, order);
  414. ret = NULL;
  415. }
  416. if (!ret) {
  417. /*
  418. * We are either out of memory or the device can't DMA
  419. * to GFP_DMA memory; fall back on
  420. * swiotlb_map_single(), which will grab memory from
  421. * the lowest available address range.
  422. */
  423. ret = map_single(hwdev, NULL, size, DMA_FROM_DEVICE);
  424. if (!ret)
  425. return NULL;
  426. }
  427. memset(ret, 0, size);
  428. dev_addr = virt_to_bus(ret);
  429. /* Confirm address can be DMA'd by device */
  430. if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) {
  431. printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
  432. (unsigned long long)dma_mask,
  433. (unsigned long long)dev_addr);
  434. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  435. unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
  436. return NULL;
  437. }
  438. *dma_handle = dev_addr;
  439. return ret;
  440. }
  441. void
  442. swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
  443. dma_addr_t dma_handle)
  444. {
  445. WARN_ON(irqs_disabled());
  446. if (!is_swiotlb_buffer(vaddr))
  447. free_pages((unsigned long) vaddr, get_order(size));
  448. else
  449. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  450. unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
  451. }
  452. static void
  453. swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
  454. {
  455. /*
  456. * Ran out of IOMMU space for this operation. This is very bad.
  457. * Unfortunately the drivers cannot handle this operation properly.
  458. * unless they check for dma_mapping_error (most don't)
  459. * When the mapping is small enough return a static buffer to limit
  460. * the damage, or panic when the transfer is too big.
  461. */
  462. printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
  463. "device %s\n", size, dev ? dev->bus_id : "?");
  464. if (size > io_tlb_overflow && do_panic) {
  465. if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
  466. panic("DMA: Memory would be corrupted\n");
  467. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  468. panic("DMA: Random memory would be DMAed\n");
  469. }
  470. }
  471. /*
  472. * Map a single buffer of the indicated size for DMA in streaming mode. The
  473. * physical address to use is returned.
  474. *
  475. * Once the device is given the dma address, the device owns this memory until
  476. * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
  477. */
  478. dma_addr_t
  479. swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size,
  480. int dir, struct dma_attrs *attrs)
  481. {
  482. dma_addr_t dev_addr = virt_to_bus(ptr);
  483. void *map;
  484. BUG_ON(dir == DMA_NONE);
  485. /*
  486. * If the pointer passed in happens to be in the device's DMA window,
  487. * we can safely return the device addr and not worry about bounce
  488. * buffering it.
  489. */
  490. if (!address_needs_mapping(hwdev, dev_addr, size) && !swiotlb_force)
  491. return dev_addr;
  492. /*
  493. * Oh well, have to allocate and map a bounce buffer.
  494. */
  495. map = map_single(hwdev, ptr, size, dir);
  496. if (!map) {
  497. swiotlb_full(hwdev, size, dir, 1);
  498. map = io_tlb_overflow_buffer;
  499. }
  500. dev_addr = virt_to_bus(map);
  501. /*
  502. * Ensure that the address returned is DMA'ble
  503. */
  504. if (address_needs_mapping(hwdev, dev_addr, size))
  505. panic("map_single: bounce buffer is not DMA'ble");
  506. return dev_addr;
  507. }
  508. EXPORT_SYMBOL(swiotlb_map_single_attrs);
  509. dma_addr_t
  510. swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
  511. {
  512. return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL);
  513. }
  514. /*
  515. * Unmap a single streaming mode DMA translation. The dma_addr and size must
  516. * match what was provided for in a previous swiotlb_map_single call. All
  517. * other usages are undefined.
  518. *
  519. * After this call, reads by the cpu to the buffer are guaranteed to see
  520. * whatever the device wrote there.
  521. */
  522. void
  523. swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr,
  524. size_t size, int dir, struct dma_attrs *attrs)
  525. {
  526. char *dma_addr = bus_to_virt(dev_addr);
  527. BUG_ON(dir == DMA_NONE);
  528. if (is_swiotlb_buffer(dma_addr))
  529. unmap_single(hwdev, dma_addr, size, dir);
  530. else if (dir == DMA_FROM_DEVICE)
  531. dma_mark_clean(dma_addr, size);
  532. }
  533. EXPORT_SYMBOL(swiotlb_unmap_single_attrs);
  534. void
  535. swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
  536. int dir)
  537. {
  538. return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL);
  539. }
  540. /*
  541. * Make physical memory consistent for a single streaming mode DMA translation
  542. * after a transfer.
  543. *
  544. * If you perform a swiotlb_map_single() but wish to interrogate the buffer
  545. * using the cpu, yet do not wish to teardown the dma mapping, you must
  546. * call this function before doing so. At the next point you give the dma
  547. * address back to the card, you must first perform a
  548. * swiotlb_dma_sync_for_device, and then the device again owns the buffer
  549. */
  550. static void
  551. swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
  552. size_t size, int dir, int target)
  553. {
  554. char *dma_addr = bus_to_virt(dev_addr);
  555. BUG_ON(dir == DMA_NONE);
  556. if (is_swiotlb_buffer(dma_addr))
  557. sync_single(hwdev, dma_addr, size, dir, target);
  558. else if (dir == DMA_FROM_DEVICE)
  559. dma_mark_clean(dma_addr, size);
  560. }
  561. void
  562. swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  563. size_t size, int dir)
  564. {
  565. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
  566. }
  567. void
  568. swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
  569. size_t size, int dir)
  570. {
  571. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
  572. }
  573. /*
  574. * Same as above, but for a sub-range of the mapping.
  575. */
  576. static void
  577. swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
  578. unsigned long offset, size_t size,
  579. int dir, int target)
  580. {
  581. char *dma_addr = bus_to_virt(dev_addr) + offset;
  582. BUG_ON(dir == DMA_NONE);
  583. if (is_swiotlb_buffer(dma_addr))
  584. sync_single(hwdev, dma_addr, size, dir, target);
  585. else if (dir == DMA_FROM_DEVICE)
  586. dma_mark_clean(dma_addr, size);
  587. }
  588. void
  589. swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  590. unsigned long offset, size_t size, int dir)
  591. {
  592. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  593. SYNC_FOR_CPU);
  594. }
  595. void
  596. swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
  597. unsigned long offset, size_t size, int dir)
  598. {
  599. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  600. SYNC_FOR_DEVICE);
  601. }
  602. void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int,
  603. struct dma_attrs *);
  604. /*
  605. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  606. * This is the scatter-gather version of the above swiotlb_map_single
  607. * interface. Here the scatter gather list elements are each tagged with the
  608. * appropriate dma address and length. They are obtained via
  609. * sg_dma_{address,length}(SG).
  610. *
  611. * NOTE: An implementation may be able to use a smaller number of
  612. * DMA address/length pairs than there are SG table elements.
  613. * (for example via virtual mapping capabilities)
  614. * The routine returns the number of addr/length pairs actually
  615. * used, at most nents.
  616. *
  617. * Device ownership issues as mentioned above for swiotlb_map_single are the
  618. * same here.
  619. */
  620. int
  621. swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
  622. int dir, struct dma_attrs *attrs)
  623. {
  624. struct scatterlist *sg;
  625. void *addr;
  626. dma_addr_t dev_addr;
  627. int i;
  628. BUG_ON(dir == DMA_NONE);
  629. for_each_sg(sgl, sg, nelems, i) {
  630. addr = SG_ENT_VIRT_ADDRESS(sg);
  631. dev_addr = virt_to_bus(addr);
  632. if (swiotlb_force ||
  633. address_needs_mapping(hwdev, dev_addr, sg->length)) {
  634. void *map = map_single(hwdev, addr, sg->length, dir);
  635. if (!map) {
  636. /* Don't panic here, we expect map_sg users
  637. to do proper error handling. */
  638. swiotlb_full(hwdev, sg->length, dir, 0);
  639. swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
  640. attrs);
  641. sgl[0].dma_length = 0;
  642. return 0;
  643. }
  644. sg->dma_address = virt_to_bus(map);
  645. } else
  646. sg->dma_address = dev_addr;
  647. sg->dma_length = sg->length;
  648. }
  649. return nelems;
  650. }
  651. EXPORT_SYMBOL(swiotlb_map_sg_attrs);
  652. int
  653. swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  654. int dir)
  655. {
  656. return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  657. }
  658. /*
  659. * Unmap a set of streaming mode DMA translations. Again, cpu read rules
  660. * concerning calls here are the same as for swiotlb_unmap_single() above.
  661. */
  662. void
  663. swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
  664. int nelems, int dir, struct dma_attrs *attrs)
  665. {
  666. struct scatterlist *sg;
  667. int i;
  668. BUG_ON(dir == DMA_NONE);
  669. for_each_sg(sgl, sg, nelems, i) {
  670. if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
  671. unmap_single(hwdev, bus_to_virt(sg->dma_address),
  672. sg->dma_length, dir);
  673. else if (dir == DMA_FROM_DEVICE)
  674. dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
  675. }
  676. }
  677. EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
  678. void
  679. swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  680. int dir)
  681. {
  682. return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  683. }
  684. /*
  685. * Make physical memory consistent for a set of streaming mode DMA translations
  686. * after a transfer.
  687. *
  688. * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
  689. * and usage.
  690. */
  691. static void
  692. swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
  693. int nelems, int dir, int target)
  694. {
  695. struct scatterlist *sg;
  696. int i;
  697. BUG_ON(dir == DMA_NONE);
  698. for_each_sg(sgl, sg, nelems, i) {
  699. if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
  700. sync_single(hwdev, bus_to_virt(sg->dma_address),
  701. sg->dma_length, dir, target);
  702. else if (dir == DMA_FROM_DEVICE)
  703. dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
  704. }
  705. }
  706. void
  707. swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
  708. int nelems, int dir)
  709. {
  710. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
  711. }
  712. void
  713. swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
  714. int nelems, int dir)
  715. {
  716. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
  717. }
  718. int
  719. swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
  720. {
  721. return (dma_addr == virt_to_bus(io_tlb_overflow_buffer));
  722. }
  723. /*
  724. * Return whether the given device DMA address mask can be supported
  725. * properly. For example, if your device can only drive the low 24-bits
  726. * during bus mastering, then you would pass 0x00ffffff as the mask to
  727. * this function.
  728. */
  729. int
  730. swiotlb_dma_supported(struct device *hwdev, u64 mask)
  731. {
  732. return virt_to_bus(io_tlb_end - 1) <= mask;
  733. }
  734. EXPORT_SYMBOL(swiotlb_map_single);
  735. EXPORT_SYMBOL(swiotlb_unmap_single);
  736. EXPORT_SYMBOL(swiotlb_map_sg);
  737. EXPORT_SYMBOL(swiotlb_unmap_sg);
  738. EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
  739. EXPORT_SYMBOL(swiotlb_sync_single_for_device);
  740. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
  741. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
  742. EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
  743. EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
  744. EXPORT_SYMBOL(swiotlb_dma_mapping_error);
  745. EXPORT_SYMBOL(swiotlb_alloc_coherent);
  746. EXPORT_SYMBOL(swiotlb_free_coherent);
  747. EXPORT_SYMBOL(swiotlb_dma_supported);