 David S. Miller
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36a68e77c5
[SPARC64]: Simplify sun4v TLB handling using macros.
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19 years ago |
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David S. Miller
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164c220fa3
[SPARC64]: Fix hypervisor call arg passing.
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19 years ago |
|
David S. Miller
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618e9ed98a
[SPARC64]: Hypervisor TSB context switching.
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19 years ago |
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David S. Miller
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aa9143b971
[SPARC64]: Implement sun4v TSB miss handlers.
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19 years ago |
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David S. Miller
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df7d6aec96
[SPARC64]: Rename gl_{1,2}insn_patch --> sun4v_{1,2}insn_patch
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19 years ago |
|
David S. Miller
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d257d5da39
[SPARC64]: Initial sun4v TLB miss handling infrastructure.
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19 years ago |
|
David S. Miller
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45fec05f80
[SPARC64]: Sanitize %pstate writes for sun4v.
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19 years ago |
|
David S. Miller
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314ef68597
[SPARC64]: Refine register window trap handling.
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19 years ago |
|
David S. Miller
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ffe483d552
[SPARC64]: Add explicit register args to trap state loading macros.
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19 years ago |
|
David S. Miller
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517af33237
[SPARC64]: Access TSB with physical addresses when possible.
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19 years ago |
 David S. Miller
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9bc657b28e
[SPARC64]: Fix too early reference to %g6
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19 years ago |
|
David S. Miller
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3487d1d441
[SPARC64]: Kill PROM locked TLB entry preservation code.
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19 years ago |
|
David S. Miller
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6b6d017235
[SPARC64]: Use sparc64_highest_unlocked_tlb_ent in __tsb_context_switch()
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19 years ago |
|
David S. Miller
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b70c0fa161
[SPARC64]: Preload TSB entries from update_mmu_cache().
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19 years ago |
|
David S. Miller
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98c5584cfc
[SPARC64]: Add infrastructure for dynamic TSB sizing.
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19 years ago |
|
David S. Miller
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09f94287f7
[SPARC64]: TSB refinements.
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19 years ago |
|
David S. Miller
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56fb4df6da
[SPARC64]: Elminate all usage of hard-coded trap globals.
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19 years ago |
|
David S. Miller
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74bf4312ff
[SPARC64]: Move away from virtual page tables, part 1.
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19 years ago |
