Historique des commits

Auteur SHA1 Message Date
  Ralf Baechle 441ee341ad [MIPS] Fix RM9000 wait instruction detection. il y a 19 ans
  Atsushi Nemoto 60a6c3777e [MIPS] Reduce race between cpu_wait() and need_resched() checking il y a 19 ans
  Thiemo Seufer c36cd4bab5 [MIPS] Save 2k text size in cpu-probe il y a 19 ans
  Thiemo Seufer 3a01c49ad8 [MIPS] Uses MIPS_CONF_AR instead of magic constants. il y a 19 ans
  Jörn Engel 6ab3d5624e Remove obsolete #include <linux/config.h> il y a 19 ans
  Chris Dearman 9318c51acd [MIPS] MIPS32/MIPS64 secondary cache management il y a 19 ans
  Ralf Baechle aa32374aaa [MIPS] SB1: Only pass1 FPUs are broken beyond recovery. il y a 19 ans
  Kumba 44d921b246 [MIPS] Treat R14000 like R10000. il y a 19 ans
  Chris Dearman c620953c32 [MIPS] Fix detection and handling of the 74K processor. il y a 19 ans
  Ralf Baechle a3dddd560e [MIPS] War on whitespace: cleanup initial spaces followed by tabs. il y a 19 ans
  Ralf Baechle 010b853b3a [MIPS] Get rid of CONFIG_SB1_PASS_1_WORKAROUNDS #ifdef crapola. il y a 19 ans
  Ralf Baechle b4672d3729 MIPS: Introduce machinery for testing for MIPSxxR1/2. il y a 19 ans
  Ralf Baechle e7958bb90d MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1. il y a 19 ans
  Ralf Baechle 8b36612a23 [MIPS] R10000 and R12000 need to set MIPS_CPU_4K_CACHE ... il y a 19 ans
  Andrew Isaacson 93ce2f524e Add support for SB1A CPU. il y a 19 ans
  Andrew Isaacson d121ced21d Sibyte fixes il y a 19 ans
  Ralf Baechle 8afcb5d829 Detect 4KSD and treat it like 4KSc. il y a 19 ans
  Ralf Baechle 02cf211968 Cleanup the mess in cpu_cache_init. il y a 19 ans
  Thiemo Seufer 075e7502d9 R4600 has 32 FPRs. il y a 20 ans
  Pete Popov bdf21b18b4 Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it. il y a 20 ans
  Ralf Baechle 8f40611d2b Detect the MIPS R2 vectored interrupt, external interrupt controller il y a 20 ans
  Ralf Baechle 55d04dff0f New kernel option nowait allows disabling the use of the wait instruction. il y a 20 ans
  Ralf Baechle bbc7f22f6d Detect the 34K. il y a 20 ans
  Maciej W. Rozycki d5b6f1db5d For MIPS32/MIPS64 cp0.config.mt == 1 implies a standard (R4k-style) il y a 20 ans
  Ralf Baechle e50c0a8fa6 Support the MIPS32 / MIPS64 DSP ASE. il y a 20 ans
  Ralf Baechle 10f650db1b 64-bit fixes for Alchemy code ;) il y a 20 ans
  Ralf Baechle b382fe8483 No point in checking cpu_has_tlb before we've computed the CPU options. il y a 20 ans
  Ralf Baechle 4194318c39 Cleanup decoding of MIPSxx config registers. il y a 20 ans
  Ralf Baechle f03da6e28e Fix BogoMIPS display on UP and some minor cosmetical things. il y a 20 ans
  Ralf Baechle 2b07bd0235 Detect the 4KEcR2 and for now detect handle it like the 4KEc. il y a 20 ans