 Ralf Baechle
|
39b8d52542
[MIPS] Add support for MIPS CMP platform.
|
il y a 17 ans |
 Chris Dearman
|
0bfa130e74
[MIPS] Remove TLB sanitation code
|
il y a 17 ans |
|
Ralf Baechle
|
87353d8ac3
[MIPS] SMP: Call platform methods via ops structure.
|
il y a 17 ans |
|
Ralf Baechle
|
0ab7aefc4d
[MIPS] MT: Scheduler support for SMT
|
il y a 18 ans |
|
Ralf Baechle
|
49a89efbbb
[MIPS] Fix "no space between function name and open parenthesis" warnings.
|
il y a 17 ans |
|
Ralf Baechle
|
428ab280a0
[MIPS] SMP: Scatter __cpuinit over the code as needed.
|
il y a 18 ans |
|
Ralf Baechle
|
8c976e3451
[MIPS] VSMP: Fix initialization ordering bug.
|
il y a 18 ans |
|
Chris Dearman
|
ffe9ee4709
[MIPS] Separate performance counter interrupts
|
il y a 18 ans |
 Atsushi Nemoto
|
97dcb82de6
[MIPS] Define MIPS_CPU_IRQ_BASE in generic header
|
il y a 18 ans |
|
Atsushi Nemoto
|
1417836e81
[MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq
|
il y a 18 ans |
|
Ralf Baechle
|
70e46f48cb
[MIPS] VSMP: Synchronize cp0 counters on bootup.
|
il y a 18 ans |
|
Ralf Baechle
|
781b0f8d4f
[MIPS] VSMP: Fix initialization ordering bug.
|
il y a 18 ans |
|
Ralf Baechle
|
937a801576
[MIPS] Complete fixes after removal of pt_regs argument to int handlers.
|
il y a 18 ans |
|
Chris Dearman
|
847b9dfcca
[MIPS] MT: Initialise all writable bits in Cause register to zero.
|
il y a 19 ans |
 Thomas Gleixner
|
f40298fddc
[PATCH] irq-flags: MIPS: Use the new IRQF_ constants
|
il y a 19 ans |
|
Ralf Baechle
|
f088fc84f9
[MIPS] FPU affinity for MT ASE.
|
il y a 19 ans |
|
Ralf Baechle
|
41c594ab65
[MIPS] MT: Improved multithreading support.
|
il y a 19 ans |
